Storage circuits and devices

By setting a power circuit and protocol chip in the storage circuit, using the battery cell power for power supply, and combining with the wireless charging module to optimize the power supply path, the problem that mobile terminal devices cannot charge and transmit data at the same time is solved, the single-port multi-purpose function is realized, and the convenience of use and power management efficiency are improved.

CN119557254BActive Publication Date: 2025-09-09SHENZHEN SPEEDMOBILE TECH CO LTD
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Patent Information

Application Number
CN202510137552.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-02-07
Publication Date
2025-09-09
Estimated Expiration
2045-02-07

AI Technical Summary

Technical Problem

Mobile terminal devices cannot charge and transmit data at the same time, and the power is consumed too quickly when connected to an external storage device, requiring additional connection to an expansion dock, etc., which makes use inconvenient.

Method used

A power supply circuit and a protocol chip are set in the storage circuit to realize data transmission and battery charging/discharging through a single connection port. The battery power is used for power supply. The power supply path is optimized by combining the wireless charging module and the switching circuit. The power supply direction is controlled according to the handshake signal and the battery status.

Benefits of technology

It realizes data transmission and battery cell charging/discharging at the same time on a single connection port, solves the problem of balancing charging and data transmission, prevents disconnection caused by insufficient power, and improves convenience of use.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a storage circuit and device, which includes a memory module, a power supply circuit, a protocol chip, and a connection port; the connection port is used to connect to an external device; the protocol chip is used to obtain a handshake signal; the memory module is connected to the connection port; the power supply circuit is used to control the battery cell to power the memory module and charge the external device when the handshake signal is a first discharge signal, or to control the external device to power the memory module; when the handshake signal is a charging signal, control the external device to power the memory module, or to control the external device to power the memory module and charge the battery cell. This storage circuit can realize simultaneous data transmission and external charging / discharging of the battery cell at a single connection port, realizing energy storage, charging, and data storage and transmission functions in one stop.
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Description

Technical Field

[0001] The present invention relates to the field of storage technology, and in particular to a storage circuit and device. Background Art

[0002] The USB Type-C interface is now common in mobile devices, allowing them to connect to external data storage devices to expand their capacity or facilitate efficient and convenient data transfer. However, to reduce device thickness and size, many mobile devices only retain a single data port, making it impossible to simultaneously charge and transfer data. Furthermore, when connected to an external data storage device, the mobile terminal not only consumes power itself but also needs to power the storage device, which depletes the battery even faster. To achieve both charging and data transfer functions, an expansion dock is required, which clutters the connection cables and makes it inconvenient for daily use. Summary of the Invention

[0003] The embodiments of the present invention provide a storage circuit and device to solve the problem that existing mobile terminal devices are inconvenient to perform data transmission and charging at the same time.

[0004] An embodiment of the present invention provides a storage circuit, including a memory module, a power supply circuit, a protocol chip, and a connection port;

[0005] The connection port is used to connect to an external device to perform charging and discharging and / or data transmission with the external device;

[0006] The protocol chip is connected to the connection port and is used to communicate with the external device through the connection port to obtain a handshake signal;

[0007] The memory module is connected to the connection port;

[0008] The power supply circuit is used to connect the battery cell and is also connected to the memory module, the connection port and the protocol chip, and is used to control the battery cell to supply power to the memory module and charge the external device through the connection port when the handshake signal is a first discharge signal, or control the external device to supply power to the memory module;

[0009] When the handshake signal is a charging signal, the external device is controlled to supply power to the memory module through the connection port, or the external device is controlled to supply power to the memory module and charge the battery cell through the connection port.

[0010] Preferably, the power supply circuit is further used to obtain the cell status corresponding to the cell;

[0011] The power supply circuit is configured to control the battery cell to supply power to the memory module and charge the external device through the connection port when the handshake signal is a first discharge signal and the battery cell is in a normal state;

[0012] When the handshake signal is a first discharge signal and the battery cell state is an abnormal state, controlling an external device to supply power to the memory module;

[0013] When the handshake signal is a charging signal and the battery cell is in a normal state, controlling an external device to supply power to the memory module and charge the battery cell;

[0014] When the handshake signal is a charging signal and the battery cell state is abnormal, an external device is controlled to supply power to the memory module.

[0015] Preferably, the memory module includes a memory chip and a first buck circuit;

[0016] The memory chip is connected to the connection port and is used for data transmission with an external device;

[0017] The power supply circuit is connected to the memory chip through the first buck circuit and is used to supply power to the memory chip based on a preset power supply power.

[0018] Preferably, the protocol chip is connected to the first buck circuit, and is used to control the shutdown of the first buck circuit when the handshake signal is a fast charging signal.

[0019] Preferably, the first buck circuit includes a buck chip, a first inductor and a first capacitor;

[0020] The output end of the buck chip is connected to the first end of the first inductor, and the second end of the first inductor is connected to the memory chip;

[0021] A first end of the first capacitor is connected to a connection node between the first inductor and the storage chip, and a second end of the first capacitor is grounded.

[0022] Preferably, the power supply circuit includes a second buck circuit, a first power supply chip and a first switch circuit;

[0023] A first end of the second buck circuit is used to connect to a battery cell, a second end of the second buck circuit is connected to the first switch circuit via the first power chip, and the first switch circuit is connected to the connection port and the memory module;

[0024] The first power chip is connected to the battery cell and the protocol chip, and is configured to control the second buck circuit to not operate and the first switch circuit to operate when the handshake signal is a first discharge signal, thereby powering the memory module and charging the external device through the connection port, or to control both the second buck circuit and the first switch circuit to not operate, thereby enabling the external device to power the memory module;

[0025] When the handshake signal is a charging signal, the second buck circuit and the first switch circuit are controlled to work so that the external device supplies power to the memory module and charges the battery cell through the connection port, or the second buck circuit and the first switch circuit are controlled not to work so that the external device supplies power to the memory module.

[0026] Preferably, the second buck circuit includes a second inductor and a second capacitor;

[0027] The first end of the second inductor is connected to the first power chip, and the second end of the second inductor is connected to the battery core;

[0028] A first end of the second capacitor is connected to a connection node between the second inductor and the battery core, and a second end of the second capacitor is grounded.

[0029] Preferably, the storage circuit further includes a wireless charging module, and the power supply circuit further includes a second switching circuit;

[0030] One end of the second switch circuit is connected to the connection node between the first switch circuit and the first power chip, and the other end of the second switch circuit is connected to the wireless charging module;

[0031] The wireless charging module is connected to the first power chip and is further configured to perform electromagnetic coupling with an external device, communicate with the external device to obtain a second discharge signal, output a discharge start signal to the first power chip according to the second discharge signal, and charge the external device when the second switch circuit is turned on;

[0032] The first power chip is used to control the second switch circuit to be turned on according to the discharge start signal.

[0033] Preferably, the wireless charging module includes a wireless charging control chip, a second power chip and a charging coil;

[0034] The wireless charging control chip is connected to the charging coil via the second power chip and is also connected to the first power chip, and is configured to communicate with the external device to obtain a second discharge signal when the external device is electromagnetically coupled to the charging coil, and output a discharge start signal to the first power chip based on the second discharge signal;

[0035] The second power chip is connected to the second switch circuit and is used to charge the external device through the charging coil when the second switch circuit is turned on.

[0036] Preferably, the wireless charging module further includes a communication unit;

[0037] The first end of the communication unit is connected to the charging coil, the second end of the communication unit is connected to the second power chip, and the wireless charging control chip is connected to the third end of the communication unit for obtaining a second discharge signal.

[0038] Preferably, the wireless charging module further includes an online upgrade unit;

[0039] The online upgrade unit is connected to the connection port and the wireless charging control chip, and is used to perform online upgrade on the wireless charging control chip.

[0040] An embodiment of the present invention further provides a storage device comprising a battery cell and any one of the above-mentioned storage circuits.

[0041] An embodiment of the present invention provides a storage circuit and device. By arranging a power supply circuit and a protocol chip in the storage circuit, data transmission and external charging / discharging of the battery cell can be carried out simultaneously at a single connection port, realizing multi-purpose use of one port and realizing energy storage, charging and data storage and transmission functions in one stop, solving the problem that existing electronic devices cannot simultaneously charge and transmit data to the storage device due to the single-port setting. The power supply circuit in the present application can use the battery cell power to power the memory module while the battery cell is charging the external device. It can also solve the problem that the power supply capacity of the external device port is insufficient and cannot meet the power supply requirements of the memory module, thereby preventing disk and chain disconnection. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0043] Figure 1 is a schematic block diagram of a storage circuit in one embodiment of the present invention;

[0044] Figure 2 is a circuit structure diagram of a storage circuit in one embodiment of the present invention;

[0045] Figure 3 is a circuit structure diagram of a storage circuit in one embodiment of the present invention;

[0046] Figure 4 is a schematic block diagram of a storage circuit in one embodiment of the present invention;

[0047] Figure 5 is a circuit structure diagram of a storage circuit in one embodiment of the present invention;

[0048] Figure 6 FIG. 1 is a schematic diagram of a circuit structure of a storage circuit in an embodiment of the present invention.

[0049] In the figure: 1. Memory module; 11. Memory chip; 12. First buck circuit; 2. Power circuit; 21. Second buck circuit; 22. First power chip; 23. First switch circuit; 24. Second switch circuit; 3. Protocol chip; 4. Connection port; 5. Battery cell; 6. Wireless charging module; 61. Wireless charging control chip; 62. Second power chip; 63. Charging coil; 64. Communication unit; 65. Online upgrade unit. DETAILED DESCRIPTION

[0050] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0051] It should be understood that the present invention can be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to make the disclosure thorough and complete and to fully convey the scope of the invention to those skilled in the art. In the drawings, the dimensions and relative dimensions of layers and regions may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0052] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it may be directly on, adjacent to, connected to, or coupled to the other element or layer, or there may be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there may be no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, a first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part without departing from the teachings of the present invention.

[0053] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," etc., may be used herein for convenience of description to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that the spatially relative terms are intended to include different orientations of the device in use and operation in addition to the orientations shown in the figures. For example, if the device in the drawings is flipped, then the elements or features described as "under" or "beneath" or "beneath" the other elements will be oriented as "over" the other elements or features. Thus, the exemplary terms "under" and "under" may include both the upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or in other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0054] The purpose of the terms used herein is only to describe specific embodiments and is not intended to limit the present invention. When used herein, the singular forms "a", "an", and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0055] In order to fully understand the present invention, detailed structures and steps will be provided in the following description to illustrate the technical solutions proposed by the present invention. Preferred embodiments of the present invention are described in detail below. However, in addition to these detailed descriptions, the present invention may also have other implementations.

[0056] An embodiment of the present invention provides a storage circuit, including a memory module 1, a power supply circuit 2, a protocol chip 3 and a connection port 4; the protocol chip 3 is connected to the connection port 4, and the connection port 4 is used to connect an external device to perform charging and discharging and / or data transmission with the external device; the protocol chip 3 is connected to the connection port 4, and is used to communicate with the external device through the connection port 4 to obtain a handshake signal; the memory module 1 is connected to the connection port 4; the power supply circuit 2 is used to connect a battery cell 5, and is also connected to the memory module 1, the connection port 4 and the protocol chip 3, and is used to control the battery cell 5 to supply power to the memory module 1 and charge the external device through the connection port 4 when the handshake signal obtained by the protocol chip 3 is a first discharge signal, or only control the external device to supply power to the memory module 1; when the handshake signal is a charging signal, control the external device to supply power to the memory module 1 through the connection port 4, or control the external device to supply power to the memory module 1 and charge the battery cell 5 through the connection port 4.

[0057] As an example, the storage circuit includes a memory module 1, a power circuit 2, a protocol chip 3, and a connection port 4. The connection port 4 can be a Type-C port for connecting external devices, such as computers, mobile phones, chargers, and other devices. The single connection port 4 in the storage circuit cooperates with the power circuit 2, the memory module 1, and the protocol chip 3 to realize discharging to the external device and simultaneously transmitting data, or the external device charges the battery cell 5 connected to the power circuit 2 and simultaneously transmits data, or only performs charging / discharging, or only performs data transmission.

[0058] Protocol chip 3 is connected to connection port 4. When an external device is plugged into connection port 4, protocol chip 3 can obtain handshake signals with the external device through the CC configuration channel to determine the upstream / downstream relationship between the external device and the device, inform the external device of its own power supply capabilities, and identify the power supply capabilities of the external device. Ultimately, based on the negotiation results, protocol chip 3 obtains a handshake signal containing a charging signal or a discharging signal, allowing power supply circuit 2 to transmit power according to the handshake signal. For example, when connection port 4 is plugged into a charger, protocol chip 3 can communicate with the charger through connection port 4, determine that the currently connected external device is a DFP (Downstream Facing Port) device, negotiate the transmission voltage with the external device, and obtain a handshake signal containing a charging signal, allowing power supply circuit 2 to draw power from the charger according to the transmission voltage negotiated in the handshake signal to charge battery cell 5.

[0059] The memory module 1 is connected to the connection port 4 and is used for data transmission with an external device. The first end of the power supply circuit 2 is used to connect to the battery cell 5, the second end of the power supply circuit 2 is connected to the connection port 4 and the memory module 1, and the third end of the power supply circuit 2 is connected to the protocol chip 3. If the handshake signal obtained by the protocol chip 3 and the external device is a first discharge signal, the power supply circuit 2 can control the battery cell 5 to supply power to the memory module 1 and charge the external device according to the discharge voltage and other signals negotiated in the first discharge signal, so that the memory module 1 can respond to the data transmission demand and transmit data with the external device, so that data transmission and charging of the external device can be carried out at the same time. At the same time, since the power of the battery cell 5 is used to power the memory module 1 at this time, it is also enough to solve the problem of insufficient power supply capacity of the external device port and inability to meet the power supply demand of the memory module 1, thereby preventing disconnection. Furthermore, the first power chip 22 provided in the power circuit 2 can detect the state of the battery cell. If the state of the battery cell is abnormal, for example, the power of the battery cell 5 is lower than the preset power value, or the temperature of the battery cell 5 is too high, the power circuit 2 cannot supply power to the memory module 1 and charge the external device based on the first discharge signal. If the external device has a data transmission requirement, the external device can only supply power to the memory module 1 through the connection port 4, so that the memory module 1 can transmit data with the external device. If the handshake signal obtained by the protocol chip 3 when shaking hands with the external device is a charging signal, the power circuit 2 can control the external device to charge the battery cell 5 according to the charging signal, and at the same time supply power to the memory module 1, so that when the external device has a data transmission requirement, the memory module 1 can transmit data with the external device, so that data transmission and battery cell charging can be carried out simultaneously. Furthermore, if the state of the battery cell is abnormal, the power circuit 2 cannot control the external device to charge the battery cell 5 based on the charging signal, and can only enable the external device to supply power to the memory module 1.

[0060] In this example, by arranging a power supply circuit 2 and a protocol chip 3 in the storage circuit, data transmission and external charging / discharging of the battery cell 5 can be achieved simultaneously at a single connection port 4, realizing multi-purpose use of one port and realizing energy storage, charging and data storage and transmission functions in one stop, solving the problem that existing electronic devices cannot simultaneously charge and transmit data to storage devices due to the single-port setting. The power supply circuit 2 in this application can use the power of the battery cell 5 to power the memory module 1 while the battery cell 5 is charging the external device. It can also solve the problem that the power supply capacity of the external device port is insufficient and cannot meet the power supply requirements of the memory module 1, thereby preventing disconnection of the disk and the chain.

[0061] In one embodiment, the power supply circuit 2 is further used to obtain the cell status corresponding to the battery cell 5; the power supply circuit 2 is used to control the battery cell 5 to supply power to the memory module 1 and charge the external device through the connection port 4 when the handshake signal obtained by the protocol chip 3 is a first discharge signal and the cell status is normal; when the handshake signal obtained by the protocol chip 3 is a first discharge signal and the cell status is abnormal, control the external device to supply power to the memory module 1; when the handshake signal obtained by the protocol chip 3 is a charging signal and the cell status is normal, control the external device to supply power to the memory module 1 and charge the battery cell 5; when the handshake signal obtained by the protocol chip 3 is a charging signal and the cell status is abnormal, control the external device to supply power to the memory module 1.

[0062] As an example, the power circuit 2 is further configured to obtain the cell status corresponding to the battery cell 5. Specifically, a first power chip 22 may be provided in the power circuit 2, which is connected to the battery cell 5 and configured to obtain cell status information such as the current power level and current temperature of the battery cell 5. If any of the obtained cell status information is in an abnormal state, the cell status is determined to be abnormal. For example, if the current power level is lower than a preset power level, or if the current temperature of the battery cell 5 is not within a preset temperature range, the cell status is determined to be abnormal. Otherwise, the cell status is determined to be normal.

[0063] When the cell state is normal and the handshake signal received by the protocol chip 3 is the first discharge signal, the power circuit 2 controls the cell 5 to supply power to the memory module 1 and to charge the external device. When the cell state is abnormal and the handshake signal received by the protocol chip 3 is the first discharge signal, the power circuit 2 controls the external device to supply power to the memory module 1. When the cell state is normal and the handshake signal received by the protocol chip 3 is the charge signal, the power circuit 2 controls the external device to supply power to the memory module 1 and to charge the cell 5. When the cell state is abnormal and the handshake signal received by the protocol chip 3 is the charge signal, the power circuit 2 controls only the external device to supply power to the memory module 1. By detecting the cell state, it is possible to prevent the exchange of power with the cell 5 when the cell state is poor, such as when the battery is too low or overheated, thus preventing adverse phenomena such as overdischarge or overheating of the cell 5 and ensuring safe charging and discharging.

[0064] In one embodiment, the memory module 1 includes a memory chip 11 and a first buck circuit 12; the memory chip 11 is connected to the connection port 4 for data transmission with an external device; the power supply circuit 2 is connected to the memory chip 11 through the first buck circuit 12 for powering the memory chip 11 based on a preset power supply power.

[0065] As an example, the memory module 1 includes a memory chip 11 and a first buck circuit 12. The first buck circuit 12 is a circuit for performing DC-DC conversion on the voltage output by the power supply circuit 2. The memory chip 11 is connected to the connection port 4 for data transmission with an external device. The first end of the first buck circuit 12 is connected to the second end of the power supply circuit 2, and the second end of the first buck circuit 12 is connected to the memory chip 11 for DC-DC conversion on the voltage output by the power supply circuit 2. When the power supply circuit 2 controls the battery cell 5 to discharge to the outside, the first buck circuit 12 can perform DC-DC conversion on the voltage output by the battery cell 5, obtain a power supply voltage, such as 5V voltage, and supply it to the memory chip 11, so that the memory chip 11 can work based on a preset power supply power. In this example, the power supply circuit 2 can use the battery cell 5 power to power the memory chip 11 based on the preset power supply power while the battery cell 5 is charging the external device, thereby ensuring stable data transmission, solving the problem of insufficient power supply capacity of the external device port and inability to meet the power supply requirements of the memory chip 11, and preventing disconnection.

[0066] In one embodiment, the protocol chip 3 is connected to the first buck circuit 12 and is configured to control the first buck circuit 12 to be turned off when the handshake signal is a fast charge signal.

[0067] As an example, the protocol chip 3 is also connected to the first buck circuit 12. When an external device is plugged into the connection port 4, the protocol chip 3 can determine whether the handshake signal is a fast charging signal based on the charging voltage or charging power and other information negotiated with the external device in the handshake signal. If the handshake signal is a fast charging signal, the first buck circuit 12 is controlled to be turned off, power supply to the storage chip 11 is stopped, and the data transmission function is turned off to alleviate the heat generation during fast charging. For example, when the connection port 4 is plugged into a charger with a PD fast charging function, the protocol chip 3 can determine that the handshake signal is a fast charging signal based on the charging voltage or charging power and other information negotiated with the external device in the handshake signal, and control the shutdown of the first buck circuit 12 to stop powering the storage chip 11. Furthermore, if the handshake signal is not a fast charging signal, the first buck circuit 12 is still kept in the open state so that the external device can use the data transmission function normally. For example, when the connection port 4 is plugged into the computer, the protocol chip 3 can determine that the handshake signal is not a fast charging signal based on the charging voltage or charging power and other information negotiated with the external device in the handshake signal. The protocol chip 3 keeps the first buck circuit 12 in the open state and normally powers the memory chip 11 so that the computer can normally transmit data with the memory chip 11 when there is a data transmission demand.

[0068] In one embodiment, if Figure 2As shown, the first buck circuit 12 includes a buck chip U1, a first inductor L1 and a first capacitor C1; the input terminal VIN of the buck chip U1 is connected to the second terminal of the power supply circuit 2; the output terminal SW of the buck chip U1 is connected to the first terminal of the first inductor L1, and the second terminal of the first inductor L1 is connected to the memory chip 11; the first terminal of the first capacitor C1 is connected to the connection node between the first inductor L1 and the memory chip 11, and the second terminal of the first capacitor C1 is grounded.

[0069] As an example, the first buck circuit 12 includes a buck chip U1, a first inductor L1, and a first capacitor C1. The input terminal VIN of the buck chip U1 is connected to the second terminal of the power circuit 2, that is, the connection node VBUS_IN_SYS between the power circuit 2 and the connection port 4. The output terminal SW of the buck chip U1 is connected to the first terminal of the first inductor L1, and the second terminal of the first inductor L1 is connected to the memory chip 11. The first terminal of the first capacitor C1 is connected to the connection node between the first inductor L1 and the memory chip 11, and the second terminal of the first capacitor C1 is grounded. The output terminal SW of the buck chip U1 is used to output a PWM signal. When the output terminal SW of the buck chip U1 outputs a high-level signal, electrical energy is stored in the first inductor L1. When the output terminal SW of the buck chip U1 outputs a low-level signal, the electrical energy stored in the first inductor L1 is released to power the connected memory chip 11.

[0070] In one embodiment, if Figure 1 and Figure 3 As shown, the power supply circuit 2 includes a second buck circuit 21, a first power chip 22, and a first switch circuit 23. The first end of the second buck circuit 21 is used to connect to the battery cell 5, and the second end of the second buck circuit 21 is connected to the first switch circuit 23 through the first power chip 22. The first switch circuit 23 is connected to the connection port 4 and the memory module 1. The first power chip 22 is connected to the battery cell 5 and the protocol chip 3. When the handshake signal obtained by the protocol chip 3 is a first discharge signal, the second buck circuit 21 is controlled to be inoperative and the first switch circuit 23 is controlled to be inoperative, so as to supply power to the memory module 1 and charge an external device through the connection port 4. Alternatively, both the second buck circuit 21 and the first switch circuit 23 are controlled to be inoperative, so that an external device supplies power to the memory module 1. When the handshake signal is a charging signal, the second buck circuit 21 and the first switch circuit 23 are controlled to be inoperative, so that an external device supplies power to the memory module 1 through the connection port 4 and charges the battery cell 5. Alternatively, both the second buck circuit 21 and the first switch circuit 23 are controlled to be inoperative, so that an external device supplies power to the memory module 1.

[0071] As an example, the power circuit 2 includes a second buck circuit 21, a first power chip 22, and a first switching circuit 23. The first end of the second buck circuit 21 is connected to the battery cell 5, and the second end of the second buck circuit 21 is connected to the first switching circuit 23 via the first power chip 22. The second buck circuit 21 is a circuit for DC-DC conversion of the voltage input from an external device. The first switching circuit 23 is connected to the connection port 4 and the memory module 1, and the first power chip 22 is connected to the battery cell 5 and the protocol chip 3. In which, the first switching circuit 23 may include a first MOS transistor Q1, the drain of the first MOS transistor Q1 is connected to the voltage output terminal VOUT of the first power chip 22, the gate of the first MOS transistor Q1 is connected to the first output control terminal GATE1 of the first power chip 22, and the source of the first MOS transistor Q1 is connected to the connection port 4 and the memory module 1, so as to be turned on / off under the control of the first power chip 22, so as to realize the turning on / off of the first switching circuit 23. The first power chip 22 can adopt a first power chip 22 of model SW6206, obtain the output voltage of the battery cell 5 and detect the battery capacity of the battery cell 5 through the power detection pin BAT, obtain the temperature of the battery cell 5 through the temperature detection pin, and communicate with the protocol chip 3 through the communication pin to obtain information such as the charge / discharge voltage based on the handshake signal. When the handshake signal obtained by the protocol chip 3 is a first discharge signal, the first power chip 22 can control the second buck circuit 21 to not work and turn on the first switch circuit 23, so that the electric energy output by the battery cell 5 through the power detection pin BAT can continue to be output to the external device through the first switch circuit 23 to charge the external device. Furthermore, when the first power chip 22 detects that the battery cell state is abnormal, for example, the power of the battery cell 5 is less than the preset power value, or the temperature of the battery cell 5 is not within the preset range, the second buck circuit 21 is controlled to not work and the first switch circuit 23 is turned off, so that the battery cell 5 cannot charge the external device or power the memory module 1, thereby protecting the battery cell 5. At this time, only the interface output voltage of the external device can be used to power the memory module 1 to maintain the data transmission function. The first power chip 22 can also control the second buck circuit 21 to work and turn on the first switch circuit 23 when the handshake signal obtained by the protocol chip 3 is a charging signal, so that the electric energy output by the external device can flow to the battery cell 5 through the first switch circuit 23 and the second buck circuit 21 to charge the battery cell 5. Furthermore, when the first power chip 22 detects that the battery cell state is abnormal, it controls the second buck circuit 21 not to work and turns off the first switch circuit 23, so that the external device cannot charge the battery cell 5 and protect the battery cell 5. At this time, only the external device keeps powering the memory module 1 to maintain the output transmission function.

[0072] In one embodiment, if Figure 3As shown, the second buck circuit 21 includes a second inductor L2 and a second capacitor C2; the first end of the second inductor L2 is connected to the first power chip 22, and the second end of the second inductor L2 is connected to the battery core 5; the first end of the second capacitor C2 is connected to the connection node between the second inductor L2 and the battery core 5, and the second end of the second capacitor C2 is grounded.

[0073] As an example, the second buck circuit 21 includes a second inductor L2 and a second capacitor C2. The first end of the second inductor L2 is connected to the signal output terminal SW of the first power chip 22, and the second end of the second inductor L2 is connected to the battery cell 5. The first end of the second capacitor C2 is connected to the connection node between the second inductor L2 and the battery cell 5, and the second end of the second capacitor C2 is grounded. The signal output terminal SW of the first power chip 22 is used to output a PWM signal. When the signal output terminal SW of the first power chip 22 outputs a high-level signal, electrical energy is stored in the second inductor L2. When the signal output terminal SW of the first power chip 22 outputs a low-level signal, the electrical energy stored in the second inductor L2 is released to power the connected battery cell 5.

[0074] In one embodiment, the storage circuit also includes a wireless charging module 6, and the power supply circuit 2 also includes a second switch circuit 24; one end of the second switch circuit 24 is connected to the connection node between the first switch circuit 23 and the first power supply chip 22, and the other end of the second switch circuit 24 is connected to the wireless charging module 6; the wireless charging module 6 is connected to the first power supply chip 22, and is also used to perform electromagnetic coupling with an external device, communicate with the external device to obtain a second discharge signal, output a discharge start signal to the first power supply chip 22 according to the second discharge signal, and charge the external device when the second switch circuit 24 is turned on; the first power supply chip 22 is used to control the opening of the second switch circuit 24 according to the discharge start signal.

[0075] As an example, the storage circuit further includes a wireless charging module 6, and the power supply circuit 2 further includes a second switch circuit 24. One end of the second switch circuit 24 is connected to the connection node between the first switch circuit 23 and the first power supply chip 22, and the other end of the second switch circuit 24 is connected to the wireless charging module 6. The second switch circuit 24 may include a second MOS transistor Q2, wherein the gate of the second MOS transistor Q2 is connected to the first power supply chip 22, the drain of the second MOS transistor Q2 is connected to the connection node between the first switch circuit 23 and the first power supply chip 22, and the source of the second MOS transistor Q2 is connected to the wireless charging module 6, so as to be turned on / off under the control of the first power supply chip 22, thereby turning on / off the second switch circuit 24 and turning on / off the power supply to the wireless charging module 6. The wireless charging module 6 is connected to the first power chip 22 and is also used to perform electromagnetic coupling with an external device through the charging coil 63. When the external device is close to the charging coil 63, it can be magnetically coupled with the charging coil 63, so that the wireless charging module 6 can further communicate and handshake with the external device through magnetic coupling, and obtain a second discharge signal containing charging voltage, charging power, etc. The wireless charging module 6 can perform I2C communication with the first power chip 22 and continue to send a discharge start signal to the first power chip 22 according to the second discharge signal, so that the first power chip 22 controls the opening of the second switch circuit 24. After the second switch circuit 24 is turned on, the wireless charging module 6 can process the electric energy output by the power circuit 2 and charge the external device through the charging coil 63. Furthermore, when the first power chip 22 detects that the battery cell state is abnormal, even if it detects the discharge start signal sent by the wireless charging module 6, it will not turn on the second switch circuit 24 to protect the battery cell 5.

[0076] In one embodiment, if Figure 4 As shown, the wireless charging module 6 includes a wireless charging control chip 61, a second power chip 62 and a charging coil 63; the wireless charging control chip 61 is connected to the charging coil 63 through the second power chip 62, and is also connected to the first power chip 22, and is used to communicate with the external device to obtain a second discharge signal when the external device is electromagnetically coupled with the charging coil 63, and output a discharge start signal to the first power chip 22 based on the second discharge signal; the second power chip 62 is connected to the second switch circuit 24, and is used to charge the external device through the charging coil 63 when the second switch circuit 24 is turned on.

[0077] As an example, the wireless charging module 6 includes a wireless charging control chip 61, a second power chip 62, and a charging coil 63. The wireless charging control chip 61 is connected to the charging coil 63 through the wireless charging module 6. When an external device approaches the charging coil 63, it can magnetically couple with the charging coil 63, generating current in the charging coil 63. By detecting the current generated by electromagnetic induction, the wireless charging control chip 61 can further communicate with the external device and obtain a second discharge signal containing charging voltage, charging power, etc. The wireless charging control chip 61 is also connected to the first power chip 22 and can communicate with the first power chip 22 through I2C. Based on the second discharge signal, the wireless charging control chip 61 outputs a discharge start signal to the first power chip 22, causing the first power chip 22 to activate the second switch circuit 24. The second power chip 62 is a wireless charging power chip connected to the second switch circuit 24 and the charging coil 63. When the second switch circuit 24 is activated, the second power chip 62 can process the power output by the power circuit 2 and charge the external device through the charging coil 63. Furthermore, when the first power chip 22 detects that the battery cell state is abnormal, even if the discharge start signal sent by the wireless charging module 6 is detected, the second switch circuit 24 will not be turned on to protect the battery cell 5.

[0078] In one embodiment, if Figure 4 As shown, the wireless charging module 6 also includes a communication unit 64; the first end of the communication unit 64 is connected to the charging coil 63, the second end of the communication unit 64 is connected to the second power chip 62, and the wireless charging control chip 61 is connected to the third end of the communication unit 64 for obtaining the second discharge signal.

[0079] As an example, the wireless charging module 6 further includes a communication unit 64, a first end of the communication unit 64 is connected to the charging coil 63, and is used to obtain a magnetic induction current when an external device is magnetically coupled with the charging coil 63. A second end of the communication unit 64 is connected to a communication pin VDM of a second power chip 62, and the second power chip 62 can provide a reference voltage for the communication unit 64. A third end of the communication unit 64 is connected to the wireless charging control chip 61, and is used to obtain a second discharge signal when a magnetic induction current is generated in the charging coil 63. Specifically, as Figure 5As shown, the communication unit 64 may include a first diode D1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a third capacitor C3, a fourth capacitor C4, and a fifth capacitor C5. The third capacitor C3 and the fourth capacitor C4 are connected in series between the communication pin VDM of the second power chip 62 and the ground; the anode of the first diode D1 is connected to the charging coil 63, the cathode of the first diode D1 is connected to the first end of the first resistor R1, the second end of the first resistor R1 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is connected to the connection node between the third capacitor C3 and the fourth capacitor C4; the first end of the third resistor R3 and the first end of the fifth capacitor C5 are both connected to the connection node between the first resistor R1 and the second resistor R2, the second end of the third resistor R3 and the second end of the fifth capacitor C5 are grounded, the first end of the fourth resistor R4 is connected to the second end of the third resistor R3, the second end of the fourth resistor R4 is connected to the second end of the fifth capacitor C5, and the wireless charging control chip 61 is connected to the first end of the fourth resistor R4.

[0080] In one embodiment, if Figure 4 As shown, the wireless charging module 6 further includes an online upgrade unit 65 ; the online upgrade unit 65 is connected to the connection port 4 and the wireless charging control chip 61 , and is used to perform online upgrades on the wireless charging control chip 61 .

[0081] As an example, the wireless charging module 6 further includes an online upgrade unit 65. Specifically, Figure 6 As shown, the online upgrade unit 65 includes a third MOS transistor Q3 and a fourth MOS transistor Q4. The third MOS transistor Q3 is a PMOS transistor, and the fourth MOS transistor Q4 is an NMOS transistor. The source of the third MOS transistor Q3 is connected to the connection port 4, the drain of the third MOS transistor Q3 is connected to the power supply pin VC of the wireless charging control chip 61, the gate of the third MOS transistor Q3 is connected to the drain of the fourth MOS transistor Q4, the source of the fourth MOS transistor Q4 is grounded, and the gate of the fourth MOS transistor Q4 is connected to the enable terminal of the wireless charging control chip 61. The wireless charging control chip 61 The communication pins CL and DA are connected to the connection port 4, and are used to output a high-level signal from the enable pin EN when an online upgrade signal is generated at the connection port 4, so that the third MOS transistor Q3 and the fourth MOS transistor Q4 are turned on, and the power output from the connection port 4 can be transmitted to the power supply pin VC of the wireless charging control chip 61 to power the wireless charging control chip 61. Then, the wireless charging control chip 61 can receive the online upgrade instruction transmitted through the connection port 4 through the communication pins CL and DA, and update the built-in wireless charging code to be compatible with more wireless charging devices.

[0082] An embodiment of the present invention further provides a storage device, comprising a battery cell 5 and the storage circuit in the above embodiment.

[0083] As an example, the storage device includes a battery cell 5 and the storage circuit in the above example. In this example, by setting a power supply circuit 2 and a protocol chip 3 in the storage circuit, data transmission and external charging / discharging of the battery cell 5 can be simultaneously performed at a single connection port 4, realizing a multi-purpose port, and realizing energy storage, charging and data storage and transmission functions in one stop, solving the problem that existing electronic devices cannot be charged and transmit data to storage devices at the same time due to a single port setting, and the power supply circuit 2 in this application can use the power of the battery cell 5 to power the memory module 1 while the battery cell 5 is charging the external device, and can also solve the problem that the power supply capacity of the external device port is insufficient and cannot meet the power supply demand of the memory module 1, thereby preventing the disk from being disconnected.

[0084] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.

Claims

1. A storage circuit, characterized in that: Includes memory module, power circuit, protocol chip and connection port; The connection port is used to connect to an external device to perform charging and discharging and / or data transmission with the external device; The protocol chip is connected to the connection port and is used to communicate with the external device through the connection port to obtain a handshake signal; The memory module includes a memory chip and a first buck circuit; The memory chip is connected to the connection port and is used for data transmission with an external device; The power supply circuit is used to connect the battery cell, and is also connected to the connection port and the protocol chip, and is connected to the memory chip through the first buck circuit. It is used to control the battery cell to power the memory module and charge the external device through the connection port when the handshake signal is the first discharge signal, so that the memory module can respond to data transmission requirements and perform data transmission with the external device, so that data transmission and charging of the external device can be performed simultaneously, or control the external device to power the memory module; while the battery cell is charging the external device, the battery cell powers the memory module; When the handshake signal is a charging signal, controlling the external device to supply power to the memory module through the connection port, or controlling the external device to supply power to the memory module and charge the battery cell through the connection port; The protocol chip is connected to the first buck circuit and is used to control the shutdown of the first buck circuit when the handshake signal is a fast charging signal.

2. The storage circuit according to claim 1, wherein: The power supply circuit is further used to obtain the cell status corresponding to the cell; The power supply circuit is configured to control the battery cell to supply power to the memory module and charge the external device through the connection port when the handshake signal is a first discharge signal and the battery cell is in a normal state; When the handshake signal is a first discharge signal and the battery cell state is an abnormal state, controlling an external device to supply power to the memory module; When the handshake signal is a charging signal and the battery cell is in a normal state, controlling an external device to supply power to the memory module and charge the battery cell; When the handshake signal is a charging signal and the battery cell state is abnormal, an external device is controlled to supply power to the memory module.

3. The storage circuit according to claim 1, wherein: The power supply circuit is used to supply power to the storage chip based on a preset power supply.

4. The storage circuit according to claim 1, wherein: The first buck circuit includes a buck chip, a first inductor and a first capacitor; The output end of the buck chip is connected to the first end of the first inductor, and the second end of the first inductor is connected to the memory chip; A first end of the first capacitor is connected to a connection node between the first inductor and the storage chip, and a second end of the first capacitor is grounded.

5. The storage circuit according to claim 1, wherein: The power supply circuit includes a second buck circuit, a first power supply chip and a first switch circuit; A first end of the second buck circuit is used to connect to a battery cell, a second end of the second buck circuit is connected to the first switch circuit via the first power chip, and the first switch circuit is connected to the connection port and the memory module; The first power chip is connected to the battery cell and the protocol chip, and is configured to control the second buck circuit to not operate and the first switch circuit to operate when the handshake signal is a first discharge signal, thereby powering the memory module and charging the external device through the connection port, or to control both the second buck circuit and the first switch circuit to not operate, thereby enabling the external device to power the memory module; When the handshake signal is a charging signal, the second buck circuit and the first switch circuit are controlled to work so that the external device supplies power to the memory module and charges the battery cell through the connection port, or the second buck circuit and the first switch circuit are controlled not to work so that the external device supplies power to the memory module.

6. The storage circuit according to claim 5, wherein: The second buck circuit includes a second inductor and a second capacitor; The first end of the second inductor is connected to the first power chip, and the second end of the second inductor is connected to the battery core; A first end of the second capacitor is connected to a connection node between the second inductor and the battery core, and a second end of the second capacitor is grounded.

7. The storage circuit according to claim 5, wherein: The storage circuit further includes a wireless charging module, and the power supply circuit further includes a second switching circuit; One end of the second switch circuit is connected to the connection node between the first switch circuit and the first power chip, and the other end of the second switch circuit is connected to the wireless charging module; The wireless charging module is connected to the first power chip and is further configured to perform electromagnetic coupling with an external device, communicate with the external device to obtain a second discharge signal, output a discharge start signal to the first power chip according to the second discharge signal, and charge the external device when the second switch circuit is turned on; The first power chip is used to control the second switch circuit to be turned on according to the discharge start signal.

8. The storage circuit according to claim 7, wherein: The wireless charging module includes a wireless charging control chip, a second power chip and a charging coil; The wireless charging control chip is connected to the charging coil via the second power chip and is also connected to the first power chip, and is configured to communicate with the external device to obtain a second discharge signal when the external device is electromagnetically coupled to the charging coil, and output a discharge start signal to the first power chip based on the second discharge signal; The second power chip is connected to the second switch circuit and is used to charge the external device through the charging coil when the second switch circuit is turned on.

9. The storage circuit according to claim 8, wherein: The wireless charging module further includes a communication unit; The first end of the communication unit is connected to the charging coil, the second end of the communication unit is connected to the second power chip, and the wireless charging control chip is connected to the third end of the communication unit for obtaining a second discharge signal.

10. The storage circuit according to claim 8, wherein: The wireless charging module also includes an online upgrade unit; The online upgrade unit is connected to the connection port and the wireless charging control chip, and is used to perform online upgrade on the wireless charging control chip.

11. A storage device, characterized in that: The invention comprises a battery cell and the storage circuit according to any one of claims 1 to 10.

Citation Information

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