MCU circuit structure comprising on-chip oscillator and test method

Abstract

The invention provides an MCU circuit structure comprising an on-chip oscillator and a test method, mainly aiming at an MCU whose default clock is the on-chip oscillator, a mode control register is hung on an MCU bus, the mode control register is used for controlling the MCU to switch among a normal working mode, a loopback test mode and an off-chip clock test mode, the loopback test mode is used for connecting input and output pins of a plurality of communication modules with the same function through module interconnection configuration to carry out batch ATE tests; and the off-chip clock test mode is used for carrying out ATE test on a single-path communication module and a complex communication module by adopting off-chip clock input. According to the invention, under the condition that external pins of the MCU and peripheral devices of the ATE test board are not increased, full-module full-function test of the on-chip oscillator MCU can be completed, and batch test of the MCU is supported.

Description

Technical Field

[0001] The invention belongs to the field of hardware circuit design and relates to an MCU circuit structure including an on-chip oscillator and a testing method. Background Art

[0002] With the trend of miniaturization design, MCU chips usually have an oscillator integrated inside, and the oscillator is set as the default clock source. However, although this design simplifies the circuit layout and reduces the chip size, it also brings new problems. Due to differences in production processes, the on-chip oscillators of various MCU chips have deviations in start-up time, phase, frequency accuracy, etc. In addition, the clock frequency will drift as the operating environment temperature changes. These characteristic differences pose a challenge to batch ATE testing of MCUs, because ATE test machines need to accurately and stably test the performance and functions of each MCU.

[0003] Traditional ATE test systems usually rely on high-precision external clock sources to provide a stable test environment. However, when faced with an MCU whose default clock is the on-chip oscillator, the limitations of the ATE test system become apparent. Due to the characteristic differences and temperature drift of the on-chip oscillator, it is difficult for the ATE test machine to accurately and reliably test the performance of each MCU. In addition, even if the on-chip oscillator can be selected to test certain modules of the MCU at the same time through the functional mode programmed by the code, this method often cannot cover all modules that are highly correlated with off-chip timing, such as USB interfaces, off-chip expansion memory interfaces, off-chip interrupts, etc. The testing of these modules requires a more complex test environment and higher test accuracy.

[0004] Although some innovative test methods and systems have been proposed in the field of MCU testing, no method has been found that can effectively solve the problem of batch comprehensive ATE testing of MCUs whose default clock is an on-chip oscillator. This means that under the current test technology and system, there are still great challenges and limitations in ATE testing of such MCUs. Therefore, it is necessary to further research and develop new test technologies and systems to achieve batch comprehensive ATE testing of MCUs whose default clock is an on-chip oscillator, so as to ensure that the quality and performance of the MCUs meet the design requirements. Summary of the invention

[0005] In order to solve the problems existing in the prior art, the present invention provides an MCU circuit structure and a testing method including an on-chip oscillator, which are mainly aimed at the MCU whose default clock is the on-chip oscillator. An MCU loopback test mode and an off-chip clock test mode are added to the MCU design. Combined with the normal working mode of the MCU, a full-module and full-function test of the MCU including an on-chip oscillator can be completed without increasing the external pins of the MCU and without increasing the peripheral devices of the ATE test board, and batch testing of the MCU is supported.

[0006] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: an MCU circuit structure including an on-chip oscillator, a mode control register is connected to the MCU bus, and the mode control register is used to control the MCU to switch between a normal working mode, a loopback test mode and an off-chip clock test mode, wherein the loopback test mode is used to connect the input and output pins of multiple communication modules with the same function through a module interconnection configuration to perform batch ATE testing; the off-chip clock test mode is used to use an off-chip clock input to perform ATE testing on single-channel communication modules and complex communication modules.

[0007] Furthermore, in the off-chip clock test mode, there are at least two mode control pins, including an off-chip clock input of the off-chip clock test mode and a reset state mode control input.

[0008] Furthermore, the reset mode control input pin is multiplexed with the functional pin of the loopback test module.

[0009] Furthermore, the off-chip clock input pin is multiplexed with the functional pin of the loopback test module.

[0010] Furthermore, the mode control register is configured through the processor to enter the loopback test mode, and the input and output pins of multiple communication modules with the same function are connected through the module interconnection configuration.

[0011] The present invention also provides a method for testing an MCU circuit including an on-chip oscillator, which is based on the above-mentioned MCU circuit structure including an on-chip oscillator, and the specific steps are as follows: When performing loopback testing, multiple communication modules with the same function are interconnected and configured, and the functional correctness of multiple communication modules with the same function is determined through the MCU intra-chip communication function; When performing off-chip clock testing, the clock source of the MCU is switched to the off-chip clock input, and the ATE test of the corresponding module in the MCU is completed based on the off-chip clock function vector.

[0012] Furthermore, when the number of communication modules with the same function in the MCU chip is an even number greater than or equal to 2, the output pin of communication module 1 is output to the outside of the chip and simultaneously connected to the input pin of communication module 2; the output pin of communication module 2 is output to the outside of the chip and simultaneously connected to the input pin of communication module 1.

[0013] Furthermore, when the number of communication modules with the same function in the MCU chip is an odd number greater than or equal to 3, a test is first performed on the connection between the input and output pins of every two communication modules with an even number of paths; then, one communication module is selected from the two tested communication modules and connected to the input and output pins of the remaining one communication module for a second test.

[0014] Furthermore, the on-chip determination result of the connected communication module with the same function is outputted as a simple waveform indication through an off-chip pin to obtain the ATE test result of the communication module.

[0015] Furthermore, if the off-chip pin of the connected communication module with the same function outputs a simple waveform changing from a high level to a low level, it indicates that the communication is correct; otherwise, it indicates that the communication is abnormal.

[0016] Compared with the prior art, the present invention has at least the following beneficial effects: The present invention provides an MCU circuit structure including an on-chip oscillator. By adding a loopback test mode and an off-chip clock test mode in the MCU design, combined with a normal working mode, all functional modules of the MCU can be covered to perform a complete ATE (automatic test equipment) test. The circuit structure realizes full module testing without increasing the external pins of the MCU and the peripheral devices of the ATE test board, thereby reducing the test cost and complexity. Both multi-channel communication function modules and single-channel and complex communication modules can be batch tested through the designed test mode, thereby improving the test efficiency. The loopback test module and the off-chip clock test mode can be applied at the circuit board level, which is convenient for quickly locating and solving circuit problems in the development stage. The required control logic is simple, and supports high scalability of the test module, which is suitable for different types of MCUs and test requirements.

[0017] The present invention performs MCU circuit testing based on the above MCU circuit structure. The loopback test mode can complete the test of the multi-channel communication function module by simply outputting the result indication to the outside, without the need for complex pin input and output judgment. The off-chip clock test mode enables the single-channel communication module and the complex communication module that cannot be tested through the pin loopback to complete the ATE test based on the function vector. Through the designed test logic, the functional correctness of the communication module can be accurately judged, and the ATE test result can be indicated by outputting a simple waveform through the off-chip pin. The efficient test method helps to shorten the product test cycle, accelerate the product development process, and reduce the test cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 An MCU circuit structure including an on-chip oscillator; Figure 2 Schematic diagram of the pin control of loopback test mode based on an even number (≥2) of communication modules; Figure 3 Schematic diagram of the pin control of loopback test mode based on odd number (≥3) communication modules; Figure 4 Schematic diagram of the off-chip clock test mode. DETAILED DESCRIPTION

[0019] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0020] A circuit structure and a test method for an MCU including an on-chip oscillator are provided, mainly for an MCU whose default clock is an on-chip oscillator. The solution of the present invention is as follows: 1) Add a mode control register in the MCU, which is connected to the MCU bus and has a bit width of 3 bits. This register controls the three working modes of the MCU, normal working mode, loopback test mode and off-chip clock test mode. The value "010" implements the loopback test mode, the value "100" implements the off-chip clock test mode, and other values ​​implement the normal working mode.

[0021] 1.1) The reset value of the mode control register is controlled by the mode control pin. There are at least two mode control pins, one as the external clock input of the external clock test mode, and the other as the reset state mode control input. When the MCU is reset, if the reset state mode control input has a specific input configuration, the specific input configuration can be flexibly set. For example, if the reset state mode control input sequence is "1010101001010101", the reset value is "100", that is, after the reset is canceled, the MCU enters the external clock test mode, and the external clock input pin of the external clock test mode is selected as the clock input; otherwise, the reset value is "001", which is the normal working mode. The mode control register can also be configured by the processor. When configured as "010", the loopback test mode is realized.

[0022] 1.2) In order not to increase the number of off-chip pins, the reset mode control input pins are multiplexed with the functional pins that can pass the loopback test module. When the MCU is in normal use, the reset mode control input pins do not change and are always in normal operating mode; 1.3) In order not to increase the number of off-chip pins, in the off-chip clock test mode, the off-chip clock input pins of the off-chip clock test mode are multiplexed with the functional pins that can pass the loopback test module; 2) In loopback test mode, the module interconnection configuration can be selected for multiple communication modules with the same function. In loopback test mode, the input and output pins of communication modules 1 and 2 with the same function are connected. Specifically, the output pin of communication module 1 is connected to the input pin of communication module 2 while outputting to the outside of the chip; the output pin of communication module 2 is connected to the input pin of communication module 1 while outputting to the outside of the chip. During the test, the functional correctness of communication module 1 and communication module 2 is determined by the communication function within the MCU chip. According to the determination result within the chip, a simple waveform can be output to a pin outside the chip to indicate the execution result. For example, when the pin changes from high level to low level, the communication is correct, otherwise the communication is abnormal.

[0023] 2.1) For the same functional communication modules with an even number of channels (≥2) in the MCU chip, the input and output pins of every two communication modules in the chip can be connected, so that the test of each connected two communication modules can be completed based on at least one ATE test; 2.2) For the same functional communication modules with an odd number of channels (≥3) in the MCU chip, first connect the input and output pins of every two communication modules with an even number of channels, and then select one communication module to connect with the input and output pins of the remaining one communication module. The two connection conditions can be selected through the module control register for module interconnection configuration, so that all communication module tests can be completed based on at least 2 ATE tests; 3) For single-channel communication modules and complex communication modules in the MCU that cannot be tested through pin loopback, the MCU enters the off-chip clock test mode, and the system clock is the off-chip clock input, so that the ATE test of the corresponding module is completed based on the off-chip clock function vector; Example 1 like Figure 1 As shown, the present invention provides an MCU circuit structure including an on-chip oscillator, and the default clock is the on-chip oscillator. The processor is interconnected with the memory controller, the mode control register and the functional peripherals through the on-chip bus, wherein the memory controller implements the access control of the on-chip FLASH and the on-chip SRAM; the mode control register has a normal working mode, a loopback test mode and an off-chip clock test mode, and the normal working mode is the default. In the loopback test mode, the module interconnection configuration selection can be further performed based on an odd number (≥3) of the same functional communication modules; the functional peripherals include timers, AD, DA, SPI, CAN1 / 2, UART1 / 2 / 3, USB, and other functional modules. CAN1 / 2, GPIO and UART1 / 2 / 3 are respectively connected to the loopback test mode pin control module, and the input and output pins of the loopback test mode pin control module are connected to the input and output pins of AD, DA, SPI, USB, other functional modules and the pin multiplexing control module.

[0024] Example 2 The processor is configured in loopback test mode. In loopback test mode, for the same functional communication modules CAN1 and CAN2 with an even number of paths (≥2), the input and output pins of the CAN1 and CAN2 modules are connected. Figure 2 The pin control diagram of the loopback test mode based on the even module is shown as follows. In the loopback test mode, CAN1_TX is connected to CAN2_RX, and CAN1_RX is connected to CAN2_TX. In the non-loopback test mode, each pin of CAN1 / 2 is directly connected to the external input and output pins. During the test, the functional correctness of each communication module is determined by the MCU's on-chip communication function. According to the on-chip determination result, a simple waveform can be output to an external pin to indicate the execution result. For example, when the pin changes from high level to low level, the communication is correct, otherwise the communication is abnormal. In the loopback test mode, at least one ATE test can be used to complete the communication function test of the CAN1 and CAN2 modules.

[0025] Example 3 The processor is configured in loopback test mode. In loopback test mode, for the same functional communication modules UART1, UART2 and UART3 with an odd number of paths (≥3), when the module interconnection configuration selects 0, the input and output pins of the UART1 and UART2 modules are connected. When the module interconnection configuration selects 1, the input and output pins of the UART1 and UART3 modules are connected. See Figure 3 The pin control diagram of the loopback test mode based on odd modules is shown in the figure.

[0026] For communication modules with the same function but an odd number of paths, it is not enough to have only a loopback test mode as a control signal, and a module interconnection configuration selection register is also required, which can be configured by a processor.

[0027] In loopback test mode, when the module interconnection configuration selects 0, UART1_TX is connected to UART2_RX, UART1_RX is connected to UART2_TX, and UART3_TX and UART3_RX are directly connected to the off-chip input and output pins; In non-loopback test mode, each pin of UART1 / 2 / 3 is directly connected to the external input and output pins; When the module interconnection configuration is selected as 1, UART3_TX is connected to UART2_RX, UART3_RX is connected to UART2_TX, and UART1_TX and UART1_RX are directly connected to the off-chip input and output pins; In non-loopback test mode, the UART1 / 2 / 3 pins are directly connected to the external input and output pins.

[0028] During the test, the functional correctness of each communication module is determined by the MCU's on-chip communication function. Based on the on-chip determination result, a simple waveform can be output to an off-chip pin to indicate the execution result. For example, when the pin changes from a high level to a low level, the communication is correct; otherwise, the communication is abnormal. In the loopback test mode, the communication function test of the UART1, UART2 and UART3 modules can be completed based on at least two ATE tests.

[0029] Example 4 Single-channel communication modules and complex communication modules such as SPI and USB that cannot be tested through pin loopback are tested using the off-chip clock test mode. See the waveform diagram for details. Figure 4 As shown, there are at least two mode control pins, one as the off-chip clock input of the off-chip clock test mode, and the other as the reset mode control input. Through the specific input configuration of the reset mode control pin, the specific input configuration can be flexibly set. For example, the reset mode control input sequence is "1010101001010101", so that the MCU enters the off-chip clock test mode after the reset is canceled, and the system clock is the off-chip clock input, so that the ATE test of the corresponding module is completed based on the off-chip clock function vector; at the same time, in order not to increase the number of off-chip pins, the reset mode control input pin is multiplexed with the functional pin that can pass the loopback test module. When the MCU is in normal use, the reset mode control input does not change and is always in normal operation mode. In order not to increase the number of off-chip pins, in the off-chip clock test mode, the off-chip clock input pin of the off-chip clock test mode is multiplexed with the functional pin that can pass the loopback test module.

[0030] Through the normal working mode, the ATE test of the on-chip memory, AD, DA, timer and other modules in the MCU can be completed; through the loopback test mode and the off-chip clock test mode, combined with the normal functional mode, the full-function test of each module that supports MCU batch ATE testing can be completed.

[0031] In summary, the present invention can complete the full-function test of each module of the MCU through the loopback test mode, the off-chip clock test mode and the normal working mode without adding ATE test board peripheral equipment, and can support MCU batch testing, specifically: By adding a loopback test mode for the multi-channel communication function module in the MCU, during ATE testing, based on the loopback test mode, the communication function does not need to perform input and output judgment of the functional pins. The test of the multi-channel communication function module can be completed by simply outputting the result indication to the outside, and batch testing is supported; For single-channel communication modules and complex communication modules in MCU that cannot be tested through pin loopback, during ATE testing, based on the off-chip clock test mode, the input clock is made the off-chip clock input, so that the MCU test can be completed based on the functional vector, and batch testing is supported; In normal working mode, complete ATE test of on-chip memory, AD, DA, timer and other modules in MCU; Furthermore, the MCU loopback test module and off-chip clock test mode can quickly perform functional tests on MCU circuits in board-level applications, thereby accelerating board-level problem troubleshooting.

[0032] Furthermore, when entering the MCU loopback test mode, it supports ATE batch testing of multi-channel communication function modules in the MCU; the MCU off-chip clock test mode supports ATE batch testing of single-channel communication modules and complex communication modules in the MCU; the MCU normal working mode implements memory, AD, DA, timer and other function modules based on the MCU architecture that have no relationship with off-chip pins or have no strict requirements on the timing of off-chip pins. Based on this test strategy, the control logic required to be added in the MCU design is simple, supports high scalability of the test module, and has strong versatility.

[0033] In summary, the present invention completes ATE testing of modules such as on-chip memory, AD, DA, timer, etc. in the MCU through the normal working mode; through the loopback test mode and the off-chip clock test mode, combined with the normal function mode, the full-function test of each module supporting MCU batch ATE testing can be completed; based on the configurable loopback test module and off-chip clock test mode of the MCU itself, flexible mode configuration can be performed in MCU-based board-level applications, especially when configured in the loopback test mode, the correctness of the basic communication function of the loopback test module in the MCU circuit can be quickly tested, thereby facilitating the rapid troubleshooting of board-level application problems.

[0034] The present invention has been applied to a miniaturized MCU design. For the MCU whose default clock is an on-chip oscillator, the present invention provides a test method and circuit structure, which supports full-module and full-function ATE batch testing of the MCU without adding off-chip pins or ATE test board peripheral devices. The circuit needs to add simple control logic, supports high scalability of test modules, has strong versatility, and can be applied to all miniaturized MCUs whose default clock is an on-chip oscillator.

Claims

1. An MCU circuit structure including an on-chip oscillator, characterized in that: A mode control register is mounted on the MCU bus, which is used to control the MCU to switch between normal working mode, loopback test mode and off-chip clock test mode. The loopback test mode is used to connect the input and output pins of multiple communication modules with the same function through module interconnection configuration to perform batch ATE testing; the off-chip clock test mode is used to use off-chip clock input to perform ATE testing on single-channel communication modules and complex communication modules.

2. The MCU circuit structure including an on-chip oscillator according to claim 1, characterized in that: In the off-chip clock test mode, there are at least two mode control pins, including an off-chip clock input of the off-chip clock test mode and a reset state mode control input.

3. The MCU circuit structure including an on-chip oscillator according to claim 2, characterized in that: The reset mode control input pin is multiplexed with the function pin of the loopback test module.

4. The MCU circuit structure including an on-chip oscillator according to claim 2, characterized in that: The off-chip clock input pin is multiplexed with the functional pin of the loopback test module.

5. The MCU circuit structure including an on-chip oscillator according to claim 1, characterized in that: The mode control register is configured through the processor to enter the loopback test mode, and the input and output pins of multiple communication modules with the same function are connected through the module interconnection configuration.

6. A method for testing an MCU circuit including an on-chip oscillator, characterized in that: Based on an MCU circuit structure including an on-chip oscillator according to any one of claims 1 to 5, the specific steps are as follows: When performing loopback testing, multiple communication modules with the same function are interconnected and configured, and the functional correctness of multiple communication modules with the same function is determined through the MCU intra-chip communication function; When performing off-chip clock testing, the clock source of the MCU is switched to the off-chip clock input, and the ATE test of the corresponding module in the MCU is completed based on the off-chip clock function vector.

7. A method for testing an MCU circuit including an on-chip oscillator according to claim 6, characterized in that: When the number of communication modules with the same function in the MCU chip is an even number greater than or equal to 2, the output pin of communication module 1 is output to the outside of the chip and connected to the input pin of communication module 2 at the same time; The output pin of communication module 2 is output to the outside of the chip and is connected to the input pin of communication module 1 at the same time.

8. A method for testing an MCU circuit including an on-chip oscillator according to claim 6, characterized in that: When the number of communication modules with the same function in the MCU chip is an odd number greater than or equal to 3, first test the connection between the input and output pins of every two communication modules with an even number of paths; Then, one communication module is selected from the two communication modules that have been tested and connected to the input and output pins of the remaining one communication module to perform a second test.

9. A method for testing an MCU circuit including an on-chip oscillator according to claim 7 or 8, characterized in that: The on-chip determination result of the connected communication module with the same function is output through a simple waveform indication of the off-chip pin to obtain the ATE test result of the communication module.

10. A method for testing an MCU circuit including an on-chip oscillator according to claim 9, characterized in that: If the off-chip pin of the connected communication module with the same function outputs a simple waveform changing from high level to low level, it indicates that the communication is correct; otherwise, it indicates that the communication is abnormal.

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