PFC (Power Factor Correction) control method and power conversion system applying same

Abstract

The embodiment of the invention discloses a PFC (Power Factor Correction) control method and a power conversion system applying the same, each slave PFC control circuit is configured to share the same detection circuit, when a working mode is configured, the number of the slave PFC circuits is determined according to a detection signal obtained by the detection circuit, and when a normal working mode is configured, the number of the slave PFC circuits is determined according to a detection signal obtained by the detection circuit. The slave PFC control circuit is controlled by the driving signal of the main PFC control circuit to work; when the working mode is configured, the terminals in the normal working mode can be reused, so that the terminals and the area are saved.

Description

Technical Field

[0001] The present invention relates to the field of power electronics, and more specifically, to a PFC control method and a power conversion system using the same. Background Art

[0002] In existing applications, if you want to increase the output power, you usually increase the power parameter value of the power device to ensure it, but this action will increase the conduction loss and switching frequency, so the heat dissipation capacity also needs to be increased. Due to the limitation of heat dissipation capacity, some high-power circuits will use power conversion circuits in parallel to optimize the heat dissipation capacity and reduce impedance to meet the power requirements. However, this approach still has problems such as large current or voltage ripple, audio noise, and poor EMC.

[0003] To solve this problem, the entire system uses multiple power conversion circuits working in parallel. Each power conversion control circuit corresponds to a PFC circuit, and one PFC control circuit controls a corresponding PFC circuit. However, in the prior art, there is no communication between the various PFC control circuits, the switching frequencies between the PFC circuits work asynchronously, and output power matching is difficult to achieve. Summary of the invention

[0004] In view of this, the present invention proposes a PFC control circuit, a control method and a power conversion system to solve the technical problem in the prior art that various PFC control circuits of the PFC circuit cannot communicate with each other.

[0005] In a first aspect, an embodiment of the present invention provides a PFC control method, which is applied to a power conversion system, wherein the power conversion system includes at least one PFC circuit. When a plurality of the PFC circuits are included, the PFC circuits are coupled in parallel with each other, and one of them is configured as a master PFC circuit, and the rest are configured as slave PFC circuits. Each PFC circuit is controlled by a PFC control circuit. When a working mode is configured: the slave PFC control circuits are configured to share the same detection circuit. In a detection phase, all the slave PFC control circuits transmit a same reference signal to the detection circuit. After all the PFC circuits complete the transmission, the detection circuit obtains a detection signal, and determines the number of the slave PFC circuits according to the detection signal.

[0006] Preferably, the number of the PFC circuits is determined according to the number of levels included in the detection signal.

[0007] Preferably, the number of the PFC circuits is determined according to the ratio of the peak value of the detection signal to the reference signal; wherein the ratio of the peak value of the detection signal to the reference signal is in direct proportion to the number of the slave PFC circuits.

[0008] Preferably, whether the current PFC control circuit is a master PFC control circuit or a slave PFC control circuit is determined by determining whether a signal representing an input voltage of a corresponding PFC circuit is received, wherein the master PFC control circuit is configured to receive the input voltage of the PFC circuit, and the slave PFC control circuit is configured not to receive the input voltage.

[0009] Preferably, when the input received signal reaches a voltage threshold, it is determined that the current PFC control circuit is a master PFC control circuit; when the input received signal does not reach the voltage threshold, it is determined that the current PFC control circuit is a slave PFC control circuit; wherein the input received signal of the master PFC control circuit is a signal characterizing the input voltage.

[0010] Preferably, when the feedback reception signal received by the current PFC control circuit reaches a first voltage and lasts for a first time, the current PFC control circuit is controlled to output the reference signal to the detection circuit, and output a second voltage as the feedback output signal of the current PFC control circuit;

[0011] The feedback received signal of the master PFC control circuit is a signal used to characterize the output voltage of the PFC circuit, and the feedback received signal of the slave PFC control circuit is a feedback output signal characterizing the master PFC control circuit or the previous slave PFC control circuit.

[0012] Preferably, the detection circuit comprises a detection resistor, a first end of the detection resistor is coupled to a ground potential, and a second end of the detection resistor is coupled to all slave PFC control circuits.

[0013] Preferably, the second end of the detection resistor is connected to all slave PFC control circuits and then connected to the master PFC control circuit through a switch module.

[0014] Preferably, the control method comprises, in a normal working mode, generating, by the slave PFC control circuit, a driving signal for a current slave PFC control circuit according to a received driving signal of a master PFC control circuit or a previous slave PFC control circuit and according to the number of PFC control circuits detected in the configuration working mode.

[0015] Preferably, when the number of detected slave PFC control circuits is n, the phase difference between the driving signal of the mth slave PFC control circuit and the phase of the driving signal of the master PFC control circuit is 360°*m / (n+1), so that each PFC circuit operates in phase.

[0016] In a second aspect, an embodiment of the present invention further provides a power conversion system, comprising: a rectifier circuit, which rectifies a received AC power signal; at least one PFC circuit, when a plurality of the PFC circuits are included, the PFC circuits are connected in parallel with each other, and one of them is configured as a master PFC circuit, and the rest are configured as slave PFC circuits, the input ends of all PFC circuits are connected to the output ends of the rectifier circuit, and the output ends of all PFC circuits are connected to both ends of a bus capacitor; all PFC circuits are controlled by the corresponding above-mentioned PFC control method; a power conversion circuit, which is used to perform power conversion on the voltage across the bus capacitor.

[0017] Preferably, the power conversion circuit comprises the same number of power conversion units as the PFC circuit, the input end of each power conversion unit is connected to the two ends of the bus capacitor, and each power conversion unit is controlled by a corresponding power conversion control circuit.

[0018] Preferably, the PFC circuit is a BOOST circuit.

[0019] Preferably, each PFC control circuit is integrated into one chip.

[0020] Preferably, each PFC control circuit and one power conversion control circuit are integrated into one chip.

[0021] Preferably, the power conversion system is used for power supply of an electrical device, wherein the output of at least one power conversion unit is used to power a mainboard of the electrical device, and the output of at least one power conversion unit is used to power a backlight LED of the electrical device.

[0022] Compared with the prior art, the technical solution of the present invention has the following advantages: when there are multiple PFC circuits connected in parallel, each PFC control circuit controls a corresponding PFC circuit, each PFC control circuit communicates with each other, and the switching frequencies of each PFC circuit are the same; and the phases of each PFC circuit can be evenly shifted according to the number of parallel PFC circuits, thereby reducing the switching frequency ripple on the output side; when configuring the working mode, the pins in the normal working mode can be reused, thereby achieving the purpose of saving pins and area. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0024] Figure 1 A first schematic diagram of a power conversion system according to an embodiment of the present invention;

[0025] Figure 2A schematic diagram of interconnecting multiple PFC control circuits according to an embodiment of the present invention;

[0026] Figure 3 A second schematic diagram of a power conversion system according to an embodiment of the present invention;

[0027] Figure 4 is a flow chart of a PFC control method according to an embodiment of the present invention;

[0028] Figure 5 is a timing diagram of a PFC control method according to an embodiment of the present invention;

[0029] Figure 6 is a flow chart of a PFC control method according to an embodiment of the present invention;

[0030] Figure 7 A schematic diagram of a PFC control circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0031] The present invention is described below based on embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, some specific details are described in detail. It is possible for a person skilled in the art to fully understand the present invention without the description of these details. In order to avoid confusing the essence of the present invention, known methods, processes, flows, components and circuits are not described in detail.

[0032] In addition, persons of ordinary skill in the art will appreciate that the drawings provided herein are for illustration purposes and are not necessarily drawn to scale.

[0033] At the same time, it should be understood that in the following description, "circuit" refers to a conductive loop composed of at least one element or subcircuit through electrical connection or electromagnetic connection. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0034] Figure 1 The power conversion system of the embodiment of the present invention includes a rectifier circuit 11, a power conversion circuit 16, at least one PFC circuit 12, and a PFC control circuit 14 corresponding to each PFC circuit 12. In this embodiment, the power conversion circuit 16 includes a plurality of power conversion units 13. The rectifier circuit 11 is used to convert the input AC signal V ACWhen multiple PFC circuits 12 are included, the PFC circuits are coupled in parallel with each other, and one of them is configured as a master PFC circuit, and the rest are configured as slave PFC circuits. The input end of each PFC circuit 12 is coupled to the output end of the rectifier circuit 11, and the output end of each PFC circuit 12 is connected to the input end of the power conversion circuit 16; each PFC circuit 12 is controlled by the corresponding PFC control circuit 14, specifically, the master PFC circuit is controlled by the master PFC control circuit, and the slave PFC circuit is controlled by the corresponding slave PFC control circuit. The output ends of each PFC circuit are connected in parallel and connected to the bus capacitor C bus The two ends of the power conversion circuit 16 are connected to the bus capacitor C bus The voltage on the power converter is used for power conversion. Figure 1 In the example, the power conversion circuit 16 includes the same number of power conversion units 13 as the number of PFC circuits 12, each of the power conversion control circuits 15 is used to control a corresponding power conversion unit 13, the input ends of the power conversion units 13 are connected in parallel, and the input end of each power conversion unit 13 is connected to the bus capacitor C bus The two ends of each power conversion unit 13 are connected, and the output end of each power conversion unit 13 is connected to a load.

[0035] It should be noted that Figure 1 It is only illustrated as an example that the power conversion circuit 16 includes the same number of power conversion units 13 as the PFC circuit 12. In other examples, the power conversion circuit 16 may include only one or any number of power conversion units 13, and the composition of the power conversion unit 13 may be any circuit that can achieve power conversion, which is not limited here.

[0036] In one example, each PFC control circuit can be integrated on one chip, and the first terminal FBB described in this embodiment is the first pin FBB of the chip, the second terminal LNS is the second pin LNS of the chip, the third terminal VSEN is the third pin VSEN of the chip, and the fourth terminal GATEB is the fourth pin GATEB of the chip. In another example, when the power conversion circuit 16 includes the same number of power conversion units 13 as the number of PFC circuits 12, a PFC control circuit 14 and a corresponding power conversion control circuit 15 can also be integrated on one chip, wherein each of the power conversion control circuits 15 is used to control a corresponding power conversion unit 13.

[0037] When each PFC control circuit is configured in an operating mode, when a plurality of PFC circuits are included, all slave PFC control circuits are configured to share a detection circuit. In a detection phase, all slave PFC control circuits transmit a same reference signal to the detection circuit. After all PFC circuits complete the transmission, a detection signal of the detection circuit is obtained, and the number of slave PFC control circuits is determined based on the detection signal.

[0038] The number of the PFC circuits can be determined by the number of levels included in the detection signal or according to the ratio of the peak value of the detection signal to the reference signal; wherein the ratio of the peak value of the detection signal to the reference signal is in direct proportion to the number of the slave PFC circuits. Specifically, the detection circuit may include a detection resistor, a first end of which is coupled to the ground potential, and a second end of which is coupled to all slave PFC control circuits. More specifically, the second terminals LNS of all slave PFC control circuits are interconnected and then connected to the master PFC control circuit through a switch module; as an example, the second terminals LNS of the slave PFC control circuits are interconnected and then coupled to the third terminal VSEN of the master PFC control circuit through a switch module, and the voltages of the second terminals of each slave PFC control circuit are the same; all slave PFC control circuits can sequentially and successively transmit a same reference signal to the detection circuit.

[0039] Specifically, Figure 2 As shown, it illustrates the connection mode between three PFC control circuits when three parallel-coupled PFC circuits are included, one of which is the main PFC control circuit, and the other two are slave PFC control circuits: the first slave PFC control circuit and the second slave PFC control circuit. Among them, the detection circuit is a resistor R9, the second terminals LNS of all slave PFC control circuits are connected to each other and to the second end of the resistor R9, and the first end of the resistor R9 is connected to the reference ground. In this example, the second terminals LNS of all slave PFC control circuits are connected to the third terminal VSEN of the main PFC control circuit through a diode D8, wherein the anode of the diode D8 is connected to the second end of the resistor R9 and to the second terminal LNS of the slave PFC control circuit, and the cathode of the diode D8 is connected to the third terminal VSEN of the main PFC control circuit; as an example, the third terminal VSEN of each PFC control circuit can receive a signal used to characterize the output voltage of one of the corresponding power conversion units 13 in the normal working mode, for sensing the output voltage; specifically, the signal received by the third terminal VSEN in the normal working mode is not limited by the present invention.

[0040] It should be noted that in Figure 2The switch module is configured as a diode D8. When the anode voltage of the diode is higher than the cathode voltage, the diode is automatically turned on. The unidirectional conduction characteristic of the diode can prevent the third terminal VSEN of the main PFC control circuit from transmitting a signal to the detection circuit. In other examples, the switch module can also be an active switch module, which is not limited here.

[0041] When the feedback reception signal received by the current PFC control circuit reaches the first voltage V1 and lasts for the first time T1, the current PFC control circuit is controlled to output a reference signal to the detection circuit, and output a second voltage V2 as the feedback output signal of the current PFC control circuit; wherein the feedback reception signal of the master PFC control circuit is a signal used to characterize the output voltage of the corresponding PFC circuit, and the feedback reception signal of the slave PFC control circuit is a feedback output signal characterizing the master PFC control circuit or the previous slave PFC control circuit.

[0042] Specifically, when the feedback reception signal received by the first terminal FBB of each PFC control circuit reaches the first voltage V1 and lasts for the first time T1, the second terminal LNS of the current PFC control circuit is controlled to output the first current I1 as a reference signal to the detection circuit, and the second voltage V2 is output through the fourth terminal GATEB as the feedback output signal of the current PFC control circuit. Among them, the feedback reception signal received by the first terminal FBB of the main PFC control circuit is a feedback signal representing the output voltage of the corresponding FPC circuit, that is, Figure 1 Intermediate bus capacitor C bus The voltage across the terminals V bus In one example, the feedback signal Figure 3 As shown, the first terminal FBB of the main PFC control circuit is connected to the bus capacitor C in series. bus The common end of the resistors R4 and R5 at both ends receives the feedback signal representing the output voltage of the corresponding FPC circuit, that is, the bus capacitance C bus The voltage across the two ends is V bus The first terminal FBB of the slave PFC control circuit is connected to the fourth terminal GATEB of the master PFC control circuit or the previous slave PFC control circuit. Specifically, the first terminal FBB of the first slave PFC control circuit is connected to the fourth terminal GATEB of the master PFC control circuit, thereby receiving the feedback output signal of the master PFC control circuit; the first terminal FBB of the second slave PFC control circuit is connected to the fourth terminal GATEB of the first slave PFC control circuit, thereby receiving the feedback output signal of the first slave PFC control circuit.

[0043] By judging whether the input voltage is received, it is judged whether the current PFC circuit is a master PFC circuit or a slave PFC control circuit, wherein the master PFC control circuit is configured to receive the input voltage of the PFC circuit, and the slave PFC control circuit is configured not to receive the input voltage. When the input receiving signal reaches the voltage threshold, it is judged that the current PFC control circuit is the master PFC control circuit; when the input receiving signal is not greater than the voltage threshold, it is judged that the current PFC control circuit is the slave PFC control circuit; wherein the input receiving signal of the master PFC control circuit is a signal characterizing the input voltage. Specifically, it is possible to judge whether the current PFC control circuit is the master PFC control circuit or the slave PFC control circuit by detecting whether the peak value of the voltage of the second terminal LNS reaches the fourth voltage value V4.

[0044] Figure 3 The figure shows the connection mode between the main PFC control circuit and the slave PFC control circuit, and between each PFC control circuit and the corresponding PFC circuit 12 when the two PFC circuits 12 are coupled in parallel when the PFC circuit 12 is a BOOST circuit. The second terminal LNS of the main PFC control circuit receives a voltage signal representing the input to the rectifier, specifically, the AC input signal V AC The two ends of the PFC are first connected to the same node through diodes D2 and D3, and then divided by resistors R1 and R2 to connect to the second pin LNS of the main PFC control circuit, so as to sense the AC input voltage V AC The absolute value of Figure 2 and Figure 3 It can be seen that the difference between the master PFC control circuit and the slave PFC control circuit is that: the connection mode of the second terminal LNS is different, the second terminal LNS of the master PFC control circuit receives the voltage signal representing the input to the rectifier; the second terminals LNS of all the slave PFC control circuits are connected to each other and then connected to the third terminal VSEN of the master PFC control circuit through the diode D8. Therefore, it can be determined whether the current PFC control circuit is the master PFC control circuit or the slave PFC control circuit by detecting the input receiving signal of the second terminal LNS.

[0045] In addition, if Figure 3 The power conversion system further includes a rectifier circuit 11 for rectifying the received AC power signal. The rectifier circuit 11 is composed of four diodes D4, D5, D6 and D7, and the BOOST circuit includes an inductor L1, a main power tube M1 and a diode D9. The fourth pin GATEB of the main PFC control circuit and the slave PFC control circuit are coupled to the control end of the main power tube M1 in the corresponding BOOST circuit. Specifically, the fourth pin GATEB of each PFC control circuit is connected to the control end of the main power tube M1 in the BOOST circuit through a resistor.

[0046] In this embodiment, if Figure 4 As shown, the control method of the PFC control circuit includes three stages: a timing synchronization stage S01, a detection stage S02 and a normal working stage S03. Among them, the timing synchronization stage S01 and the detection stage S02 work in the configuration working mode, and the normal working stage S03 works in the normal working mode. After power-on, the current power supply voltage V of the PFC control circuit is detected. VCC Reaching the preset voltage V VCC ON , then enter the configuration working mode. The timing synchronization stage S01 is used to synchronize the timing of all PFC control circuits, so as to facilitate the detection stage S02; the detection stage S02 is used to determine whether the current PFC control circuit is the main PFC control circuit or the slave PFC control circuit, and to detect the number of slave PFC control circuits. In the normal working stage S03, according to the detection result of the detection stage S02, the main PFC control circuit works in the main PFC working mode, the slave PFC control circuit works in the slave PFC working mode, and when there are multiple PFC circuits, it is used to control each PFC circuit 12 to work in a staggered phase. In another example, the working process of the PFC control circuit includes two stages, the detection stage S02 and the normal working stage S03, and the detection stage S02 and the normal working stage S03 are the same as the above description, and are not repeated here.

[0047] During the timing synchronization process, when the signal received by the current PFC control circuit meets a preset condition, the current PFC control circuit is controlled to output at least one specific signal; when the signal received by the current PFC control circuit meets another preset condition, the current PFC control circuit is controlled to stop outputting signals. Specifically, in the timing synchronization stage S01, when all PFC control circuits detect that the voltage value of the feedback reception signal received by the first terminal FBB reaches the first voltage V1 and the duration is greater than the first time T1, the current PFC control circuit is controlled to output a current signal with a magnitude of the first current I1 from the second terminal LNS as a reference signal to the detection circuit, and the fourth terminal GATEB outputs a voltage signal with a magnitude of the second voltage V2 as a feedback output signal, that is, the second terminal LNS and the fourth terminal GATEB are controlled to start outputting signals; where V1 ≤ V2 < Vth, and Vth is the turn-on voltage of the switching transistor driven by the fourth terminal GATEB; in one example, V1 = V2 - V12, and V12 is the voltage drop between the first terminal FBB of the current slave PFC control circuit and the fourth terminal GATEB of the connected master PFC control circuit or the previous slave PFC control circuit. When it is detected that the voltage value of the third terminal VSEN of the current PFC control circuit reaches the third voltage V3 and the duration is greater than the second time T2, the fourth terminal GATEB is controlled to stop outputting signals, where R9*(n - 1)*I1 - Vf < V3 < R9*n*I1 - Vf, n is the number of slave PFC control circuits, R9 is Figure 2 and Figure 3 the resistance value of the detection resistor R9 in

[0048]

[0049] Figure 5 For example Figure 5As shown in FIG. 1 , it is a timing diagram of the PFC control method of an embodiment of the present invention. Taking the number of PFC control circuits as 3 as an example (one master PFC control circuit and two slave PFC control circuits), the synchronization phase S01 and the detection phase S02 are described. In this example, the first time T1 = 1ms, and the second time T2 = 1ms. At time tn7, power is turned on. At time tn6, the power supply terminal VCC ( Figure 3 The voltage V VCC Reaching the preset voltage V VCC_ON , and the voltage of the first terminal FBB of the main PFC control circuit is greater than the first voltage V1 before the time tn6, so at the time tn6, the configuration working mode is entered, and the main PFC control circuit starts to enter the timing synchronization stage S01; within 1ms after the time tn6, that is, between the times tn6 and tn4, the voltage V VCC Reaching the preset voltage V VCC_ON After that, the voltage of the first terminal FBB is continuously greater than the first voltage V1, that is, the voltage of the first terminal FBB is greater than the first voltage V1 and the duration reaches 1ms (first time T1). Therefore, at time tn4, the fourth terminal GATEB of the main PFC control circuit starts to output the second voltage V2 as a feedback output signal, and the second terminal LNS starts to output the first current I1 as a reference signal.

[0050] The first terminal FBB of the first slave PFC control circuit is connected to the fourth terminal GATEB of the master PFC control circuit. Therefore, at time tn4, the voltage of the first terminal FBB of the first slave PFC control circuit begins to be greater than the first voltage V1. At time tn3, the voltage V VCC Reaching the preset voltage V VCC_ON , within 1ms after the moment tn3, that is, between the moments tn3 and tn2, the voltage of the first terminal FBB is continuously greater than the first voltage V1, and at the moment tn2, the voltage of the first terminal FBB is greater than the first voltage V1 and the duration reaches 1ms (first time T1). Therefore, at the moment tn2, the fourth terminal GATEB of the first slave PFC control circuit starts to output the second voltage V2 as the feedback output signal, and the second terminal LNS starts to output the first current I1 as the reference signal. At the same time, at the moment tn2, the voltage of the second terminal LNS of the first slave PFC control circuit and the second slave PFC control circuit is I1*R9, and the voltage of the third terminal VSEN of the master PFC control circuit is I1*R9-Vf, where Vf is the conduction voltage drop of the diode D8.

[0051] The first terminal FBB of the second slave PFC control circuit is connected to the fourth terminal GATEB of the first slave PFC control circuit. Therefore, at time tn2, the voltage of the first terminal FBB of the second slave PFC control circuit starts to be greater than the first voltage V1. At time tn5 before tn2, the voltage V of the power supply port VCC of the second slave PFC control circuit VCC has reached the preset voltage V VCC_ON . Within 1 ms after time tn2, that is, between tn2 and tn1, the voltage of the first terminal FBB continues to be greater than the first voltage V1. At time tn1, the condition that the voltage of the first terminal FBB is greater than the first voltage V1 and the duration reaches 1 ms (the first time T1) is satisfied. Therefore, at time tn1, the fourth terminal GATEB of the second slave PFC control circuit starts to output the second voltage V2, and the second terminal LNS starts to output the first current I1. The voltage of the second terminal LNS of the first slave PFC control circuit and the second slave PFC control circuit is 2*I1*R9, and the voltage of the third terminal VSEN of the main PFC control circuit is 2*I1*R9 - Vf, where Vf is the conduction voltage drop of the diode D8.

[0052] At time t0, when it is detected that the voltage of the third terminal VSEN of the main PFC control circuit is greater than the third voltage value V3 and the duration reaches 1 ms (the second time T2), where R9*I1 - Vf < V3 < 2*R9*I1 - Vf, that is, the condition that the voltage value of the third port VSEN is greater than the third voltage value V3 and the duration reaches the second time T2 is satisfied. Therefore, at time t0, the main PFC control circuit is controlled to stop outputting a signal at the fourth port GATEB; the first terminal FBB of the first slave PFC control circuit is connected to the fourth terminal GATEB of the main PFC control circuit. Therefore, at time t0, the voltage of the first terminal FBB of the first slave PFC control circuit also starts to drop to 0. At time t0 + T3, when the voltage value of the first port FBB of the first slave PFC control circuit satisfies being less than the first voltage V1 and the duration is greater than the third time T3, therefore, at time t0 + T3, the first slave PFC control circuit stops outputting a signal at the fourth port GATEB; the first terminal FBB of the second slave PFC control circuit is connected to the fourth terminal GATEB of the first slave PFC control circuit. Therefore, at time t0 + T3, the voltage of the first terminal FBB of the second slave PFC control circuit also starts to drop to 0. At time t0 + 2*T3, the voltage value of the first port FBB of the second slave PFC control circuit satisfies being less than the first voltage V1 and the duration is greater than the third time T3. Therefore, at time t0 + 2*T3, the second slave PFC control circuit stops outputting a signal at the fourth terminal GATEB. At Figure 5In the above example, since T3 << T1, it can be approximated that at time t0, the fourth terminals GATEB of the main PFC control circuit, the first slave PFC control circuit, and the second slave PFC control circuit all stop outputting signals. Therefore, in the time interval from tn6 to t0 + 2*T3 (approximately from tn6 to t0), a process of timing synchronization is completed.

[0053] After completing a process of timing synchronization corresponding to tn6 to t0, the detection stage S02 starts. The detection stage S02 includes determining whether the current PFC control circuit is the main PFC control circuit or a slave PFC control circuit; and detecting the number of slave PFC control circuits. Specifically, as Figure 6 shown, as an example, it may include the following steps:

[0054] S021: Determine whether the current PFC control circuit is the main PFC control circuit; when it is the main PFC control circuit, go to step S022; otherwise, go to step S023;

[0055] S022: Determine whether there is a slave control module connected to the current main PFC control circuit? When there is a slave PFC control circuit connected to the current main PFC control circuit, go to step S023; otherwise, there is no slave PFC control circuit connected to the current main PFC control circuit, and it is determined that the number of slave PFC control circuits is 0;

[0056] S023: Detect the number of slave PFC control circuits.

[0057] The following combines Figure 5 to illustrate step S021. After time t0 + 2*T3 ( Figure 5 approximately time t0 in AC ), the step S021 in the detection stage S02 starts; there is a voltage signal at the second terminal LNS of the main PFC control circuit, and there is no voltage signal at the second terminals LNS of the first slave main PFC control circuit and the second slave main PFC control circuit; in the time interval from t0 to t1, the peak voltage of the second terminal LNS of each PFC control circuit is detected. When the peak voltage of the second terminal LNS is greater than the fourth voltage V4, it is determined that the current PFC control circuit is the main PFC control circuit; otherwise, it is determined that the current PFC control circuit is a slave PFC control circuit. Specifically, the time interval between time t0 and time t1 can be greater than or equal to half of the cycle of the AC input signal V AC .

[0058] By Figure 2 and Figure 3It can be seen that when there is no slave PFC control circuit, in one example, the third terminal VSEN of the master PFC control circuit receives a signal used to characterize the output voltage of one of the corresponding power conversion units 13; when there is a slave PFC control circuit, the third terminal VSEN of the master PFC control circuit not only receives a signal used to characterize the output voltage of one of the corresponding power conversion units 13, but is also connected to the second terminal LNS of the slave PFC control circuit; but in the detection stage S02, the power conversion unit 13 does not work, and the output of the power conversion unit 13 is 0, so in step S022, it can be determined by detecting the voltage of the third terminal VSEN to determine whether there is a slave PFC control circuit connected to the current master PFC control circuit. In one example, it can be determined by detecting whether the voltage of the third terminal VSEN reaches the fifth voltage V5, and whether the duration of reaching the fifth voltage V5 reaches the fourth time T4 to determine whether there is a slave PFC control circuit connected to the current master PFC control circuit.

[0059] Specifically, combined Figure 5 Step S021 is described. At 1 ms after time t1, step S022 is started. In one embodiment, step S022 and step S023 are performed by repeating the timing synchronization step. Figure 5 In the time interval t2 to t5 in the sequence synchronization stage S01 is repeated, and in the time interval t3 to t5, the information of the third terminal VSEN of the main PFC control circuit is detected, and when the voltage of the third terminal VSEN exceeds the fifth voltage V5, and the duration of exceeding the fifth voltage V5 exceeds the fourth time T4 (the fourth time T4 is less than or equal to the first time T1, for example, it can be 0.5*T1), it is judged that there is a slave PFC control circuit connected to the current main PFC control circuit; otherwise, it is judged that there is no slave PFC control circuit connected to the current main PFC control circuit, that is, at this time, there is only one master PFC control circuit in the power conversion system. In an example, the fifth voltage V5 = R9*I1-Vf.

[0060] The following combination Figure 5Step S023 is explained. At time t6, which is 1 ms after time t5, the timing synchronization stage S01 is repeated, that is, the timing synchronization stage S01 is performed in the time interval t6-t9. It can be seen from the above description of the timing synchronization stage that whenever the voltage value of the first terminal FBB is greater than the first voltage V1 and the duration is greater than the first time T1, the second terminal LNS is controlled to output a current signal with a magnitude of the first current I1. The second terminals LNS of each slave PFC control circuit are connected to each other and to one end of R9. At time t7, the second terminal LNS of the first slave PFC control circuit starts to output a current signal with a magnitude of the first current I1. At time t8, the second terminal LNS of the second slave PFC control circuit starts to output a current signal with a magnitude of the first current I1. Therefore, in the time interval t7-t8, the voltages of the second terminals LNS of the first and second slave PFC control circuits are I1*R9, and in the time interval t8-t9, the voltages of the second terminals LNS of the first and second slave PFC control circuits are 2*I1*R9. It can be inferred that when there are n slave PFC control circuits, in one timing synchronization phase, the number of non-zero levels of the second terminal LNS of the slave PFC control circuit will be n, so the number of slave PFC control circuits can be determined by detecting the number of non-zero levels of the second terminal LNS of the slave PFC control circuit.

[0061] It should be noted that, because during the timing synchronization phase S01, all slave PFC control circuits sequentially transmit a same reference signal to the detection circuit, when all PFC circuits complete the transmission to the detection circuit, the peak value of the voltage at the second terminal LNS of the slave PFC control circuit is V LNS_PEAK =n*I1*R9, where n is the number of slave PFC control circuits, R9 is the resistance of the detection resistor R9, and I1 is the current value of the first current I1 of the reference signal, so the ratio of the peak value of the detection signal to the reference signal is in direct proportion to the number of slave PFC circuits. It can be seen that in another embodiment, step S023 can also determine the number of slave PFC control circuits by detecting the voltage peak value of the second terminal LNS of each slave PFC control circuit. In other examples, step S022 and step S023 can also be combined into one step, that is, the number of slave PFC control circuits can be determined according to the number of voltage levels or the peak value of the detection signal on the detection resistor R9 and the ratio of the reference signal. When the voltage level on the detection resistor R9 is always maintained at around 0, there is no slave PFC control circuit, that is, there is only a master PFC control circuit at present; when the voltage on the detection resistor R9 has a non-zero level or the voltage peak is not 0, the number of non-zero levels is the number of slave PFC control circuits, or the ratio of the voltage peak of the detection signal on the detection resistor to R9*I1 is the number of slave PFC control circuits.

[0062] At this point, the detection phase S02 is completed at time t9, and the normal working phase S03 is entered at a preset time after time t9. Figure 5 At time t10, the normal working phase S03 is entered.

[0063] As an example, the PFC control circuit 14 includes a mode detection and enabling circuit 143. In the detection phase, it is determined whether the current PFC control circuit is a master PFC control circuit or a slave PFC control circuit according to the received external signal; in the normal working phase, the master PFC control circuit generates a driving signal of the master PFC circuit according to the received signal, and the slave PFC control circuit generates a driving signal of the current slave PFC circuit according to the output of the master PFC control circuit. Specifically, Figure 7 The figure shows a schematic diagram of a PFC control circuit according to an embodiment of the present invention, wherein the PFC control circuit comprises: a mode detection and enabling circuit 143, a master working mode circuit 144 and a slave working mode circuit 145; wherein the mode detection and enabling circuit 143, in the detection phase, determines whether the current PFC control circuit is a master PFC control circuit or a slave PFC control circuit according to a signal received from a corresponding terminal; when it is detected as a master PFC control circuit, in the normal working phase, the mode detection and enabling circuit 143 controls the master working mode circuit 144 to be enabled; when it is detected as a slave PFC control circuit, in the normal working phase, the mode detection and enabling circuit 143 controls the slave working mode circuit 145 to be enabled. In an example, the slave working mode circuit 145 can reuse part of the circuits in the master working mode circuit 144.

[0064] In the normal working mode, the slave PFC control circuit generates a driving signal of the current slave PFC control circuit according to the received driving signal of the master PFC control circuit or the previous slave PFC control circuit and the number of PFC control circuits detected in the detection phase. When the number of detected slave PFC control circuits is n, the difference between the phase of the driving signal of the mth slave PFC control circuit and the phase of the driving signal of the master PFC control circuit is 360°*m / (n+1).

[0065] Specifically, in the normal operation mode, the slave PFC control circuit outputs a drive signal of the current slave PFC control circuit from the fourth terminal according to a drive signal output from the fourth terminal of the master PFC control circuit or the previous slave PFC control circuit received at the first terminal.

[0066] The slave PFC control circuit receives the driving signal of the main PFC control circuit or the previous slave PFC control circuit from the first terminal FBB, and detects the cycle value and the conduction time of the signal received at the first terminal FBB. As an example, when it is detected that the signal received at the first terminal FBB rises from 0V to a value greater than the first preset voltage value, it is considered that the rising edge of the signal is detected, and when it is detected that the signal falls from the second preset voltage value to the third preset voltage value, it is considered that the falling edge of the signal is detected, the time difference between two adjacent rising edges is the cycle value, and the time difference between the rising edge and the adjacent falling edge is the conduction time. When the number of slave PFC control circuits is n, when the first terminal FBB of the current slave PFC control module detects the rising edge, it performs a phase shift of 360° / (n+1), that is, the cycle value T of the previous cycle is delayed by T / (n+1), thereby generating the driving signal of the current slave PFC control module, that is, the start time of the driving signal outputted at the fourth terminal GATEB to control the corresponding slave PFC circuit 12 The power tube M1 in the start time of the switching frequency of each PFC circuit is the same.

[0067] It should be noted that, in the present embodiment, when configuring the working mode, the feedback output signal is outputted by multiplexing the fourth terminal GATEB for outputting the switch tube driving signal in the corresponding PFC circuit in the normal working mode; when configuring the working mode, the third terminal VSEN for sensing the output voltage in the normal working mode is multiplexed to determine whether a slave PFC control circuit is connected to the current master PFC control circuit; thereby saving the terminals of the PFC control circuit, thereby saving the area of ​​the PFC control circuit. In other examples, when configuring the working mode, other terminals in normal working mode may also be multiplexed to achieve the purpose of saving pins and area. The specific number or purpose of the multiplexed terminals is not limited herein.

[0068] As an example, the power conversion system can be used as a power supply for an electrical device, wherein the output of at least one power conversion circuit is used to power a mainboard of the electrical device, and the output of at least one power conversion circuit is used to power a backlight LED of the electrical device. As an example, the electrical device can be a television.

[0069] In summary, the present invention provides a PFC control method and a power conversion system using the same, wherein the PFC control circuit includes a mode detection and enabling circuit, a main working mode module and a slave working mode module; the mode detection and enabling module determines whether the PFC control circuit is a main PFC control circuit or a slave PFC control circuit according to a received external signal; when it is detected that the main PFC control circuit is a main PFC control circuit, the main working mode module is controlled to be enabled, and when it is detected that the slave PFC control circuit is a slave PFC control circuit, the slave working mode module is controlled to be enabled. The control method of the PFC control circuit includes a detection phase and a normal working phase, wherein the detection phase includes the following steps: determining whether the current PFC control circuit is a main PFC control circuit or a slave PFC control circuit; and detecting the number of slave PFC control circuits. When there are multiple parallel PFC circuits, each PFC control circuit controls a corresponding PFC circuit, and each PFC control circuit communicates with each other, so that the phases between each PFC circuit are evenly shifted according to the number of parallel PFC circuits, thereby reducing the switching frequency ripple on the output side; when the main PFC control circuit is working normally, the main working mode module is enabled, and when the slave PFC control circuit is working normally, the slave working mode module is enabled and works under the control of the drive signal output by the main working mode module; when configuring the working mode, the pins of the normal working mode can be reused, thereby saving pins and area.

[0070] In an embodiment of the present invention, the power tube may adopt various existing electrically controllable power tube types, such as a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), or an insulated gate bipolar transistor (IGBT), and the present invention is not limited to this.

[0071] Although the embodiments or implementations are described and explained separately above, some common technologies are involved. It is the opinion of ordinary technicians in this field that the embodiments or implementations can be replaced and integrated between them. If one of the embodiments or implementations is not clearly recorded, reference can be made to another recorded embodiment.

[0072] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A PFC control method, applied to a power conversion system, wherein the power conversion system comprises at least one PFC circuit, and when a plurality of PFC circuits are included, the PFC circuits are coupled in parallel with each other, and one of the PFC circuits is configured as a master PFC circuit, and the rest are configured as slave PFC circuits, and each PFC circuit is controlled by a PFC control circuit, characterized in that: When configuring the working mode: Each slave PFC control circuit is configured to share the same detection circuit. In the detection phase, all slave PFC control circuits transmit a same reference signal to the detection circuit. After all PFC circuits complete the transmission, the detection circuit obtains the detection signal and determines the number of the slave PFC circuits according to the detection signal.

2. The control method according to claim 1, characterized in that: The number of the PFC circuits is determined according to the number of levels included in the detection signal.

3. The control method according to claim 1, characterized in that: The number of the PFC circuits is determined according to the ratio of the peak value of the detection signal to the reference signal; wherein the ratio of the peak value of the detection signal to the reference signal is in direct proportion to the number of the slave PFC circuits.

4. The control method according to claim 1, characterized in that: By determining whether a signal representing an input voltage of a corresponding PFC circuit is received, it is determined whether the current PFC control circuit is a master PFC control circuit or a slave PFC control circuit, wherein the master PFC control circuit is configured to receive the input voltage of the PFC circuit, and the slave PFC control circuit is configured not to receive the input voltage.

5. The control method according to claim 4, characterized in that: When the input received signal reaches a voltage threshold, it is determined that the current PFC control circuit is a master PFC control circuit; when the input received signal does not reach the voltage threshold, it is determined that the current PFC control circuit is a slave PFC control circuit; wherein the input received signal of the master PFC control circuit is a signal representing the input voltage.

6. The control method according to claim 3, characterized in that: When the feedback reception signal received by the current PFC control circuit reaches a first voltage and lasts for a first time, controlling the current PFC control circuit to output the reference signal to the detection circuit, and outputting a second voltage as a feedback output signal of the current PFC control circuit; The feedback reception signal of the slave PFC control circuit is a feedback output signal representing the master PFC control circuit or the previous slave PFC control circuit, and the feedback reception signal of the master PFC control circuit is different from the feedback reception signal of the slave PFC control circuit.

7. The control method according to claim 1, characterized in that: The detection circuit includes a detection resistor, a first terminal of the detection resistor is coupled to the ground potential, and a second terminal of the detection resistor is coupled to all slave PFC control circuits.

8. The control method according to claim 7, characterized in that: The second end of the detection resistor is connected to all slave PFC control circuits and then connected to the master PFC control circuit through the switch module.

9. The control method according to claim 1, characterized in that: The control method, in normal working mode, includes: The slave PFC control circuit generates a drive signal for the current slave PFC control circuit according to the received drive signal of the master PFC control circuit or the previous slave PFC control circuit and according to the number of PFC control circuits detected in the configuration operation mode.

10. The control method according to claim 9, characterized in that: When the number of detected slave PFC control circuits is n, the phase difference between the driving signal of the mth slave PFC control circuit and the driving signal of the master PFC control circuit is 360°*m / (n+1), so that each PFC circuit operates in phase.

11. A power conversion system, characterized in that: include: A rectifier circuit, for rectifying the received AC power signal; at least one PFC circuit, when comprising a plurality of said PFC circuits, the respective PFC circuits are connected in parallel with each other, and one of them is configured as a master PFC circuit, and the others are configured as slave PFC circuits, the input ends of all the PFC circuits are connected to the output ends of the rectifier circuit, and the output ends of all the PFC circuits are connected to the two ends of the bus capacitor; all the PFC circuits are controlled by the corresponding PFC control method according to any one of claims 1 to 10; The power conversion circuit is used to perform power conversion on the voltage across the bus capacitor.

12. The power conversion system according to claim 11, characterized in that: The power conversion circuit includes power conversion units having the same number as the PFC circuit, the input end of each power conversion unit is connected to the two ends of the bus capacitor, and each power conversion unit is controlled by a corresponding power conversion control circuit.

13. The power conversion system according to claim 11, characterized in that: The PFC circuit is a BOOST circuit.

14. The power conversion system according to claim 11, characterized in that: Each PFC control circuit is integrated into one chip.

15. The power conversion system according to claim 12, characterized in that: Each PFC control circuit and a power conversion control circuit are integrated into one chip.

16. The power conversion system according to claim 12, characterized in that: The power conversion system is used for the power supply of an electric device, wherein the output of at least one power conversion unit is used to power a mainboard of the electric device, and the output of at least one power conversion unit is used to power a backlight LED of the electric device.

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