linear voltage regulator

Abstract

The application relates to a linear voltage stabilizer, which comprises a stabilizer input end, a stabilizer output end, a voltage stabilizing circuit and a low-resistance circuit. The stabilizer input end is used for connecting a voltage, the voltage stabilizing circuit is connected with the stabilizer input end and the low-resistance circuit, the low-resistance circuit is connected with the stabilizer output end, and the low-resistance circuit is used for reducing the output resistance of the linear voltage stabilizer. The output voltage is stabilized through the voltage stabilizing circuit, the output resistance is reduced through the low-resistance circuit, the output voltage ripple is reduced, and the purpose of improving the stability of the circuit can be achieved.

Description

Technical Field

[0001] This application relates to the field of circuit design technology, and in particular to a linear voltage regulator. Background Technology

[0002] With the development of technology, various circuits are applied to all aspects of life, and voltage regulators are becoming increasingly widely used. Linear voltage regulators are commonly used to power digital circuits. Linear voltage regulators can provide accurate and stable responses to low-frequency and high-frequency loads through a closed-loop circuit. However, for medium-frequency load currents, the overshoot of the medium-frequency output voltage of linear voltage regulators is relatively large, resulting in a larger equivalent power supply noise.

[0003] Traditional linear regulators increase the closed-loop bandwidth and improve transient response speed to reduce power supply noise, but this reduces circuit stability. Summary of the Invention

[0004] Therefore, it is necessary to provide a linear regulator that can improve circuit stability to address the aforementioned technical problems.

[0005] A linear voltage regulator includes a voltage regulator input terminal, a voltage regulator output terminal, a voltage regulator circuit, and a low-resistance circuit. The voltage regulator input terminal is used to connect a voltage. The voltage regulator circuit connects the voltage regulator input terminal and the low-resistance circuit. The low-resistance circuit is connected to the voltage regulator output terminal and is used to reduce the output resistance of the linear voltage regulator.

[0006] In one embodiment, the voltage regulator circuit includes a reference voltage amplifier circuit and a subsequent stage circuit. The reference voltage amplifier circuit is connected to the input terminal of the voltage regulator and the subsequent stage circuit, and the subsequent stage circuit is connected to the input terminal of the voltage regulator and the low-impedance circuit.

[0007] In one embodiment, the subsequent circuitry includes an error amplifier and a feedback circuit. The positive input of the error amplifier is connected to the reference voltage amplifier circuit, and both the inverting input and output of the error amplifier are connected to the feedback circuit. The feedback circuit is connected to the input of the voltage regulator and the low-impedance circuit.

[0008] In one embodiment, the reference voltage amplifier circuit includes a differential amplifier, a source follower, and a common-source amplifier. The positive input terminal of the differential amplifier is connected to the reference voltage input terminal. The inverting input terminal and the output terminal of the differential amplifier are both connected to the source follower. The source follower is connected to the input terminal of the voltage regulator. The common-source amplifier is connected to the source follower and the positive input terminal of the error amplifier.

[0009] In one embodiment, the source follower includes a current source and a first switch. The current source is connected to the input of the voltage regulator, the inverting input of the differential amplifier, and the input of the first switch. The control terminal of the first switch is connected to the output of the differential amplifier and the common-source amplifier. The output of the first switch is grounded.

[0010] In one embodiment, the common-source amplifier includes a second switch and a third resistor. The input terminal of the second switch is connected to the common terminal of the current source and the first switch. The control terminal of the second switch is connected to the output terminal of the differential amplifier. The output terminal of the second switch is connected to the positive input terminal of the error amplifier and grounded through the third resistor.

[0011] In one embodiment, the feedback circuit includes a fifth switch, a sixth switch, and a fifth resistor. The input terminal of the fifth switch is connected to the input terminal of the voltage regulator, the control terminal of the fifth switch is connected to the output terminal of the error amplifier, the output terminal of the fifth switch is connected to the input terminal of the sixth switch and the low-impedance circuit, the control terminal of the sixth switch is connected to the output terminal of the differential amplifier, the output terminal of the sixth switch is connected to the inverting input terminal of the error amplifier, and is grounded through the fifth resistor.

[0012] In one embodiment, the ratio of the width-to-length ratio of the second switching transistor to the width-to-length ratio of the sixth switching transistor is equal to the resistance ratio of the fifth resistor to the third resistor.

[0013] In one embodiment, the low-impedance circuit includes a seventh switch and a second capacitor. The input terminal of the seventh switch is connected to the output terminal of the fifth switch and the output terminal of the voltage regulator. The control terminal of the seventh switch is connected to the output terminal of the differential amplifier and grounded through the second capacitor. The output terminal of the seventh switch is grounded.

[0014] In one embodiment, the sixth and seventh switching transistors are low-voltage MOSFETs.

[0015] The aforementioned linear regulator stabilizes the output voltage by setting a voltage regulation circuit and reduces the output resistance by setting a low-resistance circuit, thereby reducing the output voltage ripple and improving circuit stability. Attached Figure Description

[0016] Figure 1 This is a block diagram of a linear regulator in one embodiment;

[0017] Figure 2 This is a block diagram of a voltage regulator circuit in one embodiment;

[0018] Figure 3 This is a block diagram of the subsequent circuitry in one embodiment;

[0019] Figure 4 This is a block diagram of a reference voltage amplifier circuit in one embodiment;

[0020] Figure 5 This is a circuit diagram of a voltage regulator circuit in one embodiment;

[0021] Figure 6 This is a circuit diagram of a low-impedance circuit in one embodiment;

[0022] Figure 7 This is a circuit diagram of a linear regulator in one embodiment;

[0023] Figure 8 This is a circuit schematic of an error amplifier in one embodiment;

[0024] Figure 9 This is a circuit diagram of a linear regulator in one embodiment. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0027] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0028] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0029] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising,” “including,” or “having,” etc., specify the presence of the stated feature, whole, step, operation, component, part, or combination thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof.

[0030] When a linear regulator is used in a power supply circuit to power a digital circuit, the digital circuit has many operating modes and a wide range of load current variations. When the load current is low, the overdrive voltage of the power transistor decreases, leading to a decrease in the transconductance of the power transistor and easily causing a large voltage ripple.

[0031] The linear regulator provided in this application embodiment can be applied to various circuits that require voltage regulation, especially in applications where the circuit needs to output intermediate frequency load current. The voltage in the circuit is stabilized by the voltage regulation circuit of the linear regulator to obtain a stable regulated voltage. The stable regulated voltage is then passed through the low-impedance circuit of the linear regulator to obtain an output voltage with small voltage ripple.

[0032] In one embodiment, such as Figure 1 As shown, a linear voltage regulator is provided, including a voltage regulator input terminal 102, a voltage regulator output terminal 108, a voltage regulator circuit 104, and a low-resistance circuit 106. The voltage regulator input terminal 102 is used to connect a voltage. The voltage regulator circuit 104 connects the voltage regulator input terminal 102 and the low-resistance circuit 106. The low-resistance circuit 106 is connected to the voltage regulator output terminal 108 and is used to reduce the output resistance of the linear voltage regulator.

[0033] Specifically, the linear regulator is connected to the regulated circuit. The current and voltage in the regulated circuit enter the linear regulator through the regulator input terminal 102. In the linear regulator, the voltage is regulated by the regulator circuit 104 to ensure that the voltage output to the low-resistance circuit 106 matches the voltage in the regulated circuit. The low-resistance circuit 106 reduces the output resistance of the linear regulator, thereby reducing the output voltage ripple of the linear regulator.

[0034] Ripple is a phenomenon caused by voltage fluctuations in a DC power supply. The AC component is mixed into the DC current, and this AC component superimposed on the DC current is called ripple.

[0035] In this embodiment, the linear regulator stabilizes the output voltage by setting up a voltage regulation circuit 104 and reduces the output resistance by setting up a low-resistance circuit 106, thereby reducing the voltage ripple of the regulated circuit and solving the problem of insufficient circuit stability of existing linear regulators.

[0036] In one embodiment, such as Figure 2 As shown, the voltage regulator circuit 104 includes a reference voltage amplifier circuit 202 and a subsequent stage circuit 204. The reference voltage amplifier circuit 202 is connected to the voltage regulator input terminal 102 and the subsequent stage circuit 204. The subsequent stage circuit 204 is connected to the voltage regulator input terminal 102 and the low-impedance circuit 106.

[0037] Specifically, the voltage regulator input terminal 102 is connected to the regulated circuit. The reference voltage amplifier circuit 202 compares the input voltage signal with the reference voltage and outputs an amplified reference voltage signal. The amplified reference voltage signal is then output to the subsequent circuit 204. The subsequent circuit 204 receives the voltage signal input from the voltage regulator input terminal 102 and the amplified reference voltage signal transmitted by the reference voltage amplifier circuit 202. After processing by the subsequent circuit, it outputs the regulated voltage signal to the low-impedance circuit 106.

[0038] Furthermore, the voltage signal regulated by the voltage regulator circuit 104 can be transmitted to the low-impedance circuit 106. After the low-impedance circuit 106 reduces the output resistance of the linear regulator, it is then output to the regulator output terminal 108. Alternatively, the voltage regulator circuit 104 can directly output the regulated voltage signal to the regulator output terminal 108.

[0039] In this embodiment, the voltage signal in the regulated circuit is regulated by the reference voltage amplifier circuit 202 and the subsequent circuit 204, which can achieve the basic voltage regulation function of a linear regulator and make the output voltage signal match the reference voltage.

[0040] In one embodiment, such as Figure 3 As shown, the subsequent circuit 204 includes an error amplifier A2 and a feedback circuit 302. The positive input terminal of the error amplifier A2 is connected to the reference voltage amplifier circuit 202, and the inverting input terminal and output terminal of the error amplifier A2 are both connected to the feedback circuit 302. The feedback circuit 302 is connected to the voltage regulator input terminal 102 and the low-impedance circuit 106.

[0041] Specifically, the positive input terminal of error amplifier A2 receives the voltage signal output from reference voltage amplifier circuit 202, and the inverting input terminal of error amplifier A2 receives the voltage signal input to regulator input terminal 102 and adjusted by feedback circuit. Then, the voltage signal amplified by error amplifier A2 is output to feedback circuit, achieving closed-loop self-regulating voltage regulation control. Furthermore, the voltage signal regulated by error amplifier A2 and feedback circuit 302 can be transmitted to low-impedance circuit 106, which reduces the output resistance of the linear regulator before outputting it to regulator output terminal 108. Alternatively, feedback circuit 302 can directly output the regulated voltage signal to regulator output terminal 108.

[0042] In this embodiment, by constructing a closed-loop circuit between the error amplifier A2 and the feedback circuit 302 for voltage regulation, adaptive adjustment and regulation of the regulated circuit can be achieved.

[0043] In one embodiment, such as Figure 4 As shown, the reference voltage amplifier circuit 202 includes a differential amplifier A1, a source follower 402, and a common source amplifier 404. The positive input terminal of the differential amplifier A1 is connected to the reference voltage input terminal 400. The inverting input terminal and the output terminal of the differential amplifier A1 are both connected to the source follower 402. The source follower 402 is connected to the voltage regulator input terminal 102. The common source amplifier 404 is connected to the source follower 402 and the positive input terminal of the error amplifier A2.

[0044] Specifically, the positive input of differential amplifier A1 is connected to the reference voltage input 400 to obtain the reference voltage signal. The inverting input of differential amplifier A1 obtains the voltage signal of the regulated circuit processed by the source follower 402. The output result obtained after processing the reference voltage signal and the voltage signal of the regulated circuit processed by the source follower 402 is output to the source follower 402. Differential amplifier A1 and source follower 402 constitute a two-stage differential amplifier. The output voltage of the two-stage differential amplifier is connected to the inverting input of differential amplifier A1 in the form of unity negative feedback, making the voltage at the two input terminals of differential amplifier A1 virtually short. The common source amplifier 404 and the feedback circuit 302 cooperate with each other, and the components are matched to ensure that the output regulated voltage has a small deviation from the reference voltage.

[0045] Virtual short refers to the situation where, under ideal conditions, the potentials at the two input terminals of an amplifier are equal, as if the two input terminals were shorted together, but in reality, they are not shorted.

[0046] Furthermore, the reference voltage input terminal 400 can be connected to a circuit with the same voltage as the regulated circuit, or it can be directly connected to the regulated circuit.

[0047] In one embodiment, such as Figure 5 As shown, the source follower 402 includes a current source I0 and a first switching transistor M0. The current source I0 is connected to the input terminal of the voltage regulator 102, the inverting input terminal of the differential amplifier A1, and the input terminal of the first switching transistor M0. The control terminal of the first switching transistor M0 is connected to the output terminal of the differential amplifier A1 and the common-source amplifier 404. The output terminal of the first switching transistor M0 is grounded. The first switching transistor M0 can be a transistor or a MOSFET. In this embodiment, the first switching transistor M0 is a PMOS transistor, with the gate as the control terminal, the source as the input terminal, and the drain as the output terminal.

[0048] Specifically, let Va be the voltage output to the inverting input of differential amplifier A1 after passing through current source I0, Vref be the reference voltage input, and Vbias be the voltage output from the output of differential amplifier A1. Since the voltages at the two inputs of differential amplifier A1 are virtually shorted, Va = Vref.

[0049] In one embodiment, such as Figure 5 As shown, the common-source amplifier 404 includes a second switch M1 and a third resistor R3. The input terminal of the second switch M1 is connected to the common terminal of the current source I0 and the first switch M0. The control terminal of the second switch M1 is connected to the output terminal of the differential amplifier A1. The output terminal of the second switch M1 is connected to the positive input terminal of the error amplifier A2 and is grounded through the third resistor R3. The second switch M1 can also be a transistor or a MOSFET. In this embodiment, the second switch M1 is a PMOS transistor, with the gate as the control terminal, the source as the input terminal, and the drain as the output terminal.

[0050] Specifically, let the voltage at the output terminal of the second switch M1 be Vb, and the calculation formula is:

[0051] Vb = I M1 *R3

[0052] In the formula, I M1 R1 is the drain current of the second switching transistor M1, and R3 is the resistance value of the third resistor R3.

[0053] I M1 The calculation formula is:

[0054]

[0055] In the formula, μ is the mobility of n-type carriers, and C ox The capacitance per unit area of ​​the oxide layer is given, W1 / L1 is the width-to-length ratio of the second switching transistor M1, and V is given. th1 This is the threshold voltage of the second switch M1.

[0056] In one embodiment, such as Figure 5 As shown, the feedback circuit 302 includes a fifth switch M4, a sixth switch M5, and a fifth resistor R5. The input terminal of the fifth switch M4 is connected to the input terminal 102 of the voltage regulator. The control terminal of the fifth switch M4 is connected to the output terminal of the error amplifier A2. The output terminal of the fifth switch M4 is connected to the input terminal of the sixth switch M5 and the low-impedance circuit 106. The control terminal of the sixth switch M5 is connected to the output terminal of the differential amplifier A1. The output terminal of the sixth switch M5 is connected to the inverting input terminal of the error amplifier A2 and grounded through the fifth resistor R5.

[0057] Specifically, the two input terminals of error amplifier A2 have a virtual short voltage. Let Vfb be the feedback voltage from the output of the sixth switch M5 to the inverting input of error amplifier A2, then Vfb = Vb. Let Vd be the output voltage of error amplifier A2. Error amplifier A2 compares the voltage Vb and the feedback voltage Vfb to obtain the difference ΔV, and amplifies this difference ΔV to change the input voltage Vd of the fifth switch M4. Vd drives the gate of the fifth switch M4, thereby changing the voltage passing through the fifth switch M4. The fifth switch M4 can be a transistor or a MOSFET. In this embodiment, the fifth switch M4 is a power NMOS transistor, with the gate as the control terminal, the drain as the input terminal, and the source as the output terminal. The sixth switch M5 can also be a transistor or a MOSFET. In this embodiment, the sixth switch M5 is a PMOS transistor, with the gate as the control terminal, the source as the input terminal, and the drain as the output terminal.

[0058] Furthermore, the formula for calculating the feedback voltage Vfb is:

[0059] Vfb = I M5 *R5

[0060] In the formula, I M5 R5 is the drain current of the sixth switching transistor M5, and R5 is the resistance value of the fifth resistor.

[0061] I M5 The calculation formula is:

[0062]

[0063] In the formula, W5 / L5 is the width-to-length ratio of the sixth switching transistor M5, Vout is the output voltage from the output terminal of the fifth switching transistor M4 to the output terminal of the regulator 108, Vbias is the output voltage of the differential amplifier A1, and V th5 This is the threshold voltage of the sixth switch.

[0064] In one embodiment, the ratio of the width-to-length ratio of the second switch M1 to the width-to-length ratio of the sixth switch M5 is equal to the resistance ratio of the fifth resistor R5 to the third resistor R3.

[0065] Specifically, if the feedback voltage Vfb is kept approximately equal to the voltage Vb, the output voltage Vout to the low-impedance circuit 106 will tend to be constant. Therefore:

[0066] I M1 *R3=I M5 *R5

[0067] Right now:

[0068]

[0069] In the formula, Vref is the voltage value at the reference voltage input terminal 400.

[0070] The above calculation yields:

[0071]

[0072] From the above formula, we can see that as long as we adjust the width-to-length ratio of the second switch M1 and the sixth switch M5, as well as the resistance values ​​of the third resistor R3 and the fifth resistor R5, so that their relationship satisfies:

[0073]

[0074] This allows us to obtain Vout = Vref, making the output voltage equal to the reference voltage, thus achieving voltage regulation of the regulated circuit.

[0075] In one embodiment, such as Figure 6 As shown, the low-impedance circuit 106 includes a seventh switch M6 and a second capacitor C2. The input terminal of the seventh switch M6 is connected to the output terminal of the fifth switch M4 and the output terminal of the voltage regulator 108. The control terminal of the seventh switch M6 is connected to the output terminal of the differential amplifier A1 and grounded through the second capacitor C2. The output terminal of the seventh switch M6 is grounded.

[0076] Specifically, assuming the output resistance of the linear regulator is Rout, then the output resistance Rout corresponding to the output voltage Vout of the low-impedance circuit 106 is:

[0077]

[0078]

[0079] In the formula, g m4 For the transconductance of the fifth switching transistor M4, g m5 For the transconductance of the sixth switching transistor M5, g m6 The transconductance of the seventh switch M6; g ds4 For the conductance of the fifth switching transistor M4, g ds5 For the conductance of the sixth switching transistor M5, g ds6 The conductance of the seventh switch M6 is given by the value of M6. The conductance of each switch is the reciprocal of its output resistance.

[0080] In this embodiment, a low-resistance circuit 106 is formed by the seventh switch M6 and the second capacitor C2. It works in conjunction with the voltage regulator circuit 104 to reduce the output resistance Rout of the linear regulator as a whole. This results in low cost, good voltage regulation effect, and improved circuit stability.

[0081] In one embodiment, the sixth and seventh switches are low-voltage MOSFETs. Specifically, due to semiconductor process characteristics, low-voltage MOSFETs have smaller gate lengths than power MOSFETs, and under the same voltage conditions, the transconductance of low-voltage MOSFETs is much larger than that of power MOSFETs. By using low-voltage MOSFETs, the sixth switch M5 and the seventh switch M6 require only a smaller current than power MOSFETs to achieve a larger transconductance, thereby reducing the output resistance Rout.

[0082] like Figure 7 As shown in the figure, C Load The load capacitance represents the load of the regulated circuit. In this embodiment, the linear regulator of this application is used. When the load frequency changes and the transconductance of the fifth switch M4 decreases, the output resistance Rout depends on the low-resistance circuit 106 and still has a small output resistance. It can maintain a small output resistance Rout even when the load current varies over a wide range.

[0083] In one embodiment, the circuit diagram for implementing error amplifier A2 is as follows: Figure 8 As shown. Error amplifier A2 includes a third current source I3, a fifth resistor R5, a sixth resistor R6, an eleventh switch M10, a twelfth switch M11, a thirteenth switch M12, a fourteenth switch M13, a first current source I1, a fourth switch M3, a fourth resistor R4, a first capacitor C1, a third switch M2, and a second current source I2.

[0084] The input terminals of the first current source I1 and the third current source I3 are connected to the power input interface of the error amplifier A2 and connected to the regulated circuit. The output terminal of the first current source I1 is connected to the common terminal of the fifth resistor R5 and the sixth resistor R6. The input terminal of the eleventh switch M10 is connected to the fifth resistor R5. The control terminal of the eleventh switch M10 is connected to the positive input terminal of the error amplifier A2. The output terminal of the eleventh switch M10 is connected to the input terminal of the fourteenth switch M13, the control terminal of the fourteenth switch M13, and the control terminal of the thirteenth switch M12. The output terminal of the fourteenth switch M13 is grounded. The input terminal of the twelfth switch M11 is connected to the sixth resistor R6. The control terminal of the second switch M11 is connected to the inverting input terminal of the error amplifier A2. The output terminal of the twelfth switch M11 is connected to the input terminal of the thirteenth switch M12, the first capacitor C1, and the control terminal of the third switch M2. The output terminal of the thirteenth switch M12 is grounded. The output terminal of the first current source I1 is connected to the control terminal of the fourth switch M3 and the input terminal of the third switch M2, and is connected to the first capacitor C1 through the fourth resistor R4. The output terminal of the third switch M2 is grounded. The input terminal of the fourth switch M3 is connected to the power input interface of the error amplifier A2. The output terminal of the fourth switch M3 is connected to the output terminal of the error amplifier A2, and is grounded through the second current source I2.

[0085] Specifically, the eleventh switch M10 and the twelfth switch M11 can be transistors or MOSFETs. In this embodiment, the eleventh switch M10 and the twelfth switch M11 are PMOS amplifier transistors, with the gate as the control terminal, the source as the input terminal, and the drain as the output terminal. The third switch M2, the fourth switch M3, the thirteenth switch M12, and the fourteenth switch M13 can be transistors or MOSFETs. In this embodiment, the third switch M2, the fourth switch M3, the thirteenth switch M12, and the fourteenth switch M13 are NMOS transistors, with the gate as the control terminal, the drain as the input terminal, and the source as the output terminal. The first capacitor C1 is a Miller capacitor.

[0086] In one embodiment, the circuit diagram for implementing the linear regulator is as follows: Figure 9 As shown. Let the voltage output of the twelfth switch M11 be Ve, the voltage output of the first current source I1 be Vf, the voltage output of the eleventh switch be Vg, and the DC gain of the error amplifier A2 be A. V2 The DC gain from Vd to Vfb is A. V3 It can be calculated that:

[0087] The equivalent resistance R at point Ve is approximately:

[0088] R = 1 / gds12

[0089] The equivalent capacitance at point Ve is approximately:

[0090]

[0091] The pole 1 at point Ve is approximately:

[0092]

[0093] In the above Ve-related formulas, gds12 is the output conductance of the thirteenth switch M12, Cg2 is the gate parasitic capacitance of the third switch M2, Cd11 is the drain parasitic capacitance of the twelfth switch M11, Cd12 is the drain parasitic capacitance of the thirteenth switch M12, gm2 is the transconductance of the third switch M2, gds2 is the output conductance of the third switch M2, C1 is the capacitance of the first capacitor C1, w1 is the frequency of the pole pole1 at Ve point, and RC is the time constant.

[0094] The equivalent resistance R at point Vf is approximately:

[0095] R = 1 / gds²

[0096] The equivalent capacitance at point Vf is approximately:

[0097] C=Cg3+Cd2+C1≈Cg3+C1

[0098] The pole 2 at point Vf is approximately:

[0099]

[0100] In the above Vf-related formula, Cg3 is the gate parasitic capacitance of the fourth switch M3, Cd2 is the drain parasitic capacitance of the third switch M2, and w2 is the frequency of the pole 2 at Vf.

[0101] The equivalent resistance R at point Vd is approximately:

[0102] R = 1 / gm3

[0103] The equivalent capacitance at point Vd is approximately:

[0104] C = Cg4 + Cs3 ≈ Cg4

[0105] The pole 3 at point Vd is approximately:

[0106]

[0107] In the above Vd-related formula, gm3 is the transconductance of the fourth switch M3, Cg4 is the gate parasitic capacitance of the fifth switch M4, Cs3 is the source parasitic capacitance of the fourth switch, and w3 is the frequency of pole3 at point Vd.

[0108] The equivalent resistance R at point Vg is approximately:

[0109] R≈1 / gm13

[0110] The equivalent capacitance at point Vg is approximately:

[0111] C=Cg13+Cg12+Cd13+Cd10≈Cg13+Cg12

[0112] The pole 4 at point Vg is approximately:

[0113]

[0114] In the above Vg-related formula, gm13 is the transconductance of the fourteenth switch M13, Cg13 is the gate parasitic capacitance of the fourteenth switch M13, Cg12 is the gate parasitic capacitance of the thirteenth switch M12, Cd13 is the drain parasitic capacitance of the fourteenth switch M13, Cd10 is the drain parasitic capacitance of the eleventh switch M10, and w4 is the frequency of pole 4 at point Vg.

[0115] The equivalent resistance at point Vout is: Rout

[0116] The equivalent capacitance at Vout point is approximately: Cload

[0117] The pole value of Vout is approximately:

[0118]

[0119] In the formula, w5 is the frequency of pole5 at point Vout.

[0120] In the above formulas for each point, Cg is the gate parasitic capacitance of the switching transistor, Cd is the drain parasitic capacitance of the switching transistor, Cs is the source parasitic capacitance of the switching transistor, gm is the transconductance of the switching transistor, and gds is the output conductance of the switching transistor. Since the source-drain parasitic capacitances of the switching transistor are very small, they can be ignored.

[0121] Observing the above formula, in this embodiment, the dominant pole is pole1. By adjusting the transconductance gm2 of the first capacitor C1 and the output conductance gds2 of the third switch M2, the pole pole1 at Ve can be set to several hundred hertz, thus separating the dominant and secondary poles and improving the stability of the loop. Due to the large load capacitance Cload, the secondary pole is pole5 at Vout. The greater the distance between the dominant and secondary poles, the stronger the stability; the larger the secondary pole Pole5, the more stable the loop. This circuit significantly reduces the output resistance Rout at Vout and significantly increases pole5, thus improving loop stability. The gate capacitance of the fifth switch M4 is large, and the drain junction resistance 1 / gds2 of the third switch M2 is also large. The fourth switch M3 in the source follower 402 is used to isolate the gate of the fifth switch M4 and the drain of the third switch M2, reducing the time constant RC value at Vd and increasing the frequency of this pole, thereby enhancing the stability of the circuit.

[0122] The loop gain in the transfer function of the subsequent circuit 204 and the low-impedance circuit 106 is approximately:

[0123]

[0124] In the formula, A V2 Let A be the DC gain of the error amplifier A2. V3 Let be the DC gain from Vd to Vfb, and s be the symbolic algebra of the Laplace transform in the transfer function.

[0125] The output impedance Z(s) of this circuit is:

[0126]

[0127] When the load has a transient current ΔI, the overshoot voltage ΔV at the output terminal is:

[0128]

[0129] For this circuit structure, the load capacitance is typically in the 100pF range. At an intermediate frequency (IF) of around tens of megahertz, the loop gain drops to approximately 0dB, and the output resistance is primarily determined by the Rout. The overshoot voltage ΔV at this point is:

[0130] ΔV≈Rout*ΔI

[0131] In this embodiment, the circuit has a small output resistance Rout, which reduces the overshoot voltage during output. Therefore, the voltage ripple is smaller during output, especially during intermediate frequency output.

[0132] In this embodiment, the current source in the circuit samples a cascode current source, whose bias voltage can quickly follow voltage changes, thus its output current is less affected by voltage variations. The fifth switch M4 is a power NMOS transistor, and the fourth switch M3 in the error amplifier A2 also uses an NMOS transistor. Compared to PMOS transistors, the output of an NMOS transistor is suppressed by its own gain when affected by power supply changes, thus the circuit in this embodiment also has a good power supply rejection ratio.

[0133] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0134] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A linear voltage regulator, characterized in that, The linear regulator includes a regulator input terminal, a regulator output terminal, a regulator circuit, and a low-resistance circuit. The regulator input terminal is used to connect a voltage. The regulator circuit connects the regulator input terminal and the low-resistance circuit. The low-resistance circuit connects the regulator output terminal and is used to reduce the output resistance of the linear regulator. The voltage regulator circuit includes a reference voltage amplifier circuit and a subsequent stage circuit. The reference voltage amplifier circuit is connected to the input terminal of the voltage regulator and the subsequent stage circuit. The subsequent stage circuit is connected to the input terminal of the voltage regulator and the low-impedance circuit. The subsequent circuit includes an error amplifier and a feedback circuit. The positive input terminal of the error amplifier is connected to the reference voltage amplifier circuit, and both the inverting input terminal and the output terminal of the error amplifier are connected to the feedback circuit. The feedback circuit is connected to the input terminal of the voltage regulator and the low-impedance circuit. The reference voltage amplifier circuit includes a differential amplifier, a source follower, and a common-source amplifier. The positive input terminal of the differential amplifier is connected to the reference voltage input terminal. The inverting input terminal and the output terminal of the differential amplifier are both connected to the source follower. The source follower is connected to the input terminal of the voltage regulator. The common-source amplifier is connected to the source follower and the positive input terminal of the error amplifier. The feedback circuit includes a fifth switch, a sixth switch, and a fifth resistor. The input terminal of the fifth switch is connected to the input terminal of the voltage regulator, the control terminal of the fifth switch is connected to the output terminal of the error amplifier, the output terminal of the fifth switch is connected to the input terminal of the sixth switch and the low-impedance circuit, the control terminal of the sixth switch is connected to the output terminal of the differential amplifier, the output terminal of the sixth switch is connected to the inverting input terminal of the error amplifier, and is grounded through the fifth resistor.

2. The linear voltage regulator according to claim 1, characterized in that, The source follower includes a current source and a first switching transistor. The current source is connected to the input terminal of the voltage regulator, the inverting input terminal of the differential amplifier, and the input terminal of the first switching transistor. The control terminal of the first switching transistor is connected to the output terminal of the differential amplifier and the common source amplifier. The output terminal of the first switching transistor is grounded.

3. The linear voltage regulator according to claim 2, characterized in that, The common-source amplifier includes a second switch and a third resistor. The input terminal of the second switch is connected to the common terminal of the current source and the first switch. The control terminal of the second switch is connected to the output terminal of the differential amplifier. The output terminal of the second switch is connected to the positive input terminal of the error amplifier and grounded through the third resistor.

4. The linear voltage regulator according to claim 3, characterized in that, The ratio of the width-to-length ratio of the second switching transistor to the width-to-length ratio of the sixth switching transistor is equal to the resistance ratio of the fifth resistor to the third resistor.

5. The linear voltage regulator according to claim 4, characterized in that, The low-impedance circuit includes a seventh switch and a second capacitor. The input terminal of the seventh switch is connected to the output terminal of the fifth switch and the output terminal of the voltage regulator. The control terminal of the seventh switch is connected to the output terminal of the differential amplifier and grounded through the second capacitor. The output terminal of the seventh switch is grounded.

6. The linear voltage regulator according to claim 5, characterized in that, The sixth and seventh switching transistors are low-voltage MOSFETs.

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