Flexible circuit board, COF module and electronic device comprising COF module

Abstract

A COF module according to an embodiment includes: a substrate including a chip mounting area; a circuit pattern disposed on the substrate; and a chip disposed on the chip mounting area and connected to the circuit patterns, where the circuit patterns include a first circuit pattern, a second circuit pattern, and a third circuit pattern, where the third circuit pattern is disposed inside the chip mounting area, a first terminal portion of the chip is connected to the third circuit pattern, and a second terminal portion of the chip is connected to the second circuit pattern. An end portion of the first terminal portion and an end portion of the third circuit pattern are spaced apart from each other.

Description

Technical Field

[0001] The embodiments relate to a flexible circuit board, a COF module and an electronic device including the COF module. Specifically, the flexible circuit board may be a flexible circuit board for COF. Background Art

[0002] Recently, various electronic products have become thinner, smaller, and lighter. Therefore, various studies are being conducted to mount semiconductor chips at high density into narrow areas of electronic products.

[0003] COF (Chip on Film) uses a flexible substrate. Therefore, COF is applied to flexible displays. That is, the COF method is applied to various wearable electronic devices. In addition, COF can achieve fine pitch. Therefore, COF can be applied to high-resolution displays.

[0004] The COF is formed by mounting a semiconductor chip on a flexible circuit board in the form of a thin film. For example, the semiconductor chip may include an integrated circuit (IC) chip or a large-scale integrated circuit (LSI) chip.

[0005] On the other hand, the chip is connected to an external printed circuit board and a display panel through a circuit pattern. For example, the pad portions are respectively arranged at one end and the other end of the circuit pattern. In addition, one pad portion is electrically connected to a terminal of the chip. In addition, another pad portion is connected to a terminal of the printed circuit board and a terminal of the display panel. Therefore, the chip, the printed circuit board, and the display panel are electrically connected through the COF. In addition, the signal is transmitted to the display panel through the circuit pattern.

[0006] As described above, a COF can be formed by mounting a semiconductor chip on a flexible circuit board. The process of mounting the chip is performed within a set temperature range. Therefore, when connecting the pad portion of the chip to the circuit pattern, the substrate may shrink.

[0007] Therefore, the alignment of the chip and the circuit pattern may be misaligned. In addition, the electrical characteristics of the COF module may be degraded.

[0008] In order to solve the above problem, the solder can be placed at a position taking into account the shrinkage of the substrate before the chip is bonded to the circuit pattern. Subsequently, the chip can be bonded to the circuit pattern. However, due to the correction, the position of the connection area between the chip and the circuit pattern may change. Therefore, the length of the pad portion may be unnecessarily increased. In addition, the distance between adjacent patterns may be reduced. Summary of the invention

[0009] Technical issues

[0010] The embodiment provides a COF module having improved electrical characteristics while satisfying the alignment of a chip and a circuit pattern.

[0011] Technical Solution

[0012] According to an embodiment, a COF module includes: a substrate including a chip mounting area; a circuit pattern, which is arranged on the substrate; and a chip, which is arranged on the chip mounting area and connected to the circuit pattern, wherein the circuit pattern includes a first circuit pattern, a second circuit pattern and a third circuit pattern, wherein the third circuit pattern is arranged inside the chip mounting area, wherein a first terminal portion of the chip is connected to the third circuit pattern, and wherein an end portion of the first terminal portion and an end portion of the third circuit pattern are spaced apart from each other.

[0013] Beneficial Effects

[0014] The COF module according to the embodiment has improved connection characteristics. Specifically, when connecting the pad portion of the chip and the circuit pattern, the COF module has improved connection characteristics while maintaining alignment.

[0015] That is, the terminal portion of the chip is separated from the end of the pad portion of the circuit pattern. Therefore, all the terminal portions of the chip are connected to the pad portion.

[0016] In addition, the separation distance between the end of the terminal portion of the chip and the end of the pad portion of the circuit pattern satisfies the set range. Therefore, the length of the pad portion can be prevented from increasing. Therefore, the size of the chip mounting area can be reduced. In addition, it can be ensured that the spacing between adjacent circuit patterns has a sufficient distance.

[0017] In addition, the terminal portion of the chip includes an overlapping area and a non-overlapping area. The overlapping area overlaps with the circuit pattern in the width direction of the circuit pattern. In addition, the non-overlapping area does not overlap with the circuit pattern in the width direction of the circuit pattern.

[0018] The width of the non-overlapping area satisfies the set range. That is, the width of the non-overlapping area has a range set relative to the width of the pad portion. In addition, the width of the non-overlapping area has a range set relative to the width of the overlapping area. Therefore, the connection characteristics between the terminal portion and the pad portion of the chip can be improved.

[0019] In addition, the width of the non-overlapping area is smaller than the spacing of the pad portion or the spacing of the terminal portion. Therefore, the spacing of the pad portion or the spacing of the terminal portion can be prevented from being reduced due to the non-overlapping area. Therefore, a short circuit between adjacent pad portions can be prevented. Alternatively, a short circuit between adjacent terminal portions can be prevented. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a top view of a COF module including a flexible printed circuit board according to an embodiment.

[0021] Figure 2and Figure 3 It is along Figure 1 A cross-sectional view taken along the A-A' region.

[0022] Figure 4 It is along Figure 1 A cross-sectional view taken at the BB' region.

[0023] Figure 5 It is used to illustrate Figure 1 Figure 1 shows the A region of the graph.

[0024] Figure 6 and Figure 7 It is used to illustrate Figure 5 Figure 3 shows the B and C regions of the .

[0025] Figure 8 It is used to illustrate Figure 5 Figure 4 shows the D region of the graph.

[0026] Fig. 9 is a cross-sectional view illustrating a connection relationship of a COF module including a flexible printed circuit board according to an embodiment.

[0027] Figures 10 to 12 is a diagram of an electronic device including a flexible printed circuit board according to an embodiment. DETAILED DESCRIPTION

[0028] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. However, the spirit and scope of the present disclosure are not limited to a part of the described embodiments, and may be implemented in various other forms, and one or more of the elements of the embodiments may be selectively combined and rearranged within the spirit and scope of the present disclosure.

[0029] In addition, unless otherwise clearly defined and described, the terms (including technical terms and scientific terms) used in the embodiments of the present disclosure may be interpreted as having the same meaning as that commonly understood by ordinary technicians in the field to which the present disclosure belongs, and, for example, terms defined in commonly used dictionaries may be interpreted as having a meaning consistent with their meaning in the context of the relevant field.

[0030] In addition, the terms used in the embodiments of the present disclosure are used to describe the embodiments and are not intended to limit the present disclosure. In this specification, unless otherwise specifically stated in a phrase, a singular form may also include a plural form, and when described as "at least one (or more) of A (and), B and C", at least one of all combinations that can be combined with A, B and C may be included.

[0031] In addition, when describing the elements of the embodiments of the present disclosure, terms such as first, second, A, B, (a), and (b) may be used. These terms are only used to distinguish these elements from other elements, and these terms are not limited to the nature, order, or sequence of the elements.

[0032] In addition, when an element is described as being “connected,” “combined” or “in contact with” another element, it may include not only the case where the element is directly “connected,” “combined” or “in contact with” the other element, but also the case where the element is “connected,” “combined” or “in contact with” the other element through another element between the element and the other element.

[0033] In addition, when described as being formed or arranged "on (above)" or "under (below)" each element, "on (above)" or "under (below)" may include not only the case where two elements are directly connected to each other, but also the case where one or more other elements are formed or arranged between the two elements.

[0034] In addition, when expressed as “upper” or “lower”, it may include not only an upper direction based on one element but also a lower direction based on one element.

[0035] Hereinafter, a flexible circuit board, a COF module, and an electronic device including the same according to embodiments will be described with reference to the accompanying drawings.

[0036] Figure 1 is a top view of a COF module including a flexible circuit board according to an embodiment.

[0037] Reference Figure 1 The COF module 2000 includes a flexible printed circuit board 1000 and a chip CH. Specifically, the flexible printed circuit board 1000 includes a chip mounting area CA. The chip CH is disposed on the chip mounting area CA.

[0038] The flexible printed circuit board 1000 includes a substrate 100 and a circuit pattern 200 disposed on the substrate 100 .

[0039] The substrate 100 may include a flexible substrate. For example, the substrate 100 may be a polyimide (PI) substrate. However, the embodiment is not limited thereto. The substrate 100 may include a polymer material such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN). Therefore, a flexible circuit board including the substrate 100 may be applied to various electronic devices including a curved display device. For example, the flexible circuit board has excellent flexibility. Therefore, the flexible circuit board may be applied to wearable electronic devices.

[0040] The thickness of the substrate 100 may be 20 μm to 100 μm. For example, the thickness of the substrate 100 may be 25 μm to 50 μm. For example, the thickness of the substrate 100 may be 30 μm to 40 μm. If the thickness of the substrate 100 exceeds 100 μm, the thickness of the flexible circuit board may increase. Therefore, the flexibility characteristics of the flexible circuit board are reduced. In addition, if the thickness of the substrate 100 is less than 20 μm, the rigidity of the substrate may be reduced. Therefore, when the chip is mounted on the substrate, the substrate 100 may be damaged due to heat and pressure.

[0041] The substrate 100 includes an active area UA and an unactive area UA. The active area AA may be a central area of ​​the substrate 100. The unactive area UA may be an edge area of ​​the substrate 100. The unactive area UA may surround the active area AA.

[0042] The active area AA includes a chip mounting area CA. Specifically, the chip mounting area CA is an area on which a chip CH connected to a circuit pattern is mounted.

[0043] In addition, the circuit patterns 210, 220 and 230 are disposed on the active area AA. Specifically, the circuit pattern includes a plurality of circuit patterns. The plurality of circuit patterns extend in a plurality of directions. In addition, the plurality of circuit patterns are spaced apart from each other.

[0044] The active area AA is an area actually used in the flexible circuit board 1000 .

[0045] The circuit pattern is not disposed on the unavailable area UA. That is, the available area AA and the unavailable area UA are distinguished by the arrangement of the circuit pattern.

[0046] The unavailable area UA includes a plurality of holes. Specifically, the unavailable area UA includes a plurality of sprocket holes H. The flexible circuit board is rolled up or unrolled through the sprocket holes H in a roll-to-roll manner.

[0047] The unused area UA is an area not actually used in the flexible circuit board 1000. Specifically, the unused area UA is an area removed after manufacturing the COF module.

[0048] Specifically, the boundary between the active area AA and the unavailable area UA is defined by the cutting line CL. After the cutting line CL is cut, the flexible circuit board 1000 is processed into a COF module. Therefore, the flexible circuit board 1000 is applied to various electronic devices.

[0049] The circuit pattern includes a wiring portion and a pad portion. In addition, a plurality of circuit patterns are disposed on the active area AA. Specifically, a first circuit pattern 210, a second circuit pattern 220, and a third circuit pattern 230 are disposed on the active area AA.

[0050] The first circuit pattern 210 and the second circuit pattern 220 are disposed on the inner region of the chip mounting area CA and the outer region of the chip mounting area CA. The third circuit pattern 230 is disposed on the inner region of the chip mounting area CA.

[0051] Reference Figures 1 to 3 , the first circuit pattern 210 includes a first wiring portion 211, a first pad portion 212a and a second pad portion 212b. The first pad portion 212a is arranged inside the chip mounting area CA. The second pad portion 212b is arranged outside the chip mounting area CA. The first wiring portion 211 is arranged between the first pad portion 212a and the second pad portion 212b. The first wiring portion 211 is connected to the first pad portion 212a and the second pad portion 212b.

[0052] The first wiring portion 211 , the first pad portion 212 a , and the second pad portion 212 b are integrally formed.

[0053] In addition, the first wiring portion 211 extends in the first direction 1D based on the chip mounting area CA.

[0054] The first pad portion 212a is electrically connected to a chip disposed in a chip mounting region. In addition, the second pad portion 212b is electrically connected to a printed circuit board. In addition, the first wiring portion 211 transmits a signal between the chip and the printed circuit board.

[0055] A protective layer 300 is disposed on the first circuit pattern 210. Specifically, the protective layer 300 is disposed on the first wiring portion 211. The protective layer 300 is disposed to surround the first wiring portion 211. In addition, the protective layer 300 is not disposed on the first pad portion 212a and the second pad portion 212b. Therefore, the first pad portion 212a and the second pad portion 212b are exposed to the outside.

[0056] Reference Figure 1 and Figure 4 , the second circuit pattern 220 includes a second wiring portion 221, a third pad portion 222a and a fourth pad portion 222b. The third pad portion 222a is arranged inside the chip mounting area CA. The fourth pad portion 222b is arranged outside the chip mounting area CA. The second wiring portion 221 is arranged between the third pad portion 222a and the fourth pad portion 222b. In addition, the second wiring portion 221 is connected to the third pad portion 222a and the fourth pad portion 222b.

[0057] The second wiring portion 221 , the third pad portion 222 a , and the fourth pad portion 222 b are integrally formed.

[0058] In addition, the second wiring portion 221 extends in a second direction D2 based on the chip mounting area CA. Specifically, the second direction D2 is a direction opposite to the first direction D1.

[0059] The third pad portion 222a is electrically connected to a chip disposed in a chip mounting region. In addition, the fourth pad portion 222b is electrically connected to a display panel. In addition, the second wiring portion 221 transmits a signal between the chip and the display panel.

[0060] A protective layer 300 is disposed on the second circuit pattern 220. Specifically, the protective layer 300 is disposed on the second wiring portion 221. The protective layer 300 is disposed to surround the second wiring portion 221. In addition, the protective layer 300 is not disposed on the third pad portion 222a and the fourth pad portion 222b. Therefore, the third pad portion 222a and the fourth pad portion 222b are exposed to the outside.

[0061] The third circuit pattern 230 may include a third wiring portion and a plurality of pad portions. Specifically, the third wiring portion and the plurality of pad portions are disposed inside the chip mounting area CA.

[0062] The third circuit pattern 230 is connected to the chip CH disposed in the chip mounting area CA. Specifically, a plurality of pad portions of the third circuit pattern 230 are electrically connected to the chip CH. Specifically, the third circuit pattern 230 includes a plurality of circuit patterns. Each third circuit pattern 230 includes a plurality of pad portions. The pad portion of each third circuit pattern is electrically connected to the chip CH.

[0063] The third circuit pattern 230 may be a routing pattern. That is, the third circuit pattern 230 may function as a layer in a chip.

[0064] The third circuit pattern 230 is connected to the chip CA through a plurality of pad portions. Therefore, the third circuit pattern 230 can receive and process a signal transmitted from the first circuit pattern 210. The signal transmitted from the third circuit pattern 230 through the chip CH and the second circuit pattern 220 is transmitted to the display panel.

[0065] The first circuit pattern 210 and the second circuit pattern 220 may include a metal material having excellent electrical conductivity. Specifically, the first circuit pattern 210 and the second circuit pattern 220 may include copper (Cu). However, the embodiment is not limited thereto. The first circuit pattern 210 and the second circuit pattern 220 may include at least one metal of copper (Cu), aluminum (Al), chromium (Cr), nickel (Ni), silver (Ag), molybdenum (Mo), gold (Au), titanium (Ti) and alloys thereof.

[0066] In the following, reference is made to Figure 2 and Figure 3, the layer structure of the circuit pattern of the flexible circuit board according to the embodiment will be described. Figure 2 and Figure 3 1 and 2. In the embodiment of the present invention, the first circuit pattern 210 will be described. However, the embodiment is not limited thereto. The following description of the layer structure also applies to the second circuit pattern 220.

[0067] Reference Figure 2 The first circuit pattern 210 is formed in multiple layers. Specifically, the first wiring portion 211 and the first pad portion 212a include the first metal layer 201 and the second metal layer 202. In addition, although not shown in the figure, the second pad portion 212b also includes the first metal layer 201 and the second metal layer 202.

[0068] The first metal layer 201 is a seed layer of the first circuit pattern 210. Specifically, the first metal layer 201 is a seed layer formed by chemical plating. The seed layer includes a metal material. For example, the seed layer may include copper.

[0069] In addition, the second metal layer 202 is a plated layer. Specifically, the second metal layer 202 is a plated layer formed by electrolytic plating using the first metal layer 201 as a seed layer.

[0070] The thickness of the first metal layer 201 is smaller than the thickness of the second metal layer 202 .

[0071] For example, the thickness of the first metal layer 201 may be 0.7 μm to 2 μm. In addition, the thickness of the second metal layer 202 may be 10 μm to 25 μm.

[0072] The first metal layer 201 and the second metal layer 202 may include the same metal material. For example, the first metal layer 201 and the second metal layer 202 may include copper (Cu).

[0073] The bonding layer 203 may be disposed on the second metal layer 201. Specifically, the bonding layer 203 is disposed on the side of the first metal layer 201, the side of the second metal layer 202, and the upper surface of the second metal layer 202. That is, the bonding layer 203 is disposed to surround the first metal layer 201 and the second metal layer 202.

[0074] The bonding layer 203 includes a metal. For example, the bonding layer 203 may include tin (Sn).

[0075] The thickness of the bonding layer 203 may be 0.3 μm to 0.7 μm. The bonding layer 203 may increase the tin content while extending from the lower surface of the bonding layer 203 toward the upper surface of the bonding layer 203. The lower surface of the bonding layer 203 is the surface with which the second metal layer 202 contacts.

[0076] Since the bonding layer 203 is in contact with the second metal layer 202 , the bonding layer 203 can increase the tin content while extending from the lower surface of the bonding layer 203 toward the upper surface of the bonding layer 203 , and can reduce the copper content while extending from the lower surface of the bonding layer 203 toward the upper surface of the bonding layer 203 .

[0077] Therefore, the bonding layer 203 may have only pure tin remaining within a thickness range of 0.1 μm to 0.3 μm on the upper surface of the bonding layer 203 .

[0078] The terminals of the chip, the terminals of the printed circuit board, and the terminals of the display panel are easily bonded to the first pad portion and the second pad portion through the bonding layer 203. Specifically, the terminals and the pad portion are bonded by heat and pressure. That is, when heat and pressure are applied to the first pad portion and the second pad portion, the upper surface of the bonding layer where pure tin remains melts. As a result, the terminals and the pads are easily bonded.

[0079] Therefore, the bonding layer 203 is not separated from the first pad portion 212 a but becomes a part of the first pad portion 212 a .

[0080] The first circuit pattern 210 may have a thickness of 2 μm to 25 μm. For example, the first circuit pattern 210 may have a thickness of 5 μm to 20 μm. For example, the first circuit pattern 210 may have a thickness of 7 μm to 15 μm.

[0081] The thickness of the first circuit pattern 210 may be different from the sum of the thicknesses of the first metal layer 201, the second metal layer 202, and the bonding layer 203. Specifically, a flash etching process is performed in the manufacturing process to separate the circuit pattern. Therefore, the first metal layer 201 is etched. Therefore, the thickness of the first circuit pattern 210 finally manufactured is less than the sum of the thicknesses of the first metal layer 201, the second metal layer 202, and the bonding layer 203.

[0082] If the thickness of the first and second circuit patterns 210 and 220 is less than 2 μm, the resistance of the first and second circuit patterns 210 and 220 increases. If the thickness of the first and second circuit patterns 210 and 220 exceeds 25 μm, it is difficult to form a fine pattern.

[0083] On the other hand, a buffer layer 205 may be further provided between the substrate 100 and the first circuit pattern 210. The buffer layer 205 improves adhesion between the substrate 100 and the first circuit pattern 210, which are different materials.

[0084] The buffer layer 205 may be formed in multiple layers. Specifically, the buffer layer 205 includes a first buffer layer 205a and a second buffer layer 205b located on the first buffer layer 205a. Therefore, the first buffer layer 205a contacts the substrate 100. In addition, the second buffer layer 205b contacts the first circuit pattern 201.

[0085] The first buffer layer 205a may include a material having good adhesion to the substrate 100. For example, the first buffer layer 205a may include nickel (Ni). In addition, the second buffer layer 205b may include a material having good adhesion to the first circuit pattern 210. For example, the second buffer layer 205b may include chromium (Cr).

[0086] The buffer layer 205 may have a film thickness in nanometer units. For example, the thickness of the buffer layer 205 may be 20 nm or less.

[0087] The adhesive force between the substrate 100 and the first circuit pattern 210, which are different materials, is improved by the buffer layer 205. Therefore, the first circuit pattern 210 is prevented from being delaminated.

[0088] On the other hand, refer to Figure 3 , the bonding layer 203 may include a first bonding layer 203a and a second bonding layer 203b.

[0089] Specifically, the first bonding layer 203a may be disposed on the first wiring portion 211 and the first pad portion 212a. In addition, although not shown in the figure, the first bonding layer 203a may also be disposed on the second pad portion 212b. That is, the first bonding layer 203a may be disposed on the first circuit pattern 210.

[0090] In addition, the second bonding layer 203b may be provided only on the first pad portion 212a and the second pad portion 212b. That is, the layer structure of the first wiring portion 211 and the layer structure of the first pad portion 212a and the second pad portion 212b are changed by the second bonding layer 203b.

[0091] The first bonding layer 203a and the second bonding layer 203b may include a metal, and specifically, the first bonding layer 203a and the second bonding layer 203b may include tin (Sn).

[0092] The first bonding layer 203a and the second bonding layer 203b may have different thicknesses. Specifically, the thickness of the second bonding layer 203b may be greater than the thickness of the first bonding layer 203a.

[0093] For example, the first bonding layer 203a may have a film thickness of 0.02 μm to 0.06 μm. In addition, the second bonding layer 203b may have a thickness of 0.2 μm to 0.6 μm.

[0094] If the bonding layer is thickly provided between the protective layer 300 and the first wiring portion 211, cracks may be generated when the flexible circuit board is bent. Therefore, the first bonding layer 231 between the protective layer 300 and the first wiring portion 211 is formed to a thin film thickness. Therefore, cracks can be prevented from being generated when the flexible circuit board is bent.

[0095] In addition, the second bonding layer 203b may have a higher tin content as it extends from the lower surface to the upper surface. The lower surface of the second bonding layer 203b is the surface with which the first bonding layer 203a contacts.

[0096] The second bonding layer 203b may have a higher tin content and a lower copper content as it extends from the lower surface to the upper surface. Therefore, on the upper surface of the second bonding layer 203b, only pure tin remains in the second bonding layer 203b within a thickness range of 0.1 μm to 0.3 μm.

[0097] The terminals of the chip, the terminals of the printed circuit board, and the terminals of the display panel are easily bonded to the first pad portion and the second pad portion through the second bonding layer 203b. Specifically, the terminal and the pad portion are bonded by heat and pressure. That is, when heat and pressure are applied to the first pad portion and the second pad portion, the upper surface of the bonding layer where pure tin remains melts. As a result, the terminal and the pad portion are easily bonded.

[0098] Therefore, the first bonding layer 203 a and the second bonding layer 203 b are not separated from the first pad portion 212 a , but become a part of the first pad portion.

[0099] On the other hand, the protective layer 300 is disposed on the wiring portion of the first circuit pattern 210 and the wiring portion of the second circuit pattern 220. Specifically, the protective layer 300 is disposed to surround the first wiring portion 211 and the second wiring portion 221. That is, the protective layer 300 may be disposed on the first circuit pattern 210 and the second circuit pattern 220 except for the first pad portion, the second pad portion, the third pad portion, and the fourth pad portion.

[0100] The protective layer 300 may include solder paste. For example, the solder paste may include a thermosetting resin, a thermoplastic resin, a filler, a curing agent, or a curing accelerator.

[0101] On the other hand, in the above description, the first circuit pattern 210 and the second circuit pattern 220 are disposed on the same surface of the substrate 100 , but the embodiment is not limited thereto.

[0102] Specifically, the first circuit pattern 210 and the second circuit pattern 220 may be disposed on different surfaces of the substrate 100. For example, the first circuit pattern 210 may be disposed on one surface of the substrate 100, and the second circuit pattern 220 may be disposed on another surface of the substrate 100 opposite to the one surface.

[0103] Therefore, the display panel is connected with the chip on one surface of the substrate 100. In addition, the printed circuit board is connected with the chip on the other surface of the substrate 100.

[0104] On the other hand, as described above, the chip CH is disposed on the chip mounting area CA. The terminals of the chip CH are electrically connected to the pad portions of the first circuit pattern, the second circuit pattern, and the third circuit pattern disposed in the inner area of ​​the chip mounting area CA.

[0105] At this time, if the alignment of the chip terminals with the pads of the first circuit pattern, the pads of the second circuit pattern, and the pads of the third circuit pattern is misaligned, the connection characteristics of the chip and the circuit pattern are reduced. In addition, it is difficult to achieve the same alignment of the chip terminals with the pads of the first circuit pattern, the pads of the second circuit pattern, and the pads of the third circuit pattern.

[0106] Therefore, the following describes alignment of the terminal and the land portion that can easily perform a process while satisfying the characteristics of the COF module.

[0107] Figure 5 It is used to illustrate Figure 1 The graph of area A. That is, Figure 1 It is a diagram for explaining a chip mounting area of ​​a flexible printed circuit board.

[0108] Reference Figure 5 , the first pad portion 212a, the second pad portion 212b, and the third circuit pattern 230 are disposed inside the chip mounting area CA.

[0109] In addition, the first terminal portion 410 and the second terminal portion 420 of the chip CH are provided inside the chip mounting area CA. The first terminal portion 410 is connected to the pad portion of the third circuit pattern 230. The second terminal portion 420 is connected to the first pad portion 212a and the second pad portion 212b.

[0110] The terminal portion and the pad portion of the chip CH are joined by applying a set amount of heat using solder. Since the substrate 100 includes a resin material, the substrate 100 may shrink in the third direction 3D and the fourth direction 4D due to the heat. Therefore, due to the shrinkage of the substrate 100, the alignment of the terminal portion and the pad portion of the chip may be misaligned. Therefore, before joining the terminal portion and the pad portion, a compensation value considering the shrinkage of the substrate may be set, and then they are joined. Therefore, the terminal portion of the chip can be joined to the pad portion while satisfying the alignment within the set range.

[0111] Figure 6 and Figure 7 It is a diagram for explaining the alignment between the third circuit pattern 230 and the first terminal portion 410 .

[0112] Reference Figure 6 , the 1-1st terminal portion 411 is spaced apart from the first end E1 of the third circuit pattern 230. Specifically, the 1-1st terminal portion 411 is spaced apart from the first end E1 of the third circuit pattern 230 by a 1-1st width W1-1. Here, the 1-1st width W1-1 is defined as the maximum separation distance between the 1-1st terminal portion 411 and the first end E1 of the third circuit pattern 230.

[0113] The 1-1th width W1-1 may be different from the length L1-1 of the 1-1th terminal portion 411. Specifically, the 1-1th width W1-1 may be smaller than the length L1-1 of the 1-1th terminal portion 411.

[0114] For example, the 1-1 width W1-1 may be greater than 5 μm. Specifically, the 1-1 width W1-1 may be 5 μm to 20 μm. More specifically, the 1-1 width W1-1 may be 8 μm to 17 μm. More specifically, the 1-1 width W1-1 may be 10 μm to 15 μm.

[0115] Since the 1-1 terminal portion 411 and the first end E1 of the third circuit pattern 230 are spaced apart from each other, it is possible to prevent the 1-1 terminal portion 411 and the pad portion of the third circuit pattern 230 from not overlapping in the length direction of the third circuit pattern 230. Therefore, the 1-1 terminal portion 411 is stably bonded to the pad portion of the third circuit pattern.

[0116] In addition, since the separation distance between the 1-1 terminal portion 411 and the first end E1 of the third circuit pattern 230 is less than the length L1-1 of the 1-1 terminal portion 411, the length of the third circuit pattern 230 can be prevented from increasing. Therefore, the size of the chip mounting area CA can be reduced. In addition, the first pad portion, the second pad portion, and the third circuit pattern can be spaced apart at a sufficient interval within the chip mounting area CA.

[0117] The 1-1 terminal portion 411 includes an overlapping region and a non-overlapping region. The overlapping region is defined as a region overlapping with the third circuit pattern in the width direction of the third circuit pattern 230. In addition, the non-overlapping region is defined as a region not overlapping with the third circuit pattern in the width direction of the third circuit pattern 230. The non-overlapping region may include two non-overlapping regions.

[0118] The overlapped region is formed to have a 3-1st width W3-1. The 3-1st width W3-1 may correspond to the width of the third circuit pattern. In addition, the non-overlapped region is formed to have a 4-1ath width W4-1a and a 4-1bth width W4-1b.

[0119] The 4-1a width W4-1a and the 4-1b width W4-1b may be smaller than the width W2-1 of the 1-1 terminal portion 411. In addition, the 4-1a width W4-1a and the 4-1b width W4-1b may be smaller than the 3-1 width W3-1.

[0120] Specifically, the 4-1a width W4-1a and the 4-1b width W4-1b may be less than 0.3 times, less than 0.2 times, or less than 0.1 times the width W2-1 of the 1-1 terminal portion 411. When the 4-1a width W4-1a and the 4-1b width W4-1b exceed 0.3 times the width W2-1 of the 1-1 terminal portion 411, the connection characteristics of the chip and the third circuit pattern may be reduced due to the area where the 1-1 terminal portion 411 and the pad portion of the third circuit pattern are not bonded.

[0121] In addition, the 4-1a width W4-1a and the 4-1b width W4-1b may be less than 0.4 times, less than 0.3 times, less than 0.2 times, or less than 0.1 times the 3-1 width W3-1. If the 4-1a width W4-1a and the 4-1b width W4-1b exceed 0.4 times the 3-1 width W3-1, the connection characteristics of the chip and the third circuit pattern may be reduced due to the area where the 1-1 terminal portion 411 and the pad portion of the third circuit pattern are not bonded.

[0122] For example, the width W2-1 of the 1-1 terminal portion 411 may be 10 μm to 50 μm. In addition, the width W3-1 of the 3-1 may be 5 μm to 25 μm. In addition, the width W4-1a of the 4-1a and the width W4-1b of the 4-1b may be 2 μm to 10 μm. The width W2-1 of the 1-1 terminal portion 411, the width W3-1 of the 3-1, the width W4-1a of the 4-1a and the width W4-1b of the 4-1b may satisfy the above conditions within the above range.

[0123] The width W4-1a of the 4-1ath and the width W4-1b of the 4-1bth may be the same. Alternatively, the width W4-1a of the 4-1ath and the width W4-1b of the 4-1bth may be different. In addition, the difference between the width W4-1a of the 4-1ath and the width W4-1b of the 4-1bth may be less than 10%, less than 5%, or less than 3%.

[0124] If the difference between the 4-1a width W4-1a and the 4-1b width W4-1b exceeds 10%, the first terminal portion 410 is disposed offset in one direction on the pad portion of the third circuit pattern. Therefore, the overall alignment of the first terminal portion 410 may be misaligned.

[0125] Reference Figure 7 , the 1-2 terminal portion 412 is spaced apart from the second end E2 of the third circuit pattern 230. Specifically, the 1-2 terminal portion 412 is spaced apart from the second end E2 of the third circuit pattern 230 by a 1-2 width W1-2. Here, the 1-2 width W1-2 is defined as the maximum separation distance between the 1-2 terminal portion 412 and the second end E2 of the third circuit pattern 230.

[0126] The 1-2nd width W1-2 may be different from the length L1-2 of the 1-2nd terminal portion 412. Specifically, the 1-2nd width W1-2 may be smaller than the length L1-2 of the 1-2nd terminal portion 412.

[0127] For example, the 1-2 width W1-2 may be greater than 5 μm. Specifically, the 1-2 width W1-2 may be 5 μm to 20 μm. More specifically, the 1-2 width W1-2 may be 8 μm to 17 μm. More specifically, the 1-2 width W1-2 may be 10 μm to 15 μm.

[0128] Since the 1-2 terminal portion 412 and the second end E2 of the third circuit pattern 230 are spaced apart from each other, it is possible to prevent the pad portion of the 1-2 terminal portion 412 and the third circuit pattern 230 from overlapping in the length direction of the third circuit pattern 230. Therefore, the 1-2 terminal portion 412 is stably bonded to the pad portion of the third circuit pattern.

[0129] In addition, since the separation distance between the 1-2 terminal portion 412 and the second end E2 of the third circuit pattern 230 is less than the length L1-2 of the 1-2 terminal portion 412, the length of the third circuit pattern 230 can be prevented from increasing. Therefore, the size of the chip mounting area CA can be reduced. In addition, the first pad portion, the second pad portion, and the third circuit pattern can be spaced apart at a sufficient interval within the chip mounting area CA.

[0130] The 1-2 terminal portion 412 includes an overlapping region and a non-overlapping region. The overlapping region is defined as a region overlapping with the third circuit pattern in the width direction of the third circuit pattern 230. In addition, the non-overlapping region is defined as a region not overlapping with the third circuit pattern in the width direction of the third circuit pattern 230. The non-overlapping region may include two non-overlapping regions.

[0131] The overlapped region is formed to have a 3-2nd width W3-2. The 3-2nd width W3-2 may correspond to the width of the third circuit pattern. In addition, the non-overlapped region is formed to have a 4-2ath width W4-2a and a 4-2bth width W4-2b.

[0132] The 4-2a width W4-2a and the 4-2b width W4-2b may be smaller than the width W2-2 of the 1-2 terminal portion 412. In addition, the 4-2a width W4-2a and the 4-2b width W4-2b may be smaller than the 3-2 width W3-2.

[0133] Specifically, the 4-2a width W4-2a and the 4-2b width W4-2b may be less than 0.3 times, less than 0.2 times, or less than 0.1 times the width W2-2 of the 1-2 terminal portion 412. If the 4-2a width W4-2a and the 4-2b width W4-2b exceed 0.3 times the width W2-2 of the 1-2 terminal portion 412, the connection characteristics of the chip and the third circuit pattern may be reduced due to the area where the 1-2 terminal portion 412 and the pad portion of the third circuit pattern are not joined.

[0134] In addition, the 4-2a width W4-2a and the 4-2b width W4-2b may be less than 0.4 times, less than 0.3 times, less than 0.2 times, or less than 0.1 times the 3-2 width W3-2. If the 4-2a width W4-2a and the 4-2b width W4-2b exceed 0.4 times the 3-2 width W3-2, the connection characteristics of the chip and the third circuit pattern may be reduced due to the area where the 1-2 terminal portion 412 and the pad portion of the third circuit pattern are not bonded.

[0135] For example, the width W2-2 of the 1-2 terminal portion 412 may be 10 μm to 50 μm. In addition, the width W3-2 of the 3-2 may be 5 μm to 25 μm. In addition, the width W4-2a of the 4-2a and the width W4-2b of the 4-2b may be 2 μm to 10 μm. Within the above range, the width W2-2 of the 1-2 terminal portion 412, the width W3-2 of the 3-2, the width W4-2a of the 4-2a and the width W4-2b of the 4-2b may satisfy the above conditions.

[0136] The width W4-2a of the 4-2a and the width W4-2b of the 4-2b may be the same. Alternatively, the width W4-2a of the 4-2a and the width W4-2b of the 4-2b may be different. In addition, the difference between the width W4-2a of the 4-2a and the width W4-2b of the 4-2b may be less than 10%, less than 5%, or less than 3%.

[0137] If the difference between the 4-2a width W4-2a and the 4-2b width W4-2b exceeds 10%, the 1-2 terminal portion 412 is set to be offset in one direction on the pad portion of the third circuit pattern. Therefore, the overall alignment of the 1-2 terminal portion 412 may be misaligned, which may affect the alignment of other terminal portions.

[0138] The 1-1 width W1-1 and the 1-2 width W1-2 may be the same. Alternatively, the 1-1 width W1-1 and the 1-2 width W1-2 may be different. In addition, the difference between the 1-1 width W1-1 and the 1-2 width W1-2 may be less than 10%, less than 5%, or less than 3%.

[0139] If the difference between the 1-1 width W1-1 and the 1-2 width W1-2 exceeds 10%, the first terminal portions 411 and 412 are disposed to be offset in one direction on the pad portion of the third circuit pattern. Therefore, the overall alignment of the first terminal portions 411 and 412 may be misaligned, which may affect the alignment of other terminal portions.

[0140] Figure 8 4 is a diagram for explaining the alignment of the first circuit pattern 210, the second circuit pattern 220, and the second terminal portion 410. Figure 8 , the description is based on the first pad portion 212a of the first circuit pattern 210, but the embodiment is not limited thereto. Figure 8 The description of may be similarly applied to the third pad portion 222 a of the second circuit pattern 220 .

[0141] Reference Figure 8 , the second terminal portion 420 is spaced apart from the end E3 of the first pad portion 212a. Specifically, the second terminal portion 420 is spaced apart from the end E3 of the first pad portion 212a by a fifth width W5. Here, the fifth width W5 is defined as the maximum separation distance between the second terminal portion 420 and the end E3 of the first pad portion 212a.

[0142] The fifth width W5 may be different from the length L2 of the second terminal portion 420. Specifically, the fifth width W5 may be smaller than the length L2 of the second terminal portion 420.

[0143] Since the second terminal portion 420 and the third end portion E3 of the first pad portion 212a are spaced apart from each other, the second terminal portion 420 and the first pad portion 212a can be prevented from not overlapping in the length direction of the first pad portion 212a. Therefore, the second terminal portion 420 is stably bonded to the first pad portion 212a.

[0144] In addition, since the separation distance between the second terminal portion 420 and the end E3 of the first pad portion 212a is less than the length L2 of the second terminal portion 420, the length of the first pad portion 212a can be prevented from increasing. Therefore, the size of the chip mounting area CA can be reduced. In addition, the first pad portion, the second pad portion, and the third circuit pattern can be spaced apart at a sufficient interval within the chip mounting area CA.

[0145] The second terminal portion 420 includes an overlapping area and a non-overlapping area. The overlapping area is defined as an area overlapping with the first pad portion 212a in the width direction of the first pad portion 212a. In addition, the non-overlapping area is defined as an area that does not overlap with the first pad portion 212a in the width direction of the first pad portion 212a. The non-overlapping area may include two non-overlapping areas.

[0146] The overlapped area is formed to a sixth width W6. The sixth width W6 may correspond to the width of the first pad portion 212a. In addition, the non-overlapped area is formed to a seventh width W7.

[0147] The seventh width W7 may be smaller than the sixth width W6.

[0148] Specifically, the seventh width W7 may be less than 0.2 times or less than 0.1 times the sixth width W6. If the seventh width W7 exceeds 0.2 times the sixth width W6, the connection characteristics of the chip and the third circuit pattern may be reduced due to the area where the second terminal portion 420 and the first pad portion 212a are not joined. In addition, the distance from the adjacent first pad portion 212a may be reduced, resulting in a short circuit.

[0149] In addition, the seventh width W7 may be different from the interval D1 between the adjacent first pad portions 212a. Specifically, the seventh width W7 may be smaller than the interval D1 between the adjacent first pad portions 212a.

[0150] In addition, the seventh width W7 may be different from the interval D2 between the adjacent second terminal parts 420. Specifically, the seventh width W7 may be smaller than the interval D2 between the adjacent second terminal parts 420.

[0151] Since the seventh width W7 is smaller than the interval D1 of the first pad portion 212a and the interval D2 of the second terminal portion 420, the interval D1 of the first pad portion 212a and the interval D2 of the second terminal portion 420 can be sufficiently ensured. Therefore, the interval between adjacent first pad portions or adjacent first terminal portions is sufficiently ensured. Therefore, a short circuit can be prevented from occurring during the bonding process between the chip and the pad portion.

[0152] Reference Fig. 9 The COF module 2000 according to the embodiment includes a flexible circuit board. One end of the COF module 2000 is connected to the display panel 3000. In addition, the other end of the COF module 2000 is connected to the printed circuit board 4000.

[0153] The COF module 2000 , the display panel 3000 , and the printed circuit board 4000 may be directly or indirectly connected.

[0154] For example, an anisotropic conductive film may be provided between the COF module 2000 and the printed circuit board 4000. The COF module 2000 and the printed circuit board 4000 may be electrically connected while being joined by the anisotropic conductive film. The anisotropic conductive film may be a resin in which conductive particles are dispersed. Therefore, the electrical signal connected by the printed circuit board 4000 may be transmitted to the COF module 2000 by the conductive particles included in the anisotropic conductive film.

[0155] The COF module 1000 includes a flexible substrate. Therefore, the COF module 1000 may have a rigid form or a bent form between the display panel 3000 and the printed circuit board 4000.

[0156] The COF module 2000 can connect the display panel 3000 and the printed circuit board 4000 which are arranged opposite to each other in a bent form. Therefore, the thickness of the electronic device can be reduced. In addition, the degree of freedom of design can be improved. In addition, the wiring of the COF module 2000 will not be broken even in a bent form. Therefore, the reliability of the electronic device including the COF module can be improved.

[0157] Since the COF module is flexible, it can be used in various electronic devices.

[0158] For example, refer to Fig.10 , the COF module can be applied to a curved flexible touch window. Therefore, the touch device including the COF module can be a flexible touch device. Therefore, the user can bend or fold it by hand. Such a flexible touch window can be applied to wearable touch, etc.

[0159] Reference Fig.11, the COF module can be included in various wearable touch devices including curved displays. Therefore, the electronic device including the COF module can become thinner or lighter.

[0160] Reference Fig.12 The COF module can be used in various electronic devices with a display portion, such as a television, a monitor, and a notebook computer. At this time, the COF module can also be used in electronic devices with a curved display portion.

[0161] However, the embodiment is not limited thereto, and the flexible printed circuit board and the COF module including the same may be used in various electronic devices.

[0162] The features, structures, effects, etc. in the above-described embodiments are included in at least one embodiment of the present invention, but are not limited to one embodiment. In addition, those skilled in the art may combine or modify the features, structures, and effects shown in the various embodiments for use in other embodiments. Therefore, it should be understood that such combinations and modifications are included within the scope of the present invention.

[0163] In addition, the above mainly describes the embodiment, but the embodiment is only an example and does not limit the present invention. It can be understood by those skilled in the art that several changes and applications not shown above can be made without departing from the essential features of the embodiment. For example, the various components specifically shown in the embodiment can be changed. In addition, it should be understood that the differences related to such changes and such applications are included in the scope of the present disclosure defined in the following claims.

Claims

1. A COF module, comprising: a substrate including a chip mounting area; a circuit pattern, wherein the circuit pattern is arranged on the substrate; as well as a chip disposed on the chip mounting area and connected to the circuit pattern, Wherein, the circuit pattern includes a first circuit pattern, a second circuit pattern and a third circuit pattern, wherein the third circuit pattern is arranged inside the chip mounting area, The first terminal portion of the chip is connected to the third circuit pattern, and Wherein, an end portion of the first terminal portion and an end portion of the third circuit pattern are spaced apart from each other.

2. The COF module according to claim 1, wherein: A separation distance between an end portion of the first terminal portion and an end portion of the third circuit pattern is smaller than a length of the first terminal portion.

3. The COF module according to claim 1, wherein: A separation distance between an end portion of the first terminal portion and an end portion of the third circuit pattern is 5 μm to 20 μm.

4. The COF module according to claim 1, wherein: The first terminal portion includes an overlapping region overlapping the third circuit pattern in a width direction of the third circuit pattern; and two non-overlapping regions, and The width of each non-overlapping area is smaller than the width of the overlapping area.

5. The COF module according to claim 4, wherein: The width of each non-overlapping region is less than or equal to 0.3 times the width of the first terminal portion.

6. The COF module according to claim 4, wherein: The width of each non-overlapping region is less than 0.4 times the width of the overlapping region.

7. The COF module according to claim 4, wherein: The difference in width between the two non-overlapping regions is 10% or less.

8. The COF module according to claim 1, wherein: The first circuit pattern and the second circuit pattern include a wiring portion and a pad portion, The pad portion is arranged inside the chip mounting area. The second terminal portion of the chip is connected to the pad portion, and Wherein, an end portion of the second terminal portion and an end portion of the pad portion are arranged to be spaced apart from each other.

9. The COF module according to claim 8, wherein: A separation distance between an end portion of the second terminal portion and an end portion of the pad portion is smaller than a length of the second terminal portion.

10. An electronic device comprising: The COF module according to claim 1; a printed circuit board connected to the first circuit pattern; as well as A display panel is connected to the second circuit pattern.

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