Video encoding and decoding system and method, electronic equipment and storage medium

Abstract

The invention relates to a video coding and decoding system and method, electronic equipment and a storage medium, and the system comprises a video coding and decoding kernel which is used for determining a memory access request according to the configuration information of a to-be-processed video coding and decoding task, and transmitting the memory access request to a first-stage MMU, the memory access request comprises a task identifier corresponding to a to-be-processed video coding and decoding task, a user identifier and a target task virtual memory address; the first-level MMU is used for determining a target user virtual memory address corresponding to the target task virtual memory address according to the task identifier, and sending the user identifier and the target user virtual memory address to the second-level MMU; and the second-level MMU is used for determining a target physical memory address corresponding to the target user virtual memory address according to the user identifier. According to the embodiment of the invention, data isolation between different users and different video coding and decoding tasks is effectively realized, and the data security is effectively improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a video encoding and decoding system and method, an electronic device, and a storage medium. Background Art

[0002] In the existing video codec related chips, memory management often uses a simple method to perform configuration calculations, for example, directly performing configuration calculations on the physical address (PA) of the system on a chip (SOC); or using the memory management unit (MMU) at the exit of the video codec kernel to convert the virtual address (VA) to PA before transmitting it to the memory in the SOC. However, in the related art, the configuration calculations between different tasks are switched by software, which cannot achieve data isolation between different tasks, and there is a risk of data access overlapping each other. Summary of the invention

[0003] The present disclosure proposes a technical solution of a video encoding and decoding system and method, an electronic device and a storage medium.

[0004] According to one aspect of the present disclosure, a video codec system is provided, comprising: a video codec kernel, a first-level memory management unit MMU, and a second-level MMU; the video codec kernel is used to determine a memory access request according to configuration information of a video codec task to be processed, and send the memory access request to the first-level MMU, wherein the memory access request includes: a task identifier, a user identifier, and a target task virtual memory address corresponding to the video codec task to be processed; the first-level MMU is used to determine a target user virtual memory address corresponding to the target task virtual memory address according to the task identifier, and send the user identifier and the target user virtual memory address to the second-level MMU; the second-level MMU is used to determine a target physical memory address corresponding to the target user virtual memory address according to the user identifier.

[0005] In a possible implementation, the system also includes: a first-level MMU configuration program and a second-level MMU configuration program; the first-level MMU configuration program is used to configure the first memory address mapping tables of different video codec tasks to the first-level MMU, wherein, for any video codec task, the first memory address mapping table of the video codec task includes: a mapping relationship between a task virtual memory address assigned to the video codec task and a corresponding user virtual memory address in a target virtual memory space assigned to a user to which the video codec task belongs; the second-level MMU configuration program is used to configure the second memory address mapping tables of different users who apply the video codec system to the second-level MMU, wherein, for any user, the second memory address mapping table of the user includes: a mapping relationship between a user virtual memory address assigned to the user and a corresponding physical memory address.

[0006] In a possible implementation, the second-level MMU includes: an address management unit corresponding to each user; and a second-level MMU configuration program, for configuring, for any user, the second memory address mapping table of the user to the address management unit corresponding to the user in the second-level MMU.

[0007] In a possible implementation, the second memory address mapping tables of different users are different.

[0008] In a possible implementation, the first-level MMU is used to determine a first memory address mapping table of the video codec task to be processed according to the task identifier; the first-level MMU is used to determine the target user virtual memory address corresponding to the target task virtual memory address according to the first memory address mapping table of the video codec task to be processed.

[0009] In a possible implementation, the second-level MMU is used to determine, based on the user identifier, a second memory address mapping table of the target user to which the video encoding and decoding task to be processed belongs; and the second-level MMU is used to determine, based on the second memory address mapping table of the target user, the target physical memory address corresponding to the virtual memory address of the target user.

[0010] In a possible implementation, the video codec core is used to read the to-be-processed data of the to-be-processed video codec task according to the target physical memory address.

[0011] According to one aspect of the present disclosure, a video encoding and decoding method is provided, including: using a video encoding and decoding kernel to determine a memory access request according to configuration information of a video encoding and decoding task to be processed, wherein the memory access request includes: a task identifier, a user identifier, and a target task virtual memory address corresponding to the video encoding and decoding task to be processed; using a first-level MMU to determine a target user virtual memory address corresponding to the target task virtual memory address according to the task identifier; and using a second-level MMU to determine a target physical memory address corresponding to the target user virtual memory address according to the user identifier.

[0012] According to one aspect of the present disclosure, an electronic device is provided, comprising: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to call the instructions stored in the memory to execute the above method.

[0013] According to one aspect of the present disclosure, a computer-readable storage medium is provided, on which computer program instructions are stored, and when the computer program instructions are executed by a processor, the above method is implemented.

[0014] In the disclosed embodiment, the video codec system includes: a video codec kernel, a first-level memory management unit MMU, and a second-level MMU; the video codec kernel determines a memory access request including a task identifier, a user identifier, and a target task virtual memory address corresponding to the video codec task to be processed according to the configuration information of the video codec task to be processed, and sends the memory access request to the first-level MMU; the first-level MMU determines a target user virtual memory address corresponding to the target task virtual memory address according to the task identifier, and sends the user identifier and the target user virtual memory address to the second-level MMU; the second-level MMU determines a target physical memory address corresponding to the target user virtual memory address according to the user identifier. By using the hardware first-level MMU and second-level MMU, data isolation between different users and different video codec tasks is effectively achieved, and data security is effectively improved.

[0015] It should be understood that the above general description and the following detailed description are exemplary and explanatory only and do not limit the present disclosure. Other features and aspects of the present disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and are used to illustrate the technical solutions of the present disclosure together with the specification.

[0017] Figure 1 A block diagram of a video encoding and decoding system according to an embodiment of the present disclosure is shown.

[0018] Figure 2 A schematic diagram of a video encoding and decoding system according to an embodiment of the present disclosure is shown.

[0019] Figure 3 A flowchart of a video encoding and decoding method according to an embodiment of the present disclosure is shown.

[0020] Figure 4 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0021] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0022] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0023] The term "and / or" herein is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of. For example, including at least one of A, B, and C can represent including any one or more elements selected from the set consisting of A, B, and C.

[0024] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0025] MMU is sometimes called Paged Memory Management Unit (PMMU). It is a piece of computer hardware responsible for processing memory access requests from the Central Processing Unit (CPU). Its functions include conversion of virtual memory addresses to physical memory addresses (i.e. virtual memory management), memory protection, control of CPU cache, and in simpler computer architectures, bus arbitration and memory bank switching. An important function of MMU is to enable the system to run multiple tasks, each of which runs as an independent program in its own private virtual memory space. They do not need to understand the system's physical memory map, that is, the physical memory addresses actually used by the hardware, nor do they need to understand other programs that may be executed at the same time.

[0026] In the video encoding and decoding scenario, the related technology uses a general MMU to convert the data addresses of various related computing modules of the video encoding and decoding task from virtual memory addresses to physical memory addresses. However, the related technology uses software to define and switch the configuration calculation and address conversion between different tasks, which cannot achieve data isolation between different tasks, and there is a risk of data access overlapping each other, and it is impossible to achieve parallel address conversion between different tasks, and the conversion performance is poor.

[0027] In order to solve the above technical problems, the embodiment of the present disclosure provides a video codec system, which improves the video codec system at the hardware level, effectively realizes data isolation between different users and different video codec tasks, and effectively improves data security and parallelism of address conversion. The video codec system provided by the embodiment of the present disclosure is described in detail below.

[0028] Figure 1 FIG. 2 is a block diagram of a video encoding and decoding system according to an embodiment of the present disclosure. Figure 1 As shown, the video codec system includes: a video codec kernel, a first-level MMU, and a second-level MMU; the video codec kernel is used to determine a memory access request according to the configuration information of the video codec task to be processed, and send the memory access request to the first-level MMU, wherein the memory access request includes: a task identifier, a user identifier, and a target task virtual memory address corresponding to the video codec task to be processed; the first-level MMU is used to determine a target user virtual memory address corresponding to the target task virtual memory address according to the task identifier, and send the user identifier and the target user virtual memory address to the second-level MMU; the second-level MMU is used to determine a target physical memory address corresponding to the target user virtual memory address according to the user identifier.

[0029] By utilizing the hardware's first-level MMU and second-level MMU, data isolation between different users and different video encoding and decoding tasks is effectively achieved, effectively improving data security.

[0030] In a possible implementation, the system also includes: a first-level MMU configuration program and a second-level MMU configuration program; the first-level MMU configuration program is used to configure the first memory address mapping tables of different video codec tasks to the first-level MMU, wherein, for any video codec task, the first memory address mapping table of the video codec task includes: a mapping relationship between a task virtual memory address assigned to the video codec task and a corresponding user virtual memory address in a target virtual memory space assigned to a user to which the video codec task belongs; the second-level MMU configuration program is used to configure the second memory address mapping tables of different users who apply the video codec system to the second-level MMU, wherein, for any user, the second memory address mapping table of the user includes: a mapping relationship between a user virtual memory address assigned to the user and a corresponding physical memory address.

[0031] Based on the first-level MMU configuration program and the second-level MMU configuration program of the software layer, it is effectively implemented that before executing the video encoding and decoding task, the first memory address mapping table of different video encoding and decoding tasks is pre-configured to the first-level MMU configuration of the hardware layer, and the second memory address mapping table of different users is configured to the second-level MMU of the hardware layer, thereby effectively realizing data isolation between different users and different video encoding and decoding tasks at the hardware layer.

[0032] Figure 2 FIG. 2 is a schematic diagram of a video encoding and decoding system according to an embodiment of the present disclosure. Figure 2 As shown, the video codec system includes: a software layer and a hardware layer. The hardware layer includes: a video codec kernel, a first-level MMU, and a second-level MMU; the software layer includes: a first-level MMU configuration program and a second-level MMU configuration program.

[0033] For any video encoding and decoding task, the software layer sets a task identifier (Process Identifier, PID) and a user identifier (User Identification, UID) for the video encoding and decoding task, wherein the task identifier is used to uniquely identify the video encoding and decoding task, and the user identifier is used to indicate the user to whom the video encoding and decoding task belongs, which can be the virtual machine user who executes the video encoding and decoding task, or other users who execute the video encoding and decoding task, which is not specifically limited in the embodiments of the present disclosure. Figure 2 For example, the software layer sets a task identifier and a user identifier for each video encoding and decoding task from video encoding and decoding task 1 to video encoding and decoding task N respectively.

[0034] The software layer can pre-configure a different first memory address mapping table for each video encoding and decoding task that needs to be performed in the video encoding and decoding system. Figure 2 For example, the first-level MMU configuration program of the software layer configures the first memory address mapping table of each video codec task from video codec task 1 to video codec task N to the first-level MMU of the hardware layer based on the data / address bus.

[0035] For any video codec task, the first-level MMU configuration program of the software layer determines the mapping relationship between the task virtual memory address assigned to the video codec task and the corresponding user virtual memory address in the target virtual memory space assigned to the user to which the video codec task belongs; then, based on the mapping relationship between the task virtual memory address assigned to the video codec task and the corresponding user virtual memory address in the target virtual memory space assigned to the user to which the video codec task belongs, a first memory address mapping table of the video codec task is constructed, and a mapping relationship is established between the first memory address mapping table of the video codec task and the task identifier of the video codec task; finally, the first memory address mapping table of the video codec task is configured to the first-level MMU of the hardware layer.

[0036] Since the first memory address mapping tables of different video codec tasks are pre-configured in the first-level MMU of the hardware layer, the subsequent video codec kernel can perform address conversion in parallel based on the first memory address mapping tables independently configured for different video codec tasks in the first-level MMU, without the need to switch different video codec tasks through software, thereby effectively improving the conversion performance.

[0037] The software layer can pre-configure a different second memory address mapping table for each user of the video codec system. Figure 2 For example, the second-level MMU configuration program of the software layer is based on the data / address bus, and according to the user to which each video codec task in video codec task 1 to video codec task N belongs, configures the second memory address mapping table of different users to the second-level MMU of the hardware layer.

[0038] For any user, the second-level MMU configuration program of the software layer determines the mapping relationship between the user virtual memory address in the virtual memory space allocated to the user and the corresponding physical memory address; then, based on the mapping relationship between the user virtual memory address in the virtual memory space allocated to the user and the corresponding physical memory address, the second memory address mapping table of the user is constructed, and a mapping relationship is established between the second memory address mapping table of the user and the user identifier of the user; finally, the second memory address mapping table of the user is configured to the second-level MMU of the hardware layer. For any user, the virtual memory space allocated to the user is the entire memory space that the user believes he or she owns exclusively.

[0039] Since a second memory address mapping table is independently configured for each user in the hardware layer of the video codec system, the subsequent video codec kernel can perform address conversion in parallel based on the second memory address mapping tables independently configured by different users in the second-level MMU, without the need to switch different users through software, thereby effectively improving the conversion performance.

[0040] In a possible implementation, the second-level MMU includes: an address management unit corresponding to each user; and a second-level MMU configuration program for configuring, for any user, the second memory address mapping table of the user to the address management unit corresponding to the user in the second-level MMU.

[0041] An address management unit corresponding to each user can be set in the second-level MMU of the hardware layer. The second-level MMU configuration program configures the second memory address mapping table of each user to the address management unit corresponding to the user in the second-level MMU, so that the second-level MMU can manage the second memory address mapping tables of different users separately.

[0042] In a possible implementation, the second memory address mapping tables of different users are different.

[0043] A different second memory address mapping table is independently configured for each user, and different users can subsequently use different second memory address mapping tables for address conversion based on corresponding user identifiers, thereby effectively achieving physical address isolation between different users.

[0044] In one example, according to an actual video encoding and decoding scenario, when physical address isolation between different users is not required, the same second memory address mapping table can be configured for these users, thereby achieving non-isolation of physical addresses between these users.

[0045] In the actual video encoding and decoding scenario, the software layer configures the configuration information of the video encoding and decoding task to be processed to the video encoding and decoding kernel. The configuration information includes the task identifier and user identifier corresponding to the video encoding and decoding task to be processed. Figure 2 For example, the software layer configures the configuration information of the video encoding and decoding task to be processed to the video encoding and decoding kernel based on the configuration bus, and the video encoding and decoding kernel executes the video encoding and decoding task to be processed based on the configuration information of the video encoding and decoding task to be processed.

[0046] During the process of the video codec kernel executing the pending video codec task, a memory access request is generated according to the actual data reading requirements, wherein the memory access request includes: the task identifier corresponding to the pending video codec task, the user identifier, and the target task virtual memory address. The target task virtual memory address indicates the virtual memory address that needs to be requested during the execution of the pending video codec task. Figure 2 For example, the video codec kernel sends a memory access request to the first-level MMU, and the memory access request includes a task identifier, a user identifier, and a target task virtual memory address.

[0047] In a possible implementation, the first-level MMU is used to determine a first memory address mapping table of a video encoding and decoding task to be processed according to a task identifier; the first-level MMU is used to determine a target user virtual memory address corresponding to a target task virtual memory address according to the first memory address mapping table.

[0048] Since the first-level MMU is configured with the first memory address mapping table of different video codec tasks, after receiving the memory access request sent by the video codec kernel, the first-level MMU can determine the first memory address mapping table of the video codec task to be processed according to the task identifier corresponding to the video codec task to be processed included in the memory access request, and then perform the first address conversion based on the first memory address mapping table of the video codec task to be processed, and determine the target user virtual memory address corresponding to the target task virtual memory address that the video task to be processed needs to access, that is, the target user virtual memory address that the video task to be processed needs to access.

[0049] After determining the target user virtual memory address that the video task to be processed needs to access, the first-level MMU can send the user identifier corresponding to the video encoding and decoding task to be processed and the target user virtual memory address that the video task to be processed needs to access to the second-level MMU. Figure 2 For example, the first-level MMU sends a user identifier and a target user virtual memory address to the second-level MMU.

[0050] In one possible implementation, the second-level MMU is used to determine, based on the user identifier, a second memory address mapping table of the target user to which the video encoding and decoding task to be processed belongs; and the second-level MMU is used to determine, based on the second memory address mapping table, a target physical memory address corresponding to the virtual memory address of the target user.

[0051] Since the second-level MMU is configured with second memory address mapping tables for different users, the second-level MMU receives the user ID corresponding to the target user to whom the pending video encoding and decoding task belongs from the first-level MMU, determines the second memory address mapping table of the target user, and then performs a second address conversion based on the second memory address mapping table of the target user to determine the target physical memory address corresponding to the target user virtual memory address that the pending video task needs to access, that is, the target physical memory address that the pending video task needs to access. Figure 2 For example, the second-level MMU outputs the target physical memory address.

[0052] In a possible implementation, the video codec kernel is used to read the to-be-processed data of the to-be-processed video codec task according to the target physical memory address.

[0053] After determining the target physical memory address that the video task to be processed needs to access, the video codec kernel can read the data to be processed of the video codec task to be processed based on the target physical memory address, and then perform video codec processing based on the data to be processed.

[0054] In the disclosed embodiment, the video codec system includes: a video codec kernel, a first-level memory management unit MMU, and a second-level MMU; the video codec kernel determines a memory access request including a task identifier, a user identifier, and a target task virtual memory address corresponding to the video codec task to be processed according to the configuration information of the video codec task to be processed, and sends the memory access request to the first-level MMU; the first-level MMU determines a target user virtual memory address corresponding to the target task virtual memory address according to the task identifier, and sends the user identifier and the target user virtual memory address to the second-level MMU; the second-level MMU determines a target physical memory address corresponding to the target user virtual memory address according to the user identifier. By using the hardware first-level MMU and second-level MMU, data isolation between different users and different video codec tasks is effectively achieved, and data security is effectively improved.

[0055] Figure 3 A flowchart of a video encoding and decoding method according to an embodiment of the present disclosure is shown. The video encoding and decoding method can be applied to the above Figure 1 and / or Figure 2 The video encoding and decoding system in the embodiment shown. Figure 3 As shown, the video encoding and decoding method includes:

[0056] In step S11, the video codec kernel is used to determine a memory access request according to the configuration information of the video codec task to be processed, wherein the memory access request includes: a task identifier corresponding to the video codec task to be processed, a user identifier, and a target task virtual memory address.

[0057] In step S12, the first-level MMU is used to determine the target user virtual memory address corresponding to the target task virtual memory address according to the task identifier.

[0058] In step S13, the second-level MMU is used to determine the target physical memory address corresponding to the target user virtual memory address according to the user label.

[0059] In a possible implementation, the video codec method further includes: using a first-level MMU configuration program to configure a first memory address mapping table of different video codec tasks to the first-level MMU, wherein, for any video codec task, the first memory address mapping table of the video codec task includes: a mapping relationship between a task virtual memory address assigned to the video codec task and a corresponding user virtual memory address in a target virtual memory space assigned to a user to which the video codec task belongs; using a second-level MMU configuration program to configure a second memory address mapping table of different users of the video codec system to the second-level MMU, wherein, for any user, the second memory address mapping table of the user includes: a mapping relationship between a user virtual memory address assigned to the user and a corresponding physical memory address.

[0060] In a possible implementation, the second-level MMU includes: an address management unit corresponding to each user; using the second-level MMU configuration program, configuring the second memory address mapping tables of different users of the application video codec system to the second-level MMU, including: for any user, using the second-level MMU configuration program, configuring the second memory address mapping table of the user to the address management unit corresponding to the user in the second-level MMU.

[0061] In a possible implementation, the second memory address mapping tables of different users are different.

[0062] In a possible implementation, a first-level MMU is used to determine a target user virtual memory address corresponding to a target task virtual memory address according to a task identifier, including: using the first-level MMU to determine a first memory address mapping table of a video encoding and decoding task to be processed according to the task identifier; using the first-level MMU to determine a target user virtual memory address corresponding to the target task virtual memory address according to the first memory address mapping table of the video encoding and decoding task to be processed.

[0063] In a possible implementation, a second-level MMU is used to determine a target physical memory address corresponding to a target user's virtual memory address according to a user identifier, including: using the second-level MMU to determine a second memory address mapping table of a target user to which a video encoding and decoding task to be processed belongs according to the user identifier; using the second-level MMU to determine a target physical memory address corresponding to the target user's virtual memory address according to the second memory address mapping table of the target user.

[0064] In a possible implementation, the video encoding and decoding method further includes: using the video encoding and decoding kernel to read the to-be-processed data of the to-be-processed video encoding and decoding task according to the target physical memory address.

[0065] The specific process of executing the video encoding and decoding method in the video encoding and decoding system can refer to the above Figure 1 and / or Figure 2 The specific contents of the related embodiments shown are not repeated here.

[0066] It can be understood that the above-mentioned various method embodiments mentioned in the present disclosure can be combined with each other to form a combined embodiment without violating the principle logic. Due to space limitations, the present disclosure will not repeat them. It can be understood by those skilled in the art that in the above-mentioned method of the specific implementation method, the specific execution order of each step should be determined according to its function and possible internal logic.

[0067] In addition, the present disclosure also provides electronic devices, computer-readable storage media, and programs, all of which can be used to implement any method provided by the present disclosure. The corresponding technical solutions and descriptions are referred to the corresponding records in the method part and will not be repeated here.

[0068] This method has a specific technical connection with the internal structure of the computer system, and can solve the technical problem of how to improve the hardware computing efficiency or execution effect (including reducing the amount of data storage, reducing the amount of data transmission, increasing the hardware processing speed, etc.), thereby obtaining the technical effect of improving the internal performance of the computer system in accordance with the laws of nature.

[0069] In some embodiments, the functions or modules included in the device provided by the embodiments of the present disclosure can be used to execute the method described in the above method embodiments. The specific implementation can refer to the description of the above method embodiments, and for the sake of brevity, it will not be repeated here.

[0070] The embodiment of the present disclosure also provides a computer-readable storage medium on which computer program instructions are stored, and the computer program instructions implement the above method when executed by a processor. The computer-readable storage medium can be a volatile or non-volatile computer-readable storage medium.

[0071] An embodiment of the present disclosure further proposes an electronic device, comprising: a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to call the instructions stored in the memory to execute the above method.

[0072] The embodiments of the present disclosure also provide a computer program product, including a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above method.

[0073] The electronic device may be provided as a terminal, a server, or a device in other forms.

[0074] Figure 4 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. Figure 4 , the electronic device 1900 can be provided as a server or a terminal device. Figure 4 , the electronic device 1900 includes a processing component 1922, which further includes one or more processors, and a memory resource represented by a memory 1932 for storing instructions executable by the processing component 1922, such as an application. The application stored in the memory 1932 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute instructions to perform the above method.

[0075] The electronic device 1900 may also include a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output interface 1958. The electronic device 1900 may operate based on an operating system stored in the memory 1932, such as a Microsoft Server operating system (Windows Server 2003). TM ), a graphical user interface operating system launched by Apple (Mac OS X TM ), a multi-user, multi-process computer operating system (Unix TM ), a free and open source Unix-like operating system (Linux TM ), an open source Unix-like operating system (FreeBSD TM ) or similar.

[0076] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions, which can be executed by the processing component 1922 of the electronic device 1900 to perform the above method.

[0077] The present disclosure may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present disclosure.

[0078] Computer readable storage medium can be a tangible device that can hold and store instructions used by an instruction execution device. Computer readable storage medium can be, for example, (but not limited to) an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (non-exhaustive list) of computer readable storage medium include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, for example, a punch card or a convex structure in a groove on which instructions are stored, and any suitable combination thereof. The computer readable storage medium used here is not interpreted as a transient signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagated by a waveguide or other transmission medium (for example, a light pulse by an optical fiber cable), or an electrical signal transmitted by a wire.

[0079] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0080] The computer program instructions for performing the operation of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. Computer-readable program instructions may be executed completely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be customized by utilizing the state information of the computer-readable program instructions, and the electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0081] Various aspects of the present disclosure are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0082] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0083] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0084] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0085] The computer program product may be implemented in hardware, software or a combination thereof. In one optional embodiment, the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK) and the like.

[0086] The above description of various embodiments tends to emphasize the differences between the various embodiments. The same or similar aspects can be referenced to each other, and for the sake of brevity, they will not be repeated herein.

[0087] Those skilled in the art will appreciate that, in the above method of specific implementation, the order in which the steps are written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of the steps should be determined by their functions and possible internal logic.

[0088] If the technical solution of this application involves personal information, the product using the technical solution of this application has clearly informed the personal information processing rules and obtained the individual's voluntary consent before processing the personal information. If the technical solution of this application involves sensitive personal information, the product using the technical solution of this application has obtained the individual's separate consent before processing the sensitive personal information, and at the same time meets the "explicit consent" requirement. For example, on personal information collection devices such as cameras, clear and prominent signs are set to inform that the personal information collection scope has been entered and personal information will be collected. If the individual voluntarily enters the collection scope, it is deemed that he or she agrees to the collection of his or her personal information; or on the device that processes personal information, the personal information processing rules are notified by obvious signs / information, and the individual's authorization is obtained through pop-up information or by asking the individual to upload his or her personal information; among them, the personal information processing rules may include information such as the personal information processor, the purpose of personal information processing, the processing method, and the type of personal information processed.

[0089] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A video encoding and decoding system, characterized in that: include: Video codec core, first-level memory management unit MMU, second-level MMU; The video codec kernel is used to determine a memory access request according to the configuration information of the video codec task to be processed, and send the memory access request to the first-level MMU, wherein the memory access request includes: a task identifier, a user identifier, and a target task virtual memory address corresponding to the video codec task to be processed; The first-level MMU is used to determine a target user virtual memory address corresponding to the target task virtual memory address according to the task identifier, and send the user identifier and the target user virtual memory address to the second-level MMU; The second-level MMU is used to determine the target physical memory address corresponding to the target user virtual memory address according to the user identifier.

2. The system according to claim 1, characterized in that The system also includes: a first-level MMU configuration program, a second-level MMU configuration program; The first-level MMU configuration program is used to configure the first memory address mapping tables of different video codec tasks to the first-level MMU, wherein, for any video codec task, the first memory address mapping table of the video codec task includes: a mapping relationship between a task virtual memory address assigned to the video codec task and a corresponding user virtual memory address in a target virtual memory space assigned to a user to which the video codec task belongs; The second-level MMU configuration program is used to configure the second memory address mapping tables of different users applying the video codec system to the second-level MMU, wherein, for any user, the second memory address mapping table of the user includes: a mapping relationship between the user virtual memory address assigned to the user and its corresponding physical memory address.

3. The system according to claim 2, characterized in that The second-level MMU includes: an address management unit corresponding to each user; The second-level MMU configuration program is used to configure, for any user, the second memory address mapping table of the user to the address management unit corresponding to the user in the second-level MMU.

4. The system according to claim 2 or 3, characterized in that: The second memory address mapping tables of different users are different.

5. The system according to claim 2 or 3, characterized in that: The first-level MMU is used to determine a first memory address mapping table of the to-be-processed video encoding and decoding task according to the task identifier; The first-level MMU is used to determine the target user virtual memory address corresponding to the target task virtual memory address according to the first memory address mapping table of the video encoding and decoding task to be processed.

6. The system according to claim 2 or 3, characterized in that: The second-level MMU is used to determine, according to the user identifier, a second memory address mapping table of the target user to which the to-be-processed video encoding and decoding task belongs; The second-level MMU is used to determine the target physical memory address corresponding to the target user virtual memory address according to the second memory address mapping table of the target user.

7. The system according to claim 1, characterized in that The video codec kernel is used to read the to-be-processed data of the to-be-processed video codec task according to the target physical memory address.

8. A video encoding and decoding method, characterized in that: include: Determine a memory access request by using the video codec kernel according to the configuration information of the video codec task to be processed, wherein the memory access request includes: a task identifier, a user identifier, and a target task virtual memory address corresponding to the video codec task to be processed; Determine, using the first-level MMU, a target user virtual memory address corresponding to the target task virtual memory address according to the task identifier; The second-level MMU is used to determine the target physical memory address corresponding to the target user virtual memory address according to the user mark.

9. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to call the instructions stored in the memory to execute the method of claim 8.

10. A computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the method of claim 8 is implemented.

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