JTAG (Joint Test Action Group) cable connection assembly for enhancing anti-interference capability of JTAG interface and connection method

Abstract

The invention provides a JTAG (Joint Test Action Group) cable connection assembly and a connection method for enhancing the anti-interference capability of a JTAG interface. The assembly is characterized in that the assembly comprises a target circuit, a JTAG cable, a JTAG adapter plate and a JTAG downloader, the JTAG cable is connected with the target circuit and the JTAG adapter plate, the JTAG adapter plate is connected with the JTAG adapter plate, a JTAG interface circuit is used for converting a JTAG single-end signal from a programmable chip into an LVDS differential signal, and the LVDS differential signal is used for downloading the LVDS differential signal. The LVDS differential signal from the test cable is converted into a JTAG single-ended signal, and the JTAG single-ended signal is sent to the programmable chip; and the digital control switch is used for disconnecting the physical connection between the JTAG cable and the JTAG interface of the programmable chip. According to the invention, the communication distance of the JTAG interface can be effectively prolonged, and the anti-interference capability of the JTAG interface can be enhanced.

Description

Technical Field

[0001] The invention relates to an anti-interference design technology for a chip debugging interface, and in particular to a JTAG cable connection component and a connection method for enhancing the anti-interference capability of a JTAG interface. Background Art

[0002] With the development of electronic technology, more and more designs use programmable chips with complex internal structures such as DSP and FPGA to achieve specific functions. These chips generally provide a JTAG interface (Joint Test Action Group) for testing, debugging, configuring, downloading, etc. JTAG is an international standard test protocol (IEEE1149.1 compatible). The standard JTAG interface is 4 lines: TMS, TCK, TDI, TDO, which are mode selection, clock, data input and data output lines respectively.

[0003] Generally, a JTAG interface is reserved on a PCB equipped with a programmable chip. Designers can connect the corresponding downloader or burner of the programmable chip to the JTAG interface to debug and burn the programmable chip. However, in actual use, due to the limitations of the use environment or the box structure, it is impossible to reserve a window for the JTAG interface or provide an independent JTAG interface. JTAG-related signals often need to be led out through a unified cable with other interface signals, which brings the following problems:

[0004] 1) The length of the cable used to connect the devices may far exceed the recommended length of the JTAG cable, which will deteriorate the signal quality of the JTAG-related signals, causing the debugging and downloading operations of the chip to fail easily, thereby affecting the reliability of the related design operation.

[0005] 2) JTAG-related signals are prone to crosstalk with other signals on the cable, especially when there are some analog signals that are susceptible to interference or digital signals with high communication rates in the cable. The crosstalk between signals may have an adverse effect on the performance and even function of the product.

[0006] 3) In an environment with harsh electromagnetic environment or during electromagnetic compatibility testing, a cable that is too long can easily introduce spatial electromagnetic interference directly into the DSP or FPGA chip through the JTAG interface, which may cause chip malfunction or even permanent damage to the chip.

[0007] For the problem of long JTAG cables, the general solution is to add multiple drivers and receivers between the target circuit and the JTAG downloader, use the driver to drive the JTAG signal at the source end, and use the receiver to receive the JTAG signal at the receiving end. This solution can effectively increase the driving capability of the JTAG interface, thereby increasing the communication distance of the JTAG signal. However, since the JTAG drive circuit generally adopts a single-ended signal form, this single-ended signal still cannot reduce the impact of crosstalk between the JTAG signal and other signals, that is, the JTAG signal may affect other signal lines on the cable, causing product function abnormalities, and other signals on the cable may also affect the JTAG signal, causing abnormal chip debugging process. Moreover, since the JTAG cable is always connected to the JTAG interface, in a harsh electromagnetic environment, these JTAG cables are equivalent to receiving antennas, and external electromagnetic interference may enter the chip through the JTAG cable, which may cause chip function abnormalities or permanent damage.

[0008] In view of the above problems, when the JTAG interface of the product needs to be brought out together with other signals and the cable length is long, the relevant JTAG interface design must be able to adapt to the long cable communication requirements and have strong electromagnetic compatibility to ensure the normal operation of the product.

[0009] After searching according to patent search formula 1 (JTAG+anti-interference), 2 related patent contents were found, and two patent documents related to the present invention were retrieved, including:

[0010] 1) Patent document publication number CN209821821U discloses a JTAG circuit, which improves the anti-interference performance of the JTAG circuit by using circuits such as pull-up resistors and filter capacitors. The difference between the present invention and the present invention is that the present invention uses an LVDS interface in combination with a controllable switch matrix to improve the anti-interference performance of the JTAG interface.

[0011] 2) Patent document publication number CN210431447U discloses a JTAG chain long-distance transmission drive device, which realizes long-distance reliable transmission of JTAG through a single-ended differential signal conversion chip and a USB extension cable. The difference from the present invention is that the present invention additionally adds a switch matrix at the JTAG interface, physically isolates the JTAG interface, and can effectively prevent strong electromagnetic interference from damaging the chip through the JTAG cable. Summary of the invention

[0012] In view of the above reasons, the present invention proposes a design and method for enhancing the anti-interference capability of the JTAG interface, so as to effectively reduce the signal crosstalk and the influence of poor electromagnetic compatibility that may be caused by a long JTAG cable.

[0013] Specifically, the present invention provides a JTAG cable connection component for enhancing the anti-interference capability of a JTAG interface, characterized in that it comprises a target circuit, a JTAG cable, a JTAG adapter board, and a JTAG downloader, wherein the JTAG cable connects the target circuit and the JTAG adapter board, and the JTAG adapter board is connected to the JTAG adapter board.

[0014] The JTAG adapter board is used to convert the LVDS differential signal from the JTAG interface circuit into a JTAG single-ended signal so as to connect to the JTAG downloader, and convert the JTAG single-ended signal from the JTAG downloader into an LVDS differential signal so as to be transmitted to the JTAG interface circuit.

[0015] The target circuit includes a JTAG connector, a JTAG interface circuit and a programmable chip, wherein the JTAG connector is used to connect the JTAG cable, and the JTAG interface circuit is connected to the JTAG adapter board via the JTAG cable.

[0016] The JTAG interface circuit is used to convert the JTAG single-ended signal from the programmable chip into an LVDS differential signal, and convert the LVDS differential signal from the test cable into a JTAG single-ended signal, and send it to the programmable chip; it also includes a digitally controlled switch for disconnecting the physical connection between the JTAG cable and the JTAG interface of the programmable chip.

[0017] Furthermore, the JTAG interface circuit includes an LVDS transceiver and a switch matrix. The LVDS transceiver includes three receivers and one driver. The three receivers are used to receive TMS, TCK, and TDO in LVDS differential form from the JTAG cable and convert them into single-ended signals connected to the switch matrix; one driver converts TDI into an LVDS differential signal and sends it to the JTAG adapter board via the JTAG cable. The switch matrix is ​​used to control the on and off of the JTAG interface of the programmable chip and the external JTAG signal.

[0018] Furthermore, the switch matrix is ​​in a disconnected state by default, and at this time, the JTAG interface of the programmable chip is physically disconnected from the external JTAG cable.

[0019] Furthermore, the JTAG cable contains the following 6 signals: a switch enable signal and its return line, a TMS differential signal, a TCK differential signal, a TDO differential signal, a TDI differential signal, a power supply and its ground return line. These signals are connected using twisted pair cables. The switch enable signal and its return line are used to control the on / off state of the JTAG interface of the programmable chip and the JTAG interface circuit of the target circuit; TMS, TCK, TDO, TDI, power supply and ground return lines are JTAG related signals.

[0020] Furthermore, the JTAG signals TMS, TCK, TDI, and TDO of the JTAG interface circuit of the target circuit are all connected in parallel with pull-up resistors. When the switch matrix is ​​in the disconnected state, TMS, TCK, TDI, and TDO will be pulled up by the pull-up resistors and maintained at a fixed level.

[0021] Furthermore, the JTAG adapter board includes: an LVDS transceiver and a switch enable signal jumper. The JTAG adapter board LVDS transceiver includes 3 drivers and 1 receiver. The 3 drivers are used to convert the TMS, TCK, and TDO signals sent from the JTAG downloader into LVDS differential signals, and send them to the JTAG interface circuit of the target circuit through the JTAG cable; 1 receiver is used to convert the LVDS differential form of TDI received from the JTAG cable into a single-ended signal and send it to the JTAG downloader. The switch enable signal jumper is used to set the high and low level states of the switch enable signal.

[0022] Furthermore, when the switch enable signal jumper is short-circuited, the enable signal will be short-circuited to the ground, making it a low level. At this time, the switch matrix is ​​in a closed state, and the JTAG downloader can be connected to the JTAG interface circuit of the target circuit through the JTAG adapter board.

[0023] Furthermore, when the jumper is disconnected, the switch enable signal will be pulled up to a high level by the pull-up resistor, at which time the switch matrix is ​​in a disconnected state, and the JTAG interface circuit of the target circuit and the JTAG adapter board are in a disconnected state.

[0024] The present invention also provides a JTAG cable connection method for enhancing the anti-interference capability of the JTAG interface, characterized in that the JTAG cable connection component for enhancing the anti-interference capability of the JTAG interface adopts a single-ended-differential-single-ended signal conversion method, and the JTAG single-ended signal is first converted into an LVDS differential signal. The LVDS differential signal is transmitted using a twisted pair cable connection method and then converted into a JTAG single-ended signal at the receiving end, and a switch matrix is ​​introduced between the JTAG cable and the JTAG interface. When the JTAG interface is not needed for debugging, the JTAG interface of the programmable chip is physically isolated from the JTAG cable.

[0025] Furthermore, the LVDS differential signal adopts a standard LVDS level form or an M-LVDS level form.

[0026] The beneficial effect of the present invention is that, through the above measures, the present invention can not only effectively extend the communication distance of the JTAG interface, but also enhance the anti-interference capability of the JTAG interface. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a principle block diagram of a JTAG cable connection assembly in an embodiment of the present invention;

[0028] Figure 2 It is a principle block diagram of the JTAG interface circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The specific embodiments of the present invention are further described in detail below with reference to the accompanying drawings.

[0030] The JTAG interface in the present invention adopts a "single-ended-differential-single-ended" signal conversion method, first converting the JTAG single-ended signal into an LVDS differential signal (which can be in a standard LVDS level form or an M-LVDS level form), and the differential signal is transmitted using a twisted pair cable connection method, and then converted into a JTAG single-ended signal at the receiving end and connected to the JTAG interface of the programmable chip. The LVDS differential signal has a strong anti-interference ability, and the differential signal has a high degree of coupling, less leakage to the external magnetic field, and is not easy to interfere with surrounding signals.

[0031] At the same time, the present invention introduces a digital control switch matrix between the JTAG cable and the JTAG interface. When the JTAG interface is not needed for debugging, the JTAG interface of the programmable chip is physically isolated from the JTAG cable, thereby effectively reducing the impact of electromagnetic interference that may be introduced by the JTAG cable on the chip in a harsh electromagnetic environment.

[0032] Figure 1 FIG. 1 is a block diagram of the JTAG cable connection assembly in an embodiment of the present invention. Figure 1 As shown, the JTAG cable connection assembly of the present invention is mainly composed of the following parts: target circuit, JTAG adapter board, test cable, and JTAG downloader.

[0033] The JTAG connector can be used to connect a test cable.

[0034] The test cable is composed of a group of parallel cables, which are used to connect the target circuit with the test equipment and the JTAG adapter board. The test equipment is used to test the target circuit and is connected to the target circuit through the test cable. The test equipment shown in this principle block diagram is a device that uses other than JTAG signals and is not used for JTAG signals. In this case, the test cable includes both the remaining cables for connecting the test equipment and the JTAG cable for connecting the JTAG adapter board.

[0035] The target circuit includes a JTAG connector, a JTAG interface circuit and a programmable chip. The JTAG interface circuit is used to convert the JTAG single-ended signal from the programmable chip into an LVDS differential signal, and convert the LVDS differential signal from the test cable into a JTAG single-ended signal, and send it to the programmable chip; it also includes a digital control switch for disconnecting the physical connection between the test cable and the JTAG interface of the target circuit.

[0036] The JTAG adapter board is used to convert the LVDS differential signal from the JTAG interface circuit into a JTAG single-ended signal so as to connect to the JTAG downloader, and convert the JTAG single-ended signal from the JTAG downloader into a LVDS differential signal so as to be transmitted to the JTAG interface circuit.

[0037] The test equipment and the JTAG downloader may be the test equipment and the JTAG downloader commonly used in the art, and will not be discussed in detail within the scope of this specification.

[0038] Figure 2 FIG. 1 is a schematic diagram showing a JTAG interface circuit in an embodiment of the present invention. FIG. 1 is a schematic diagram showing a JTAG interface circuit in an embodiment of the present invention. Figure 2 shown. Figure 2 The connection relationship between the JTAG adapter board and the JTAG interface of the target circuit and the related circuit principles are specifically demonstrated.

[0039] The JTAG cable connects the target circuit and the JTAG adapter board, and the JTAG adapter board is connected to the JTAG adapter board. The JTAG interface circuit of the target circuit is connected to the JTAG adapter board via a JTAG cable. The JTAG cable contains the following 6 signals: switch enable signal and its return line, TMS differential signal, TCK differential signal, TDO differential signal, TDI differential signal, power supply and ground return line, and these signals are connected in a twisted pair manner. The switch enable signal and its return line are used to control the on / off state of the JTAG interface of the programmable chip and the JTAG interface circuit of the target circuit; TMS, TCK, TDO, TDI, power supply and ground return lines are JTAG related signals.

[0040] like Figure 2As shown, the JTAG interface circuit of the target circuit mainly includes the following parts: LVDS transceiver, switch matrix. The LVDS transceiver of the JTAG interface of the target circuit includes 3 receivers and 1 driver. The 3 receivers are used to receive TMS, TCK, TDO in LVDS differential form from the JTAG cable and convert them into single-ended signals connected to the switch matrix; the 1 driver converts the TDI through the switch matrix into LVDS differential signals and sends them to the JTAG adapter board through the JTAG cable.

[0041] The switch matrix is ​​used to control the on / off state of the JTAG interface of the programmable chip and the external JTAG signal. It provides a switch enable signal for controlling the on / off state of the switch matrix. The switch matrix is ​​in an off state by default. At this time, the JTAG interface of the programmable chip and the external JTAG cable are physically disconnected, thereby effectively reducing the impact of external electromagnetic interference on the JTAG interface.

[0042] Assuming that the switch matrix is ​​in a closed state when the level is low, Figure 2 The switch enable signal is pulled up to a high level through a pull-up resistor to put the switch matrix in a disconnected state. When the JTAG interface of the programmable chip needs to be connected to an external JTAG cable, the switch enable signal is pulled low through a jumper to connect the JTAG interface of the programmable chip to the external JTAG cable.

[0043] The JTAG signals TMS, TCK, TDI, and TDO of the JTAG interface circuit of the target circuit are all connected in parallel with pull-up resistors. When the switch matrix is ​​in the disconnected state, TMS, TCK, TDI, and TDO will be pulled up by the pull-up resistors and maintained at a fixed level, thereby preventing these signal lines from being in a suspended state, which may cause abnormal state of the programmable chip.

[0044] The JTAG adapter board mainly includes the following parts: LVDS transceiver, switch enable signal jumper. The JTAG adapter board LVDS transceiver includes 3 drivers and 1 receiver. The 3 drivers are used to convert the TMS, TCK, and TDO signals sent from the JTAG downloader into LVDS differential signals and send them to the JTAG interface circuit of the target circuit through the JTAG cable; 1 receiver is used to convert the LVDS differential TDI received from the JTAG cable into a single-ended signal and send it to the JTAG downloader.

[0045] The switch enable signal jumper is used to set the high and low level states of the switch enable signal. When the switch enable signal jumper is short-circuited, the enable signal will be short-circuited to the ground, so that it is at a low level. At this time, the switch matrix is ​​in a closed state, and the JTAG downloader can be connected to the JTAG interface circuit of the target circuit through the JTAG adapter board; when the jumper is disconnected, the switch enable signal will be pulled up to a high level by the pull-up resistor, and at this time, the switch matrix is ​​in a disconnected state, and the JTAG interface circuit of the target circuit and the JTAG adapter board are disconnected.

[0046] Those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. If these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A JTAG cable connection assembly for enhancing the anti-interference capability of a JTAG interface, characterized in that: It includes a target circuit, a JTAG cable, a JTAG adapter board, and a JTAG downloader. The JTAG cable connects the target circuit and the JTAG adapter board, and the JTAG adapter board is connected to the JTAG adapter board. The JTAG adapter board is used to convert the LVDS differential signal from the JTAG interface circuit into a JTAG single-ended signal so as to connect to the JTAG downloader, and convert the JTAG single-ended signal from the JTAG downloader into an LVDS differential signal so as to be transmitted to the JTAG interface circuit. The target circuit includes a JTAG connector, a JTAG interface circuit and a programmable chip, wherein the JTAG connector is used to connect the JTAG cable, and the JTAG interface circuit is connected to the JTAG adapter board via the JTAG cable. The JTAG interface circuit is used to convert the JTAG single-ended signal from the programmable chip into an LVDS differential signal, and convert the LVDS differential signal from the test cable into a JTAG single-ended signal, and send it to the programmable chip; it also includes a digitally controlled switch for disconnecting the physical connection between the JTAG cable and the JTAG interface of the programmable chip.

2. The JTAG cable connection assembly for enhancing the anti-interference capability of the JTAG interface according to claim 1, characterized in that: The JTAG interface circuit includes an LVDS transceiver and a switch matrix. The LVDS transceiver includes three receivers and one driver. The three receivers are used to receive TMS, TCK, and TDO in LVDS differential form from the JTAG cable and convert them into single-ended signals to connect to the switch matrix. A driver converts TDI into LVDS differential signal and sends it to the JTAG adapter board through a JTAG cable. The switch matrix is ​​used to control the on and off of the JTAG interface of the programmable chip and the external JTAG signal.

3. The JTAG cable connection assembly for enhancing the anti-interference capability of the JTAG interface according to claim 1, characterized in that: The switch matrix is ​​in a disconnected state by default, and at this time, the JTAG interface of the programmable chip is physically disconnected from the external JTAG cable.

4. The JTAG cable connection assembly for enhancing the anti-interference capability of the JTAG interface according to claim 1, characterized in that: The JTAG cable contains the following six signals: a switch enable signal and its return line, a TMS differential signal, a TCK differential signal, a TDO differential signal, a TDI differential signal, a power supply and its ground return line. These signals are connected using twisted pair cables. The switch enable signal and its return line are used to control the on / off state of the JTAG interface of the programmable chip and the JTAG interface circuit of the target circuit; TMS, TCK, TDO, TDI, power supply and ground return lines are JTAG related signals.

5. The JTAG cable connection assembly for enhancing the anti-interference capability of the JTAG interface according to claim 1, characterized in that: The JTAG signals TMS, TCK, TDI, and TDO of the JTAG interface circuit of the target circuit are all connected in parallel with pull-up resistors. When the switch matrix is ​​in the disconnected state, TMS, TCK, TDI, and TDO will be pulled up by the pull-up resistors and maintain a fixed level.

6. The JTAG cable connection assembly for enhancing the anti-interference capability of the JTAG interface according to claim 2, characterized in that: The JTAG adapter board includes: an LVDS transceiver and a switch enable signal jumper. The JTAG adapter board LVDS transceiver includes 3 drivers and 1 receiver. The 3 drivers are used to convert the TMS, TCK, and TDO signals sent from the JTAG downloader into LVDS differential signals, and send them to the JTAG interface circuit of the target circuit through the JTAG cable; 1 receiver is used to convert the LVDS differential form TDI received from the JTAG cable into a single-ended signal and send it to the JTAG downloader. The switch enable signal jumper is used to set the high and low level states of the switch enable signal.

7. The JTAG cable connection assembly for enhancing the anti-interference capability of the JTAG interface according to claim 6, characterized in that: When the switch enable signal jumper is short-circuited, the enable signal will be short-circuited to the ground, making it a low level. At this time, the switch matrix is ​​in a closed state, and the JTAG downloader can be connected to the JTAG interface circuit of the target circuit through the JTAG adapter board.

8. The JTAG cable connection assembly for enhancing the anti-interference capability of the JTAG interface according to claim 7, characterized in that: When the jumper is disconnected, the switch enable signal will be pulled up to a high level by the pull-up resistor, at which time the switch matrix is ​​in a disconnected state, and the JTAG interface circuit of the target circuit and the JTAG adapter board are in a disconnected state.

9. A JTAG cable connection method for enhancing the anti-interference capability of a JTAG interface, characterized in that: The JTAG cable connection component for enhancing the anti-interference capability of the JTAG interface according to any one of claims 1 to 8 is used, and a single-ended-differential-single-ended signal conversion method is adopted to convert the JTAG single-ended signal into an LVDS differential signal first, and the LVDS differential signal is transmitted using a twisted pair cable connection method and then converted into a JTAG single-ended signal at the receiving end, and a switch matrix is ​​introduced between the JTAG cable and the JTAG interface. When the JTAG interface is not needed for debugging, the JTAG interface of the programmable chip is physically isolated from the JTAG cable.

10. The JTAG cable connection method for enhancing the anti-interference capability of the JTAG interface according to claim 9, characterized in that: The LVDS differential signal adopts a standard LVDS level form or an M-LVDS level form.

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