Method for improving roughness of side wall of groove
By etching the side walls of the trench using plasma atom selective etching method in the Bosch process, the roughness problem caused by side wall corrugation in the Bosch process is solved, and higher side wall smoothness and semiconductor device performance are achieved.
Patent Information
- Application Number
- CN202311150464.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-07
- Publication Date
- 2025-03-07
AI Technical Summary
The Bosch process produces a corrugated effect when etching the side walls, resulting in roughening of the trench side walls, limiting its application in electrically complex devices.
The side wall of the trench is etched by plasma atomic selective etching method to improve its roughness. The method includes forming trenches in the substrate and removing sidewall corrugations by plasma atomic selective etching technology to improve the smoothness of the sidewalls.
By improving the roughness of the trench side wall, the occurrence of adverse phenomena such as tip discharge is avoided, the performance of semiconductor devices is improved, and the application range of Bosch etching process is expanded.
Smart Images
Figure CN119581323A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor integrated circuits, and in particular to a method for improving the roughness of a groove sidewall. Background Art
[0002] Bosch process refers to a process in which a thin film of etching film is deposited on the lateral sidewall of the etching in order to prevent or reduce lateral etching in integrated circuit manufacturing. It is called Bosch process because it was first proposed by Robert Bosch. Bosch process is quite common in MEMS devices and usually focuses on manufacturing trenches with high aspect ratio. Bosch process achieves etching and sidewall passivation by alternating etching gas and passivation gas.
[0003] In the Bosch process, due to the mutual conversion between etching and passivation, each etching step is isotropic, which causes the scalping effect on the etched sidewall surface. Because the scalping on the sidewall will cause tip discharge, the scalping effect restricts the application of the Bosch process and makes it impossible to apply it to devices with complex electrical properties.
[0004] There are two main methods to optimize the Bosch process at this stage. The first method is to reduce the ripple effect by shortening the etching and passivation cycles, which can make the ripples on the sidewall surface of a 70μm deep groove less than 20nm. This deep etched sidewall is sufficient to serve as a light reflector for optical fiber communication switch conversion. However, if the etching cycle time is too long and the passivation cycle time is too short, the via will not be straight and the sidewall will be rough. On the other hand, if the passivation cycle time is too long, it will slow down the etching rate and throughput, reducing WPH (wafer per hour).
[0005] The second method is to reduce the sidewall ripple roughness by chemical wet polishing after etching, such as placing the etched sample in a KOH (potassium hydroxide) + IPA (isopropyl alcohol) mixed etching solution for a short time to etch the surface ripples smooth. However, it is difficult to adjust and regenerate the concentration of the KOH + IPA mixed etching solution, and the wet etching time is difficult to control, which will cause excessive loss of silicon. Summary of the invention
[0006] The object of the present invention is to provide a method for improving the roughness of a groove sidewall, which is used to improve the roughness of the groove sidewall and avoid tip discharge.
[0007] In order to solve the above technical problems, the present invention provides a method for improving the roughness of the groove sidewall, comprising the following steps:
[0008] providing a substrate, and forming a trench in the substrate;
[0009] The trench is etched by using a plasma atom selective etching method to improve the roughness of the trench sidewall.
[0010] Optionally, the groove is formed in the substrate by using a Bosch etching process, and the sidewall of the groove has corrugations.
[0011] Optionally, the Bosch etching process forms the groove by alternating isotropic etching and passivation layer deposition, and the etching gas used in the isotropic etching is the same as the etching gas used in the plasma atom selective etching.
[0012] Optionally, the etching gas used in the isotropic etching includes CF4 or SF6, the flow rate of the etching gas is 20sccm~150sccm, the temperature of the reaction chamber is 10℃~30℃, the RF power is 500W~700W, and the reaction time is 2S~6S; the passivation gas used in the passivation layer deposition includes C4F8, the flow rate of the passivation gas is 70sccm~100sccm, the temperature of the reaction chamber is 10℃~30℃, the RF power is 500W~700W, and the reaction time is 4S~8S.
[0013] Optionally, the etching gas used in the plasma atomic selective etching method includes a nitrogen-containing and fluorine-containing gas or a carbon-containing and fluorine-containing gas.
[0014] Optionally, the nitrogen-containing and fluorine-containing gas includes NF3, and the carbon-containing and fluorine-containing gas includes CF4, C2F6 or C3F8.
[0015] Optionally, when the etching gas is the carbon-containing and fluorine-containing gas, oxygen is introduced into the reaction chamber to promote the formation of fluorine free radicals and fluorine plasma.
[0016] Optionally, the flow rate of the etching gas used in the plasma atomic selective etching method is 20sccm~200sccm, the flow rate of the oxygen is 0sccm~30sccm, and an inert gas is also introduced into the reaction chamber, and the flow rate of the inert gas is 0slm~3slm; the temperature in the reaction chamber is 400℃~1000℃, the RF power is 300W~1000W, and the reaction time is 60s~600s.
[0017] Optionally, a bias power is provided to the reaction chamber to enable fluorine radicals and fluorine plasma to enter the trench from the reaction chamber.
[0018] Optionally, the ionization process of the etching gas includes using an inductively coupled plasma source, a furnace tube with a remote plasma source system, or a chemical vapor deposition remote plasma source system; or / and heating the reaction chamber by means of bulb heating, heater heating, or thermal resistance wire heating.
[0019] In summary, in the method for improving the roughness of the groove sidewall provided by the present invention, a substrate is first provided, and a groove is formed in the substrate; then the groove is etched by a plasma atom selective etching method to improve the roughness of the groove sidewall. The present invention improves the roughness of the groove sidewall by a plasma atom selective etching method, thereby avoiding the occurrence of undesirable phenomena such as tip discharge caused by excessive surface roughness of the groove sidewall, and improving the performance of the semiconductor device formed subsequently.
[0020] Furthermore, the groove is formed in the substrate by using a Bosch etching process, and the sidewall of the groove has corrugations. The plasma atomic selective etching method can remove the corrugations, improve the roughness of the sidewall of the groove, eliminate the tip discharge caused by the corrugations formed by the Bosch etching process, and improve the application range of the Bosch etching process.
[0021] Furthermore, the etching gas used in plasma atomic selective etching is the same as the etching gas used in isotropic etching in the Bosch etching process, making it easier to select raw materials. In addition, the inductively coupled plasma used in the Bosch etching process has a higher temperature and a larger free radical density. Under the premise that the equipment allows, the temperature and gas flow rate can be directly increased based on the Bosch etching process to complete plasma atomic selective etching, thereby saving process time. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.
[0023] Figure 1 It is a flow chart of a method for improving the roughness of a trench sidewall provided by an embodiment of the present invention.
[0024] Figures 2 to 9 It is a schematic structural diagram of each step of a method for improving the roughness of a groove sidewall provided by an embodiment of the present invention.
[0025] Fig.10 It is a schematic diagram of the arrangement of silicon atoms in a substrate provided by one embodiment of the present invention.
[0026] Figures 11a to 11f This is a microscopic morphology of the groove sidewall surface at different etching times provided by an embodiment of the present invention.
[0027] Description of reference numerals:
[0028] 100 - substrate; 110 - patterned mask layer; 120 - trench; 121 - first trench; 122 - second trench; 130 - passivation layer. DETAILED DESCRIPTION
[0029] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.
[0030] As used in the present invention, the singular forms "one", "an", and "the" include plural objects, unless the content clearly indicates otherwise. As used in the present invention, the term "or" is generally used in a sense that includes "and / or", unless the content clearly indicates otherwise. As used in the present invention, the term "several" is generally used in a sense that includes "at least one", unless the content clearly indicates otherwise. As used in the present invention, the term "at least two" is generally used in a sense that includes "two or more", unless the content clearly indicates otherwise. In addition, the terms "first", "second", and "third" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features.
[0031] Figure 1 is a flow chart of a method for improving the roughness of the groove sidewall provided by an embodiment of the present invention. Figure 1 As shown, the method for improving the roughness of the groove sidewall provided in this embodiment includes the following steps:
[0032] Step S1: providing a substrate, and forming a groove in the substrate;
[0033] Step S2: etching the trench using a plasma atom selective etching method to improve the roughness of the trench sidewall.
[0034] Figures 2 to 9 FIG. 1 is a schematic diagram of the structure of each step of a method for improving the roughness of a groove sidewall provided by an embodiment of the present invention. Figure 1 and Figures 2 to 9 The method for improving the roughness of the trench sidewall provided by the embodiment of the present invention is described in detail.
[0035] In step S1, refer to Figures 2 to 6 As shown, a substrate 100 is provided, and a trench 120 is formed in the substrate 100 .
[0036] In this embodiment, the Bosch etching process is used to form a groove as an example for explanation. Figure 2 As shown, a substrate 100 is provided. The material of the substrate 100 may be silicon, germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, etc., or may be silicon on insulator, germanium on insulator; or may be other materials, such as III-V compounds such as gallium arsenide. In this embodiment, the material of the substrate 100 is silicon. A patterned mask layer 110 is formed on the substrate 100, and the patterned mask layer 110 exposes a portion of the substrate 100. Specifically, a mask layer is formed on the substrate 100, the mask layer covers the substrate 100, and then a patterned photoresist layer is formed on the mask layer, and the mask layer is etched using the patterned photoresist layer as a mask until the substrate 100 is exposed, and then the patterned photoresist layer is removed to form the patterned mask layer 110. Of course, the patterned mask layer 110 may also be a patterned photoresist layer.
[0037] The substrate 100 is first isotropically etched using the patterned mask layer 110 as a mask to form a first groove 121. The etching gas may be, for example, CF4 or SF6. Exemplarily, the flow rate of the etching gas is 20 sccm to 150 sccm, the temperature of the reaction chamber is 10° C. to 30° C., the RF power is 500 W to 700 W, and the reaction time is 2S to 6S, but is not limited thereto.
[0038] Then, please refer to Figure 3 As shown, a passivation layer 130 is formed on the surface of the first groove 121. The passivation gas used to form the passivation layer 130 may be, for example, C4F8. For example, the flow rate of the passivation gas is 70sccm to 100sccm, the temperature of the reaction chamber is 10°C to 30°C, the RF power is 500W to 700W, and the reaction time is 4S to 8S, but is not limited thereto. Next, please refer to Figure 4 As shown, the passivation layer 130 at the bottom of the first trench 121 is removed to expose the substrate 100 at the bottom of the first trench 121 .
[0039] Then, please refer to Figure 5 As shown, the patterned mask layer 110 is used as a mask to perform a second isotropic etching on the substrate 100 exposed at the bottom of the first trench 121 to form a second trench 122 .
[0040] The above steps can be repeated to form a passivation layer by alternating isotropic etching and passivation layer deposition. Figure 6 Grooves 120 are shown.
[0041] The Bosch etching process can be used to form some grooves with a high aspect ratio. However, since isotropic etching is used, the sidewall surface of the groove 120 has ripples, and the ripples will cause tip discharge, thereby limiting the application of the Bosch etching process and making it impossible to use it in devices with complex electrical properties.
[0042] It is understandable that the groove 120 is not limited to the groove formed by the Bosch etching process, and can be the groove formed by any method. As long as the sidewall of the groove is relatively rough and needs to be smoothed, step S2 can be continued.
[0043] In step S2, please refer to Figures 7 to 9 As shown, the trench 120 is etched by a plasma atom selective etching method to improve the roughness of the sidewall of the trench 120 .
[0044] The Arrhenius equation can be used to describe the relationship between reaction rate, activation energy and temperature. The common form of the equation is as follows: k = Ae -Ea / RT , where k is the rate constant, T is the absolute temperature, A is the prefactor, Ea is the activation energy of the reaction, and R is the universal gas constant. According to the Arrhenius equation, the plasma etching rate is determined by two factors: activation energy and temperature.
[0045] Fig.10 Schematic diagram of the arrangement of silicon atoms in a substrate provided by an embodiment of the present invention. Fig.10 As shown in FIG. 1 , there are three types of silicon atoms with different numbers of dangling bonds ranging from 1 to 3 on the rough silicon surface, such as silicon atom A with 3 dangling bonds, silicon atom B with 2 dangling bonds, and silicon atom C with 1 dangling bond. Once the silicon surface is exposed to fluorine-containing plasma, the silicon atoms (Si) with dangling bonds react with fluorine (F) to form Si-F with x ranging from 1 to 3. x Structure, when SiF4 molecules are formed, they will dissociate from the substrate and the silicon atoms will be removed. Since the surface silicon atoms have different numbers of dangling bonds, the efficiency of forming SiF4 molecules is different. For example, the dissociation of silicon atom A only needs to break one Si-Si bond, and the activation energy is 0.11eV. The activation energies of silicon atoms B and C are 0.34eV and 0.62eV respectively. Therefore, silicon atoms with 3 dangling bonds have the highest etching priority, followed by silicon atoms with 2 dangling bonds, and then silicon atoms with 1 dangling bond.
[0046] In the plasma-based atom-selective etching (PASE) process, once silicon atoms with higher etching priority are removed, sub-layer silicon atoms will be exposed, and the surface bonding state of silicon atoms will change continuously. Through the selective etching of silicon atoms with different dangling bonds, all silicon atoms will eventually have the same bonding state, that is, the rough surface is modified into a smooth surface.
[0047] In PASE, the plasma has a high density of etching groups (which can effectively etch silicon atoms) and a high etching temperature (which increases the degree of selective etching), so it can effectively modify the rough silicon surface to atomic-level roughness. Figure 7 As shown, fluorine plasma is introduced into the trench 120, and silicon atoms (tips) with higher etching priority are removed first. Figure 8 As shown, the SiF4 generated by the reaction is removed from the groove 120, and finally a Fig. 9 In the structure shown, the sidewall surface of the groove 120 becomes smooth.
[0048] The present invention improves the roughness of the sidewall of the groove 120 by a plasma atom selective etching method, thereby avoiding the occurrence of undesirable phenomena such as tip discharge caused by excessive surface roughness of the sidewall of the groove 120, and improving the performance of the subsequently formed semiconductor device.
[0049] If the Bosch etching process is used to form the groove 120 in the substrate, the sidewall of the groove 120 has corrugations, and the plasma atom selective etching method can remove the corrugations, improve the roughness of the sidewall of the groove 120, eliminate the tip discharge caused by the corrugations formed by the Bosch etching process, and improve the application range of the Bosch etching process. The Bosch etching process is not limited to MEMS devices, but can also be used for high-power devices.
[0050] The etching gas used in plasma atomic selective etching can be the same as the etching gas used in isotropic etching in the Bosch etching process, making it easier to select raw materials. In addition, the inductively coupled plasma used in the Bosch etching process has a higher temperature and a larger free radical density. If the equipment allows, the temperature and gas flow rate can be directly increased based on the Bosch etching process to complete plasma atomic selective etching, thereby saving process time.
[0051] In this embodiment, the etching gas used in the plasma atomic selective etching method includes a nitrogen-containing and fluorine-containing gas or a carbon-containing and fluorine-containing gas. The nitrogen-containing and fluorine-containing gas includes but is not limited to NF3, and the carbon-containing and fluorine-containing gas includes but is not limited to CF4, C2F6 or C3F8. When the etching gas is the carbon-containing and fluorine-containing gas, oxygen is introduced into the reaction chamber to promote the formation of fluorine free radicals and fluorine plasma.
[0052] The ionization process of the etching gas includes using an inductively coupled plasma source, a furnace tube with an RPS (Remote Plasma Source) system, or a CVD (Chemical Vapor Deposition) RPS system. In addition, the reaction chamber can be heated by bulb heating, heater heating, or heat resistance wire heating. After completing the Bosch etching process, as the plasma temperature increases, the etching of silicon changes from a directional etching mode to an atom selective etching mode.
[0053] Exemplarily, the flow rate of the etching gas is 20 sccm to 200 sccm, for example, the flow rate of CF4 is preferably 30 sccm. The flow rate of the oxygen is 0 sccm to 30 sccm, preferably 15 sccm. At the same time, an inert gas is also introduced into the reaction chamber, and the inert gas includes but is not limited to argon. The flow rate of the inert gas is 0 slm to 3 slm, preferably 1.5 slm. The temperature in the reaction chamber is 400°C to 1000°C, the RF power is 300W to 1000W, and the reaction time is 60s to 600s.
[0054] When the aspect ratio of the groove 120 is relatively large, the following two methods can usually be used to ensure that the plasma and free radicals smoothly enter the groove 120 and the products are smoothly removed from the groove 120. The first method is to increase the pressure of the reaction chamber. Generally, the greater the pressure, the smaller the molecular free path, and the smaller the pressure, the larger the molecular free path. By controlling the pressure of the process to adjust the molecular free path, plasma and free radicals are helped to diffuse into the groove with a high aspect ratio within a certain period of time. For example, the flow rate of the etching gas or the flow rate of the inert gas can be increased. The flow rate of the etching gas and the flow rate of the inert gas refer to the above examples, but are not limited thereto, and can be adjusted according to actual needs.
[0055] The second method is to set a bias power to provide bias power to the reaction chamber, so that plasma and free radicals can enter the groove from the reaction chamber through the bias power. The specific bias power can be determined according to actual needs.
[0056] The etching gas is introduced into the reaction chamber through a shower head, and the uniformity of the etching gas on the surface of the substrate 100 is controlled by the shower head.
[0057] Figures 11a to 11f The microscopic morphology of the groove sidewall surface under different etching times provided by an embodiment of the present invention is shown in FIG. The crack deformation process during the plasma atomic selective etching process is measured using a SEM (scanning electron microscope). Fig.11a is the initial state. Fig.11b The etching time is 10s, and many exposed cracks can be seen. Fig.11c When the etching time is 20s, the crack is reduced. Fig.11d After etching for 30 s, only a few cracks remain. Fig.11e The etching time is 60s, and very slight cracks remain. Fig.11f The etching time is 120s, and the surface has become smooth. Figures 11a to 11f It can be seen that the cracks on the substrate surface are continuously reduced and finally become smooth.
[0058] In summary, in the method for improving the roughness of the groove sidewall provided by the present invention, a substrate is first provided, and a groove is formed in the substrate; then the groove is etched by a plasma atom selective etching method to improve the roughness of the groove sidewall. The present invention improves the roughness of the groove sidewall by a plasma atom selective etching method, thereby avoiding the occurrence of undesirable phenomena such as tip discharge caused by excessive surface roughness of the groove sidewall, and improving the performance of the semiconductor device formed subsequently.
[0059] Furthermore, the groove is formed in the substrate by using a Bosch etching process, and the sidewall of the groove has corrugations. The plasma atomic selective etching method can remove the corrugations, improve the roughness of the sidewall of the groove, eliminate the tip discharge caused by the corrugations formed by the Bosch etching process, and improve the application range of the Bosch etching process.
[0060] Furthermore, the etching gas used in plasma atomic selective etching is the same as the etching gas used in isotropic etching in the Bosch etching process, making it easier to select raw materials. In addition, the inductively coupled plasma used in the Bosch etching process has a higher temperature and a larger free radical density. Under the premise that the equipment allows, the temperature and gas flow rate can be directly increased based on the Bosch etching process to complete plasma atomic selective etching, thereby saving process time.
[0061] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. A method for improving the roughness of a groove sidewall, characterized in that: The following steps are involved: providing a substrate, and forming a trench in the substrate; The trench is etched by using a plasma atom selective etching method to improve the roughness of the trench sidewall.
2. The method for improving the roughness of the groove sidewall according to claim 1, characterized in that: The groove is formed in the substrate by using a Bosch etching process, and the sidewall of the groove has corrugations.
3. The method for improving the roughness of the groove sidewall according to claim 2, characterized in that: The Bosch etching process forms the groove by alternating isotropic etching and passivation layer deposition, and the etching gas used in the isotropic etching is the same as the etching gas used in the plasma atom selective etching.
4. The method for improving the roughness of the groove sidewall according to claim 3, characterized in that: The etching gas used in the isotropic etching includes CF4 or SF6, the flow rate of the etching gas is 20sccm~150sccm, the temperature of the reaction chamber is 10℃~30℃, the RF power is 500W~700W, and the reaction time is 2S~6S; the passivation gas used in the passivation layer deposition includes C4F8, the flow rate of the passivation gas is 70sccm~100sccm, the temperature of the reaction chamber is 10℃~30℃, the RF power is 500W~700W, and the reaction time is 4S~8S.
5. The method for improving the roughness of the groove sidewall according to claim 1, characterized in that: The etching gas used in the plasma atom selective etching method includes a nitrogen-containing and fluorine-containing gas or a carbon-containing and fluorine-containing gas.
6. The method for improving the roughness of the groove sidewall according to claim 5, characterized in that: The nitrogen-containing and fluorine-containing gas includes NF3, and the carbon-containing and fluorine-containing gas includes CF4, C2F6 or C3F8.
7. The method for improving the roughness of the groove sidewall according to claim 6, characterized in that: When the etching gas is the carbon-containing and fluorine-containing gas, oxygen is introduced into the reaction chamber to promote the formation of fluorine free radicals and fluorine plasma.
8. The method for improving the roughness of the groove sidewall according to claim 7, characterized in that: The flow rate of the etching gas used in the plasma atomic selective etching method is 20sccm~200sccm, the flow rate of the oxygen is 0sccm~30sccm, and an inert gas is also introduced into the reaction chamber, and the flow rate of the inert gas is 0slm~3slm; the temperature in the reaction chamber is 400℃~1000℃, the RF power is 300W~1000W, and the reaction time is 60s~600s.
9. The method for improving the roughness of the groove sidewall according to claim 8, characterized in that: A bias power is provided to the reaction chamber to force fluorine radicals and fluorine plasma from the reaction chamber into the trench.
10. The method for improving the roughness of the trench sidewall according to claim 9, characterized in that: The ionization process of the etching gas includes using an inductively coupled plasma source, a furnace tube with a remote plasma source system or a chemical vapor deposition remote plasma source system; or / and heating the reaction chamber by bulb heating, heater heating or thermal resistance wire heating.