Packaging method for realizing heat dissipation

Abstract

A packaging method for achieving heat dissipation comprises the steps that a packaging carrier is provided, and the packaging carrier comprises a plurality of chip assembling areas; providing a plurality of chips, wherein each chip comprises a front surface and a back surface which are arranged oppositely; a heat dissipation frame is provided, the heat dissipation frame comprises a plurality of unit areas, and the unit areas are provided with heat dissipation fins; the back faces of the chips are attached to the cooling fins of the corresponding unit areas; and after the back surfaces of the plurality of chips are mounted on the radiating fins of the corresponding unit areas, enabling the radiating frame to be back to the packaging carrier, and welding the front surfaces of the plurality of chips on the corresponding chip assembly areas in the packaging carrier. According to the embodiment of the invention, the chip welding efficiency is improved; moreover, the welding points between the chip and the packaging carrier are prevented from being damaged in the process of fixedly connecting the chip and the cooling fins, so that the probability that the welding points between the chip and the packaging carrier are damaged by external force is reduced, and the packaging reliability is improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a packaging method for achieving heat dissipation. Background Art

[0002] In recent years, the semiconductor integrated circuit (IC) industry has developed rapidly. Driven by Moore's Law, semiconductor technology continues to move towards smaller process nodes, making integrated circuits develop in the direction of smaller size, higher circuit precision and higher circuit complexity.

[0003] With the rapid development of the semiconductor industry, integrated circuit packaging products have also been increasing the integration density of various semiconductor devices by continuously reducing the minimum feature size. At present, with the rapid increase in integration and power consumption, overheating has become the primary factor affecting the performance of semiconductor devices. In order to enable semiconductor devices to obtain good heat dissipation performance, heat sinks are often set on the chip.

[0004] However, the performance of the packaging structure still needs to be improved. Summary of the invention

[0005] The problem solved by the embodiments of the present invention is to provide a packaging method for achieving heat dissipation to improve packaging efficiency.

[0006] To solve the above problems, an embodiment of the present invention further provides a packaging method for achieving heat dissipation, comprising: providing a packaging carrier, the packaging carrier comprising a plurality of chip mounting areas; providing a plurality of chips, the chips comprising a front side and a back side arranged back to back; providing a heat dissipation frame, the heat dissipation frame comprising a plurality of unit areas, the unit areas having heat sinks; mounting the back sides of the chips on the heat sinks of the corresponding unit areas; after mounting the back sides of the plurality of chips on the heat sinks of the corresponding unit areas, the heat dissipation frame is turned away from the packaging carrier, and the front sides of the plurality of chips are soldered to the corresponding chip mounting areas in the packaging carrier.

[0007] Optionally, after welding the front sides of the plurality of chips to corresponding chip assembly areas in the packaging carrier, the packaging method further comprises: cutting the packaging carrier to separate the chip assembly areas from each other to form a plurality of packaging units that achieve electrical isolation; and cutting the heat dissipation frame to separate the heat sinks from each other.

[0008] Optionally, after the packaging carrier is cut, the heat dissipation frame is cut; after the packaging carrier is cut and before the heat dissipation frame is cut, the packaging method further includes: performing a strip test on a plurality of the packaging units.

[0009] Optionally, before cutting the packaging carrier and the heat dissipation frame, the packaging method also includes: forming a plastic packaging layer on the packaging carrier to encapsulate the chip, the plastic packaging layer also covering the side walls of the heat sink and exposing the surface of the heat sink facing away from the chip; the packaging method also includes: cutting the plastic packaging layer along the cutting position of the packaging carrier or the cutting position of the heat dissipation frame to separate the packaging units from each other.

[0010] Optionally, the heat dissipation frame also includes a cutting groove located between adjacent unit areas, the cutting groove is located in the heat dissipation surface of the heat dissipation frame, and the heat dissipation surface is the surface facing away from the heat dissipation frame for mounting the chip; in the step of forming a plastic sealing layer for encapsulating the chip on the packaging carrier, the plastic sealing layer also covers the heat dissipation frame at the bottom of the cutting groove; the step of cutting the heat dissipation frame and the plastic sealing layer includes: cutting the plastic sealing layer and the heat dissipation frame along the position of the cutting groove.

[0011] Optionally, in the step of providing the heat dissipation frame, the thickness of the heat dissipation frame at the position of the cutting groove is smaller than the thickness of the heat sink.

[0012] Optionally, the thickness of the heat dissipation frame at the position of the cutting groove is 40% to 60% of the thickness of the heat sink.

[0013] Optionally, in the step of cutting the plastic packaging layer and the heat dissipation frame along the cutting groove, the width of the cutting area is smaller than the width of the cutting groove.

[0014] Optionally, the step of forming a plastic layer on the packaging carrier to encapsulate the chip includes: forming a plastic material on the packaging carrier to encapsulate the chip and the heat dissipation frame; and flattening the plastic material to expose the surface of the heat sink facing away from the chip.

[0015] Optionally, in the step of cutting the packaging carrier, a partial thickness of the plastic encapsulation layer is also cut.

[0016] Optionally, in the step of cutting a portion of the thickness of the plastic encapsulation layer, the thickness of the cut portion of the plastic encapsulation layer accounts for 10% to 30% of the total thickness of the plastic encapsulation layer.

[0017] Optionally, during the process of cutting the heat dissipation frame, a coolant is used to cool the heat dissipation frame.

[0018] Optionally, in the step of providing the heat dissipation frame, the outline of the heat sink is larger than the outline of the chip; in the step of mounting the back side of the chip on the heat sink of the corresponding unit area, the chip is located within the outline of the heat sink, and there is a gap between the outline of the chip and the outline of the heat sink.

[0019] Optionally, the interval ranges from 0.1 mm to 0.3 mm.

[0020] Optionally, in the step of providing the packaging carrier, the packaging carrier also includes a first positioning component; in the step of providing the heat dissipation frame, the heat dissipation frame also includes a second positioning component; in the step of soldering the front sides of the plurality of chips to the corresponding chip assembly areas in the packaging carrier, the second positioning component is aligned with the first positioning component.

[0021] Optionally, the first positioning component and the second positioning component both include positioning holes.

[0022] Optionally, the heat sink has a thickness of 0.1 mm to 0.5 mm.

[0023] Optionally, the material of the heat sink includes copper, aluminum and ceramic.

[0024] Optionally, the process of welding the front side of the chip to the corresponding chip mounting area in the package carrier includes a flip chip welding process.

[0025] Optionally, in the step of providing a packaging carrier, the packaging carrier includes a lead frame, a substrate and a transfer board; wherein, when the packaging carrier is a lead frame, the lead frame includes a frame unit located in the chip assembly area, and the frame unit includes a plurality of pins; in the step of welding the front side of the chip to the corresponding chip assembly area in the packaging carrier, the chip is welded to the pins of the frame unit and is electrically connected to the pins.

[0026] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0027] In the packaging method for achieving heat dissipation provided by an embodiment of the present invention, a heat dissipation frame is provided, and after the back side of the chip is mounted on the heat sink of the corresponding unit area, the heat dissipation frame is turned away from the packaging carrier, and the front sides of the plurality of chips are welded to the corresponding chip assembly areas in the packaging carrier, thereby improving the efficiency of chip welding; and, since the back side of the chip is first mounted on the heat sink of the heat dissipation frame and then the chip is welded to the packaging carrier, damage to the welding point between the chip and the packaging carrier is avoided during the process of fixing the chip and the heat sink, thereby reducing the probability of the welding point between the chip and the packaging carrier being damaged by external force, which is beneficial to improving the packaging reliability.

[0028] Optionally, after the packaging carrier is cut, the strip test is first performed on the plurality of packaging units, and then the heat dissipation frame is cut. Performing strip tests on the plurality of packaging units is conducive to improving the test efficiency; moreover, since the heat dissipation frame has not been cut when the packaging units are strip tested, the connected heat sinks can play a role in supporting the packaging carrier during the strip test, so that the connection strength between the various packaging structures can be guaranteed while the packaging units are strip tested, thereby ensuring the test quality of each packaging structure.

[0029] Optionally, before cutting the packaging carrier and the heat dissipation frame, a plastic encapsulation layer that encapsulates the chip is formed on the packaging carrier, and the plastic encapsulation layer can protect the chip, thereby helping to reduce the probability of the chip being damaged by cutting during the process of cutting the packaging carrier or the heat dissipation frame; and, after cutting the packaging carrier and before cutting the heat dissipation frame, in the case of performing strip testing on multiple packaging units, in the process of cutting the heat dissipation frame, cutting off the plastic encapsulation layer between adjacent unit areas is also beneficial to further ensure the connection strength of the packaging structure during the strip test, thereby helping to further ensure the test quality of each packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a flow chart of a packaging method for achieving heat dissipation;

[0031] Figure 2 is a flow chart of an embodiment of a packaging method for achieving heat dissipation according to the present invention;

[0032] Figures 3 to 11 It is a schematic structural diagram corresponding to each step in an embodiment of a packaging method for achieving heat dissipation of the present invention. DETAILED DESCRIPTION

[0033] At present, the performance of semiconductor structures still needs to be improved. Now, combined with a packaging method, the reasons why the performance of semiconductor structures needs to be improved are analyzed.

[0034] refer to Figure 1 , Figure 1 It is a flow chart of a packaging method.

[0035] Execute step s1: provide a package carrier, wherein the package carrier comprises a plurality of chip mounting areas.

[0036] Execute step s2: provide a plurality of heat sinks.

[0037] Execute step s3: provide a plurality of chips, wherein the chips include a front side and a back side arranged opposite to each other.

[0038] Execute step s4: solder the front sides of the plurality of chips to the corresponding chip mounting areas in the packaging carrier.

[0039] Execute step s5: after welding the front sides of the plurality of chips to the corresponding chip mounting areas in the packaging carrier, attach the plurality of heat sinks to the back sides of the corresponding chips.

[0040] It has been found that during the process of attaching the heat sink to the back of the chip, the welding point between the chip and the chip mounting area is easily damaged by external force, resulting in poor welding effect between the chip and the chip mounting area, and further poor performance of the packaging structure. Moreover, the process efficiency of attaching multiple heat sinks to the back of the corresponding chips still needs to be improved.

[0041] In order to solve the above technical problems, an embodiment of the present invention provides a packaging method for achieving heat dissipation, comprising: providing a packaging carrier, the packaging carrier comprising a plurality of chip mounting areas; providing a plurality of chips, the chips comprising a front side and a back side arranged back to back; providing a heat dissipation frame, the heat dissipation frame comprising a plurality of unit areas, the unit areas having heat sinks; mounting the back sides of the chips on the heat sinks of the corresponding unit areas; after mounting the back sides of the plurality of chips on the heat sinks of the corresponding unit areas, the heat dissipation frame is turned away from the packaging carrier, and the front sides of the plurality of chips are soldered to the corresponding chip mounting areas in the packaging carrier.

[0042] In the scheme disclosed in the embodiment of the present invention, a heat dissipation frame is provided, and after the back side of the chip is mounted on the heat sink of the corresponding unit area, the heat dissipation frame is turned away from the packaging carrier, and the front sides of the plurality of chips are welded to the corresponding chip assembly areas in the packaging carrier, thereby improving the efficiency of chip welding; and, since the back side of the chip is first mounted on the heat sink of the heat dissipation frame and then the chip is welded to the packaging carrier, damage to the welding point between the chip and the packaging carrier is avoided during the process of fixing the chip and the heat sink, thereby reducing the probability of the welding point between the chip and the packaging carrier being damaged by external force, which is beneficial to improving the packaging reliability.

[0043] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0044] Figure 2 is a flow chart of an embodiment of a packaging method for achieving heat dissipation according to the present invention, Figures 3 to 11 It is a schematic structural diagram corresponding to each step in an embodiment of a packaging method for achieving heat dissipation of the present invention.

[0045] refer to Figure 2 , and combined with reference Figure 5 , performing step S1: providing a package carrier 100, wherein the package carrier 100 includes a plurality of chip mounting areas 102 。

[0046] The chip mounting area 102 of the package carrier 100 is used to provide a process basis for subsequent welding with the front side of the chip. The package carrier 100 includes multiple chip mounting areas 102, which facilitates the subsequent formation of multiple package structures, thereby facilitating the efficiency of forming the package structure.

[0047] In this embodiment, in the step of providing the package carrier 100, the package carrier 100 includes a lead frame 101, a substrate and an adapter plate. In other embodiments, the package carrier may also include other components capable of carrying a chip and being welded to the chip.

[0048] The lead frame 101, the substrate and the adapter plate are commonly used components in the packaging structure, which are helpful to reduce the process cost.

[0049] In one embodiment, when the package carrier 100 is a lead frame 101 , the lead frame 101 includes a frame unit 1011 located in the chip mounting area 102 , and the frame unit 1011 includes a plurality of pins 1012 .

[0050] The lead frame 101 is used to carry the chip and realize the electrical connection between the chip and the external circuit.

[0051] It should be noted that the material of the lead frame 101 is metal or alloy.

[0052] The frame unit 1011 of the lead frame 101 serves as a basic unit constituting the lead frame 101 .

[0053] Specifically, the pin 1012 is used to realize the electrical connection between the chip and the external circuit.

[0054] In this embodiment, in the step of providing the packaging carrier 100 , the packaging carrier 100 further includes a first positioning component (not shown).

[0055] The first positioning component is used to align with the second positioning component.

[0056] The first positioning component is used to position the chip mounting area 102 in the subsequent process of welding the front sides of multiple chips to the corresponding chip mounting area 102 .

[0057] Specifically, the first positioning component is located at the edge of the package carrier 100. As an example, the first positioning component is located at the frame position in the length direction of the lead frame 101, and the first positioning component includes a first sub-positioning component (not shown) and a second sub-positioning component (not shown), and the first sub-positioning component and the second sub-positioning component have different shapes and are located on different frames.

[0058] It should be noted that the first positioning component includes a positioning hole.

[0059] The process of manufacturing the positioning holes is simple and the process is highly mature.

[0060] refer to Figure 2 , and combined with reference Figure 3 , executing step S2: providing a plurality of chips 120, wherein the chip 120 includes a front side 121 and a back side 122 disposed opposite to each other.

[0061] The back side 122 of the chip 120 is used for mounting on a heat sink, and the front side 121 of the chip 120 is used for welding on the chip mounting area 102 .

[0062] Specifically, a bump (not shown) is formed on the front side of the chip 120 .

[0063] refer to Figure 2 , and combined with reference Figure 4 , executing step S3: providing a heat dissipation frame 110 , wherein the heat dissipation frame 110 includes a plurality of unit areas 111 , and the unit areas 111 have heat dissipation fins 112 .

[0064] The heat sink 112 is used for mounting on the chip 120 , which is helpful to improve the heat dissipation efficiency of the chip 120 , so as to make the performance of the chip 120 better.

[0065] In this embodiment, in the step of providing the heat dissipation frame 110 , the outline of the heat sink 112 is larger than the outline of the chip 120 , which provides a process basis for subsequently providing a gap between the outline of the chip 120 and the outline of the heat sink 112 .

[0066] In this embodiment, in the step of providing the heat dissipation frame 110 , the heat dissipation frame 110 further includes a second positioning component (not shown).

[0067] The second positioning component is used to align with the first positioning component, so as to facilitate the chip 120 to be aligned with the unit region 111 .

[0068] Specifically, the second positioning component is located at an edge of the heat dissipation frame 110 .

[0069] The second positioning component is used for positioning in the subsequent process of mounting the back side 122 of the chip 120 on the heat sink 11 and in the process of soldering the front sides 121 of the multiple chips 120 to the corresponding chip mounting areas 102 .

[0070] Specifically, the second positioning component is located at the edge of the heat dissipation frame 110. As an example, the second positioning component is located at the frame position in the length direction of the heat dissipation frame 110, and the second positioning component includes a third sub-positioning component (not shown) and a fourth sub-positioning component (not shown), and the third sub-positioning component and the fourth sub-positioning component have different shapes and are located on different frames.

[0071] It should be noted that the second positioning component includes a positioning hole. It is understandable that both the second positioning component and the first positioning component include a positioning hole.

[0072] The manufacturing process of the positioning hole is simple and the process is highly mature; moreover, the positioning hole is easy to use, which is conducive to reducing the difficulty of aligning the second positioning component with the first positioning component in the subsequent process.

[0073] The thickness of the heat sink 112 should not be too small or too large. If the thickness of the heat sink 112 is too small, the heat dissipation effect is likely to be poor; if the thickness of the heat sink 112 is too large, the thickness of the entire chip packaging structure is likely to be too thick. Therefore, in this embodiment, the thickness of the heat sink 112 is 0.1 mm to 0.5 mm.

[0074] In this embodiment, the material of the heat sink 112 includes copper, aluminum, ceramic, etc.

[0075] Copper, aluminum, and ceramics have good thermal conductivity and high strength. Therefore, the heat sink 112 is made of copper, aluminum, and ceramics, which is beneficial to improving the heat dissipation performance of the chip 120 and making the heat sink 112 better as a support for the chip 120 carrier.

[0076] In other embodiments, the heat sink may also be made of other materials with good thermal conductivity and high strength.

[0077] In this embodiment, the heat dissipation frame 110 further includes a cutting groove 113 between adjacent unit regions 111 . The cutting groove 113 is located in a heat dissipation surface 114 of the heat dissipation frame 110 . The heat dissipation surface 114 is the surface facing away from the heat dissipation frame 110 for mounting the chip 120 .

[0078] In the subsequent process of cutting the heat dissipation frame 110 and the plastic packaging layer along the position of the cutting groove 113, the cutting groove 113 is conducive to increasing the distance between the cutting position and the heat sink 112, and correspondingly also helps to increase the distance between the cutting position and the chip 120, thereby helping to reduce the probability of the chip 120 being damaged by cutting during the cutting process.

[0079] Specifically, in the step of providing the heat dissipation frame 110, the thickness of the heat dissipation frame 110 at the position of the cutting groove 113 is less than the thickness of the heat sink 112, which is beneficial to reducing the thickness of the heat dissipation frame 110 that needs to be cut in the subsequent cutting process, thereby reducing the difficulty of separating each of the unit areas 111 and correspondingly improving the cutting efficiency.

[0080] It should be noted that the ratio of the thickness of the heat dissipation frame 110 at the position of the cutting groove 113 to the thickness of the heat sink 112 should not be too small or too large. If the ratio of the thickness of the heat dissipation frame 110 at the position of the cutting groove 113 to the thickness of the heat sink 112 is too small, it is easy to make the connection stability between the adjacent unit areas 111 poor, and it is also easy to make the connection stability between the adjacent heat sinks 112 poor, so that in the subsequent process of mounting the back side 122 of the chip 120 on the heat sink 112 of the corresponding unit area 111, it is easy to make the adjacent heat sinks 112 separate from each other, thereby increasing the difficulty of welding the front side 121 of the multiple chips 120 to the corresponding chip assembly area 102 in the packaging carrier 100. Therefore, in this embodiment, the thickness of the heat dissipation frame 110 at the position of the cutting groove 113 is 40% to 60% of the thickness of the heat sink 112.

[0081] refer to Figure 2 , and combined with reference Figure 6 , executing step S4: mounting the back side 122 of the chip 120 on the heat sink 112 of the corresponding unit area 111 .

[0082] The heat sink 112 is mounted on the back side 122 of the chip 120 , which helps to improve the heat dissipation performance of the chip 120 .

[0083] Specifically, the step of mounting the back side 122 of the chip 120 on the heat sink 112 of the corresponding unit area 111 includes: coating a thermal interface material (not shown) on the heat sink 112; placing the back side 122 of the chip 120 on the corresponding heat sink 112 coated with the thermal interface material; and baking and curing the thermal interface material so that the back side 122 of the chip 120 is mounted on the heat sink 112 of the corresponding unit area 111.

[0084] More specifically, the thermal interface material includes insulating thermally conductive glue, insulating thermally conductive film, and non-conductive glue.

[0085] In this embodiment, in the step of mounting the back side 122 of the chip 120 on the heat sink 112 of the corresponding unit area 111, the chip 120 is located in the outline of the heat sink 112, and there is a gap W between the outline of the chip 120 and the outline of the heat sink 112, which is beneficial to reduce the probability of damage to the chip 120 during the subsequent cutting of the heat dissipation frame 110.

[0086] It should be noted that the interval W should not be too small or too large. If the interval W is too small, the effect of reducing the probability of chip 120 being damaged during cutting is not good. If the interval W is too large, the size of the package structure is too large. Therefore, in this embodiment, the interval ranges from 0.1 mm to 0.3 mm.

[0087] refer to Figure 2 , and combined with reference Figure 7 , execute step S5: after mounting the back sides 122 of the plurality of chips 120 on the heat sink 112 of the corresponding unit area 111, make the heat dissipation frame 110 face away from the packaging carrier 100, and weld the front sides 121 of the plurality of chips 120 to the corresponding chip mounting area 102 in the packaging carrier 100.

[0088] Welding the front sides 121 of the plurality of chips 120 to the corresponding chip assembly areas 102 in the packaging carrier 100 is beneficial to improving the efficiency of chip 120 welding; moreover, since the back sides 122 of the chips 120 are first mounted on the heat sink 112 of the heat dissipation frame 110 and then the chips 120 are welded to the packaging carrier 100, it is avoided that the welding points between the chips 120 and the packaging carrier 100 are damaged during the process of fixing the chips 120 and the heat sink 112, thereby reducing the probability of the welding points between the chips 120 and the packaging carrier 100 being damaged by external forces, which is beneficial to improving the packaging reliability.

[0089] In one embodiment, when the package carrier 100 is a lead frame 101, the lead frame 101 includes a frame unit 1011 located in the chip mounting area 102, and the frame unit 1011 includes a plurality of pins 1012. Accordingly, in the step of soldering the front surface 121 of the chip 120 to the corresponding chip mounting area 102 in the package carrier 100, the chip 120 is soldered to the pins 1012 of the frame unit 1011 and is electrically connected to the pins 1012.

[0090] In this embodiment, in the step of welding the front sides 121 of the plurality of chips 120 to the corresponding chip mounting areas 102 in the packaging carrier 100, the second positioning component is aligned with the first positioning component to facilitate the alignment of the chip 120 with the heat sink 112 mounted thereon with the chip mounting area 102, thereby facilitating reducing the difficulty of welding the front sides 121 of the plurality of chips 120 to the corresponding chip mounting areas 102.

[0091] In this embodiment, the process of welding the front side 121 of the chip 120 to the corresponding chip mounting area 102 in the package carrier 100 includes a flip chip process.

[0092] The flip-chip process is beneficial for reducing the size of the packaging structure, thereby improving the integration of semiconductor devices.

[0093] refer to Figures 8 to 9 In this embodiment, before cutting the packaging carrier 100 and the heat dissipation frame 110, the packaging method further includes: forming a plastic packaging layer 130 on the packaging carrier 100 to encapsulate the chip 120, and exposing the surface of the heat sink 112 facing away from the chip 120 (such as Fig. 9 shown).

[0094] The plastic encapsulation layer 130 can play a protective role during the use of the chip 120, for example: providing support for the chip 120 and isolating it from water vapor or corrosive gases in the external environment; moreover, it can also protect the chip 120 during the subsequent cutting of the packaging carrier 100 or the heat dissipation frame 110, thereby reducing the probability of the chip 120 being damaged by cutting.

[0095] In this embodiment, the heat dissipation frame 110 further includes a cutting groove 113 located between adjacent unit regions 111 ; correspondingly, the plastic packaging layer 130 also covers the cutting groove 113 .

[0096] As an example, the plastic packaging layer 130 is epoxy resin.

[0097] Specifically, in the step of forming a plastic encapsulation layer 130 on the packaging carrier 100 to encapsulate the chip 120, the plastic encapsulation layer 130 also covers the heat dissipation frame 110 at the bottom of the cutting groove 113, that is, the plastic encapsulation layer 130 is also provided between adjacent unit areas 111, thereby increasing the contact area between the heat dissipation frame 110 and the plastic encapsulation layer 130, thereby facilitating increasing the bonding force between the plastic encapsulation layer 130 and the heat dissipation frame 110, and correspondingly facilitating increasing the bonding force between the plastic encapsulation layer 130 and the heat sink 112, thereby achieving a better plastic encapsulation effect; moreover, it is also beneficial to improve the size uniformity of the heat sink 112 exposed by the plastic encapsulation layer 130, thereby facilitating improving the aesthetics of the packaging structure.

[0098] As an example, the plastic encapsulation layer 130 also covers the top of the heat dissipation frame 110 at the position of the cutting groove 113, and the plastic encapsulation layer 130 covers all side walls of the heat dissipation frame 110 (such as Fig. 9 In some other embodiments, the plastic encapsulation layer also covers the top of the heat dissipation frame at the location of the cutting groove, and the plastic encapsulation layer covers part of the side wall of the heat dissipation frame.

[0099] In this embodiment, the step of forming a plastic encapsulation layer 130 encapsulating the chip 120 on the packaging carrier 100 includes: Figure 8 As shown, a plastic encapsulation material 131 is formed on the package carrier 100 to encapsulate the chip 120 and the heat dissipation frame 110; Fig. 9 As shown, the molding compound 131 is planarized to expose the surface of the heat sink 112 facing away from the chip 120 .

[0100] It is understandable that after the molding compound 131 is planarized to expose the surface of the heat sink 112 facing away from the chip 120 , the remaining molding compound 131 serves as the molding layer 130 .

[0101] First, a molding compound 131 is formed on the packaging carrier 100 to encapsulate the chip 120 and the heat dissipation frame 110 , and then the molding compound 131 is planarized to expose the surface of the heat sink 112 facing away from the chip 120 , which helps to reduce the difficulty of forming the molding layer 130 .

[0102] In this embodiment, after forming a plastic layer 130 encapsulating the chip 120 on the packaging carrier 100 , before cutting the packaging carrier 100 , the heat dissipation frame 110 and the plastic layer 130 , it also includes: forming an electroplating layer (not shown) on the heat sink 112 .

[0103] In this embodiment, after welding the front surfaces 121 of the plurality of chips 120 to the corresponding chip mounting areas 102 in the packaging carrier 100, the packaging method further comprises: referring to Fig.10 , cutting the package carrier 100 to separate the chip mounting areas 102 from each other to form a plurality of package units 105 that are electrically isolated; Fig.11 , the heat dissipation frame 110 is cut to separate the heat dissipation fins 112 from each other.

[0104] The packaging carrier 100 and the heat dissipation frame 110 are cut to form independent packaging structures. The packaging carrier 100 is cut to electrically isolate the packaging units 105 formed by the chip assembly area 102 from each other; the packaging units 105 are electrically isolated from each other, which also provides a process basis for subsequent packaging tests. The heat dissipation frame 110 is cut to separate the packaging units 105 from each other, thereby forming independent packaging structures.

[0105] Specifically, after the electroplating layer is formed, the package carrier 100 and the heat dissipation frame 110 are cut.

[0106] In this embodiment, before cutting the packaging carrier 100 and the heat dissipation frame 110, the packaging method also includes: forming a plastic sealing layer 130 on the packaging carrier 100 to encapsulate the chip 120, and the plastic sealing layer 130 also covers the side walls of the heat sink 112 and exposes the surface of the heat sink 112 facing away from the chip 120; accordingly, the packaging method also includes: cutting the plastic sealing layer 130 along the cutting position of the packaging carrier 100 or the cutting position of the heat dissipation frame 110, so that the packaging units 105 are separated from each other.

[0107] In other embodiments, a plastic encapsulation layer encapsulating the chip may be formed after the packaging carrier is cut and before the heat dissipation frame is cut as needed; or, a plastic encapsulation layer encapsulating the chip may be formed after the packaging carrier and the heat dissipation frame are cut.

[0108] Specifically, the step of cutting the heat dissipation frame 110 and the plastic encapsulation layer 130 includes: cutting the plastic encapsulation layer 130 and the heat dissipation frame 110 along the position of the cutting groove 113, which is beneficial to reduce the probability of the chip 120 being damaged by cutting during the process of cutting the plastic encapsulation layer 130 and the heat dissipation frame 110.

[0109] More specifically, in the step of cutting the plastic encapsulation layer 130 and the heat dissipation frame 110 along the cutting groove 113, the width of the cutting area is smaller than the width of the cutting groove 113, which is beneficial to increase the distance between the edge of the cutting area and the chip 120, thereby helping to further reduce the probability of the chip 120 being damaged by cutting.

[0110] In this embodiment, after the packaging carrier 100 is cut, the heat dissipation frame 110 is cut; after the packaging carrier 100 is cut and before the heat dissipation frame 110 is cut, the packaging method further includes: performing a strip test on the plurality of packaging units 105 .

[0111] Performing strip testing on multiple packaging units 105 is beneficial to improving testing efficiency; moreover, since the heat dissipation frame 110 has not been cut when the packaging units 105 are strip tested, the connected heat sinks 112 can support the packaging carrier 100 during the strip test, thereby ensuring the connection strength between each packaging structure while performing strip testing on the packaging units 105, thereby ensuring the testing quality of each packaging structure.

[0112] In other embodiments, after the packaging carrier and the heat dissipation frame are cut, a packaging test may be performed on a single packaging structure.

[0113] As an example, after the packaging carrier 100 is cut and before the heat dissipation frame 110 is cut, a plurality of the packaging units 105 are subjected to strip testing. During the process of cutting the heat dissipation frame 110, the plastic encapsulation layer 130 between adjacent unit areas 111 is cut off, which is beneficial to further ensure the connection strength of the packaging structure during the strip test, thereby helping to further ensure the test quality of each packaging structure.

[0114] In the present embodiment, in the step of cutting the packaging carrier 100, a partial thickness of the plastic sealing layer 130 is also cut, so that the total thickness of the cutting is greater than the thickness of the cut packaging carrier 100. This is beneficial for ensuring that the various packaging units 105 are electrically isolated from each other while enabling the plastic sealing layer 130 to further ensure the connection strength of each packaging structure during strip testing.

[0115] It should also be noted that in the step of cutting the plastic encapsulation layer 130 of partial thickness, the ratio of the thickness of the plastic encapsulation layer 130 cut to the total thickness of the plastic encapsulation layer 130 should not be too small or too large. If the ratio of the thickness of the plastic encapsulation layer 130 cut to the total thickness of the plastic encapsulation layer 130 is too small, it is easy to ensure that the effect of mutual electrical isolation between the various packaging units 105 is not good. If the thickness of the plastic encapsulation layer 130 cut to the total thickness of the plastic encapsulation layer 130 is too large, it is easy to increase the probability of the plastic encapsulation layer 130 being completely disconnected, so that the surface smoothness of the plastic encapsulation layer 130 at the disconnection position is not good, and in the case of needing to perform a strip test, it is easy to further ensure the connection strength of each packaging structure during the strip test. Therefore, in this embodiment, in the step of cutting the plastic encapsulation layer 130 of partial thickness, the thickness of the plastic encapsulation layer 130 cut to 10% to 30% of the total thickness of the plastic encapsulation layer 130.

[0116] In this embodiment, during the cutting process of the heat dissipation frame 110, the heat dissipation frame 110 is cooled by using a coolant, which is beneficial to reducing the surface temperature of the heat dissipation frame 110, thereby reducing the degree of deformation of the heat dissipation frame 110, and further beneficial to further reducing the stress of each heat dissipation fin 112 after separation; moreover, the use of coolant during the cutting process is also beneficial to improving processing accuracy and extending the service life of the cutting tool.

[0117] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A packaging method for achieving heat dissipation, characterized in that: include: Providing a package carrier, the package carrier comprising a plurality of chip mounting areas; Providing a plurality of chips, wherein the chips include a front side and a back side disposed opposite to each other; Providing a heat dissipation frame, the heat dissipation frame comprising a plurality of unit areas, the unit areas having heat dissipation fins; Mounting the back side of the chip on the heat sink of the corresponding unit area; After the back sides of the plurality of chips are mounted on the heat sink of the corresponding unit area, the heat dissipation frame is turned away from the packaging carrier, and the front sides of the plurality of chips are welded to the corresponding chip mounting area in the packaging carrier.

2. The packaging method for achieving heat dissipation according to claim 1, characterized in that: After welding the front sides of the plurality of chips to the corresponding chip mounting areas in the packaging carrier, the packaging method further comprises: cutting the packaging carrier to separate the chip mounting areas from each other to form a plurality of packaging units that are electrically isolated; and cutting the heat dissipation frame to separate the heat sinks from each other.

3. The packaging method for achieving heat dissipation according to claim 2, characterized in that: After cutting the packaging carrier, cutting the heat dissipation frame; After cutting the packaging carrier and before cutting the heat dissipation frame, the packaging method further comprises: performing a strip test on a plurality of the packaging units.

4. The packaging method for achieving heat dissipation according to claim 2 or 3, characterized in that: Before cutting the packaging carrier and the heat dissipation frame, the packaging method further comprises: forming a plastic packaging layer encapsulating the chip on the packaging carrier, and exposing the surface of the heat sink facing away from the chip; The packaging method further includes: cutting the plastic packaging layer along a cutting position of the packaging carrier or a cutting position of the heat dissipation frame, so that the packaging units are separated from each other.

5. The packaging method for achieving heat dissipation according to claim 4, characterized in that: The heat dissipation frame further comprises a cutting groove located between adjacent unit areas, wherein the cutting groove is located in a heat dissipation surface of the heat dissipation frame, and the heat dissipation surface is a surface facing away from the heat dissipation frame and used for mounting the chip; In the step of forming a plastic sealing layer encapsulating the chip on the packaging carrier, the plastic sealing layer also covers the heat dissipation frame at the bottom of the cutting groove; The step of cutting the heat dissipation frame and the plastic packaging layer comprises: cutting the plastic packaging layer and the heat dissipation frame along the position of the cutting groove.

6. The packaging method for heat dissipation according to claim 5, characterized in that: In the step of providing the heat dissipation frame, the thickness of the heat dissipation frame at the position of the cutting groove is smaller than the thickness of the heat dissipation fin.

7. The packaging method for heat dissipation according to claim 6, characterized in that: The thickness of the heat dissipation frame at the position of the cutting groove is 40% to 60% of the thickness of the heat dissipation sheet.

8. The packaging method for achieving heat dissipation according to claim 5, characterized in that: In the step of cutting the plastic encapsulation layer and the heat dissipation frame along the cutting groove, the width of the cutting area is smaller than the width of the cutting groove.

9. The packaging method for achieving heat dissipation according to claim 4, characterized in that: The step of forming a plastic sealing layer encapsulating the chip on the packaging carrier comprises: forming a plastic sealing material encapsulating the chip and the heat dissipation frame on the packaging carrier; The molding compound is planarized to expose the surface of the heat sink facing away from the chip.

10. The packaging method for heat dissipation according to claim 4, characterized in that: In the step of cutting the packaging carrier, a portion of the thickness of the plastic encapsulation layer is also cut.

11. The packaging method for heat dissipation according to claim 10, characterized in that: In the step of cutting a portion of the thickness of the plastic encapsulation layer, the thickness of the cut portion of the plastic encapsulation layer accounts for 10% to 30% of the total thickness of the plastic encapsulation layer.

12. The packaging method for heat dissipation according to claim 2, characterized in that: During the process of cutting the heat dissipation frame, a coolant is used to cool the heat dissipation frame.

13. The packaging method for achieving heat dissipation according to claim 2, characterized in that: In the step of providing the heat dissipation frame, the outline of the heat sink is larger than the outline of the chip; In the step of mounting the back side of the chip on the heat sink of the corresponding unit area, the chip is located within the outline of the heat sink, and there is a gap between the outline of the chip and the outline of the heat sink.

14. The packaging method for achieving heat dissipation according to claim 13, characterized in that: The interval ranges from 0.1 mm to 0.3 mm.

15. The packaging method according to claim 1, characterized in that: In the step of providing the packaging carrier, the packaging carrier further includes a first positioning component; In the step of providing the heat dissipation frame, the heat dissipation frame further includes a second positioning component; In the step of soldering the front sides of the plurality of chips to the corresponding chip mounting areas in the package carrier, the second positioning component is aligned with the first positioning component.

16. The packaging method according to claim 15, characterized in that: The first positioning component and the second positioning component both include positioning holes.

17. The packaging method according to claim 1, characterized in that: The thickness of the heat sink is 0.1 mm to 0.5 mm.

18. The packaging method according to claim 1, characterized in that: The materials of the heat sink include copper, aluminum and ceramic.

19. The packaging method according to claim 1, characterized in that: The process of welding the front side of the chip to the corresponding chip mounting area in the package carrier includes a flip chip welding process.

20. The packaging method according to claim 1, characterized in that: In the step of providing a packaging carrier, the packaging carrier includes a lead frame, a substrate and an adapter plate; Wherein, when the packaging carrier is a lead frame, the lead frame includes a frame unit located in the chip mounting area, and the frame unit includes a plurality of pins; in the step of welding the front side of the chip to the corresponding chip mounting area in the packaging carrier, the chip is welded to the pins of the frame unit and is electrically connected to the pins.

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