Low noise amplifier circuit and low noise amplifier

Abstract

The invention relates to a low noise amplifier circuit and a low noise amplifier. The low noise amplifier circuit comprises a balun used for converting a radio frequency signal into a first input signal and a second input signal; the first cross coupling capacitor unit is connected with the output end of the balun and is used for respectively obtaining a first intermediate signal and a second intermediate signal according to the first input signal and the second input signal; the second cross coupling capacitor unit is connected with the output end of the first cross coupling capacitor unit and is used for respectively obtaining a first output signal and a second output signal according to the first intermediate signal and the second intermediate signal; the load inductor is connected with the second cross coupling capacitor unit, one end of the load inductor is used for receiving the first output signal, the other end of the load inductor is used for receiving the second output signal, and a center tap of the load inductor is used for receiving the working voltage. According to the low-noise amplifier circuit and the low-noise amplifier, a lower noise coefficient can be realized.

Description

Technical Field

[0001] The present application relates to the technical field of amplifiers, and in particular to a low noise amplifier circuit and a low noise amplifier. Background Art

[0002] In a wireless receiver system, in order to ensure that the system has high sensitivity, the receiver link often requires a lower noise figure. The first module of a wireless receiver system is often a low noise amplifier, whose noise figure will directly affect the noise figure of the entire system. Therefore, studying low noise amplifiers with low noise figures and high linearity has important scientific and practical significance. Summary of the invention

[0003] Based on this, it is necessary to provide a low noise amplifier circuit and a low noise amplifier with low noise coefficient and high linearity to address the above technical problems.

[0004] In a first aspect, the present application proposes a low-noise amplifier circuit, comprising: a balun, the balun being used to convert a radio frequency signal into a first input signal and a second input signal; a first cross-coupling capacitor unit, the first cross-coupling capacitor unit being connected to the output end of the balun and being used to obtain a first intermediate signal and a second intermediate signal according to the first input signal and the second input signal, respectively; a second cross-coupling capacitor unit, the second cross-coupling capacitor unit being connected to the output end of the first cross-coupling capacitor unit and being used to obtain a first output signal and a second output signal according to the first intermediate signal and the second intermediate signal, respectively; a load inductor, the load inductor being connected to the second cross-coupling capacitor unit, one end of the load inductor being used to receive the first output signal, the other end of the load inductor being used to receive the second output signal, and a middle tap of the load inductor being used to receive an operating voltage.

[0005] In one embodiment, the low noise amplifier circuit further includes: a gain control unit, the gain control unit is connected to the output end of the first cross-coupling capacitor unit, and the gain control unit is used for performing gain control.

[0006] In one embodiment, the first cross-coupling capacitor unit includes: a first NMOS tube, a second NMOS tube, a first capacitor, a second capacitor, a first resistor and a second resistor, the source of the first NMOS tube is respectively connected to the balun and one end of the first capacitor and is used to receive the first input signal, the other end of the first capacitor is connected to the gate of the second NMOS tube, the source of the second NMOS tube is respectively connected to the balun and one end of the second capacitor and is used to receive the second input signal, the other end of the second capacitor is connected to the gate of the first NMOS tube, the gate of the first NMOS tube receives the first bias signal through the first resistor, the gate of the second NMOS tube receives the first bias signal through the second resistor, the drain of the first NMOS tube is used to output the first intermediate signal, and the drain of the second NMOS tube is used to output the second intermediate signal.

[0007] In one embodiment, the first cross-coupling capacitor unit further includes: a third resistor and a fourth resistor, the drain of the first NMOS tube is connected to the substrate of the first NMOS tube through the third resistor, and the drain of the second NMOS tube is connected to the substrate of the second NMOS tube through the fourth resistor.

[0008] In one embodiment, the second cross-coupling capacitor unit includes: a third NMOS tube, a fourth NMOS tube, a third capacitor, a fourth capacitor, a fifth resistor and a sixth resistor, the source of the third NMOS tube is respectively connected to the first cross-coupling capacitor unit and one end of the third capacitor and is used to receive the first intermediate signal, the other end of the third capacitor is connected to the gate of the fourth NMOS tube, the source of the fourth NMOS tube is respectively connected to the first cross-coupling capacitor unit and one end of the fourth capacitor and is used to receive the second intermediate signal, the other end of the fourth capacitor is connected to the gate of the third NMOS tube, the gate of the third NMOS tube receives the second bias signal through the fifth resistor, the gate of the fourth NMOS tube receives the second bias signal through the sixth resistor, the drain of the third NMOS tube is connected to one end of the load inductor, and the drain of the fourth NMOS tube is connected to the other end of the load inductor.

[0009] In one embodiment, the gain control unit includes: a fifth NMOS tube, a sixth NMOS tube, a seventh resistor and an eighth resistor, the source of the fifth NMOS tube is connected to the first cross-coupling capacitor unit and is used to receive the first intermediate signal, the source of the sixth NMOS tube is connected to the first cross-coupling capacitor unit and is used to receive the second intermediate signal, the gate of the fifth NMOS tube receives the operating voltage through the seventh resistor, the gate of the sixth NMOS tube receives the operating voltage through the eighth resistor, and the drain of the fifth NMOS tube and the drain of the sixth NMOS tube both receive the operating voltage.

[0010] In one embodiment, the low noise amplifier circuit further includes: an input tuning capacitor and an output tuning capacitor, the input tuning capacitor is connected to the balun, one end of the input tuning capacitor is used to receive the first input signal, and the other end of the input tuning capacitor is used to receive the second input signal, the output tuning capacitor is connected to the load inductor, one end of the output tuning capacitor is used to receive the first output signal, and the other end of the output tuning capacitor is used to receive the second output signal.

[0011] In a second aspect, the present application further proposes a low noise amplifier, comprising the low noise amplifier circuit described in the embodiment of the first aspect, wherein the balun is an octagonal balun, and the load inductor is an eight-shaped inductor.

[0012] In one of the embodiments, the figure-of-eight inductor is nested in the octagonal balun.

[0013] In one embodiment, the octagonal balun includes: an input coil and an output coil, and the input coil and the output coil are located in the same plane.

[0014] The above-mentioned low noise amplifier circuit and low noise amplifier can achieve a lower noise factor under the condition of ensuring impedance matching by setting two first cross-coupling capacitor units and second cross-coupling capacitor units with capacitor cross-coupling structures, and the set differential structure helps to eliminate even harmonics. At the same time, by setting load inductance and balun, an additional noise path is provided through magnetic field coupling to compensate for the noise output by other branches, thereby achieving a lower noise factor. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0016] Figure 1 is a schematic diagram of a module of a low noise amplifier circuit in one embodiment;

[0017] Figure 2 is a module schematic diagram of a low noise amplifier circuit in another embodiment;

[0018] Figure 3 is a circuit diagram of a low noise amplifier circuit in one embodiment;

[0019] Figure 4 for Figure 3 A small signal circuit diagram of a low noise amplifier circuit in an embodiment;

[0020] Figure 5 is a schematic diagram of the structure of a balun and a load resistor in one embodiment;

[0021] Figure 6 is a gain curve comparison diagram of a low noise amplifier in one embodiment;

[0022] Figure 7 is a noise curve comparison diagram of a low noise amplifier in one embodiment;

[0023] Figure 8 is a comparison diagram of linearity curves of a low noise amplifier in one embodiment;

[0024] Description of reference numerals:

[0025] The balun 110 , the first cross-coupling capacitor unit 120 , the second cross-coupling capacitor unit 130 , the load inductor 140 , the gain control unit 150 , the input coil 111 , and the output coil 112 . DETAILED DESCRIPTION

[0026] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0028] It can be understood that the terms "first", "second", etc. used in the present application can be used in this article to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element.

[0029] It should be noted that when an element is considered to be "connected" to another element, it can be directly connected to the other element, or connected to the other element through an intermediate element. In addition, the "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if there is transmission of electrical signals or data between the connected objects.

[0030] In one embodiment, Figure 1 As shown, a low noise amplifier circuit is provided, including: a balun 110, a first cross-coupling capacitor unit 120, a second cross-coupling capacitor unit 130 and a load inductor 140, the balun 110 is used to convert a radio frequency signal RFin into a first input signal VIN and a second input signal VIP; the first cross-coupling capacitor unit 120 is connected to the output end of the balun 110 and is used to obtain a first intermediate signal Vb+ and a second intermediate signal Vb- according to the first input signal VIN and the second input signal VIP respectively; the second cross-coupling capacitor unit 130 is connected to the output end of the first cross-coupling capacitor unit 120 and is used to obtain a first output signal Vout+ and a second output signal Vout- according to the first intermediate signal Vb+ and the second intermediate signal Vb- respectively; the load inductor 140 is connected to the second cross-coupling capacitor unit 130, one end of the load inductor 140 is used to receive the first output signal Vout+, the other end of the load inductor 140 is used to receive the second output signal Vout-, and the middle tap of the load inductor 140 is used to receive the operating voltage VDD.

[0031] Specifically, the low noise amplifier circuit of the embodiment of the present application is an amplifier circuit based on the differential amplification principle, which can effectively process differential signals and reduce common mode noise and interference. The balun 110 is a single-ended to differential input balun, which is used to convert the single-ended radio frequency signal RFin into two differential signals with opposite phases and equal amplitudes, namely the first input signal VIN and the second input signal VIP. The differential signal helps to reduce external electromagnetic interference and radio frequency interference during transmission and improve signal integrity. The first cross-coupling capacitor unit 120 is connected to the output end of the balun 110. The capacitor cross-coupling structure in the first cross-coupling capacitor unit 120 generates a first intermediate signal Vb+ and a second intermediate signal Vb- by coupling the differential signal inside the unit, thereby completing a first amplification of the signal. The second cross-coupling capacitor unit 130 is connected to the output end of the first cross-coupling capacitor unit 120. The capacitor cross-coupling structure in the second cross-coupling capacitor unit 130 generates a first output signal Vout+ and a second output signal Vout- by coupling the differential signal inside the unit again, thereby completing a second amplification of the signal. The capacitor cross-coupling structure in the first cross-coupling capacitor unit 120 and the second cross-coupling capacitor unit 130 forms a cross connection through a capacitor, which can achieve an improvement in equivalent transconductance, which helps to enhance the gain of the amplifier, and the capacitor cross-coupling structure has the ability to filter noise to a certain extent. Through reasonable circuit design, the noise performance can be optimized and the noise level of the circuit can be reduced. The load inductor 140 is connected to the output end of the second cross-coupling capacitor unit 130 as the load of the amplifier. One end of the load inductor 140 receives the first output signal Vout+, and the other end receives the second output signal Vout-, and the middle tap of the load inductor 140 is used to receive the operating voltage VDD. Through this setting, it is helpful to achieve impedance matching of the differential signal and improve the efficiency and stability of the amplifier. At the same time, the load inductor 140 can also provide a certain frequency selectivity, which helps to suppress unnecessary frequency components.

[0032] The above-mentioned low noise amplifier circuit can achieve a lower noise factor under the condition of ensuring impedance matching by setting two first cross-coupling capacitor units 120 and second cross-coupling capacitor units 130 with a capacitor cross-coupling structure, and the set differential structure helps to eliminate even harmonics. At the same time, by setting the load inductor 140 and the balun 110, an additional noise path is provided through magnetic field coupling to compensate for the noise output by other branches, thereby achieving a lower noise factor.

[0033] In one embodiment, Figure 2As shown, the low noise amplifier circuit also includes: a gain control unit 150, the gain control unit 150 is connected to the output end of the first cross-coupling capacitor unit 120, and the gain control unit 150 is used to perform gain control. Specifically, the gain control unit 150 is used to adjust the gain of the low noise amplifier to adapt to different signal strengths or system requirements. By adjusting the gain, it can be ensured that the signal will not be distorted due to over-amplification, and at the same time, it can be ensured that the weak signal can be effectively amplified to a sufficient level for subsequent circuit processing. By connecting the gain control unit 150 to the output end of the first cross-coupling capacitor unit 120, the first intermediate signal Vb+ and the second intermediate signal Vb- output by the first cross-coupling capacitor unit 120 can be shunted, thereby achieving corresponding gain control.

[0034] In one embodiment, Figure 3 As shown, the first cross-coupling capacitor unit 120 includes: a first NMOS tube M1, a second NMOS tube M2, a first capacitor C1, a second capacitor C2, a first resistor R1 and a second resistor R2. The source of the first NMOS tube M1 is respectively connected to the balun 110 and one end of the first capacitor C1 and is used to receive the first input signal VIN. The other end of the first capacitor C1 is connected to the gate of the second NMOS tube M2. The source of the second NMOS tube M2 is respectively connected to the balun 110 and one end of the second capacitor C2 and is used to receive the second input signal VIP. The other end of the second capacitor C2 is connected to the gate of the first NMOS tube M1. The gate of the first NMOS tube M1 receives the first bias signal Vbias1 through the first resistor R1. The gate of the second NMOS tube M2 receives the first bias signal Vbias1 through the second resistor R2. The drain of the first NMOS tube M1 is used to output the first intermediate signal Vb+, and the drain of the second NMOS tube M2 is used to output the second intermediate signal Vb-.

[0035] Specifically, the first NMOS tube M1 and the second NMOS tube M2 in this embodiment are both amplifier tubes made by a triple-well process. The first NMOS tube M1 and the second NMOS tube M2 constitute the main body of the first cross-coupling capacitor unit 120, and the source thereof is used to receive the differential input signal, that is, the first input signal VIN and the second input signal VIP. The first capacitor C1 and the second capacitor C2 constitute a cross-coupling network, which is used to enhance the common-mode suppression capability of the differential pair and improve the differential gain of the circuit. The first resistor R1 and the second resistor R2 are respectively used to provide a bias voltage to the gate of the first NMOS tube M1 and the second NMOS tube M2, that is, the first bias signal Vbias1, to ensure that the transistor operates in an appropriate linear amplification region. The drains of the first NMOS tube M1 and the second NMOS tube M2 output the first intermediate signal Vb+ and the second intermediate signal Vb-, respectively, and input them to the second cross-coupling capacitor unit 130 for further processing.

[0036] In one embodiment, Figure 3 As shown, the first cross-coupling capacitor unit 120 also includes: a third resistor R3 and a fourth resistor R4, the drain of the first NMOS tube M1 is connected to the substrate of the first NMOS tube M1 through the third resistor R3, and the drain of the second NMOS tube M2 is connected to the substrate of the second NMOS tube M2 through the fourth resistor R4. Specifically, in this embodiment, the third resistor R3 and the fourth resistor R4 are provided to provide body bias of the first NMOS tube M1 and the second NMOS tube M2, respectively, to stabilize the substrate potential, reduce the body effect change caused by the substrate potential fluctuation, thereby improving the stability of the circuit and reducing the noise.

[0037] In one embodiment, Figure 3 As shown, the second cross-coupling capacitor unit 130 includes: a third NMOS transistor M3, a fourth NMOS transistor M4, a third capacitor C3, a fourth capacitor C4, a fifth resistor R5 and a sixth resistor R6. The source of the third NMOS transistor M3 is respectively connected to the first cross-coupling capacitor unit 120 and one end of the third capacitor C3 and is used to receive the first intermediate signal Vb+. The other end of the third capacitor C3 is connected to the gate of the fourth NMOS transistor M4. The source of the fourth NMOS transistor M4 is respectively connected to the first cross-coupling capacitor unit 120 and one end of the fourth capacitor C4 and is used to receive the second intermediate signal Vb-. The other end of the fourth capacitor C4 is connected to the gate of the third NMOS transistor M3. The gate of the third NMOS transistor M3 receives the second bias signal Vbias2 through the fifth resistor R5. The gate of the fourth NMOS transistor M4 receives the second bias signal Vbias2 through the sixth resistor R6. The drain of the third NMOS transistor M3 is connected to one end of the load inductor 140, and the drain of the fourth NMOS transistor M4 is connected to the other end of the load inductor 140.

[0038] Specifically, the third NMOS tube M3 and the fourth NMOS tube M4 in this embodiment are both common-source and common-gate tubes made by a triple-well process. The third NMOS tube M3 and the fourth NMOS tube M4 constitute the main body of the second cross-coupled capacitor unit 130, and its source is used to receive the differential signal, that is, the first intermediate signal Vb+ and the second intermediate signal Vb-. The third capacitor C3 and the fourth capacitor C4 constitute a cross-coupling network, which is used to enhance the common-mode suppression capability of the differential pair and improve the differential gain of the circuit. The fifth resistor R5 and the sixth resistor R6 are respectively used to provide a bias voltage to the gates of the third NMOS tube M3 and the fourth NMOS tube M4, that is, the second bias signal Vbias2. When the second bias signal Vbias2 is at a high level, the low-noise amplifier circuit is turned on; when the second bias signal Vbias2 is at a low level, the low-noise amplifier circuit is turned off. The drains of the third NMOS transistor M3 and the fourth NMOS transistor M4 output a first output signal Vout+ and a second output signal Vout−, respectively, and input them into the load inductor 140 for energy storage and filtering.

[0039] In one embodiment, Figure 3 As shown, the gain control unit 150 includes: a fifth NMOS tube M5, a sixth NMOS tube M6, a seventh resistor R7 and an eighth resistor R8, the source of the fifth NMOS tube M5 is connected to the first cross-coupling capacitor unit 120 and is used to receive the first intermediate signal Vb+, the source of the sixth NMOS tube M6 is connected to the first cross-coupling capacitor unit 120 and is used to receive the second intermediate signal Vb-, the gate of the fifth NMOS tube M5 receives the operating voltage VDD through the seventh resistor R7, the gate of the sixth NMOS tube M6 receives the operating voltage VDD through the eighth resistor R8, and the drain of the fifth NMOS tube M5 and the drain of the sixth NMOS tube M6 both receive the operating voltage VDD.

[0040] Specifically, the fifth NMOS transistor M5 and the sixth NMOS transistor M6 in this embodiment are both gain control transistors made by a triple-well process, and the first intermediate signal Vb+ and the second intermediate signal Vb- output by the first cross-coupling capacitor unit 120 are shunted by the fifth NMOS transistor M5 and the sixth NMOS transistor M6, so the current flowing to the load is reduced, thereby achieving gain control. The attenuation of the gain control depends on the impedance ratio of the first cross-coupling capacitor unit 120 and the gain control unit 150.

[0041] In one embodiment, Figure 3As shown, the low noise amplifier circuit also includes: an input tuning capacitor C5 and an output tuning capacitor C6, the input tuning capacitor C5 is connected to the balun 110, one end of the input tuning capacitor C5 is used to receive the first input signal VIN, and the other end of the input tuning capacitor C5 is used to receive the second input signal VIP, the output tuning capacitor C6 is connected to the load inductor 140, one end of the output tuning capacitor C6 is used to receive the first output signal Vout+, and the other end of the output tuning capacitor C6 is used to receive the second output signal Vout-. Specifically, in this embodiment, the input tuning capacitor C5 is connected in parallel with the input end of the first cross-coupling capacitor unit 120, and the output tuning capacitor C6 is connected in parallel with the output end of the second cross-coupling capacitor unit 130. By setting the input tuning capacitor C5 and the output tuning capacitor C6, a good matching between the circuit and the external signal can be achieved, and the overall performance of the circuit can be optimized by adjusting the impedance, bandwidth and phase characteristics of the circuit.

[0042] The low noise amplifier circuit of the present application is described in detail below with a specific embodiment. Figure 3As shown, after the balun 110 converts the radio frequency signal RFin into a first input signal VIN and a second input signal VIP, the balun 110 inputs the RF signal to the source of the first NMOS tube M1 and the second NMOS tube M2 respectively, the source of the first NMOS tube M1 is connected to the gate of the second NMOS tube M2 through the first capacitor C1, the source of the second NMOS tube M2 is connected to the gate of the first NMOS tube M1 through the second capacitor C2, the gate of the first NMOS tube M1 receives the first bias signal Vbias1 through the first resistor R1, the gate of the second NMOS tube M2 receives the first bias signal Vbias1 through the second resistor R2, the drain of the first NMOS tube M1 is connected to the substrate of the first NMOS tube M1 through the third resistor R3, and the drain of the second NMOS tube M2 is connected to the substrate of the second NMOS tube M2 through the fourth resistor R4. The drain of the first NMOS tube M1 is connected to the source of the third NMOS tube M3, the drain of the second NMOS tube M2 is connected to the source of the fourth NMOS tube M4, the source of the third NMOS tube M3 is connected to the gate of the fourth NMOS tube M4 through the third capacitor C3, the source of the fourth NMOS tube M4 is connected to the gate of the third NMOS tube M3 through the fourth capacitor C4, the gate of the third NMOS tube M3 receives the second bias signal Vbias2 through the fifth resistor R5, the gate of the fourth NMOS tube M4 receives the second bias signal Vbias2 through the sixth resistor R6, the drain of the third NMOS tube M3 is connected to one end of the load inductor 140, and the drain of the fourth NMOS tube M4 is connected to the other end of the load inductor 140. The drain of the first NMOS tube M1 is connected to the source of the fifth NMOS tube M5, the drain of the second NMOS tube M2 is connected to the source of the sixth NMOS tube M6, the gate of the fifth NMOS tube M5 receives the working voltage VDD through the seventh resistor R7, the gate of the sixth NMOS tube M6 receives the working voltage VDD through the eighth resistor R8, and the drain of the fifth NMOS tube M5 and the drain of the sixth NMOS tube M6 both receive the working voltage VDD. The input tuning capacitor C5 is connected in parallel with the output end of the balun 110, and the output tuning capacitor C6 is connected in parallel with the load inductor 140.

[0043] In this embodiment, the first NMOS tube M1, the second NMOS tube M2, the third NMOS tube M3 and the fourth NMOS tube M4 of the triple-well process constitute the main body of the low-noise amplifier circuit, the fifth NMOS tube M5 and the sixth NMOS tube M6 of the triple-well process constitute a gain control unit 150 based on current steering, the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 provide a bias circuit for the low-noise amplifier, the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 constitute two cross-coupling paths of the amplifier, and the input tuning capacitor C5 and the output tuning capacitor C6 serve as input and output tuning capacitors respectively.

[0044] The following specifically describes the performance trade-off mechanism of the low noise amplifier circuit of this embodiment when the input matching condition is met. Figure 4 As shown, Figure 3 Small signal circuit diagram of medium and low noise amplifier circuit. The input impedance of the traditional common-gate circuit is equivalent to , and the influence of the transistor channel modulation in the embodiment of the present application can no longer be ignored, and the input impedance can be expressed as:

[0045]

[0046] The noise coefficient of the traditional common-gate circuit cannot be very low because the transconductance is directly linked to the input matching. The low-noise amplifier circuit of the embodiment of the present application forms three noise elimination paths with the signal path by adding the second cross-coupling capacitor unit 130 and the magnetic coupling path composed of the balun 110 and the load inductor 140 without changing the input tube transconductance. Through analysis, when the circuit meets When the noise of the first NMOS tube M1 and the second NMOS tube M2 is completely eliminated, is the impedance seen by node x. It can be seen from the above formula that a larger coupling coefficient is generally required for the equation to hold, and a larger coupling coefficient will affect the stability of the circuit. Therefore, changing the transconductance and magnetic coupling coefficient of the third NMOS tube M3 and the fourth NMOS tube M4 and the size of the third capacitor C3 and the fourth capacitor C4 while considering stability can reduce the noise of the first NMOS tube M1 and the second NMOS tube M2. At this time, the noise coefficient can be expressed as:

[0047]

[0048] In combination with the considerations when designing input matching and low noise coefficient, the load inductor 140 of the embodiment of the present application can adopt an eight-shaped inductor. The eight-shaped inductor can achieve a change in the coupling coefficient by changing the areas of the two coils and the relative positions of the two coils. At the same time, by utilizing the anisotropic magnetic field characteristics of the figure-eight-shaped inductor, the impact on the input matching of the low noise amplifier can be minimized and the circuit stability requirements can be met.

[0049] The traditional common-gate circuit already has a relatively high linearity. The mechanism by which the embodiment of the present application still maintains a high linearity after increasing the equivalent transconductance is that the traditional capacitor cross-coupling structure uses the fundamental and second harmonic amplitudes of the gate-source voltage of the amplifier tube (the first NMOS tube M1 and the second NMOS tube M2) to be in the same direction and in opposite phases to achieve even harmonic elimination. In this embodiment, the common-source common-gate tube (the third NMOS tube M3 and the fourth NMOS tube M4) uses capacitor cross-coupling to eliminate the quadratic nonlinear term of the amplifier tube output due to the additional third-order nonlinear term generated by the second-order nonlinearity of the common-source common-gate tube. In addition, this embodiment uses an unbalanced current steering circuit to further optimize the linearity, and designs the transconductance of a suitable gain control tube (the fifth NMOS tube M5 and the sixth NMOS tube M6) to achieve the third-order nonlinear current of the amplifier tube to flow to the AC ground instead of to the common-source common-gate tube. Through the circuit nonlinear small signal analysis, the input third-order intercept point is obtained as:

[0050]

[0051] in , In summary, the low noise amplifier circuit in this embodiment can achieve low noise figure and high linearity.

[0052] In one embodiment, Figure 5 As shown, a low noise amplifier is also proposed in this embodiment. The low noise amplifier includes the low noise amplifier circuit in the above embodiment. The low noise amplifier is made of an integrated circuit. The balun 110 in the low noise amplifier is an octagonal balun, and the load inductor 140 is an eight-shaped inductor. The octagonal balun is a 1:1 symmetrical octagonal balun. By setting the balun 110 as an octagonal balun and the load inductor 140 as an eight-shaped inductor, the impact on input matching and the design difficulty can be reduced.

[0053] In one embodiment, Figure 5As shown, the figure-eight inductor is nested in the octagonal balun. Specifically, the load inductor 140 in this embodiment adopts the figure-eight inductor structure to be nested in the octagonal balun. The difference between the figure-eight inductor and the octagonal inductor is the direction of the magnetic field. By utilizing the opposite magnetic field direction of the figure-eight inductor coil, the additional magnetic field in the balun 110 can be offset, thereby greatly reducing the design difficulty of the entire passive module. The figure-eight inductor is nested in the balun 110, and an additional noise path can be provided through magnetic field coupling to compensate for the noise output by other branches, and an inductor area can be saved, thereby improving the device area utilization. It is understandable that since the figure-eight inductor is nested in the octagonal balun, the line width of the figure-eight inductor should not be too wide to reduce the impact on the quality factor of the octagonal balun. By changing the line width, area and relative position of the figure-eight inductor nested in the balun 110, different magnetic coupling coefficients can be obtained, and the figure-eight inductor needs to be strictly designed to meet the gain, impedance matching, noise and stability requirements.

[0054] In one embodiment, Figure 5 As shown, the octagonal balun includes: an input coil 111 and an output coil 112, and the input coil 111 and the output coil 112 are located in the same plane. Specifically, the octagonal balun in this embodiment adopts a horizontal structure, and its input coil 111 and the output coil 112 are located in the same plane. Compared with the octagonal balun with a laminated structure, although the laminated structure can achieve a stronger magnetic coupling coefficient, two layers of metal are required. The horizontal structure of the input coil 111 and the output coil 112 of this embodiment can adopt the form of stacking the highest layer of metal and the second highest layer of metal, and laying the bottom layer of metal under the coil to improve the quality factor of this frequency band, so as to achieve lower ohmic loss than the laminated structure and reduce insertion loss.

[0055] The following describes in detail the characteristics of the low noise amplifier of the present application with a specific embodiment. The low noise amplifier circuit in the low noise amplifier is configured as follows: Figure 3 In the circuit structure shown in the figure, the active devices are of the minimum size allowed by the process node, and the balun 110 and the load inductor 140 are set to Figure 5 The octagonal balun and figure-of-eight inductor are shown. Figure 6 As shown in FIG. 1 , a comparison diagram of the gain curves of a low noise amplifier with a conventional common-gate circuit structure and a low noise amplifier in an embodiment of the present application is shown. It can be seen from the figure that the gain of the low noise amplifier in the embodiment of the present application is higher. Figure 7 As shown in FIG. 1 , a comparison diagram of the noise curves of a low noise amplifier with a conventional common-gate circuit structure and a low noise amplifier in an embodiment of the present application is shown. It can be seen from the figure that the noise of the low noise amplifier in an embodiment of the present application is lower. Figure 8As shown, it is a comparison diagram of the linearity curves of the low noise amplifier of the traditional common-gate circuit structure and the low noise amplifier of the embodiment of the present application. It can be seen from the figure that the low noise amplifier of the embodiment of the present application also has better linearity.

[0056] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "specific embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0057] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0058] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A low noise amplifier circuit, characterized in that: include: A balun, the balun is used to convert the radio frequency signal into a first input signal and a second input signal; a first cross-coupling capacitor unit, the first cross-coupling capacitor unit being connected to an output end of the balun and being used to obtain a first intermediate signal and a second intermediate signal according to the first input signal and the second input signal respectively; a second cross-coupling capacitor unit, the second cross-coupling capacitor unit being connected to an output end of the first cross-coupling capacitor unit and being used to obtain a first output signal and a second output signal according to the first intermediate signal and the second intermediate signal, respectively; A load inductor, wherein the load inductor is connected to the second cross-coupling capacitor unit, one end of the load inductor is used to receive the first output signal, the other end of the load inductor is used to receive the second output signal, and a middle tap of the load inductor is used to receive an operating voltage.

2. The low noise amplifier circuit according to claim 1, characterized in that: Also includes: A gain control unit, wherein the gain control unit is connected to an output end of the first cross-coupling capacitor unit, and the gain control unit is used for performing gain control.

3. The low noise amplifier circuit according to claim 1, characterized in that: The first cross-coupling capacitor unit includes: a first NMOS tube, a second NMOS tube, a first capacitor, a second capacitor, a first resistor and a second resistor. The source of the first NMOS tube is respectively connected to the balun and one end of the first capacitor and is used to receive the first input signal. The other end of the first capacitor is connected to the gate of the second NMOS tube. The source of the second NMOS tube is respectively connected to the balun and one end of the second capacitor and is used to receive the second input signal. The other end of the second capacitor is connected to the gate of the first NMOS tube. The gate of the first NMOS tube receives the first bias signal through the first resistor. The gate of the second NMOS tube receives the first bias signal through the second resistor. The drain of the first NMOS tube is used to output the first intermediate signal. The drain of the second NMOS tube is used to output the second intermediate signal.

4. The low noise amplifier circuit according to claim 3, characterized in that: The first cross-coupling capacitor unit further includes: a third resistor and a fourth resistor, the drain of the first NMOS tube is connected to the substrate of the first NMOS tube through the third resistor, and the drain of the second NMOS tube is connected to the substrate of the second NMOS tube through the fourth resistor.

5. The low noise amplifier circuit according to claim 1, characterized in that: The second cross-coupling capacitor unit includes: a third NMOS tube, a fourth NMOS tube, a third capacitor, a fourth capacitor, a fifth resistor and a sixth resistor. The source of the third NMOS tube is respectively connected to one end of the first cross-coupling capacitor unit and the third capacitor and is used to receive the first intermediate signal. The other end of the third capacitor is connected to the gate of the fourth NMOS tube. The source of the fourth NMOS tube is respectively connected to one end of the first cross-coupling capacitor unit and the fourth capacitor and is used to receive the second intermediate signal. The other end of the fourth capacitor is connected to the gate of the third NMOS tube. The gate of the third NMOS tube receives the second bias signal through the fifth resistor. The gate of the fourth NMOS tube receives the second bias signal through the sixth resistor. The drain of the third NMOS tube is connected to one end of the load inductor, and the drain of the fourth NMOS tube is connected to the other end of the load inductor.

6. The low noise amplifier circuit according to claim 2, characterized in that: The gain control unit includes: a fifth NMOS tube, a sixth NMOS tube, a seventh resistor and an eighth resistor, the source of the fifth NMOS tube is connected to the first cross-coupling capacitor unit and is used to receive the first intermediate signal, the source of the sixth NMOS tube is connected to the first cross-coupling capacitor unit and is used to receive the second intermediate signal, the gate of the fifth NMOS tube receives the operating voltage through the seventh resistor, the gate of the sixth NMOS tube receives the operating voltage through the eighth resistor, and the drain of the fifth NMOS tube and the drain of the sixth NMOS tube both receive the operating voltage.

7. The low noise amplifier circuit according to any one of claims 1 to 6, characterized in that: Also includes: An input tuning capacitor and an output tuning capacitor, wherein the input tuning capacitor is connected to the balun, one end of the input tuning capacitor is used to receive the first input signal, and the other end of the input tuning capacitor is used to receive the second input signal, and the output tuning capacitor is connected to the load inductor, one end of the output tuning capacitor is used to receive the first output signal, and the other end of the output tuning capacitor is used to receive the second output signal.

8. A low noise amplifier, characterized in that: The low noise amplifier circuit comprises the one described in any one of claims 1 to 7, wherein the balun is an octagonal balun, and the load inductor is a figure-of-eight inductor.

9. The low noise amplifier according to claim 8, characterized in that: The figure-of-eight inductor is nested in the octagonal balun.

10. The low noise amplifier according to claim 8, characterized in that: The octagonal balun includes an input coil and an output coil, and the input coil and the output coil are located in the same plane.

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