Pre-charging sample hold circuit and control method thereof
By introducing precharge and multi-mode processing technologies into the sampling and holding circuit, the inaccurate signal measurement problem under the influence of parasitic capacitance is solved, and higher signal output stability and accuracy are achieved.
Patent Information
- Application Number
- CN202411559359.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-01
- Publication Date
- 2025-03-07
AI Technical Summary
Existing sampling and holding circuits are susceptible to parasitic capacitances and cannot achieve accurate measurement of the input signal.
The precharge sampling and holding circuit is adopted to realize the precharge mode on the sampling capacitor and process the input signals respectively in the sampling and correction modes to ensure that the sampling capacitor and the parasitic capacitor reach the same voltage, thereby avoiding signal distortion caused by subsequent charge exchange.
Through pre-charge and mode switching, the output stability and accuracy of the sampled signal are improved, the impact of parasitic capacitors on the sampled capacitor is reduced, and the accuracy of the signal is ensured.
Smart Images
Figure CN119582845A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of integrated circuits, and in particular to a pre-charged sample-and-hold circuit and a control method thereof. Background Art
[0002] The sample-and-hold circuit is an important component in modern electronic engineering and signal processing, and is widely used in analog signal processing, data acquisition, communication systems, and control systems.
[0003] The sample-and-hold circuit can obtain and hold the instantaneous value of an analog signal for a period of time, ensuring that the subsequent circuit can read a stable signal value. Existing sample-and-hold circuits are easily affected by parasitic capacitance and cannot achieve accurate measurement of input signals. Summary of the invention
[0004] A first aspect of an embodiment of the present application provides a pre-charge sample-and-hold circuit.
[0005] The pre-charge sample-and-hold circuit comprises a sampling module, and the sampling module comprises:
[0006] Sampling capacitor;
[0007] An input terminal, for receiving an input signal;
[0008] An output terminal, used for outputting a sampling signal;
[0009] A sampling unit, one end of which is connected to the input end and the other end of which is connected to the sampling capacitor, and is used to transmit the input signal to the sampling capacitor;
[0010] and a holding unit, one end of which is connected to the sampling capacitor and the other end of which is connected to the output end, and is used to output the sampling signal of the sampling capacitor through the output end;
[0011] Wherein, the sampling module includes a sampling mode and a calibration mode;
[0012] In the sampling mode, the sampling unit is turned on to electrically connect the input end to the sampling capacitor, and the holding unit disconnects the output end from the sampling capacitor; in the calibration mode, the sampling unit is turned on to the holding unit.
[0013] In some embodiments, the sampling mode and the calibration mode are performed sequentially.
[0014] In some embodiments, the calibration mode is performed after the sampling mode.
[0015] In some embodiments, the sampling unit is always turned on from the start time of the sampling mode to the end time of the calibration mode.
[0016] In some embodiments, the sampling module further includes a pre-charge mode and a hold mode;
[0017] In the pre-charging mode, pre-charging the sampling capacitor;
[0018] In the sampling mode, the input signal is transmitted to the pre-charged sampling capacitor;
[0019] In the calibration mode, the input signal is simultaneously transmitted to the parasitic capacitor and the pre-charged sampling capacitor;
[0020] After the parasitic capacitor receives the input signal, the holding mode is executed; in the holding mode, the sampling signal stored in the sampling capacitor is output.
[0021] In some embodiments, the sampling module further includes a holding mode, in which the sampling unit disconnects the electrical connection between the input terminal and the sampling capacitor, and the holding unit is turned on to electrically connect the output terminal to the sampling capacitor.
[0022] In some embodiments, there are multiple sampling modules, and the input ends of at least two of the sampling modules are connected, or the input end of each of the sampling modules is used to accept different input voltages; the output ends of at least two of the sampling modules are connected, or the output end of each of the sampling modules is used to output different sampling signals.
[0023] In some embodiments, when the input ends of at least two of the sampling modules are connected, at the same time, only one of the sampling modules connected to the input ends is in the sampling mode;
[0024] In the case that the output ends of at least two of the sampling modules are connected, at the same time, only one of the sampling modules connected to the output ends is in the holding mode.
[0025] In some embodiments, the pre-charge sample and hold circuit further includes a voltage stabilizing end configured as an analog power supply voltage; and the sampling capacitors in the plurality of sampling modules are all connected to the voltage stabilizing end.
[0026] In some embodiments, the sampling module further includes a reference terminal set as a reference voltage, and a pre-charge unit;
[0027] One end of the pre-charging unit is connected to the sampling capacitor, and the other end is connected to the reference end, and is used to pre-charge the sampling capacitor;
[0028] The sampling module further includes a pre-charging mode. In the pre-charging mode, the sampling unit and the holding unit are disconnected, the pre-charging unit is turned on, and the reference end is electrically connected to the sampling capacitor.
[0029] In some embodiments, when there are multiple sampling modules, the reference ends of each sampling module are connected.
[0030] A second aspect of an embodiment of the present application provides a control method for a pre-charged sample-and-hold circuit, which is used to control the pre-charged sample-and-hold circuit. The control method includes:
[0031] Sampling step: controlling the holding unit in the sampling module to be disconnected and the sampling unit to be turned on, so that the sampling module is in a sampling mode;
[0032] Calibration step: controlling the sampling unit and the holding unit to be turned on, so that the sampling module is in a calibration mode.
[0033] In some embodiments, the sampling step and the correction step are performed sequentially.
[0034] In some embodiments, the sampling step is followed by the correction step.
[0035] In some embodiments, the sampling unit is always turned on from the start time of the sampling step to the end time of the correction step.
[0036] In some embodiments, after the sampling step and the correction step are completed, the control method further includes a holding step. In the holding step, the sampling unit in the sampling module is controlled to be disconnected and the holding unit is controlled to be turned on, so that the sampling module is in a holding mode.
[0037] In some embodiments, the pre-charge sampling and holding circuit further includes a pre-charge unit having one end connected to the sampling capacitor and the other end connected to a reference end; before the sampling step and the correction step are started, the control method further includes a pre-charge step, in which the sampling unit and the holding unit in the sampling module are controlled to be disconnected and the pre-charge unit is turned on, so that the sampling module is in a pre-charge mode.
[0038] In some embodiments, before the sampling step and the correction step begin, the control method includes, when the input ends of at least two of the sampling modules are connected, at the same time, controlling only one of the sampling modules connected to the input ends to perform the sampling step; when the output ends of at least two of the sampling modules are connected, at the same time, controlling only one of the sampling modules connected to the output ends to perform the holding step.
[0039] The sampling module of the present application includes three working processes: sampling, correction and holding. During the sampling process, the input end transmits the input signal to the sampling capacitor, and the sampling capacitor samples the input signal; during the correction process, the input end charges the sampling capacitor and the parasitic capacitor at the same time; during the holding process, the voltage value of the sampling capacitor remains unchanged, and the sampling signal is output. There is a parasitic capacitor in the pre-charged sampling and holding circuit. When the sampling module switches directly from the sampling mode to the holding mode, the sampling capacitor will charge the parasitic capacitor, resulting in inaccurate sampling signals output by the sampling capacitor through the output end. In the correction mode, the input end charges the sampling capacitor and the parasitic capacitor at the same time, and charges the two to the same voltage. After that, when the sampling module is in the holding mode, the sampling signal of the sampling capacitor does not need to be charged to the parasitic capacitor, and can be directly output through the output end, which is conducive to ensuring the output stability of the sampling signal and improving the sampling accuracy of the sampling module.
[0040] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0042] Figures 1 to 7 A schematic diagram of the circuit structure of a pre-charge sample-and-hold circuit provided in an embodiment of the present application;
[0043] Figure 8 for Figure 1 The control timing diagram of the pre-charge sample-and-hold circuit provided by the illustrated embodiment;
[0044] Fig. 9 for Figure 3 The control timing diagram of the pre-charge sample-and-hold circuit provided by the illustrated embodiment;
[0045] Fig.10 for Figure 5 The illustrated embodiment provides a control timing diagram of a pre-charge sample-and-hold circuit. DETAILED DESCRIPTION
[0046] Here, the technical solutions in the embodiments (or "implementations") of the present application will be described clearly and completely in conjunction with the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements.
[0047] If there are terms involving directional indications or positional relationships in the embodiments of the present application (such as up, down, left, right, front, back, inside, outside, top, bottom, center, vertical, horizontal, longitudinal, transverse, length, width, counterclockwise, clockwise, axial, radial, circumferential, etc.), such terms are only used to explain the relative positional relationship, movement, etc. between the components under a certain specific posture (as shown in the accompanying drawings); if the specific posture changes, the directional indication or positional relationship will also change accordingly. In addition, the terms "first", "second", etc. involved in the embodiments of the present application are only used for the purpose of convenience of description and cannot be understood as indicating or implying relative importance.
[0048] The pre-charged sample-and-hold circuit of the embodiment of the present application is described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the features of the following embodiments and implementations can complement or be combined with each other.
[0049] The pre-charged sample-and-hold circuit of the present application includes a sampling module, such as Figure 1 As shown, the sampling module includes a sampling capacitor C, an input terminal Vin, an output terminal Vout, a sampling unit S2 and a holding unit S3.
[0050] The input terminal Vin is used to receive an input signal. The output terminal Vout is used to output a sampled signal. One end of the sampling unit S2 is connected to the input terminal Vin, and the other end is connected to the sampling capacitor C, and is used to transmit the input signal to the sampling capacitor C. One end of the holding unit S3 is connected to the sampling capacitor C, and the other end is connected to the output terminal Vout, and is used to output the sampled signal of the sampling capacitor C through the output terminal Vout.
[0051] The sampling module includes a sampling mode and a calibration mode:
[0052] In the sampling mode, the sampling unit S2 is turned on to electrically connect the input terminal Vin to the sampling capacitor C, and the holding unit S3 disconnects the output terminal Vout from the sampling capacitor C. In the calibration mode, the sampling unit S2 is turned on to the holding unit S3.
[0053] The input terminal Vin of the sampling module can be connected to the driving module, and the output terminal Vout can be connected to the analog-to-digital conversion module. The driving module is used to generate an analog signal, and use the analog signal as an input signal to provide a signal input for the sampling module. After the sampling module samples the input signal, the sampling signal is transmitted to the sampling capacitor C through the sampling unit S2. The sampling capacitor C can be used to store the sampling signal and keep the sampling signal unchanged. The holding unit S3 can transmit the sampling signal stored in the sampling capacitor C to the analog-to-digital conversion module through the output terminal Vout, thereby ensuring that the analog-to-digital conversion module reads a stable sampling signal during the conversion process.
[0054] The sampling module of the present application includes a sampling mode and a correction mode. In the sampling mode, the input terminal Vin transmits the input signal to the sampling capacitor C, and the sampling capacitor C samples the input signal. In the correction mode, the input terminal Vin charges the sampling capacitor C and the parasitic capacitor Cp at the same time. There is a parasitic capacitor Cp in the pre-charged sampling and holding circuit. When the sampling module outputs the sampling signal, the sampling capacitor C will charge the parasitic capacitor Cp, resulting in the sampling signal output by the sampling capacitor C through the output terminal Vout being inaccurate. In the correction mode, the input terminal Vin charges the sampling capacitor C and the parasitic capacitor Cp at the same time, and charges the two to the same voltage. After that, when the sampling module outputs the sampling signal, the sampling signal of the sampling capacitor C does not need to be charged to the parasitic capacitor Cp again, and can be directly output through the output terminal Vout, which is conducive to ensuring the output stability of the sampling signal and improving the sampling accuracy of the sampling module.
[0055] In one embodiment, the sampling module further includes a holding mode, in which the sampling unit S2 disconnects the electrical connection between the input terminal Vin and the sampling capacitor C, and the holding unit S3 is turned on to electrically connect the output terminal Vout to the sampling capacitor C. In the holding mode, the voltage value of the sampling capacitor remains unchanged, and a sampling signal is output.
[0056] In one embodiment, the sampling mode and the correction mode are executed sequentially. It should be noted that the "sequential execution" mentioned above means that the sampling module first executes the sampling mode and then executes the correction mode, or the sampling module first executes the correction mode and then the sampling mode. The sampling mode and the correction mode are executed alternately for multiple times, which does not belong to the above-mentioned sequential execution, and the execution of other modes between the sampling mode and the correction mode does not belong to the above-mentioned sequential execution.
[0057] In one embodiment, the calibration mode is executed after the sampling mode. When the sampling mode is executed first and then the calibration mode is executed, when the sampling module is in the holding mode, the sampling signal of the sampling capacitor C does not need to charge the parasitic capacitor Cp, and can be directly output through the output terminal Vout, which is conducive to ensuring the output stability of the sampling signal.
[0058] In one embodiment, the sampling unit S2 is always turned on from the start time of the sampling mode to the end time of the calibration mode, so as to ensure the continuity of sampling and reduce the voltage fluctuation caused by the on and off of the sampling unit.
[0059] Of course, in other embodiments, the correction mode may be executed first and then the sampling mode. In this embodiment, in the correction mode executed first, the input terminal Vin first charges the sampling capacitor C and the parasitic capacitor Cp to the same voltage. In the sampling mode executed later, the holding unit S3 is turned off, and the input terminal Vin continues to charge the sampling capacitor C. At this time, the electrical connection between the parasitic capacitor Cp and the input terminal Vin is disconnected, resulting in a certain deviation between the sampling capacitor C and the parasitic capacitor Cp at this stage. After executing the correction mode and the sampling mode, the sampling module will enter the holding mode. In the holding mode, the sampling capacitor C may charge the parasitic capacitor Cp, resulting in an error in the sampling signal of the sampling capacitor, but at this time, the sampling signal detected by the output terminal Vout is still higher than the sampling signal detected when the sampling module is not corrected. In one embodiment, the sampling module also includes a reference terminal Vref set to a reference voltage, and a pre-charging unit S1, one end of the pre-charging unit S1 is connected to the first plate of the sampling capacitor C, and the other end is connected to the reference terminal Vref, and is used to pre-charge the sampling capacitor C. The sampling module also includes a pre-charge mode, in which the sampling unit S2 and the holding unit S3 are disconnected, the pre-charge unit S1 is turned on, and the reference terminal Vref is electrically connected to the first plate of the sampling capacitor C. In other modes, the pre-charge unit S1 remains off. The reference voltage is a known and stable voltage value, which can charge the sampling capacitor C to the reference voltage value in advance, so that the sampling capacitor C can quickly reach the voltage value of the input signal during the sampling process to complete the sampling. By pre-charging the sampling capacitor C, the charging time required for sampling can be reduced, which is conducive to improving the speed and efficiency of sampling.
[0060] During operation, the sampling module first works in the pre-charge mode, and pre-charges the sampling capacitor C through the reference terminal Vref, so that the sampling capacitor C stores a certain amount of charge in advance. When a signal is input to the input terminal Vin, the sampling module works in the sampling mode, and transmits the input signal to the sampling capacitor C through the input terminal Vin. Since the sampling capacitor C is pre-charged, the sampling capacitor C can quickly reach the voltage value of the input signal in the sampling mode, so that the pre-charged sampling and holding circuit can complete the sampling in a shorter time. After that, the sampling module works in the holding mode, and outputs the sampling signal through the output terminal Vout. In this process, the voltage value of the sampling capacitor C remains unchanged, so that the analog-to-digital conversion module can read a stable sampling signal.
[0061] In one embodiment, Figures 2 to 4 As shown, the number of the sampling modules is multiple, and the input terminals Vin of at least two of the sampling modules are connected. That is, the multiple sampling modules can all receive the analog signal generated by the same driving module, and different sampling modules can sample the same analog signal in different time periods, and can collect multiple instantaneous values of the input signal, which is conducive to reducing the error caused by input signal fluctuations or noise. In addition, different sampling modules process different time periods of the same signal in parallel, which can meet the situation of high-frequency sampling or processing a large amount of data, and improve the sampling efficiency of the pre-charged sample-and-hold circuit.
[0062] In one embodiment, when the input ends of the plurality of sampling modules are connected, at the same time, only one of the plurality of sampling modules connected to the input ends is in the sampling mode. This arrangement ensures that at any time, only one sampling module samples the input signal, avoiding the situation where multiple sampling modules are charged at the same time, preventing the input signal from being distorted during the sampling process, and is conducive to improving the sampling accuracy.
[0063] In one embodiment, Figure 5 and Figure 6 As shown, there are multiple sampling modules, and the input terminal Vin of each sampling module is used to receive different input voltages. Multiple sampling modules can process different signal channels respectively, and each sampling module can independently sample different analog signals, which can improve the parallel processing capability of the system.
[0064] In one embodiment, Figures 3 to 6 As shown, the number of the sampling modules is multiple, and the output terminals Vout of at least two of the sampling modules are connected. When the output terminals Vout of the sampling modules are connected, the number of output terminals of the pre-charged sampling and holding circuit can be reduced, the parasitic capacitance can be reduced, and the input signal can be prevented from being distorted in the sampling mode and the holding mode. In addition, the sampling modules share the output terminals, which can simplify the circuit design and reduce the complexity of the routing.
[0065] In one embodiment, when the output ends of the plurality of sampling modules are connected, at the same time, only one of the plurality of sampling modules connected to the output ends is in the holding mode. The sampling signals collected by different sampling modules may be different. When the plurality of sampling modules are in the holding mode together, the output signals may conflict at the output end, thereby causing the output signals to be unstable or erroneous. Through the above-mentioned setting, it can be ensured that the outputs of each sampling module will not interfere with each other, which is conducive to improving the stability and accuracy of the output signal.
[0066] In one embodiment, Figure 2 and Figure 7 As shown, there are multiple sampling modules, and the output end of each sampling module is used to output different sampling signals. Each sampling module can output a sampling signal independently without waiting for other sampling modules to complete the output, allowing multiple sampling modules to output at the same time, thereby improving the output efficiency of the pre-charged sample-and-hold circuit.
[0067] In one embodiment, the precharge sampling and holding circuit includes a plurality of sampling modules. In the calibration mode of each sampling module, the precharge unit S1 in the sampling module is disconnected, and the sampling unit S2 and the holding unit S3 are turned on. When the sampling signal of a sampling module is output, a certain amount of charge will be stored on the parasitic capacitor Cp of the precharge sampling and holding circuit. When the next sampling module samples and outputs the input signal, the charge on the parasitic capacitor Cp will be redistributed with the charge on the sampling and holding capacitor, so that the signal value of the sampling signal on the sampling module changes, thereby generating signal crosstalk and causing signal distortion.
[0068] For the Nth sampling module, when the Nth sampling module is not calibrated, its output can be expressed as:
[0069]
[0070] For the Nth sampling module, when the Nth sampling module completes the calibration, its output can be expressed as:
[0071]
[0072] Wherein, Vout(N-1) is the output voltage of the N-1th sampling module, Vout(N) is the output voltage of the Nth sampling module, Vin(N) is the input voltage of the Nth sampling module, C N is the sampling capacitor of the Nth sampling module, C p It is the parasitic capacitance of the pre-charged sample and hold circuit output. It should be noted that the above formula Vout(N)=Vin(N) is only applicable to the case where the sampling mode is executed first and then the calibration mode is executed. Only in this case, the voltages of the sampling capacitor CN and the parasitic capacitor Cp are charged to the same as the input voltage.
[0073] According to the above formula, when the Nth sampling module is not calibrated, its output voltage Vout(N) is not equal to its input voltage Vin(N), indicating that the output signal of the Nth sampling module is inaccurate. After the Nth sampling module is calibrated, its output voltage Vout(N) is equal to its input voltage Vin(N), which can avoid crosstalk between different sampling modules and help improve the accuracy of signal acquisition and output.
[0074] In one embodiment, Figure 3 and Figure 4 As shown, the pre-charged sample-and-hold circuit further includes a voltage stabilizing terminal VDDA set to an analog power supply voltage, and the second plates of the sampling capacitors C in the plurality of sampling modules are all connected to the voltage stabilizing terminal VDDA. The second plates of the plurality of sampling capacitors C are all connected to a stable analog power supply voltage, ensuring that the voltage of the second plates of the sampling capacitors C remains unchanged during the sampling process, thereby avoiding sampling errors caused by voltage fluctuations.
[0075] In one embodiment, the reference terminal Vref of each sampling module is connected. Such a configuration enables all sampling modules to have the same reference voltage during the pre-charging process, which is beneficial to improving the consistency and stability of the sampling modules, simplifying the circuit design, reducing unnecessary complexity, and also helping to reduce costs.
[0076] The embodiments of the present application include but are not limited to the following circuit designs: Figures 1 to 7 As shown:
[0077] exist Figure 1 In the embodiment shown, the precharge sampling and holding circuit includes a sampling module, and the sampling module includes a precharge unit S1, a sampling unit S2, a holding unit S3 and a sampling capacitor C. The precharge sampling and holding circuit includes an input terminal Vin and an output terminal Vout. In physiological signal monitoring equipment such as electrocardiograms and electroencephalograms, the use of the above-mentioned precharge sampling and holding circuit can be used to improve the accuracy of signal acquisition and reduce the impact caused by the characteristics of weak signals that are susceptible to interference.
[0078] exist Figure 2 In the embodiment shown, the pre-charge sampling and holding circuit includes N sampling modules, wherein the first sampling module includes a pre-charge unit S1 <1> , sampling unit S2 <1> , Holding unit S3 <1> and sampling capacitor C1, the second sampling module includes a pre-charge unit S1 <2> , sampling unit S2 <2> , Holding unit S3 <2> and sampling capacitor C2, ..., the Nth sampling module includes a charging unit S1 <n>, sampling unit S2 <n>, Holding unit S3 <n>The input terminals of the N sampling modules are connected, and the output terminals are used to output different sampling signals. The pre-charged sampling and holding circuit includes an input terminal Vin and an output terminal Vout. <1> ~Vout <n>In situations where the same signal source needs to be sampled at multiple different frequencies or resolutions, such as in a power system where a grid voltage or current signal needs to be sampled at multiple rates, the above-mentioned precharged sample-and-hold circuit can be used.
[0079] exist Figure 3 In the embodiment shown, the pre-charge sampling and holding circuit includes two sampling modules, wherein the first sampling module includes a pre-charge unit S1 <1> , sampling unit S2 <1> , Holding unit S3 <1> and sampling capacitor C1, the second sampling module includes a pre-charge unit S1 <2> , sampling unit S2 <2> , Holding unit S3 <2> And sampling capacitor C2. The input ends of the two sampling modules are connected, and the output ends are connected. The precharged sampling and holding circuit includes an input terminal Vin and an output terminal Vout. The above-mentioned precharged sampling and holding circuit can be applied to the dual-channel parallel acquisition of biomedical signals. Two sampling modules simultaneously process two different sampling channels from the same input end to ensure the synchronization and accuracy of the acquired signals.
[0080] exist Figure 4 In the embodiment shown, the pre-charge sampling and holding circuit includes N sampling modules, wherein the first sampling module includes a pre-charge unit S1 <1> , sampling unit S2 <1> , Holding unit S3 <1> and sampling capacitor C1, the second sampling module includes a pre-charge unit S1 <2> , sampling unit S2 <2> , Holding unit S3 <2> and sampling capacitor C2, ..., the Nth sampling module includes a charging unit S1 <n>, sampling unit S2 <n>, Holding unit S3 <n>The input terminals of the N sampling modules are connected to each other, and the output terminals are connected to each other. The pre-charge sampling and holding circuit includes an input terminal Vin and an output terminal Vout.
[0081] exist Figure 5 In the embodiment shown, the pre-charge sampling and holding circuit includes N sampling modules, wherein the first sampling module includes a pre-charge unit S1 <1> , sampling unit S2 <1> , Holding unit S3 <1> and sampling capacitor C1, the second sampling module includes a pre-charge unit S1 <2> , sampling unit S2 <2> , Holding unit S3 <2> and sampling capacitor C2, ..., the Nth sampling module includes a charging unit S1 <n>, sampling unit S2 <n>, Holding unit S3 <n>The input terminals of the N sampling modules are used to receive different input signals, and the output terminals of the N sampling modules are connected. The pre-charged sampling and holding circuit includes N input terminals Vin <1> ~Vin <n>, and the output terminal Vout. In the process of simultaneous acquisition of multiple signal sources, for example, in the sensor system of an autonomous vehicle, when the vehicle needs to simultaneously acquire data from multiple sensors and combine their sampling results at the same output terminal, the above-mentioned pre-charged sample-and-hold circuit can be used.
[0082] exist Figure 6 In the embodiment shown, the precharge sample-and-hold circuit includes N sampling modules, wherein the first sampling module includes two sampling paths, one of which includes a precharge unit S1. <1> , sampling unit S2 <1> , Holding unit S3 <1> and sampling capacitor C1, and another sampling path includes pre-charge unit S1 <2> , sampling unit S2 <2> , Holding unit S3 <2> and sampling capacitor C2; the second sampling module includes two sampling paths, one of which includes a pre-charge unit S1 <3> , sampling unit S2 <3> , Holding unit S3 <3> and sampling capacitor C3, another sampling path includes pre-charge unit S1 <4> , sampling unit S2 <4> , Holding unit S3 <4> and sampling capacitor C4..., the Nth sampling module includes a charging unit S1 <n>, sampling unit S2 <n>, Holding unit S3 <n>The input terminals of the N sampling modules are used to receive different input signals, and the output terminals of the N sampling modules are connected. The pre-charged sampling and holding circuit includes N input terminals Vin <1> ~Vin <n>, and the output terminal Vout. The precharge sampling and holding circuit is suitable for complex multi-channel signal processing scenarios.
[0083] exist Figure 7 In the embodiment shown, the pre-charge sampling and holding circuit includes N sampling modules, wherein the first sampling module includes a pre-charge unit S1 <1> , sampling unit S2 <1> , Holding unit S3 <1> and sampling capacitor C1, the second sampling module includes a pre-charge unit S1 <2> , sampling unit S2 <2> , Holding unit S3 <2> and sampling capacitor C2, ..., the Nth sampling module includes a charging unit S1 <n>, sampling unit S2 <n>, Holding unit S3 <n>The input terminals of the N sampling modules are used to receive different input signals, and the output terminals of the N sampling modules are used to output different sampling signals. The pre-charged sampling and holding circuit includes N input terminals Vin <1> ~Vin <n>, and N output terminals Vout <1> ~Vout <n>The precharged sample-and-hold circuit is suitable for high-precision multi-channel signal acquisition. For example, in multi-point monitoring of power systems, the system needs to collect voltage and current signals from different locations and process sampling data of different frequencies or resolutions respectively. The above precharged sample-and-hold circuit can realize independent acquisition and independent output of multiple input signals.
[0084] The present application also provides a control method for a pre-charged sample-and-hold circuit. Figure 1 and Figure 8 For example, Figure 8 for Figure 1 The control timing diagram of the sampling module shown in the figure, wherein a high level indicates conduction and a low level indicates disconnection, and the control method includes a sampling step and a correction step.
[0085] In the sampling step, the holding unit S3 in the sampling module is controlled to be disconnected and the sampling unit S2 is controlled to be turned on, so that the sampling module is in the sampling mode T2. In this step, the input terminal Vin is controlled to be electrically connected to the first plate of the sampling capacitor C, and the output signal of the driving module is controlled to be input into the sampling module as an input signal. The input signal is input through the input terminal Vin, and the sampling capacitor C is controlled to sample the input signal.
[0086] In the calibration step, the sampling unit S2 and the holding unit S3 are controlled to be turned on, so that the sampling module is in the calibration mode T3. In the calibration step, the input terminal Vin is controlled to be electrically connected to the first plate of the sampling capacitor C, and the input terminal Vin is controlled to be electrically connected to the first plate of the parasitic capacitor Cp, so that the output terminal Vin charges the sampling capacitor C and the parasitic capacitor Cp at the same time.
[0087] In one embodiment, the sampling step and the correction step are performed sequentially.
[0088] In one embodiment, the correction step is performed after the sampling step.
[0089] In one embodiment, from the start time of the sampling step to the end time of the correction step, the sampling unit is always turned on.
[0090] In one embodiment, after the sampling step and the correction step are completed, the control method further includes a holding step. In the holding step, the sampling unit in the sampling module is controlled to be disconnected and the holding unit is controlled to be turned on, so that the sampling module is in a holding mode.
[0091] In the holding step, the sampling unit S2 in the sampling module is controlled to be disconnected and the holding unit S3 is controlled to be turned on, so that the sampling module is in the holding mode T4. In this step, the output terminal Vout is controlled to be electrically connected to the first electrode plate of the sampling capacitor C, the sampling capacitor C is controlled to hold the sampling signal, and the sampling signal is output as an output signal to the digital-to-analog conversion module through the output terminal Vout.
[0092] In one embodiment, the pre-charge sampling and holding circuit further includes a pre-charge unit S1 having one end connected to the sampling capacitor C and the other end connected to the reference end Vref. Before the sampling step and the correction step are started, the control method further includes a pre-charge step, in which the sampling unit S2 and the holding unit S3 in the sampling module are controlled to be disconnected and the pre-charge unit S1 is turned on, so that the sampling module is in a pre-charge mode. In this step, the input terminal Vin is controlled to be electrically connected to the first electrode plate of the sampling capacitor C, and the output signal of the driving module is controlled to be input into the sampling module as an input signal. The input signal is input through the input terminal Vin, and the sampling capacitor C is controlled to sample the input signal.
[0093] In one embodiment, the pre-charging unit S1 can be disconnected before the sampling unit S2 is turned on. For example, the sampling unit S2 can be turned on at the moment the pre-charging unit S1 is disconnected, or can be turned on after the sampling unit S2 has been disconnected for a period of time.
[0094] In one embodiment, the control method includes: when the input ends of at least two of the sampling modules are connected, at the same time, controlling only one of the sampling modules connected to the input ends to perform a sampling step; when the output ends of at least two of the sampling modules are connected, at the same time, controlling only one of the sampling modules connected to the output ends to perform a holding step.
[0095] The control method of each sampling module in the pre-charge sample and hold circuit is controlled according to the control method of the sampling module described above, so as to avoid conflicts between inputs or outputs of different sampling modules.
[0096] In one embodiment, Figure 3 and Fig. 9 As shown, the first sampling unit S2 in the first sampling module is controlled <1> Disconnect, first holding unit S3 <1> On, first pre-charge unit S1 <1> disconnect, so that the first sampling module is in the holding mode T4; and control the second sampling unit S2 in the second sampling module <2> On, second holding unit S3 <2> Disconnect, second pre-charge unit S1 <2> Disconnect to put the second sampling module in acquisition mode T2.
[0097] Control the first sampling unit S2 in the first sampling module <1> Disconnect, first holding unit S3 <1> Disconnect, first pre-charge unit S1 <1> The first sampling module is turned on to put it in the pre-charging mode T1; and the second sampling unit S2 in the second sampling module is controlled <2> On, second holding unit S3 <2> Conducting, second pre-charge unit S1 <2> Disconnect, so that the second sampling module is in the calibration mode T3.
[0098] Control the first sampling unit S2 in the first sampling module <1> On, first holding unit S3 <1> Disconnect, first pre-charge unit S1 <1> disconnect, so that the first sampling module is in sampling mode T2; and control the second sampling unit S2 in the second sampling module <2> Disconnect, second holding unit S3 <2> Conducting, second pre-charge unit S1 <2> Disconnect, so that the second sampling module is in the holding mode T4.
[0099] Control the first sampling unit S2 in the first sampling module <1> On, first holding unit S3 <1> On, first pre-charge unit S1 <1> disconnect, so that the first sampling module is in the calibration mode T3; and control the second sampling unit S2 in the second sampling module <2> Disconnect, second holding unit S3 <2> Disconnect, second pre-charge unit S1 <2> is turned on, so that the second sampling module is in the pre-charge mode T1.
[0100] exist Figure 3 and Fig. 9 In the embodiment shown, when the first sampling module is controlled to work in the sampling mode T2, the second sampling module is controlled to work in the holding mode T4, so that the input and output of the first sampling module and the second sampling module are staggered to avoid the signal conflict between the first sampling module and the second sampling module. At the same time, the above setting can also improve the sampling efficiency. Figure 1 Compared to the embodiment shown, Figure 3 The sampling efficiency of the illustrated embodiment is Figure 1 Twice the embodiment shown.
[0101] In one embodiment, Figure 5 and Fig.10 As shown, the input terminals Vin of N sampling modules <1> ~Vin <n>They are used to receive different sampling signals respectively, and the output terminals Vout of the N sampling modules are connected, so it is necessary to control that only one of the sampling modules is in the holding mode at the same time. Fig.10 As shown, the holding mode T4 of the first sampling module ends, and the second sampling module is controlled to enter the holding mode T4, that is, after the holding mode T4 of the n-1th sampling module ends, the nth sampling module is controlled to enter the holding mode T4. Where n = 1, 2, 3 ... N.
[0102] In one embodiment, when the pre-charge sampling and holding circuit includes a calibration mode T3, in the calibration mode T3, the sampling unit S2 and the holding unit S3 are both turned on. In order to avoid conflicts between the input and output of the pre-charge sampling and holding circuit, the control method of the pre-charge sampling and holding circuit further includes:
[0103] In the case that the input terminals Vin of at least two sampling modules are connected, at the same time, only one of the sampling modules connected to the input terminals Vin is controlled to be in the sampling mode T2 or the calibration mode T3.
[0104] In the case that the output terminals Vout of at least two of the sampling modules are connected, at the same time, only one of the sampling modules connected to the output terminals Vout is controlled to be in the holding mode T4 or the correction mode T3.
[0105] like Figure 5 and Fig.10 As shown, after the holding mode T4 of the n-1th sampling module ends, the nth sampling module is controlled to enter the correction mode T3.
[0106] It should be noted that the technical solutions or technical features described in the above embodiments can be combined or supplemented with each other without causing conflicts. The scope of protection of this application is not limited to the precise structures described in the above embodiments and shown in the drawings; all modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this application should be included in the scope of protection of this application.< / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n>
Claims
1. A precharged sample-and-hold circuit, characterized in that: The pre-charge sample-and-hold circuit comprises a sampling module, and the sampling module comprises: Sampling capacitor; An input terminal, for receiving an input signal; An output terminal, used for outputting a sampling signal; A sampling unit, one end of which is connected to the input end and the other end of which is connected to the sampling capacitor, and is used to transmit the input signal to the sampling capacitor; and a holding unit, one end of which is connected to the sampling capacitor and the other end of which is connected to the output end, and is used to output the sampling signal of the sampling capacitor through the output end; Wherein, the sampling module includes a sampling mode and a calibration mode; In the sampling mode, the sampling unit is turned on to electrically connect the input end to the sampling capacitor, and the holding unit disconnects the output end from the sampling capacitor; in the calibration mode, the sampling unit is turned on to the holding unit.
2. The precharge sample-and-hold circuit according to claim 1, characterized in that: The sampling mode and the correction mode are performed sequentially.
3. The precharge sample-and-hold circuit according to claim 1, characterized in that: The calibration mode is performed after the sampling mode.
4. The precharge sample-and-hold circuit according to claim 3, characterized in that: From the start time of the sampling mode to the end time of the calibration mode, the sampling unit is always turned on.
5. The precharge sample-and-hold circuit according to claim 1, characterized in that: The sampling module also includes a pre-charge mode and a hold mode; In the pre-charging mode, pre-charging the sampling capacitor; In the sampling mode, the input signal is transmitted to the pre-charged sampling capacitor; In the calibration mode, the input signal is simultaneously transmitted to the parasitic capacitor and the pre-charged sampling capacitor; After the parasitic capacitor receives the input signal, the holding mode is executed; in the holding mode, the sampling signal stored in the sampling capacitor is output.
6. The precharge sample-and-hold circuit according to claim 1, characterized in that: The sampling module further includes a holding mode. In the holding mode, the sampling unit disconnects the electrical connection between the input terminal and the sampling capacitor, and the holding unit is turned on to electrically connect the output terminal to the sampling capacitor.
7. The precharge sample-and-hold circuit according to claim 1, characterized in that: There are multiple sampling modules, and input ends of at least two sampling modules are connected, or the input end of each sampling module is used to receive different input voltages; The output ends of at least two of the sampling modules are connected, or the output end of each sampling module is used to output different sampling signals.
8. The precharge sample-and-hold circuit according to claim 7, characterized in that: In the case where the input ends of at least two of the sampling modules are connected, at the same time, only one of the sampling modules connected to the input ends is in the sampling mode; In the case that the output ends of at least two of the sampling modules are connected, at the same time, only one of the sampling modules connected to the output ends is in the holding mode.
9. The precharge sample-and-hold circuit according to claim 7, characterized in that: The pre-charge sampling and holding circuit also includes a voltage stabilizing end set to an analog power supply voltage; the sampling capacitors in the plurality of sampling modules are all connected to the voltage stabilizing end.
10. The pre-charged sample-and-hold circuit according to any one of claims 1 to 9, characterized in that: The sampling module also includes a reference terminal set as a reference voltage, and a pre-charge unit; One end of the pre-charging unit is connected to the sampling capacitor, and the other end is connected to the reference end, and is used to pre-charge the sampling capacitor; The sampling module further includes a pre-charging mode. In the pre-charging mode, the sampling unit and the holding unit are disconnected, the pre-charging unit is turned on, and the reference end is electrically connected to the sampling capacitor.
11. The precharge sample-and-hold circuit according to claim 10, characterized in that: When there are multiple sampling modules, the reference ends of each sampling module are connected.
12. A control method for a pre-charged sample-and-hold circuit, used to control the pre-charged sample-and-hold circuit according to any one of claims 1 to 11, characterized in that: The control method comprises: Sampling step: controlling the holding unit in the sampling module to be disconnected and the sampling unit to be turned on, so that the sampling module is in a sampling mode; Calibration step: controlling the sampling unit and the holding unit to be turned on, so that the sampling module is in a calibration mode.
13. The control method according to claim 12, characterized in that: The sampling step and the correction step are performed sequentially.
14. The control method according to claim 12, characterized in that: The correction step is performed after the sampling step.
15. The control method according to claim 14, characterized in that: From the start time of the sampling step to the end time of the correction step, the sampling unit is always turned on.
16. The control method according to claim 12, characterized in that: After the sampling step and the correction step are completed, the control method further includes a holding step. In the holding step, the sampling unit in the sampling module is controlled to be disconnected and the holding unit is controlled to be turned on, so that the sampling module is in a holding mode.
17. The control method according to claim 12, characterized in that: The pre-charge sampling and holding circuit also includes a pre-charge unit having one end connected to the sampling capacitor and the other end connected to the reference end; before the sampling step and the correction step start, the control method also includes a pre-charge step, in which the sampling unit and the holding unit in the sampling module are controlled to be disconnected and the pre-charge unit is turned on, so that the sampling module is in a pre-charge mode.
18. The control method according to claim 12, characterized in that: The control method includes: when the input ends of at least two of the sampling modules are connected, at the same time, controlling only one of the sampling modules connected to the input ends to perform the sampling step; when the output ends of at least two of the sampling modules are connected, at the same time, controlling only one of the sampling modules connected to the output ends to perform the holding step.