Real-time error code comparison method and system

Abstract

The invention discloses a real-time error code comparison method and system, and the method comprises the following steps: dividing a random sequence into data blocks with a first specified size, and sequentially transmitting the source data of each data block to a tested communication transmission channel; sequentially receiving target data of each data block from a tested communication transmission channel, averagely distributing the target data and the corresponding source data to each core according to the number of the cores when the target data is received, performing error code comparison on the corresponding source data and the target data by each core, and mapping an error code comparison result into a two-dimensional matrix; and accumulating all elements of the two-dimensional matrix to obtain a total error code comparison result. According to the invention, off-line comparison is upgraded to real-time comparison, so that the dependence on a disk is eliminated, and meanwhile, the efficiency of error code comparison testing is improved.

Description

Technical Field

[0001] The present invention relates to the field of communications, and in particular to a real-time bit error comparison method and system. Background Art

[0002] Satellite communications, wireless base station communications, or wired router-switched optoelectronic communications provide high-bandwidth data transmission and reception, where the bit error rate is an important indicator for measuring the reliability and availability of links and devices. For example, due to the fast signal transmission speed, large bandwidth, and strong anti-interference ability of optical communications, bit errors may still occur due to unfavorable factors such as noise interference during the transmission process. If the bit error rate is too high, the transmission fails. Before equipment, devices, links, and systems leave the factory, it is an indispensable step to evaluate the bit error rate of their transmission.

[0003] like Figure 1 As shown, bit error rate detection technology is a commonly used bit error rate detection scheme in practical applications. By sending known data, the data is compared with the original text after passing through the transmission equipment, devices, links, and systems. The ratio of the number of erroneous bits to the number of bits actually transmitted is the bit error rate.

[0004] like Figure 2 As shown, the test software stores the sent source data in the source file. The source data is received by the test software after passing through the transmission device, link, and system, and the data is stored as the target file. Generally, the bit error rate index is evaluated by comparing the source file and the target file offline to see if they are consistent, with a certain test duration or file size as the dimension.

[0005] like Figure 3 As shown, the bit-by-bit comparison method of the prior art solution is to XOR two 8-bit unsigned bytes and accumulate the number of bits to 1. Faced with the communication field, especially satellite communication and optical switching communication fields, with a transmission rate of at least 6GB / S per second, the existing technical solution cannot realize real-time calculation and evaluation of the bit error rate. It is necessary to store the data into files and perform subsequent file comparison to calculate the bit error rate. The existing solution has low testing efficiency. Regardless of whether the bit error rate meets the standard, it needs to be fully tested and the real-time indicators are known by the bit errors. When the bit error rate is unqualified, it also needs to be tested before a conclusion can be drawn, resulting in low test evaluation efficiency. In addition, the test requires a large-capacity disk with high-speed reading and writing to support it, otherwise it is impossible to store massive test data.

[0006] In summary, due to the large consumption of computing resources for real-time bit error comparison, existing technical solutions cannot achieve real-time bit error comparison. Summary of the invention

[0007] The technical problem to be solved by the present invention is as follows: In view of the above-mentioned problems in the prior art, a real-time bit error comparison method and system are provided to upgrade the offline comparison to the real-time comparison, thereby eliminating the dependence on the disk and improving the efficiency of the bit error comparison test.

[0008] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0009] A real-time bit error comparison method, applied to a multi-core computer, comprises the following steps:

[0010] Dividing the random sequence into data blocks of a first specified size, and sending source data of each data block to the communication transmission channel under test in turn;

[0011] Receive the target data of each data block from the communication transmission channel under test in sequence. Whenever the target data is received, the target data and the corresponding source data are evenly distributed to each core according to the number of cores. Each core performs a bit error comparison on the corresponding source data and target data, and maps the bit error comparison result into a two-dimensional matrix.

[0012] All elements of the two-dimensional matrix are accumulated to obtain the total bit error comparison result.

[0013] Furthermore, each core performs error comparison on the corresponding source data and target data, and maps the error comparison result into a two-dimensional matrix, specifically including:

[0014] Each core splits the corresponding source data and target data into sub-data of the second specified size, and then performs error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, and saves the error comparison results in corresponding elements of the two-dimensional matrix respectively.

[0015] Furthermore, when error comparison is performed on each sub-data of the source data and the corresponding sub-data of the target data in turn, specifically, each sub-data of the source data and the corresponding sub-data of the target data are XORed in turn and then the number of error bits is counted as the error comparison result of each sub-data of the source data and the corresponding sub-data of the target data.

[0016] Furthermore, when the error comparison results are stored in corresponding elements of the two-dimensional matrix respectively, it includes:

[0017] Convert the value of the current sub-data of the source data into the row value of the two-dimensional matrix, and convert the value of the corresponding sub-data of the target data into the column value of the two-dimensional matrix;

[0018] A target element in the two-dimensional matrix is ​​found according to the row value and the column value, and a bit error comparison result between the current sub-data of the source data and the corresponding sub-data of the target data is used as the value of the target element.

[0019] Furthermore, the two-dimensional matrix is ​​a two-dimensional matrix of a set of M*M elements, M=2 N , N is the number of bits of the sub-data, and when the value of the current sub-data of the source data is converted into the row value of the two-dimensional matrix, and the value of the corresponding sub-data of the target data is converted into the column value of the two-dimensional matrix, specifically, the binary sequence of the sub-data is converted into a decimal value.

[0020] Furthermore, the bit number of the sub-data is at least twice as much as 8.

[0021] Furthermore, the random sequence is a random PN sequence loaded into a pre-opened memory.

[0022] Furthermore, the data type of the memory is character type char.

[0023] The present invention also provides a real-time bit error comparison system, comprising a memory, a processor and a computer program stored in the memory, wherein the processor executes the computer program to implement any step of the real-time bit error comparison method.

[0024] The present invention also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of any one of the real-time bit error comparison methods are implemented.

[0025] The present invention also provides a computer program product, comprising a computer program, which implements the steps of any one of the real-time bit error comparison methods when executed by a processor.

[0026] Compared with the prior art, the advantages of the present invention are:

[0027] After the present invention divides the random sequence into data blocks of a first specified size, each data block is sequentially transmitted through the communication transmission channel under test to obtain corresponding target data, and then the source data and target data of the data block are evenly distributed to each core for error comparison according to the number of computer cores. By specifying the size of the data block, the dependence on the storage space capacity is reduced, and at the same time, computing resources are used for multi-core block processing, thereby improving real-time performance.

[0028] In the present invention, when each core performs error comparison, the source data and the target data are split into sub-data of the second specified size, and then the error comparison is performed on each sub-data of the source data and the corresponding sub-data of the target data in turn, and the error comparison results are respectively stored in the corresponding elements of the two-dimensional matrix. The efficiency of the error comparison is improved by matrix mapping, and the low-end computing resources can realize real-time error comparison. Compared with the prior art, the number of cycles of the error comparison is reduced, and the efficiency of the error comparison is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Schematic diagram of the bit error rate detection principle.

[0030] Figure 2 This is a schematic diagram of the principle of offline bit error comparison.

[0031] Figure 3 A schematic diagram of bit-by-bit comparison.

[0032] Figure 4 The figure is a flow chart of a method according to an embodiment of the present invention.

[0033] Figure 5 The figure is a schematic diagram of the principle of real-time bit error comparison according to an embodiment of the present invention.

[0034] Figure 6 Schematic diagram of distributing the source and destination data of a data block evenly to each core.

[0035] Figure 7 The figure is a schematic diagram of the principle of performing bit error comparison for each core in an embodiment of the present invention.

[0036] Figure 8 The diagram is a schematic diagram of the principle of matrix mapping of the bit error comparison result by each core in an embodiment of the present invention. DETAILED DESCRIPTION

[0037] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0038] Embodiment 1

[0039] This embodiment proposes a real-time bit error comparison method, which is a software method that uses a multi-core computer to compare bit errors in real time. The purpose is to improve the efficiency of bit error comparison, upgrade offline comparison to real-time comparison, thereby eliminating dependence on disks and improving the efficiency of bit error comparison testing.

[0040] like Figure 4 As shown, the method of this embodiment includes the following steps:

[0041] S1) Open up memory space, generate a random sequence and load it into memory;

[0042] S2) dividing the random sequence into data blocks of a first specified size, and sending source data of each data block to the communication transmission channel under test in turn;

[0043] S3) receiving the target data of each data block from the communication transmission channel under test in sequence, and each time the target data is received, evenly distributing the target data and the corresponding source data to each core according to the number of cores;

[0044] S4) Each core performs error comparison on the corresponding source data and target data, and maps the error comparison result into a two-dimensional matrix;

[0045] S5) All elements of the two-dimensional matrix are accumulated to obtain a total bit error comparison result.

[0046] The following takes a 16-core computer as an example to explain each step in detail.

[0047] In step S1 of this embodiment, the random sequence is a random PN sequence, and the size is 4 GB, so the memory space opened up is at least 4 GB, which can be flexibly adjusted according to computer resources.

[0048] In step S2 of this embodiment, the first specified size is 16MB. Figure 5 As shown, the memory data is passed through the communication transmission channel under test in sequence according to the size of 16MB, the 16MB data sent by the communication transmission channel under test is received in sequence, and the received target 16MB data is compared with the source 16MB data.

[0049] Step S3 of this embodiment is to start the computer multi-core generation processing comparison thread, and subdivide the target data and the corresponding source data for processing, such as Figure 6 As shown, when the target data and the corresponding source data are evenly distributed to each core according to the number of cores, the target 16MB data and the source 16MB data are divided into 16 sub-portions, each sub-portion is 1MB, and each core starts a core thread to process the target 1MB data and the source 1MB data, and a total of 16 core threads are started for processing.

[0050] Step S4 of this embodiment aims to quickly compare the bit error positions through address space mapping, and its specific steps include:

[0051] Each core splits the corresponding source data and target data into sub-data of the second specified size, and then performs error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, and saves the error comparison results in corresponding elements of the two-dimensional matrix respectively.

[0052] In this embodiment, the second specified size is 2 bytes (16 bits). Each time 2 bytes of data are compared, the number of error comparison cycles is reduced by at least 1 times. It should be noted that this scheme needs to improve the efficiency of error comparison. Therefore, the second specified size can also be set to other integer multiples of 8 according to actual needs, so that the number of bits of the sub-data is at least twice as much as 8.

[0053] In this embodiment, when performing error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, specifically, each sub-data of the source data and the corresponding sub-data of the target data are XORed in turn and then the number of error bits is counted as the error comparison result of each sub-data of the source data and the corresponding sub-data of the target data.

[0054] like Figure 7 As shown, 1MB of source data and 1MB of target data are divided into 524,288 groups of 2 bytes for comparison. 2 bytes are 16 binary bits, and the minimum value of a 16-bit unsigned integer is 0 and the maximum value is 2. 16 -1=65535, that is, a 2-byte source data and target data are both in the range of 0 to 65535, and the XOR result of the 2-byte source data and target data is also 2 bytes. The maximum number of error bits counted is 16, so the range of the error comparison result is 0 to 16 bits.

[0055] Correspondingly, in step S1 of this embodiment, when allocating memory, the data type of the memory uses character type char, which can store integers from 0 to 255, completely covering the range of error bit comparison results, while also greatly reducing memory usage, improving cache efficiency, and avoiding unnecessary data type conversion.

[0056] In this embodiment, when the bit error comparison results are stored in corresponding elements of the two-dimensional matrix respectively, it includes:

[0057] Convert the value of the current sub-data of the source data into the row value of the two-dimensional matrix, and convert the value of the corresponding sub-data of the target data into the column value of the two-dimensional matrix;

[0058] A target element in the two-dimensional matrix is ​​found according to the row value and the column value, and a bit error comparison result between the current sub-data of the source data and the corresponding sub-data of the target data is used as the value of the target element.

[0059] In this scheme, a two-dimensional matrix is ​​defined as a two-dimensional matrix AR of a set of M*M elements to store the error comparison results, M=2 N , N is the number of bits of the sub-data, so in this embodiment, the two-dimensional matrix AR is a two-dimensional matrix of 65536*65536 elements, and the AR[i][j] element stores the number of error bits of the sub-data i of the source data and the sub-data j of the target data, that is, the number of bits that are 1 after the XOR of the sub-data i and the sub-data j, and the element subscripts i, j satisfy (0≤i≤65535,0≤j≤65535). Therefore, when converting the value of the current sub-data of the source data into the row value of the two-dimensional matrix, and converting the value of the corresponding sub-data of the target data into the column value of the two-dimensional matrix, specifically, converting the binary sequence of the sub-data into a decimal value.

[0060] Step S5 of this embodiment aims to obtain the total number of error bits. Since each core in step S4 has saved the error comparison results of each source data and target data into the corresponding elements of the two-dimensional matrix, the total number of error bits can be obtained by adding up all elements of the two-dimensional matrix.

[0061] like Figure 8 As shown, 1MB of data is divided into 524,288 loops, each processing 2 bytes of source data and target data, where the source data src and the target data dest are brought into the subscripts of the two-dimensional matrix AR (AR[src][dest]), and the accumulated AR[src][dest] is the number of erroneous bits of the 1MB of data.

[0062] Embodiment 2

[0063] This embodiment provides a real-time bit error comparison system, including a memory, a processor, and a computer program stored in the memory. The processor executes the computer program to implement the steps of the real-time bit error comparison method described in Embodiment 1.

[0064] This embodiment further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the real-time bit error comparison method described in the first embodiment are implemented.

[0065] This embodiment also proposes a computer program product, including a computer program, which implements the steps of the real-time bit error comparison method described in the first embodiment when executed by a processor.

[0066] The computer program code of this embodiment can be implemented using C language, JAVA, C++, and has a good engineering foundation. The following is an example:

[0067]

[0068]

[0069]

[0070] In summary, the present invention proposes a real-time bit error comparison method and a system for executing the method, so that real-time bit errors can be realized at the software level of low-end computing resources. It utilizes multi-core block processing of computing resources and has high real-time performance. In the specific processing process, a two-dimensional matrix mapping method is adopted to improve the efficiency of bit error comparison, so that low-end computing resources can realize real-time bit error comparison.

[0071] The present invention uses char data elements to store the number of error bits, minimizes the reliance on memory size, and only requires the use of 4GB of memory. When performing error comparison, 2 bytes of data are compared each time, which reduces the number of error comparison cycles by at least 1 time, thereby improving the efficiency of error comparison.

[0072] The method of the invention is easy to implement and has high transplantability, can be implemented using C language, JAVA, and C++, and has a good engineering foundation.

[0073] The present invention has clear principles, small memory usage, and portability to common computers, servers, or embedded hardware systems, allowing real-time bit error comparison to be implemented on relatively low-end computing resources, thereby increasing the dependency of the bit error test link on the hardware platform and improving the progress of project testing and delivery.

[0074] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. A real-time bit error comparison method, applied to a multi-core computer, characterized in that: The following steps are involved: Dividing the random sequence into data blocks of a first specified size, and sending source data of each data block to the communication transmission channel under test in turn; Receive the target data of each data block from the communication transmission channel under test in sequence. Whenever the target data is received, the target data and the corresponding source data are evenly distributed to each core according to the number of cores. Each core performs a bit error comparison on the corresponding source data and target data, and maps the bit error comparison result into a two-dimensional matrix. All elements of the two-dimensional matrix are accumulated to obtain the total bit error comparison result.

2. The real-time bit error comparison method according to claim 1, characterized in that: Each core performs error comparison on the corresponding source data and target data, and maps the error comparison result to a two-dimensional matrix, specifically including: Each core splits the corresponding source data and target data into sub-data of the second specified size, and then performs error comparison on each sub-data of the source data and the corresponding sub-data of the target data in turn, and saves the error comparison results in corresponding elements of the two-dimensional matrix respectively.

3. The real-time bit error comparison method according to claim 2, characterized in that: When performing error comparison between each sub-data of the source data and the corresponding sub-data of the target data in turn, specifically, each sub-data of the source data and the corresponding sub-data of the target data are XORed in turn and then the number of error bits is counted as the error comparison result between each sub-data of the source data and the corresponding sub-data of the target data.

4. The real-time bit error comparison method according to claim 2, characterized in that: When the error comparison results are stored in the corresponding elements of the two-dimensional matrix, it includes: Convert the value of the current sub-data of the source data into the row value of the two-dimensional matrix, and convert the value of the corresponding sub-data of the target data into the column value of the two-dimensional matrix; A target element in the two-dimensional matrix is ​​found according to the row value and the column value, and a bit error comparison result between the current sub-data of the source data and the corresponding sub-data of the target data is used as the value of the target element.

5. The real-time bit error comparison method according to claim 4, characterized in that: The two-dimensional matrix is ​​a two-dimensional matrix of a set of M*M elements, M=2 N , N is the number of bits of the sub-data, and when the value of the current sub-data of the source data is converted into the row value of the two-dimensional matrix, and the value of the corresponding sub-data of the target data is converted into the column value of the two-dimensional matrix, specifically, the binary sequence of the sub-data is converted into a decimal value.

6. The real-time bit error comparison method according to claim 1, characterized in that: The random sequence is a random PN sequence loaded into a pre-opened memory.

7. The real-time bit error comparison method according to claim 6, characterized in that: The data type of the memory is character type char.

8. A real-time bit error comparison system, comprising a memory, a processor and a computer program stored in the memory, characterized in that: The processor executes the computer program to implement the steps of the real-time bit error comparison method according to any one of claims 1 to 7.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the real-time bit error comparison method according to any one of claims 1 to 7 are implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the real-time bit error comparison method according to any one of claims 1 to 7 are implemented.

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