Circuit board function test automation control system and method

Abstract

The invention discloses an automatic control system and method for circuit board function testing, and relates to the field of intelligent testing, and the method comprises the steps: collecting operation data of each end interface of a to-be-tested circuit board through an electric signal sensor, forming a data set, extracting effective signals from the data, forming an effective signal set, and carrying out the collection of the effective signals; and performing fault processing and analysis on the effective signal set to obtain a test result of the circuit board, and finally transmitting the test result to terminal equipment for real-time checking. The process has the effects that fault diagnosis can be efficiently carried out on the circuit board, the performance and reliability of the circuit board are ensured, instant feedback is provided at the same time, and an engineer can rapidly position a problem and take corresponding measures.

Description

Technical Field

[0001] The present application relates to the field of intelligent testing, and more specifically, to an automated control system and method for circuit board functional testing. Background Art

[0002] With the rapid development of electronic technology, circuit boards, as an indispensable part of modern electronic products, play a vital role in their design, manufacturing and maintenance. Circuit board functional testing is an important part of ensuring product quality and reliability. It not only involves functional verification of finished circuit boards, but also real-time monitoring and diagnosis of potential faults on the production line. Traditional testing relies on manual labor and special equipment, which is costly, time-consuming, inefficient, and prone to errors. It is difficult to meet the large-scale production needs of high-precision circuit boards.

[0003] In this regard, patent CN118465491A proposes a functional test method and test system for circuit boards, which uses an electrical signal sensor to obtain the operating parameters of each port, and then filters and amplifies these parameters to extract pure valid signals. Subsequently, a preset algorithm is applied to analyze the valid signal and diagnose the fault to obtain the test results. Finally, the test results are sent to the terminal device in real time, allowing technicians to monitor the test progress and results in real time, thereby eliminating the limitations of traditional manual operations and improving the automation and accuracy of the test process.

[0004] This patent determines whether there is a fault by comparing the valid signals (such as voltage value, pulse width) obtained from each port with the pre-set standard value. However, the preset standard value is usually set based on ideal conditions. In practical applications, some faults may be caused by short transient events, such as power supply fluctuations or electromagnetic interference. If you only rely on static thresholds, such transient problems may not be captured because they last for a short time, but have an important impact on system stability. In addition, analyzing the data points of each port separately can easily ignore the relationship between the various parts. In fact, the collaborative work between multiple ports is also critical. Judging by the threshold of a single port may miss the interaction between multiple ports, resulting in incomplete fault diagnosis.

[0005] Therefore, an optimized circuit board functional test automation control solution is desired. Summary of the invention

[0006] In order to solve the above technical problems, this application is proposed.

[0007] According to one aspect of the present application, a circuit board function test automation control method is provided, which includes: acquiring operation data of each end interface of a circuit board to be tested collected by an electrical signal sensor to obtain a set of operation data; extracting valid signals of each operation data in the set of operation data to obtain a set of valid signals; performing fault processing and analysis on the set of valid signals to obtain a test result of the circuit board to be tested; transmitting the test result to a terminal device for real-time viewing; wherein, performing fault processing and analysis on the set of valid signals to obtain the test result of the circuit board to be tested includes: Extracting signal features from each valid signal in the set of valid signals to obtain a set of valid signal waveform features; The set of effective signal waveform features is subjected to graph convolution autocorrelation feature aggregation to obtain effective signal topology aggregation coding features of circuit board operation, including: constructing topological features of the set of effective signal waveform features to obtain effective signal waveform graph wandering topology features; based on the effective signal waveform graph wandering topology features, calculating the weight factors of each effective signal waveform feature in the set of effective signal waveform features to obtain a set of effective signal waveform autocorrelation gated significant confidence weight factors; based on the set of effective signal waveform autocorrelation gated significant confidence weight factors, weighted aggregation of the set of effective signal waveform features is performed to obtain the effective signal topology aggregation coding features of circuit board operation; The test result is obtained based on the effective signal topology aggregation coding feature of the circuit board operation, and the test result is used to indicate whether there is a fault in the circuit board to be tested.

[0008] According to another aspect of the present application, a circuit board function test automation control system is provided, which is used to execute the above-mentioned circuit board function test automation control method, and the circuit board function test automation control system includes: A signal feature extraction module, used for extracting signal features from each valid signal in the set of valid signals to obtain a set of valid signal waveform features; A signal graph convolution feature aggregation module, used to perform graph convolution autocorrelation feature aggregation on the set of effective signal waveform features to obtain effective signal topology aggregation coding features for circuit board operation, wherein the signal graph convolution feature aggregation module includes: a signal topology feature construction unit, used to construct the topology features of the set of effective signal waveform features to obtain effective signal waveform graph wandering topology features; a signal feature weight factor calculation unit, used to calculate the weight factors of each effective signal waveform feature in the set of effective signal waveform features based on the effective signal waveform graph wandering topology features to obtain a set of effective signal waveform autocorrelation gated significant confidence weight factors; a signal feature weighted aggregation unit, used to perform weighted aggregation on the set of effective signal waveform features based on the set of effective signal waveform autocorrelation gated significant confidence weight factors to obtain the effective signal topology aggregation coding features for circuit board operation; The fault judgment module is used to obtain the test result based on the effective signal topology aggregation coding feature of the circuit board, and the test result is used to indicate whether there is a fault in the circuit board to be tested.

[0009] Compared with the prior art, the present application provides an automated control system and method for circuit board functional testing, which uses artificial intelligence-based data encoding and processing technology to extract signal features from each valid signal, thereby intelligently judging whether the circuit board to be tested has a fault based on the graph convolution autocorrelation aggregation representation between the waveform features of each valid signal. Through the solution of the present application, it is possible to dynamically monitor and learn the normal working mode of the circuit board under various conditions, thereby effectively identifying these transient problems and improving the sensitivity and accuracy of fault detection. At the same time, it is possible to model the complex associations between different ports, capture the interactive effects between multiple ports, provide a more comprehensive fault diagnosis perspective, and avoid missing key information. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] By describing the embodiments of the present application in more detail in conjunction with the accompanying drawings, the above and other purposes, features and advantages of the present application will become more apparent. The accompanying drawings are used to provide a further understanding of the embodiments of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0011] Figure 1 The figure is a flow chart of a circuit board function test automation control method according to an embodiment of the present application.

[0012] Figure 2 This is a flowchart of step S130 in the circuit board function test automation control method according to an embodiment of the present application.

[0013] Figure 3This is a flowchart of step S220 in the circuit board function test automation control method according to an embodiment of the present application.

[0014] Figure 4 The block diagram is a circuit board function test automation control system according to an embodiment of the present application. DETAILED DESCRIPTION

[0015] The embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments described herein, but rather these embodiments are provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0016] It should be understood that the various steps described in the method embodiments of the present disclosure may be performed in different orders and / or in parallel. In addition, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present disclosure is not limited in this respect.

[0017] It should be noted that the modifications of "one" and "plurality" mentioned in the present disclosure are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more".

[0018] Therefore, in view of the problems in the above-mentioned background technology, based on patent CN118465491A, this application proposes an automatic control method for circuit board function testing. Figure 1 Flow chart of the circuit board function test automation control method according to the embodiment of the present application. Figure 1 As shown, according to the automated control method for circuit board functional testing of an embodiment of the present application, it includes: S110, acquiring the operating data of each end interface of the circuit board to be tested collected by the electrical signal sensor to obtain a set of operating data; S120, extracting the valid signal of each operating data in the set of operating data to obtain a set of valid signals; S130, performing fault processing and analysis on the set of valid signals to obtain the test result of the circuit board to be tested; S140, transmitting the test result to the terminal device for real-time viewing.

[0019] Specifically, in step S110, the operation data of each end interface of the circuit board to be tested collected by the electrical signal sensor is obtained to obtain a set of operation data. It should be understood that the operation data of each port of the circuit board to be tested refers to various electrical parameters collected from different interfaces (ports) of the circuit board through the electrical signal sensor, such as voltage value, current value, pulse width, etc. Therefore, in order to more accurately capture and record the actual working conditions on the circuit board, the operation data of each end interface of the circuit board to be tested is collected by the electrical signal sensor, so as to ensure that the test results are more accurate and reliable.

[0020] Specifically, in step S120, the effective signal of each operating data in the set of operating data is extracted to obtain a set of effective signals. Accordingly, in the functional test process of the circuit board, the effective signal refers to the electrical signal that can truly reflect the actual working state of each port of the circuit board after filtering and amplification from the set of operating data. These signals exclude noise and other interference components and are the basis for subsequent analysis, fault diagnosis and performance evaluation. In particular, the specific extraction process of the effective signal refers to patent CN118465491A, which is not the focus of this application and is not described in detail.

[0021] Specifically, in step S130, the set of valid signals is fault processed and analyzed to obtain the test result of the circuit board to be tested. It should be understood that the functional integrity of the circuit board is crucial to ensure the stable operation and reliability of the electronic device. In a complex electronic product, the circuit board is a core component that carries various components and signal paths, and the completeness and stability of its functions directly affect the performance of the entire system. Any slight fault or defect may cause the system to work abnormally or even completely fail, thereby affecting the user experience, product life and safety. Accordingly, the technical concept of the present application is to use data encoding and processing technology based on artificial intelligence to extract signal features from each valid signal, so as to intelligently judge whether the circuit board to be tested has a fault based on the graph convolution autocorrelation aggregation representation between the waveform features of each valid signal. Through the square scheme of the present application, it is possible to dynamically monitor and learn the normal working mode of the circuit board under various conditions, so as to effectively identify these transient problems and improve the sensitivity and accuracy of fault detection. At the same time, it is possible to model the complex associations between different ports, capture the interactive effects between multiple ports, provide a more comprehensive fault diagnosis perspective, and avoid missing key information.

[0022] Figure 2 Flow chart of step S130 in the circuit board function test automation control method according to an embodiment of the present application. Specifically, in the embodiment of the present application, Figure 2As shown, the S130, performing fault processing and analysis on the set of valid signals to obtain the test result of the circuit board to be tested, includes: S210, performing signal feature extraction on each valid signal in the set of valid signals to obtain a set of valid signal waveform features; S220, performing graph convolution autocorrelation feature aggregation on the set of valid signal waveform features to obtain circuit board operation valid signal topological aggregation coding features; S230, obtaining the test result based on the circuit board operation valid signal topological aggregation coding features, and the test result is used to indicate whether the circuit board to be tested has a fault.

[0023] In step S210, signal feature extraction is performed on each valid signal in the set of valid signals to obtain a set of valid signal waveform features. Specifically, in an embodiment of the present application, signal feature extraction is performed on each valid signal in the set of valid signals to obtain a set of valid signal waveform features, including: processing each valid signal in the set of valid signals by a signal feature extractor based on a deep convolutional neural network model to obtain a set of valid signal waveform feature coding vectors as the set of valid signal waveform features. It should be understood that, considering that each valid signal contains key attributes (such as frequency, amplitude, phase, etc.) that best characterize the working state of the circuit board, these different waveform features may have abnormal waveform patterns and characteristics. Therefore, in the technical solution of the present application, signal feature extraction is performed on each valid signal in the set of valid signals to capture and mine the key and important waveform features in each valid signal, and obtain a set of valid signal waveform feature coding vectors. In particular, in a specific embodiment of the present application, each valid signal in the set of valid signals is processed by a signal feature extractor based on a deep convolutional neural network model to obtain a set of valid signal waveform feature coding vectors as the set of valid signal waveform features. It should be understandable that the deep convolutional neural network model can effectively capture local features in the signal (such as specific waveforms or frequency components) through multiple convolutional layers, and gradually integrate these local features through pooling layers to understand the broader context, which helps to detect subtle changes that may indicate faults, thereby more accurately characterizing the characteristics of the signal.

[0024] In particular, the process of processing each valid signal in the set of valid signals by a signal feature extractor based on a deep convolutional neural network model is as follows: Here, deep convolutional neural networks are introduced as a tool to mine the unique patterns contained in each valid signal. DCNN is a machine learning architecture that is particularly suitable for processing structured input data (such as images or time series). It gradually parses the input data through a series of convolutional layers, activation functions, and pooling layers, and automatically learns how to selectively focus on those parts that are most helpful for classification tasks. In this case, DCNN is used to process one-dimensional time series data, that is, valid signal waveforms from different ports.

[0025] When a valid signal enters DCNN, it first passes through multiple convolutional layers for feature mapping. Each convolutional layer consists of several filters that slide on the input signal and perform local weighted summation operations to generate a new set of representations, called feature maps. These feature maps capture the local characteristics of the original signal, such as specific frequency components or the location of peaks and troughs. As the number of network layers increases, low-level features are gradually combined into high-level abstract expressions, which helps to understand a wider range of contextual information, rather than just numerical changes at a single point.

[0026] Next, the convolutional layer is usually followed by a nonlinear activation unit, such as the ReLU function. The role of the activation function is to introduce nonlinear elements into the model, making the network more expressive and able to fit more complex functional relationships. This is crucial for modeling possible nonlinear behaviors inside the circuit board, because the interactions between electronic components are often not simple linear superpositions.

[0027] In addition, in order to prevent overfitting and reduce the amount of computation, DCNN also includes an operation called "pooling". Pooling can reduce the spatial resolution of feature maps while maintaining important features. Common pooling methods include maximum pooling and average pooling. The former selects the maximum value in the area, while the latter takes the average value. This downsampling method not only reduces the number of parameters required for subsequent layers, but also enhances the robustness of the model to small changes in the input.

[0028] As the feature extraction process progresses, the deep convolutional layers begin to integrate the local features learned at different scales to construct a more global description. At this point, each valid signal has been transformed into a series of high-dimensional vectors that comprehensively reflect the dynamic evolution of the signal in the entire time window and its potential connection with other signals. It is worth noting that since the function of the circuit board is determined by many independent and interrelated components, at this stage, DCNN is not just analyzing the data of a single port in isolation, but trying to establish a holistic view of the working status of the entire circuit board.

[0029] Finally, after sufficient training, the DCNN will output multiple encoding vectors as a collection of effective signal waveform features. These encoding vectors not only condense the main features of the original signal, but also exclude unnecessary details, which are very suitable for subsequent fault processing and analysis. More importantly, compared with the traditional method of manually defining features, the DCNN-based method has higher flexibility and adaptability. It can automatically adjust internal parameters to adapt to the characteristics of different types of circuit boards, and even discover hidden patterns without clear physical meaning.

[0030] In step S220, the set of effective signal waveform features is subjected to graph convolution autocorrelation feature aggregation to obtain effective signal topology aggregation coding features of circuit board operation. In particular, it is considered that each effective signal waveform feature expresses the key waveform characteristic information generated by each end interface or component on the circuit board during operation. There are mutual connections and interaction patterns between these features, and each feature plays a different important role in the whole. Therefore, in order to more comprehensively capture and understand the complex signal interaction relationship inside the circuit board, so as to achieve more accurate and intelligent fault diagnosis and performance evaluation, in the technical solution of the present application, the set of effective signal waveform features is processed by the graph convolution autocorrelation feature aggregation mechanism to obtain effective signal topology aggregation coding features of circuit board operation. It can be understood that this mechanism can effectively model the connectivity and signal transmission path between each component on the circuit board, that is, the topological structure, so as to more clearly understand how the signal propagates on the circuit board and locate potential fault points. And this mechanism not only considers the relationship between directly adjacent nodes, but also explores the indirect association between nodes through multiple steps to automatically adjust the importance weights of different paths or connections, thereby revealing a deeper signal interaction pattern.

[0031] Figure 3 Flow chart of step S220 in the circuit board function test automation control method according to an embodiment of the present application. Specifically, in the embodiment of the present application, Figure 3 As shown, in step S220, the set of effective signal waveform features is subjected to graph convolution autocorrelation feature aggregation to obtain circuit board operation effective signal topology aggregation coding features, including: S310, constructing the topological features of the set of effective signal waveform features to obtain effective signal waveform graph wandering topology features; S320, based on the effective signal waveform graph wandering topology features, calculating the weight factors of each effective signal waveform feature in the set of effective signal waveform features to obtain a set of effective signal waveform autocorrelation gated significant confidence weight factors; S330, based on the set of effective signal waveform autocorrelation gated significant confidence weight factors, performing weighted aggregation on the set of effective signal waveform features to obtain the circuit board operation effective signal topology aggregation coding features.

[0032] Specifically, in the embodiment of the present application, the S310, constructing the topological features of the set of effective signal waveform features to obtain the effective signal waveform graph wandering topological features, includes: Each effective signal waveform feature coding vector in the set of effective signal waveform feature coding vectors is subjected to hyperbolic space mapping to obtain a set of effective signal waveform feature coding vectors after hyperbolic space mapping. The process can be expressed by the formula: ; in, is a set of the effective signal waveform feature coding vectors, and are respectively the first, second, and third in the set of the effective signal waveform feature coding vectors. , and A valid signal waveform feature encoding vector, and are the first weight matrix in hyperbolic space and the second weight matrix in hyperbolic space respectively, for A waveform feature coding vector of an effective signal after hyperbolic space mapping is performed; The Poincare distance between any two effective signal waveform feature coding vectors after hyperbolic space mapping in the set of effective signal waveform feature coding vectors after hyperbolic space mapping is calculated to obtain the effective signal waveform graph walk topology matrix. The process can be expressed by the formula: ;in, for The effective signal waveform feature coding vector after hyperbolic space mapping is obtained. for The effective signal waveform feature coding vector after hyperbolic space mapping is obtained. is the square of the vector's magnitude, is the inverse hyperbolic cosine function, For calculation and The Poincare distance between The effective signal waveform is the first in the wandering topology matrix The eigenvalues ​​of the positions; The effective signal waveform graph walk topology matrix is ​​subjected to dilated convolution coding to obtain an effective signal waveform graph walk topology feature matrix as the effective signal waveform graph walk topology feature. The process can be expressed by the formula: ;in, is the effective signal waveform wandering topology matrix, is the dilated convolutional coding, It is the effective signal waveform wandering topological characteristic matrix.

[0033] It should be understood that each effective signal waveform feature encoding vector in the set of effective signal waveform feature encoding vectors is respectively subjected to hyperbolic space mapping. That is, through hyperbolic space mapping, data with a hierarchical structure can be better represented. Hyperbolic space can naturally capture the distribution of data in a tree or hierarchical structure, which is particularly useful for representing the complex connection relationship between different components on a circuit board, and helps to enhance the model's understanding of the topological structure, that is, keeping the relative distance between data points unchanged, and obtaining a set of effective signal waveform feature encoding vectors after hyperbolic space mapping.

[0034] Accordingly, the Poincare distance between any two effective signal waveform feature encoding vectors after hyperbolic space mapping is calculated to construct the effective signal waveform graph walk topology matrix. It should be understood that the Poincare distance is a method of measuring the distance between two points in hyperbolic space, which can effectively reflect the hierarchical relationship and relative position between nodes. By constructing the graph walk topology matrix, the association strength between each end interface or component can be quantified to reflect the intrinsic connectivity of each effective signal data set, providing a basis for subsequent graph convolution operations.

[0035] It should be understood that the effective signal waveform graph walk topology matrix is ​​subjected to dilated convolution coding to expand the receptive field without increasing the number of parameters, thereby capturing a wider range of contextual information and obtaining the effective signal waveform graph walk topology feature matrix. This helps to improve the model's ability to capture long-distance dependencies, making the topological features richer and more comprehensive.

[0036] Specifically, in the embodiment of the present application, the S320, based on the walk topology feature of the effective signal waveform graph, calculates the weight factor of each effective signal waveform feature in the set of effective signal waveform features to obtain a set of effective signal waveform autocorrelation gated significant confidence weight factors, including: The effective signal waveform graph walk topology feature matrix and the set of effective signal waveform feature encoding vectors after hyperbolic space mapping are subjected to global context walk enhancement based on graph convolution to obtain a set of effective signal waveform context semantic enhancement feature vectors. The process can be expressed by the formula: ;in, is the effective signal waveform wandering topological characteristic matrix, for The effective signal waveform feature coding vector after hyperbolic space mapping is obtained. is the graph convolutional coding, It is the first in the set of valid signal waveform context semantic enhancement feature vectors. A valid signal waveform context semantics enhanced feature vector; Based on the set of valid signal waveform context semantics enhanced feature vectors, the autocorrelation gated significant confidence weight factor of each valid signal waveform feature coding vector in the set of valid signal waveform feature coding vectors is calculated to obtain the set of valid signal waveform autocorrelation gated significant confidence weight factors.

[0037] More specifically, in an embodiment of the present application, based on the set of the effective signal waveform context semantics enhanced feature vectors, the autocorrelation gated significant confidence weight factor of each effective signal waveform feature encoding vector in the set of the effective signal waveform feature encoding vectors is calculated to obtain the set of the effective signal waveform autocorrelation gated significant confidence weight factors, including: Autocorrelation gating is performed on each corresponding group of effective signal waveform context semantic enhancement feature vectors and effective signal waveform feature encoding vectors in the set of effective signal waveform context semantic enhancement feature vectors and the set of effective signal waveform feature encoding vectors to obtain a set of effective signal waveform autocorrelation gating significant confidence factors. The process can be expressed by the formula: ;in, is the first in the set of effective signal waveform feature coding vectors A valid signal waveform feature encoding vector, It is the first in the set of valid signal waveform context semantic enhancement feature vectors. A valid signal waveform context semantic enhancement feature vector, is the normalization function, To subtract by position point, It is calculated and The autocorrelation gated significance confidence factor between for and The effective signal waveform autocorrelation gated significant confidence factor between ; The set of the effective signal waveform autocorrelation gated significant confidence factors is normalized based on the Softmax function to obtain the set of the effective signal waveform autocorrelation gated significant confidence weight factors. The process can be expressed by the formula: ;in, for and The effective signal waveform autocorrelation gated significant confidence factor between represents the exponential function value with the natural constant e as the base, is the number of effective signal waveform autocorrelation gated significant confidence factors in the set of effective signal waveform autocorrelation gated significant confidence factors, yes The corresponding effective signal waveform autocorrelation gated significant confidence weight factor.

[0038] It should be understood that the global context walking enhancement of the effective signal waveform graph walk topological feature matrix and the effective signal waveform feature encoding vector after each hyperbolic space mapping is performed on the graph convolution to further integrate information from different neighboring nodes, and the global context is combined to enhance the local feature representation, thereby enhancing the model's understanding of complex signal interaction patterns and obtaining a set of effective signal waveform context semantically enhanced feature vectors. In particular, the graph convolutional network uses its propagation mechanism to diffuse and aggregate information in the graph structure, so that each node can obtain the data of its multi-hop neighbors. The consideration of the global context goes beyond the limitation of focusing only on neighboring nodes, but takes the entire graph architecture into consideration, thereby obtaining semantically more enhanced features that contain more comprehensive global information.

[0039] Subsequently, the obtained set of effective signal waveform context semantics enhancement feature vectors and the set of effective signal waveform feature encoding vectors are subjected to autocorrelation gating processing to evaluate the consistency and correlation between the context semantics enhancement features and the original effective signal waveform features, and obtain a set of effective signal waveform autocorrelation gating significant confidence factors. In this way, it can ensure that key signals receive more attention during the aggregation process, while suppressing the interference and influence of irrelevant information.

[0040] Next, the set of significant confidence factors of the effective signal waveform autocorrelation gate is normalized based on the Softmax function to utilize the Softmax function to convert the original confidence factors into a probability distribution form, ensuring the non-negativity of the weight values ​​and the sum of 1, and obtaining a set of significant confidence weight factors of the effective signal waveform autocorrelation gate to reflect the degree of influence of this feature on the final significant aggregation feature.

[0041] Specifically, in the embodiment of the present application, the S330, based on the set of significant confidence weight factors of the effective signal waveform autocorrelation gated control, performs weighted aggregation on the set of effective signal waveform features to obtain the circuit board operation effective signal topology aggregation coding feature, including: using the set of significant confidence weight factors of the effective signal waveform autocorrelation gated control as the set of weights, calculating the position-weighted sum of the set of effective signal waveform feature coding vectors to obtain the circuit board operation effective signal topology aggregation coding vector as the circuit board operation effective signal topology aggregation coding feature, and the process can be expressed by the formula: ;in, is the first in the set of effective signal waveform feature coding vectors A valid signal waveform feature encoding vector, yes The corresponding effective signal waveform autocorrelation gated significant confidence weight factor, is the number of vectors in the set of valid signal waveform feature coding vectors, For point-by-position multiplication, It is the effective signal topology aggregation coding vector running on the circuit board.

[0042] Finally, the set of effective signal waveform autocorrelation gated significant confidence weight factors is used as the set of weights, and the position-weighted sum of the set of effective signal waveform feature coding vectors is calculated to generate a highly concentrated and representative circuit board operation effective signal topology aggregation coding vector. This coding vector not only contains local signal characteristics, but also integrates global topology information, providing a comprehensive description of the circuit board status.

[0043] In step S230, based on the effective signal topology aggregation coding feature of the circuit board operation, the test result is obtained, and the test result is used to indicate whether the circuit board to be tested has a fault. Specifically, in an embodiment of the present application, based on the effective signal topology aggregation coding feature of the circuit board operation, the test result is obtained, including: inputting the effective signal topology aggregation coding vector of the circuit board operation into a fault diagnosis module based on a classifier to obtain the test result. That is, the effective signal topology aggregation coding feature of the circuit board operation obtained by graph convolution autocorrelation aggregation of the set of effective signal waveform feature coding vectors is used for classification processing, so as to intelligently determine whether the circuit board to be tested has a fault. Through the square scheme of the present application, it is possible to dynamically monitor and learn the normal working mode of the circuit board under various conditions, so as to effectively identify these transient problems and improve the sensitivity and accuracy of fault detection. At the same time, it is possible to model the complex associations between different ports, capture the interactive effects between multiple ports, provide a more comprehensive fault diagnosis perspective, and avoid missing key information.

[0044] More specifically, in an embodiment of the present application, the circuit board operation effective signal topology aggregation coding vector is input into a fault diagnosis module based on a classifier to obtain the test result, including: using the fully connected layer of the classifier to fully connect the circuit board operation effective signal topology aggregation coding vector to obtain a circuit board operation effective signal topology aggregation fully connected coding vector; passing the circuit board operation effective signal topology aggregation fully connected coding vector through the Softmax classification function of the classifier to obtain a first probability attributing to the existence of a fault in the circuit board to be tested and a second probability attributing to the absence of a fault in the circuit board to be tested; based on a comparison between the first probability and the second probability, the test result is obtained.

[0045] In particular, the specific process of inputting the circuit board running effective signal topology aggregation coding vector into the classifier-based fault diagnosis module to obtain the test result is as follows: The circuit board runs a valid signal topology aggregation encoding vector that is input into one or more fully connected layers of the classifier. The role of the fully connected layer is to receive all outputs from the previous layer (i.e., the signal graph convolution feature aggregation module) and create a direct connection for each input node with each node in the next layer. This structure allows information to flow freely throughout the network, ensuring that each part can participate in the final decision-making process. In practice, the fully connected layer generates a new feature representation by performing a linear transformation (such as matrix multiplication) on the input data, coupled with a nonlinear activation function (such as ReLU or Sigmoid). This step is critical to capturing the complex interactions within the input vector because it can reveal relationship patterns that are not obvious in the original signal but are important for fault detection.

[0046] The feature representation after processing by the fully connected layer then enters the core component of the classifier - the Softmax classification function. The Softmax function is a commonly used multi-category classification method that can convert a set of arbitrary real values ​​into a probability distribution so that the prediction score of each category is normalized between 0 and 1, and the sum of all categories is equal to 1. In this specific application scenario, the Softmax function is responsible for calculating the first probability that the circuit board to be tested has a fault and the second probability that there is no fault. These two probability values ​​represent the probability of the circuit board failing in the current state. It is worth noting that due to the good mathematical properties of the Softmax function, such as gradient smoothness and easy optimization, it is very suitable for tasks that require accurate evaluation of the relative likelihood between different hypotheses.

[0047] However, in actual operation, the probability value given by the Softmax function alone may not be enough to make the most accurate fault diagnosis. This is because the functional abnormality of the circuit board is often the result of the combined effect of multiple factors, and it is difficult to fully cover all situations with a static threshold alone. To this end, the system introduces a more sophisticated mechanism to enhance the sensitivity of the classifier to edge cases. Specifically, after calculating the two probabilities, the system will determine the final test result based on predefined criteria (such as setting a confidence level). If the first probability is higher than the set threshold, it is determined that the circuit board is faulty; conversely, if the second probability is dominant, it is considered that the circuit board is working normally. In addition, when the two probabilities are close, the system can also choose to output an uncertain result and recommend further inspection or other auxiliary means to confirm it.

[0048] In order to improve the performance of the classifier and make it more adaptable to specific types of circuit boards and their common failure modes, it is also necessary to fully train it. The training phase involves using a large number of historical data sets with known labels to adjust the model parameters until it can achieve satisfactory accuracy on the validation set. Typically, these historical data include samples of circuit boards that work normally and samples that contain different types of faults. Through supervised learning, the classifier gradually learns how to distinguish the subtle differences between the two, thereby improving the sensitivity and specificity of fault detection. At the same time, considering the continuous advancement of circuit board manufacturing processes and technologies, new problems may also be different from previous experience, so it is very necessary to regularly update the training data set and retrain the model to maintain the long-term effectiveness of the classifier.

[0049] It should be understood that, here, considering that each effective signal waveform feature coding vector in the set of effective signal waveform feature coding vectors respectively represents the semantic coding features of the effective signals of each port of the tested circuit board, when performing feature sequence aggregation analysis based on graph walk autocorrelation gating, its essence is to use the semantic association information between each effective signal waveform feature coding vector to simulate the electrical connection and internal data logic relationship between each port of the tested circuit board. However, due to the limited representation capacity of the effective signals of each port, it will lead to the lack of judgment of the graph walk aggregation feature instance of the effective signal topology aggregation coding vector of the circuit board operation obtained during the aggregation analysis, thereby affecting the accuracy of the test results obtained through the classifier-based fault diagnosis module.

[0050] Preferably, inputting the circuit board operation effective signal topology aggregation coding vector into a classifier-based fault diagnosis module to obtain a test result comprises: Calculate the distance between each pair of eigenvalues ​​of the circuit board running effective signal topology aggregation coding vector, such as L2 distance, and take the square root of the distance to obtain the circuit board running effective signal topology aggregation coding distance representation matrix, that is, ;in, is the effective signal topology aggregation coding vector for the circuit board operation, It is the first one in the effective signal topology aggregation coding vector of the circuit board operation. The eigenvalues ​​at the positions, It is the first one in the effective signal topology aggregation coding vector of the circuit board operation. The eigenvalues ​​at the positions, yes and The distance between It is the first in the effective signal topology aggregation coding distance representation matrix of the circuit board operation. It is the first in the effective signal topology aggregation coding distance representation matrix of the circuit board operation. ;in, is a row vector, express The transposed vector of is the effective signal topology aggregation coding autocorrelation matrix of the circuit board operation, Represents matrix multiplication; The circuit board operation effective signal topology aggregation coding vector is matrix-multiplied with the circuit board operation effective signal topology aggregation coding distance representation matrix to obtain the circuit board operation effective signal topology aggregation coding primary mapping vector, that is, ;in, is the effective signal topology aggregation coding distance representation matrix of the circuit board operation, It is a primary mapping vector of the effective signal topology aggregation coding of the circuit board operation; The first-level mapping vector of the circuit board operation effective signal topology aggregation coding is matrix-multiplied with the matrix product of the circuit board operation effective signal topology aggregation coding distance representation matrix and the circuit board operation effective signal topology aggregation coding self-correlation matrix to obtain a multi-level mapping vector of the circuit board operation effective signal topology aggregation coding ;in, It is a multi-level mapping vector of effective signal topology aggregation coding for operation of the circuit board; The multi-level mapping vector of the circuit board operation effective signal topology aggregation coding is interpolated with the circuit board operation effective signal topology aggregation coding associated eigenvector composed of the eigenvalues ​​of the circuit board operation effective signal topology aggregation coding auto-association matrix to obtain an optimized circuit board operation effective signal topology aggregation coding vector, wherein interpolation or zero padding is performed when the eigenvalue is insufficient; The optimized circuit board operation effective signal topology aggregation coding vector is input into a classifier-based fault diagnosis module to obtain a test result.

[0051] Therefore, through the linear target mapping representation based on the similarity distance representation matrix of the circuit board operation effective signal topology aggregation coding vector, the self-correlation complete similarity instantiation of the circuit board operation effective signal topology aggregation coding vector is performed based on a secondary target mapping representation based on a multi-level distribution hierarchy, and the association mismatch negative influence factor is compensated by the association fusion kernel bias to improve the eigenvalue instance decision degree of the circuit board operation effective signal topology aggregation coding vector under similarity constraints, that is, the significance degree of the eigenvalue as an instance for classification regression decision, so as to improve the accuracy of the test results obtained by the circuit board operation effective signal topology aggregation coding vector through the classifier-based fault diagnosis module.

[0052] In summary, step S130 is explained, which uses artificial intelligence-based data encoding and processing technology to extract signal features from each valid signal, so as to intelligently determine whether the circuit board to be tested has a fault based on the graph convolution autocorrelation aggregation representation between the waveform features of each valid signal. Through the square scheme of the present application, it is possible to dynamically monitor and learn the normal working mode of the circuit board under various conditions, so as to effectively identify these transient problems and improve the sensitivity and accuracy of fault detection. At the same time, it is possible to model the complex associations between different ports, capture the interactive effects between multiple ports, provide a more comprehensive fault diagnosis perspective, and avoid missing key information.

[0053] Specifically, in step S140, the test results are transmitted to the terminal device for real-time viewing. It should be understood that the process of transmitting the test results to the terminal device for real-time viewing is an important part of the circuit board function test automation control system, which ensures that engineers and technicians can obtain the latest test information in real time, so as to quickly respond to any potential problems or abnormalities.

[0054] When the classifier-based fault diagnosis module completes the analysis of the topological aggregation coding vector of the effective signal of the circuit board operation and draws a conclusion on whether the circuit board to be tested has a fault, the next task is to effectively communicate these test results to the user. To achieve this, the system first needs to convert the original output generated by the diagnostic module (such as the probability value of whether a fault exists or not) into a form that is easy to understand and operate. This usually means converting the technical probability assessment into a clear binary judgment - that is, "normal" or "fault", with necessary explanations, such as the specific fault type, possible causes, and recommended measures. In addition, additional visual elements may be added, such as charts or warning signs, to facilitate quick identification of the problem.

[0055] Once the test results are properly formatted, the next step is to select the appropriate communication channel to complete the data transmission from the server to the client. In modern industrial environments, wired network connections (such as Ethernet) and wireless network connections (such as Wi-Fi or 4G / 5G cellular networks) are common options. Which method to choose depends on the specific application scenario, site conditions, and requirements for latency and security. For time-sensitive operations, low-latency wired connections may be a better choice; in cases where there are many mobile devices or wiring is inconvenient, flexible and wide-coverage wireless solutions are preferred. Regardless of the physical layer connection used, sufficient bandwidth and stability must be guaranteed to support stable data streaming transmission, especially when processing large amounts of high-definition images or video content.

[0056] At the network level, the TCP / IP protocol stack is the current standard framework for Internet communications. It provides a reliable packet exchange mechanism suitable for most enterprise-level applications. Through high-level application protocols such as HTTP(S), it is easy to interact with Web browsers or other compatible software, making remote access simple and intuitive. For more professional occasions, specially designed industrial Internet of Things (IoT) platforms or customized API interfaces may also be used. They are often optimized for specific needs and can provide higher performance and service quality. These platforms are not only responsible for managing communications between devices, but can also integrate functions such as data analysis and alarm notifications, further enhancing the intelligence level of the system.

[0057] After reaching the receiving end, the terminal device needs to have a corresponding application or interface to display the received information. Such applications can be desktop software installed on a personal computer, mobile applications running on a tablet or smartphone, or an operating panel that comes with embedded hardware. The design principle is to simplify the user's operation process as much as possible so that users can grasp key information at a glance. To this end, developers will pay attention to aspects such as the rationality of the interface layout, the consistency of interactive elements, and the response speed. For example, the home page may display an overview view that highlights the status of all circuit boards being tested; clicking on a specific entry will expand a detailed report, including historical records, trend analysis, and other content. For any abnormal conditions found, the application will also trigger an immediate alarm to alert the user through sound, vibration, or push messages.

[0058] In summary, the circuit board function test automation control method based on the embodiment of the present application is explained, which first collects the operating data of each end interface of the circuit board to be tested through an electrical signal sensor to form a data set, and extracts valid signals from these data to form a valid signal set, then performs fault processing and analysis on the valid signal set to obtain the test results of the circuit board, and finally transmits the test results to the terminal device for real-time viewing. The effect of this process is that it can efficiently diagnose faults on the circuit board, ensure the performance and reliability of the circuit board, and provide instant feedback, which is convenient for engineers to quickly locate problems and take corresponding measures.

[0059] Figure 4 FIG. 1 is a block diagram of a circuit board function test automation control system according to an embodiment of the present application. Figure 4As shown, according to the circuit board function test automation control system 100 of the embodiment of the present application, it is used to execute the above-mentioned circuit board function test automation control method, and the circuit board function test automation control system includes: a signal feature extraction module 110, which is used to extract signal features of each valid signal in the set of valid signals to obtain a set of valid signal waveform features; a signal graph convolution feature aggregation module 120, which is used to perform graph convolution autocorrelation feature aggregation on the set of valid signal waveform features to obtain circuit board operation valid signal topology aggregation coding features, wherein the signal graph convolution feature aggregation module includes: a signal topology feature construction unit, which is used to construct the topological features of the set of valid signal waveform features to obtain valid signals A signal waveform graph wandering topological feature; a signal feature weight factor calculation unit, used to calculate the weight factor of each valid signal waveform feature in the set of valid signal waveform features based on the valid signal waveform graph wandering topological feature to obtain a set of valid signal waveform autocorrelation gated significant confidence weight factors; a signal feature weighted aggregation unit, used to weighted aggregate the set of valid signal waveform features based on the set of valid signal waveform autocorrelation gated significant confidence weight factors to obtain the circuit board operation valid signal topology aggregation coding feature; a fault judgment module 130, used to obtain the test result based on the circuit board operation valid signal topology aggregation coding feature, and the test result is used to indicate whether there is a fault in the circuit board to be tested.

[0060] Here, those skilled in the art can understand that the specific operations of each step in the above circuit board function test automation control system have been referred to above. Figures 1 to 3 The invention has been described in detail in the description of the circuit board functional test automation control method, and therefore, its repeated description will be omitted.

[0061] As described above, the circuit board function test automation control system 100 according to the embodiment of the present disclosure can be implemented in various wireless terminals, such as a server with a circuit board function test automation control algorithm. In a possible implementation, the circuit board function test automation control system 100 according to the embodiment of the present disclosure can be integrated into the wireless terminal as a software module and / or a hardware module. For example, the circuit board function test automation control system 100 can be a software module in the operating system of the wireless terminal, or can be an application developed for the wireless terminal; of course, the circuit board function test automation control system 100 can also be one of the many hardware modules of the wireless terminal.

[0062] Alternatively, in another example, the circuit board functional test automation control system 100 and the wireless terminal may also be separate devices, and the circuit board functional test automation control system 100 may be connected to the wireless terminal via a wired and / or wireless network and transmit interactive information in accordance with an agreed data format.

[0063] The above is merely an example of the principles of the present disclosure, and various modifications may be made by those skilled in the art without departing from the scope of the present disclosure. The above embodiments are presented for the purpose of illustration rather than limitation. The present disclosure may also take many forms other than those explicitly described herein.

Claims

1. A circuit board function test automation control method, comprising: Acquiring the operation data of each terminal interface of the circuit board to be tested collected by the electrical signal sensor to obtain a set of operation data; Extracting valid signals of each operating data in the set of operating data to obtain a set of valid signals; Performing fault processing and analysis on the set of valid signals to obtain the test result of the circuit board to be tested; transmitting the test result to a terminal device for real-time viewing; characterized in that performing fault processing and analysis on the set of valid signals to obtain the test result of the circuit board to be tested comprises: Extracting signal features from each valid signal in the set of valid signals to obtain a set of valid signal waveform features; The set of effective signal waveform features is subjected to graph convolution autocorrelation feature aggregation to obtain effective signal topology aggregation coding features of circuit board operation, including: constructing topological features of the set of effective signal waveform features to obtain effective signal waveform graph wandering topology features; based on the effective signal waveform graph wandering topology features, calculating the weight factors of each effective signal waveform feature in the set of effective signal waveform features to obtain a set of effective signal waveform autocorrelation gated significant confidence weight factors; based on the set of effective signal waveform autocorrelation gated significant confidence weight factors, weighted aggregation of the set of effective signal waveform features is performed to obtain the effective signal topology aggregation coding features of circuit board operation; The test result is obtained based on the effective signal topology aggregation coding feature of the circuit board operation, and the test result is used to indicate whether there is a fault in the circuit board to be tested.

2. The circuit board function test automation control method according to claim 1, characterized in that: Signal feature extraction is performed on each valid signal in the set of valid signals to obtain a set of valid signal waveform features, including: processing each valid signal in the set of valid signals by a signal feature extractor based on a deep convolutional neural network model to obtain a set of valid signal waveform feature encoding vectors as the set of valid signal waveform features.

3. The circuit board function test automation control method according to claim 2, characterized in that: Constructing the topological features of the set of effective signal waveform features to obtain the effective signal waveform graph wandering topological features, including: Performing hyperbolic space mapping on each effective signal waveform feature coding vector in the set of effective signal waveform feature coding vectors to obtain a set of effective signal waveform feature coding vectors after hyperbolic space mapping; Calculating the Poincare distance between any two effective signal waveform feature coding vectors after hyperbolic space mapping in the set of effective signal waveform feature coding vectors after hyperbolic space mapping to obtain an effective signal waveform graph walk topology matrix; The effective signal waveform graph wandering topology matrix is ​​subjected to dilated convolution coding to obtain an effective signal waveform graph wandering topology feature matrix as the effective signal waveform graph wandering topology feature.

4. The circuit board function test automation control method according to claim 3, characterized in that: Based on the walk topological features of the effective signal waveform graph, the weight factors of each effective signal waveform feature in the set of effective signal waveform features are calculated to obtain a set of effective signal waveform autocorrelation gated significant confidence weight factors, including: Performing global context walking enhancement based on graph convolution on the effective signal waveform graph walk topology feature matrix and the set of effective signal waveform feature coding vectors after hyperbolic space mapping to obtain a set of effective signal waveform context semantic enhancement feature vectors; Based on the set of valid signal waveform context semantics enhanced feature vectors, the autocorrelation gated significant confidence weight factor of each valid signal waveform feature coding vector in the set of valid signal waveform feature coding vectors is calculated to obtain the set of valid signal waveform autocorrelation gated significant confidence weight factors.

5. The circuit board function test automation control method according to claim 4, characterized in that: Based on the set of the effective signal waveform context semantics enhanced feature vectors, calculating the autocorrelation gated significant confidence weight factor of each effective signal waveform feature coding vector in the set of the effective signal waveform feature coding vectors to obtain the set of the effective signal waveform autocorrelation gated significant confidence weight factors, including: Performing autocorrelation gating processing on each corresponding group of effective signal waveform context semantic enhancement feature vectors and effective signal waveform feature encoding vectors in the set of effective signal waveform context semantic enhancement feature vectors and the set of effective signal waveform feature encoding vectors to obtain a set of effective signal waveform autocorrelation gating significant confidence factors; The set of the effective signal waveform autocorrelation gated significant confidence factors is normalized based on the Softmax function to obtain the set of the effective signal waveform autocorrelation gated significant confidence weight factors.

6. The circuit board function test automation control method according to claim 5, characterized in that: Based on the set of effective signal waveform autocorrelation gated significant confidence weight factors, the set of effective signal waveform features is weightedly aggregated to obtain the circuit board operation effective signal topology aggregation coding feature, including: using the set of effective signal waveform autocorrelation gated significant confidence weight factors as a set of weights, calculating the position-weighted sum of the set of effective signal waveform feature coding vectors to obtain the circuit board operation effective signal topology aggregation coding vector as the circuit board operation effective signal topology aggregation coding feature.

7. The circuit board function test automation control method according to claim 6, characterized in that: The test result is obtained based on the circuit board running effective signal topology aggregation coding features, including: inputting the circuit board running effective signal topology aggregation coding vector into a classifier-based fault diagnosis module to obtain the test result.

8. The circuit board function test automation control method according to claim 7, characterized in that: Inputting the circuit board running effective signal topology aggregation coding vector into the classifier-based fault diagnosis module to obtain the test result, including: Use the fully connected layer of the classifier to perform fully connected encoding on the circuit board operation effective signal topology aggregation coding vector to obtain the circuit board operation effective signal topology aggregation fully connected coding vector; The circuit board running effective signal topology aggregation fully connected coding vector is passed through the Softmax classification function of the classifier to obtain a first probability that the circuit board to be tested has a fault and a second probability that the circuit board to be tested does not have a fault; The test result is obtained based on a comparison between the first probability and the second probability.

9. A circuit board function test automation control system, used to execute the circuit board function test automation control method according to claim 1, characterized in that: The circuit board function test automatic control system comprises: A signal feature extraction module, used for extracting signal features from each valid signal in the set of valid signals to obtain a set of valid signal waveform features; A signal graph convolution feature aggregation module, used to perform graph convolution autocorrelation feature aggregation on the set of effective signal waveform features to obtain effective signal topology aggregation coding features for circuit board operation, wherein the signal graph convolution feature aggregation module includes: a signal topology feature construction unit, used to construct the topology features of the set of effective signal waveform features to obtain effective signal waveform graph wandering topology features; a signal feature weight factor calculation unit, used to calculate the weight factors of each effective signal waveform feature in the set of effective signal waveform features based on the effective signal waveform graph wandering topology features to obtain a set of effective signal waveform autocorrelation gated significant confidence weight factors; a signal feature weighted aggregation unit, used to perform weighted aggregation on the set of effective signal waveform features based on the set of effective signal waveform autocorrelation gated significant confidence weight factors to obtain the effective signal topology aggregation coding features for circuit board operation; The fault judgment module is used to obtain the test result based on the effective signal topology aggregation coding feature of the circuit board, and the test result is used to indicate whether there is a fault in the circuit board to be tested.

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