Optical device and manufacturing method thereof

Abstract

Optical devices and methods of making the same are presented in which a metallization layer is formed on a first active layer of a first optical component, a first opening is formed through the metallization layer, a first semiconductor die is bonded on the metallization layer, a laser die is bonded on the metal layer, and after bonding the laser die, a second opening is formed through the metallization layer. A first mirror located within the laser die is aligned with the second mirror through the first opening.

Description

Technical Field

[0001] Embodiments of the present application relate to optical devices and methods for manufacturing the same. Background Art

[0002] Electrical signaling and processing is a signal transmission and processing technology. In recent years, optical signaling and processing has been used in an increasing number of applications, especially due to the use of optical fiber related applications for signal transmission.

[0003] Optical signals and processing are often combined with electrical signaling and processing to provide comprehensive applications. For example, optical fibers can be used for long-distance signal transmission, and electrical signals can be used for short-distance signal transmission and processing and control. Therefore, a device integrating long-distance optical components and short-distance electronic components is formed for conversion between optical and electrical signals, as well as processing of optical and electrical signals. Therefore, a package can include an optical (photonic) die containing optical devices and an electronic die containing electronic devices. Summary of the invention

[0004] According to one aspect of an embodiment of the present application, a method for manufacturing an optical device is provided, the method comprising: forming a metallization layer above a first active layer of a first optical component; forming a first opening through the metallization layer; bonding a first semiconductor device above the metallization layer; and bonding a laser die to the metallization layer, wherein after bonding the laser die, a first reflector located in the laser die is aligned with a second reflector through the first opening.

[0005] According to another aspect of an embodiment of the present application, there is provided 8. a method for manufacturing an optical device, the method comprising: forming a first active layer of a first optical component; forming a second active layer of a second optical component, the second optical component comprising a first reflector and a second reflector; forming a first metallization layer on a side of the first active layer opposite to the second active layer; forming a first opening through the first metallization layer above the first reflector; forming a second opening through the first metallization layer above the second reflector; filling the first opening and the second opening; bonding a laser die above the first opening and to a first surface; and bonding a first semiconductor device to the first surface.

[0006] According to another aspect of an embodiment of the present application, an optical device is provided, comprising: a metallization layer located above a first active layer of a first optical component; a first opening passing through the metallization layer; a first semiconductor device bonded above the metallization layer; and a laser die bonded above the metallization layer, wherein a first reflector located in the laser die is aligned with a second reflector through the first opening. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Various aspects of the present invention will be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be emphasized that, in accordance with standard practice in the industry, the various components are not drawn to scale and are for illustration purposes only. In fact, the dimensions of the various components may be arbitrarily increased or reduced for clarity of discussion.

[0008] Figure 1-Figure 4 The formation of an optical interposer according to some embodiments is shown.

[0009] Figure 5 A laser die is shown in accordance with some embodiments.

[0010] Figure 6 A first semiconductor device according to some embodiments is shown.

[0011] Figure 7A-7B A lens die is shown in accordance with some embodiments.

[0012] Figure 8 The bonding of a laser die, a first semiconductor device, and a lens die to an optical interposer is shown in accordance with some embodiments.

[0013] Fig. 9 A sealing process according to some embodiments is shown.

[0014] Figure 10A-10B The formation of an external connector according to some embodiments is shown.

[0015] Figure 11-Figure 14 Another embodiment using a gap-fill material in accordance with some embodiments is shown.

[0016] Figure 15A-Figure 15C Additional packages are shown into which optical devices may be bonded according to some embodiments. DETAILED DESCRIPTION

[0017] The following disclosure provides many different embodiments or examples for realizing different features of the present invention. Specific embodiments or examples of components and arrangements are described below to simplify the present invention. Of course, these are only examples and are not intended to be limiting. For example, in the following description, forming a first component above or on a second component may include an embodiment in which the first component and the second component are directly contacted, and may also include an embodiment in which an additional component may be formed between the first component and the second component so that the first component and the second component may not be in direct contact. In addition, the present invention may repeat reference numbers and / or letters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0018] Additionally, for ease of description, spacing relation terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another element or component as shown in the figures. The spacing relation terms are intended to encompass different orientations of the device in use or in the process of operation in addition to the orientation shown in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spacing relation descriptors used herein may likewise be interpreted accordingly.

[0019] Embodiments will now be discussed with respect to certain embodiments in which a compact universal photon engine (COUPE) and a laser diode are integrated together through a co-packaging process. However, the embodiments presented herein are intended to be illustrative and are not intended to limit the embodiments to the discussion presented, as the embodiments may be implemented in a wide variety of devices and methods. All such devices and methods are fully intended to be included within the scope of the embodiments presented herein.

[0020] Reference now Figure 1 , showing an optical interposer 400 according to some embodiments (see Figure 4 ) is the initial structure. Figure 1 In the particular embodiment shown, the optical interposer 400 is a photonic integrated circuit (PIC) and at this stage comprises a first substrate 101, a first insulator layer 103 and a first active layer 201 ( Figure 1 Not shown separately, but will be combined below Figure 2 In one embodiment, at the beginning of the manufacturing process of the optical interposer 400, the first substrate 101, the first insulator layer 103, and the material layer 105 of the first active layer 201 for the first optical component 203 may together constitute a portion of a silicon-on-insulator (SOI) substrate. First looking at the first substrate 101, the first substrate 101 may be a semiconductor material such as silicon or germanium, a dielectric material such as glass, or any other suitable material that allows structural support for overlying devices.

[0021] The first insulator layer 103 may be a dielectric layer separating the first substrate 101 from the overlying first active layer 201, and in some embodiments, may also be used as part of a cladding material surrounding a subsequently fabricated first optical component 203 (discussed further below). In one embodiment, the first insulator layer 103 may be silicon oxide, silicon nitride, germanium oxide, germanium nitride, combinations of these, and the like, which may be formed using methods such as implantation (e.g., forming a buried oxide (BOX) layer), or may be deposited on the first substrate 101 using deposition methods such as chemical vapor deposition, atomic layer deposition, physical vapor deposition, and the like. However, any suitable material and manufacturing method may be used.

[0022] The material 105 for the first active layer 201 is initially (before patterning) a conformal material layer of the first active layer 201 that will be used to begin fabricating the first optical component 203. In one embodiment, the material 105 for the first active layer 201 may be a semi-transparent material that can be used as a core material of the desired first optical component 203, such as a semiconductor material such as silicon, germanium, silicon germanium, combinations of these, etc., while in other embodiments the material 105 for the first active layer 201 may be a dielectric material such as silicon nitride, etc., although in other embodiments the material 105 for the first active layer 201 may be a III-V material, a lithium niobate material, or a polymer. In embodiments where the material 105 for the first active layer 201 is deposited, the material 105 for the first active layer 201 may be deposited using methods such as epitaxial growth, chemical vapor deposition, atomic layer deposition, physical vapor deposition, or combinations of these methods. In other embodiments where the first insulator layer 103 is formed using an implantation method, the material 105 of the first active layer 201 may initially be part of the first substrate 101 prior to the implantation process of forming the first insulating layer 103. However, any suitable material and fabrication method may be utilized to form the material 105 of the first active layer 201.

[0023] Figure 2 It is shown that once the material 105 of the first active layer 201 is ready, the first optical component 203 of the first active layer 201 is manufactured using the material 105 of the first active layer 201. In an embodiment, the first optical component 203 of the first active layer 201 may include components such as optical waveguides (e.g., ridge waveguides, rib waveguides, buried channel waveguides, diffused waveguides, etc.), couplers (e.g., grating couplers, edge couplers, narrow waveguides with a width between about 1 nm and about 200 nm, etc.), directional couplers, optical modulators (e.g., Mach-Zehnder silicon photonic switches, micro-electromechanical switches, micro-ring resonators, etc.), amplifiers, multiplexers, demultiplexers, photoelectric converters (e.g., PN junctions), electro-optical converters, lasers, combinations of these, etc. However, any suitable first optical component 203 may be used.

[0024] To begin forming the first active layer 201 of the first optical component 203 from an initial material, the material 105 of the first active layer 201 can be patterned into a desired shape of the first active layer 201 of the first optical component 203. In one embodiment, the material 105 for the first active layer 201 can be patterned using, for example, one or more photolithography masks and etching processes. However, any suitable method of patterning the material 105 of the first active layer 201 can be utilized. For some first optical components 203, such as waveguides or edge couplers, the patterning process can be all or at least a majority of the manufacturing process used to form these first optical components 203.

[0025] In addition, for those components that utilize further manufacturing processes, such as optical-to-electrical converters, electro-optical converters, Mach-Zehnder silicon photonic switches utilizing resistive heating elements, etc., additional processing may be performed before or after the material patterning of the first active layer 201. For example, implantation processes, additional deposition and patterning processes of different materials (e.g., resistive heating elements, III-V materials for converters), combinations of all of these processes, etc. may be utilized to help further manufacture various desired first optical components 203. In certain embodiments, epitaxial deposition of semiconductor materials (e.g., germanium, for electrical / optical signal modulation and conversion) may be performed on patterned portions of the material 105 of the first active layer 201 in some embodiments. In such embodiments, semiconductor materials may be epitaxially grown to help manufacture, for example, photodiodes for optical-to-electrical converters. All such manufacturing processes and all suitable first optical components 203 may be manufactured, and all such combinations are fully intended to be included within the scope of the embodiments.

[0026] Figure 2 It is also shown that once the various first optical components 203 of the first active layer 201 are formed, a second insulating layer 205 can be deposited to cover the first optical components 203 and provide additional cladding material. In one embodiment, the second insulating layer 205 can be a dielectric layer that separates the various components of the first active layer 201 from each other and from the overlying structure, and can additionally serve as another portion of the cladding material surrounding the first optical component 203. In one embodiment, the second insulating layer 205 can be silicon oxide, silicon nitride, germanium oxide, germanium nitride, combinations of these, etc. formed using deposition methods such as chemical vapor deposition, atomic layer deposition, physical vapor deposition, etc. Once the material of the second insulating layer 205 is deposited, the material can be planarized using, for example, a chemical mechanical polishing process to planarize the top surface of the second insulating layer 205 (in embodiments where the second insulator wall 205 is intended to completely cover the first optical component 203), or to planarize the second insulating layer 205 with the top surface of the first optical component 203. However, any suitable material and manufacturing method can be used.

[0027] Figure 2 Also shown is that once the first optical component 203 of the first active layer 201 is fabricated and the second insulating layer 205 is formed, the second active layer 207 of the second optical component 209 can be formed. In one embodiment, the second active layer 207 of the second optical component 209 can include alternating layers of cladding and core material that combine to form the second optical component 209.

[0028] In some embodiments, the second optical component 209 of the second active layer 207 may include a coupler (e.g., an edge coupler, a grating coupler, etc.) for connecting to an external signal, an optical waveguide (e.g., a ridge waveguide, a rib waveguide, a buried channel waveguide, a diffused waveguide, etc.), an optical modulator (e.g., a Mach-Zehnder silicon photonic switch, a micro-electromechanical switch, a micro-ring resonator, etc.), an amplifier, a multiplexer, a demultiplexer, an optical-to-electrical converter (e.g., a PN junction), an electro-optical converter, a laser, a combination of these, etc. However, any suitable optical component may be used for one or more second optical components 209.

[0029] In one embodiment, the one or more second optical components 209 may be formed by initially depositing a material for the one or more second optical components 209. In one embodiment, the material for the one or more second optical components 209 may be a dielectric material such as silicon nitride, silicon oxide, combinations of these, or a semiconductor material such as silicon deposited using a deposition method such as chemical vapor deposition, atomic layer deposition, physical vapor deposition, etc. However, any suitable material and any suitable deposition method may be used.

[0030] Once the material for the one or more second optical components 209 is deposited or otherwise formed, the material can be patterned into a desired shape for the one or more second optical components 209. In one embodiment, the material of the one or more second optical components 209 can be patterned using, for example, one or more photolithographic masks and etching processes. However, any suitable method of patterning the material of the one or more second optical components 209 can be utilized.

[0031] For some of the one or more second optical components 209, such as waveguides or edge couplers, the patterning process can be the manufacturing process used to form all or at least most of these components. In addition, for those components that utilize further manufacturing processes, such as Mach-Zehnder silicon photonic switches that utilize resistive heating elements, additional processing can be performed before or after the material patterning of the one or more second optical components 209. For example, implantation processes, additional deposition and patterning processes of different materials, combinations of all of these processes, etc., can be used to help further manufacture various desired one or more second optical components 209. All such manufacturing processes can be used and all suitable one or more second optical components 209 can be manufactured, and all such combinations are fully intended to be included within the scope of the embodiments.

[0032] The first reflector 211 is also formed in the second active layer 207 of the second optical component 209. In one embodiment, the first reflector 211 can have a taper angle between about 35° and about 55° and is formed in the second active layer 207 by initially patterning the cladding material to form a recess. In one embodiment, the recess can be formed using one or more photolithography masks and etching processes, such as one or more wet etching processes or dry etching processes. However, any suitable process can be utilized.

[0033] Once the recess is formed, the first reflector 211 can be formed along the sidewalls of the recess. In one embodiment, the first reflector 211 can be a single layer of reflective material, such as titanium, tantalum, tantalum nitride, aluminum copper, copper, gold, aluminum, titanium nitride, a composite of these materials, a combination of these materials, etc., or can be a multi-layer structure, such as a Braggs reflector, which includes alternating layers of different materials, such as alternating layers of silicon dioxide and amorphous silicon. The various materials of the first reflector 211 can be deposited using any suitable method, such as chemical vapor deposition, physical vapor deposition or plating, a combination of these methods, etc., and then the various layers can be further patterned (e.g., removing horizontal portions of the deposited material) using, for example, a photolithographic mask and etching process. However, the first reflector 211 can be formed along the sidewalls of the recess using any suitable material and method.

[0034] In addition, if the formation of the first reflector 211 does not completely fill the recess, the recess may be filled and planarized. In one embodiment, the recess may be overfilled with a material similar to the cladding material of the second active layer 207 deposited using a method such as chemical vapor deposition, and then subjected to a planarization process such as a chemical mechanical polishing process. However, any suitable material and any suitable process may be used.

[0035] Figure 3The attachment of the carrier substrate 301 to the second active layer 207 is shown. In one embodiment, the carrier substrate 301 can be a glass wafer, a silicon wafer, a silicon germanium wafer, a combination of these, etc., and can be bonded using methods such as fusion bonding, dielectric-to-dielectric bonding, a combination of these, etc. In other embodiments, the carrier substrate 301 can be attached using an adhesive layer, such as UV tape, pressure sensitive tape, radiation-cured tape, a combination of these tapes, etc. However, any suitable materials and bonding methods can be used.

[0036] Figure 4 It is shown that once the carrier substrate 301 is attached, the first substrate 101 and the optional first insulator layer 103 can be removed, thereby exposing the first active layer 201 of the first optical component 203. In one embodiment, the first substrate 101 and the first insulator layer 103 can be removed using a planarization process, such as using a chemical mechanical polishing process, a grinding process, one or more etching processes, a combination of these processes, etc. However, any suitable method can be used to remove the first substrate 101 and / or the first insulator layer 103.

[0037] Figure 4 It is also shown that once the first substrate 101 is removed, a first metallization layer 401 is formed to electrically connect the first active layer 201 of the first optical component 203 to the control circuit, to each other, and to subsequently connected devices ( Figure 4 Not shown, but will be referred to below Figure 8-10B Further explanation and description). In one embodiment, the first metallization layer 401 is formed of alternating layers of dielectric material and conductive material, and can be formed by any suitable process (such as deposition, damascene, dual damascene, etc.). In a specific embodiment, there can be multiple metallization layers for interconnecting various first optical components 203, but the exact number of first metallization layers 401 depends on the design of the optical interposer 400.

[0038] In addition, during the manufacturing process of the first metallization layer 401 (e.g., after forming the first layer and before forming the second layer), a first through device via (TDV) 402 can be formed. In one embodiment, once formed, the first through device via 402 provides a fast path for power, data, and ground through the optical interposer 400. In one embodiment, the first through device via 402 can be formed by initially forming a through device via opening. The through device via opening can be formed by applying and developing a suitable photoresist (not shown), and removing portions of the exposed first metallization layer 401, the first active layer 201, and the second active layer 207.

[0039] Once the through-device via opening is formed, the through-device via opening may be lined with a liner. The liner may be an oxide formed, for example, from tetraethyl orthosilicate (TEOS) or silicon nitride, although any suitable dielectric material may be used. The liner may be formed using a plasma enhanced chemical vapor deposition (PECVD) process, although other suitable processes such as physical vapor deposition or thermal processes may be used.

[0040] Once the liner is formed along the sidewalls and bottom of the through-device via opening, a barrier layer (also not separately shown) can be formed, and the remainder of the through-device via opening can be filled with a first conductive material. The first conductive material can include copper, but other suitable materials such as aluminum, alloys, doped polysilicon, combinations thereof, etc. can also be used. The first conductive material can be formed by electroplating copper on a seed layer (not shown), filling and overfilling the through-device via opening. Once the through-device via opening is filled, the excess liner, barrier layer, seed layer and first conductive material outside the through-device via opening can be removed by a planarization process such as chemical mechanical polishing (CMP), but any suitable removal process can also be used.

[0041] like Figure 4 As shown, one or more third optical components 403 can be formed as part of the first metallization layer 401. In one embodiment, the one or more third optical components 403 can be formed using similar processes and materials as the second optical component 209. In a specific embodiment, the one or more third optical components 403 can include a waveguide including silicon nitride and other devices for converting between optical signals and electrical signals. However, any suitable device formed of any suitable material can be used.

[0042] Figure 4 It is also shown that once the first metallization layer 401 is formed, a first passivation layer 405 can be deposited to protect the overall structure, and a first contact pad 407 can be formed. Looking first at the first passivation layer 405, the first passivation layer 406 can be a dielectric material, such as silicon nitride, silicon oxide, silicon oxynitride, combinations of these, etc., and can be deposited using methods such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition. However, any suitable materials and processes can be used.

[0043] The first contact pad 407 is formed to provide a test path electrically connected to the first metallization layer 401 through a redistribution line formed through the first passivation layer 405. In one embodiment, the first contact pad 407 can be formed by first forming an opening in the first passivation layer 405 to expose the conductive portion of the first metallization layer 401 below. Once exposed, a seed layer is deposited, a photolithography mask is placed and patterned, a conductive material such as copper is plated onto the seed layer, the photolithography mask is removed, and the exposed portion of the seed layer is etched away. However, any suitable method or material (e.g., aluminum is deposited and then patterned) can be used.

[0044] After forming the first contact pad 407, a first opening 409 is formed through the first passivation layer 405 and the first metallization layer 401 to provide an optical path through the first metallization layer 401 to the first optical component 203 (e.g., grating coupler) and the first reflector 211. In one embodiment, the first opening 409 can be formed using one or more photolithography masks and etching processes. However, any suitable process can be formed.

[0045] Furthermore, once the first opening 409 is formed, the first opening 409 is filled and / or overfilled with a first dielectric material 411. In one embodiment, the first dielectric material 411 may be a material that is transparent to the wavelength of light that is desired to be used, such as silicon oxide, and may be deposited using a deposition process, such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition, combinations of these, etc. However, any suitable material and deposition process may be utilized.

[0046] Once the first dielectric material 411 is deposited, a through dielectric via 413 may be formed through the first dielectric material 411 and the first passivation layer 405. In one embodiment, the through dielectric via 413 may be formed using, for example, a damascene or dual damascene process. For example, an opening is formed and filled and / or overfilled with a conductive material, and then the conductive material is planarized with the first dielectric material 411. Any suitable process may be utilized.

[0047] After forming the through dielectric via 413, a first bonding layer 415 is formed on the first metallization layer 401. In one embodiment, the first bonding layer 415 can be used for dielectric-to-dielectric and metal-to-metal bonding. According to some embodiments, the first bonding layer 415 is formed of a second dielectric material 417, such as silicon oxide, silicon nitride, etc. The second dielectric material 417 can be deposited using any suitable method, such as CVD, high density plasma chemical vapor deposition (HDPCVD), PVD, atomic layer deposition (ALD), etc. However, any suitable material and deposition process can be utilized.

[0048] Once the second dielectric material 417 is formed, a first opening is formed in the second dielectric material 417 to expose the conductive portion of the lower layer in preparation for forming a first bonding pad 419 in the first bonding layer 415. Once the first opening is formed in the second dielectric material 417, the first opening can be filled with a seed layer and a plate metal to form a first bonding pad 419 in the second dielectric material 417. The seed layer can be blanket deposited on the top surface of the second dielectric material 417, the exposed conductive portion of the lower layer, and the sidewalls of the opening and the second opening. The seed layer can include a copper layer. Depending on the desired material, the seed layer can be deposited using processes such as sputtering, evaporation, or plasma enhanced chemical vapor deposition (PECVD). The plate metal can be deposited on the seed layer by a plating process (such as electroplating or chemical plating). The metal plate can include copper, copper alloy, etc. The plate metal can be a filling material. A barrier layer (not shown separately) can be blanket deposited on the top surface of the second dielectric material 417 and the sidewalls of the opening and the second opening before the seed layer. The barrier layer may include titanium, titanium nitride, tantalum, tantalum nitride, etc. After filling the first opening, a planarization process such as CMP is performed to remove excess portions of the seed layer and the plate metal, thereby forming a first bonding pad 419 within the first bonding layer 415 .

[0049] Figure 5 A laser die 500 is shown to be bonded to the first bonding layer 415. The laser die 500 is used to generate light to power other optical components and may include a light generating structure, such as a laser diode 502. In certain embodiments, the laser diode 502 may be a Fabry-Perot diode and may be based on III-V materials, II-VI materials, or any other suitable material group.

[0050] In one embodiment, the formation of the laser die 500 may be initiated by forming a third active layer 523 of a third optical component 525 on a second substrate (not shown separately). Once the third active layer 523 is formed, a first waveguide 504, a first contact 503, a first buffer layer 505, a first active diode layer 507 including multiple quantum wells (MQWs), a second buffer layer (not shown separately), a ridge material 509, and a second contact 511 are formed on a second substrate (not shown separately). In one embodiment, the second substrate may be a material that can be used not only for structural support but also as a seed material for epitaxially growing an overlying material, and may be, for example, a 2-inch or 4-inch wafer of material. In a specific embodiment where the laser die 500 forms the desired laser using III-V materials, and in an embodiment where the laser die 500 forms the desired laser using II-VI materials, the second substrate may be a material such as InP, GaAs, or GaSb. In other embodiments, the second substrate may be sapphire or a semiconductor material. All suitable materials may be used.

[0051] The first waveguide 504 is formed on the second substrate. In one embodiment, the first waveguide 504 includes a core material such as InP formed by an epitaxial growth process such as molecular beam epitaxy (MBE), but other processes such as hydride vapor phase epitaxy (HVPE), liquid phase epitaxy (LPE), etc. may also be used. Once the material of the first waveguide 504 is formed, the material may be patterned to form the desired shape of the first waveguide 504.

[0052] The first contact 503 is formed on the first waveguide 504. The first contact 503 forms a part of the laser diode 502 for emitting the desired laser light. In the embodiment where the laser die 500 utilizes a III-V compound, the first contact 503 is a compound such as InP, GaN, InN, AlN, AlxGa(1-x)N, AlxIn(1-x)N, AlxInyGa(1-xy)N, a combination thereof, etc. In addition, in the embodiment where the laser die 500 utilizes a II-VI compound, the first contact 503 can still use a III-V material, such as GaAs, InP, GaSb, a combination of these materials, etc.

[0053] In addition, to help form the laser diode 502 (e.g., an np diode) to produce the desired laser light, the first contact 503 can be doped with a dopant. In embodiments where it is desired that the first contact 503 has n-type conductivity, the first contact 503 can be doped with an n-type dopant, such as phosphorus, arsenic, antimony, bismuth, lithium, combinations of these, etc. In other embodiments where it is desired that the first contact 503 has p-type conductivity, the first contact 503 can be doped with a p-type dopant, such as boron, aluminum, gallium, indium, combinations of these, etc. However, any suitable dopant can be used.

[0054] In some embodiments, the first contact 503 is formed, for example, by an epitaxial growth process, such as molecular beam epitaxy (MBE), but other processes may also be used, such as hydride vapor phase epitaxy (HVPE), liquid phase epitaxy (LPE), etc. The first contact 503 is preferably in-situ doped during the formation process, but other processes may also be used, such as ion implantation or diffusion.

[0055] The first buffer layer 505 is formed on the first contact 503 to help the epitaxial growth of the upper cladding layer (e.g., the first active diode layer 507) transition from the material of the first contact 503 to the material of the upper cladding layer. In embodiments where the laser die 500 utilizes a III-V compound, the first buffer layer 505 is a compound such as InGaAsP, InGaAslAs, InGaAs, combinations thereof, and the like. In addition, in embodiments where the laser die 500 utilizes a II-VI compound, the first buffer layer 505 can be a II-VI material, such as BeMgZnSe, BeZnCdSe, BeTe, combinations of these materials, and the like. In addition, the first buffer layer 505 can be deposited using an epitaxial growth process such as molecular beam epitaxy (MBE), but other processes such as hydride vapor phase epitaxy (HVPE), liquid phase epitaxy (LPE), and the like can also be used, and can be doped in a similar manner to the first contact 503. However, any suitable material and any suitable deposition method can be used.

[0056] A first active diode layer 507 is formed on the first buffer layer 505. The first active diode layer 507 is designed, among other things, to control the generation of light of a desired wavelength. For example, by adjusting and controlling the proportion of the elements in the first active diode layer 507, the band gap of the material in the first active diode layer 507 can be adjusted, thereby adjusting the wavelength of the ultimately emitted light.

[0057] The first active diode layer 507 includes a plurality of quantum wells (MQWs). In embodiments utilizing III-V materials, the MQW structure in the first active diode layer 507 may include layers such as InAlGaAs, InGaN, GaN, AlxInyGa(1-xy)N (where 0<=x<=1), etc., while in embodiments utilizing II-VI based materials, the first active diode layer 507 may include materials such as BeZnCdSe. The first active diode layer 507 may include any number of quantum wells, such as 5 to 20 quantum wells. The MQW is preferably epitaxially grown using metal organic chemical vapor deposition (MOCVD) with the first buffer layer 505 as a nucleation layer, but other processes such as MBE, HVPE, LPE, etc. may also be used.

[0058] A second buffer layer is optionally formed on the first active diode layer 507 and is used to assist in the epitaxial growth of the transition of the overlying layer (e.g., ridge material 509) from the material of the first active diode layer 507 to the material of the overlying layer. In embodiments where the laser die 500 utilizes a III-V compound, the second buffer layer is a compound such as InGaAsP, InGaAslAs, InGaAs, combinations thereof, and the like. Additionally, in embodiments where the laser die 500 utilizes a II-VI compound, the second buffer layer may be a II-VI material such as BeMgZnSe, BeZnCdSe, BeTe, combinations of these materials, and the like. Additionally, the second buffer layer may be deposited using an epitaxial growth process such as molecular beam epitaxy (MBE), although other processes such as hydride vapor phase epitaxy (HVPE), liquid phase epitaxy (LPE), and the like may also be used, and may be doped in an opposite manner to the first contact 503, such as when the first contact 503 is doped to n-type conductivity, the second buffer layer is doped to p-type conductivity. However, any suitable material and any suitable deposition method may be used.

[0059] The ridge material 509 is formed to assist the epitaxial growth of the transition of the overlying layer (e.g., the second contact 511) from the material of the second buffer layer to the material of the overlying layer. In embodiments where the laser die 500 utilizes a III-V compound, the ridge material 509 is a compound such as InP, etc. In addition, in embodiments where the laser die 500 utilizes a II-VI compound, the ridge material 509 can be a II-VI material such as BeMgZnSe, BeZnCdSe, BeTe, combinations of these materials, etc. In addition, the ridge material 509 can be doped with a dopant having an opposite conductivity to the first contact 503, for example, when the first contact 503 is doped to n-type conductivity, the ridge material 509 is doped to p-type conductivity. The ridge material 509 can be one or more layers and can be deposited using an epitaxial growth process such as molecular beam epitaxy (MBE), but other processes such as hydride vapor phase epitaxy (HVPE), liquid phase epitaxy (LPE), etc. can also be used. However, any suitable material and any suitable deposition method can be used.

[0060] The second contact 511 is formed on the ridge material 509. The second contact 511 forms a second portion of the laser diode 502 for emitting light in conjunction with the first contact 503. In an embodiment where the laser die 500 is based on a III-V material, the second contact 511 includes a III-V compound, such as InAlAs, GaN, InN, AlN, AlxGa(1-x)N, AlxIn(1-x)N, AlxInyGa(1-xy)N, combinations thereof, etc., doped with a dopant of a second conductivity type opposite to the first conductivity type in the first contact 503 (e.g., p-GaN). In another embodiment where the laser die 500 is based on a II-VI material, the second contact 511 may be a II-VI material, such as BeTe, BeMgZnSe, BeZnCdSe, combinations of these materials, etc. The second contact 511 may be formed, for example, by an epitaxial growth process such as MOCVD. However, any suitable material and any other suitable process, such as HVPE, LPE, MBE, etc., may also be used.

[0061] Once the second contact 511, ridge material 509, second buffer layer, first active diode layer 507, first buffer layer 505, and first contact 503 are formed, the second contact 513, ridge material 509, second buffer layer, first active diode layer 507, and first buffer layer 503 may be patterned to form the layered structure of the desired laser diode 502. In one embodiment, the second contact 511 and ridge material 509 may be patterned using, for example, a first photolithography mask and etching process. Once the second contact 511 and a portion of the ridge material 509 are patterned, the second buffer layer, first active diode layer 507, and first buffer layer 505 may be patterned using, for example, a second photolithography mask and etching process. Finally, the first contact 503 may be patterned using, for example, a third photolithography mask and etching process to have an adiabatic taper to facilitate evanescent coupling with the underlying layers. However, any suitable patterning process and any suitable number of patterning processes may be utilized to obtain the desired pattern of the laser.

[0062] Once patterned, a second passivation layer 513 is deposited on the structure. In one embodiment, the second passivation layer 513 is formed of a material for electrically isolating and protecting the structure from an overlying structure, and may be a material such as silicon oxide, silicon nitride, silicon oxynitride, combinations of these, and the like, and may be deposited using a chemical vapor deposition process, an atomic layer deposition process, a physical vapor deposition process, combinations of these, and the like. However, any suitable material and any suitable deposition method may be utilized.

[0063] After depositing the second passivation layer 513, the second passivation layer 513 is patterned to form a through hole opening through the second passivation layer 513 and expose the first contact 503 and the second contact 511. In one embodiment, the patterning can be performed using, for example, a photolithography mask and an etching process. However, any suitable patterning process can be used.

[0064] Once patterned, the conductive extension 515 may be formed to contact the second contact 511 and the first contact 503. In one embodiment, the conductive extension 515 may be a conductive material, such as a metal such as aluminum, copper, germanium, a combination of these metals, etc., and may be deposited using a deposition method, such as plating, chemical vapor deposition, atomic vapor deposition, physical vapor deposition or plating, a combination of these, etc. However, any suitable material and manufacturing method may be used.

[0065] Once deposited, the conductive extension 515 is patterned. In embodiments where the conductive extension 515 is plated, the conductive extension 514 may be patterned during the deposition process, while in other processes, the conductive extension 515 may be patterned after the conductive extension 515 is deposited using, for example, a photolithographic mask and etching process. However, any suitable process may be utilized.

[0066] After forming the conductive extension 515, a third passivation layer 517 is deposited on the conductive extension 515. In one embodiment, the third passivation layer 517 is a protective dielectric material deposited using a deposition process, such as silicon oxide, silicon nitride, silicon oxynitride, a combination of these, etc. The deposition process is, for example, chemical vapor deposition, atomic layer deposition, physical vapor deposition, or a combination of these. However, any suitable material and method may be used to form the third passivation layer 517.

[0067] Once the third passivation layer 517 is formed, the plurality of laser diodes 502 may be bonded to the first semiconductor substrate 519 via, for example, a dielectric bonding layer 521 to form a reconstructed wafer. In one embodiment, the first semiconductor substrate 519 may be a semiconductor material used for structural support during subsequent processing and as a heat sink to help solve laser overheating issues, and may be, for example, a silicon wafer, a silicon germanium wafer, a silicon-on-insulator wafer, or the like. In some embodiments, the first semiconductor substrate 519 is a 12-inch wafer having a second thickness T2 between about 20 μm and about 700 μm, but any suitable size and material may be used. The first semiconductor substrate 519 may be bonded using, for example, a fusion bonding process, but any suitable process may be used.

[0068] Once attachment occurs, the second substrate can be removed. In one embodiment, a planarization process (such as a chemical mechanical polishing process, a grinding process, etc.) can be used to remove the second substrate. In other embodiments, one or more etching processes can be used to remove the second substrate to expose the third active layer 523. Any suitable method can be used.

[0069] Once the second substrate is removed, the third active layer 523 of the third optical component 525 can be bonded to the structure. In one embodiment, the third active layer 523 of the third optical component 525 can be formed to receive and transmit optical signals generated by the laser diode 502. In one embodiment, the third active layer 523 of the third optical component 525 can be formed using the same method as described above with respect to Figure 2 The second active layer 207 of the second optical component 209 is formed on a separate substrate ( Figure 5 However, any suitable methods and materials may be used.

[0070] The third active layer 523 also includes a second reflector 527, which will be used to redirect and transmit the optical signal generated by the laser diode 502. In one embodiment, the second reflector 527 can be used as described above. Figure 2 The first reflector 211 is formed of similar materials and methods. However, any suitable methods and materials may be used.

[0071] Once formed, the third active layer 523 can be bonded to the laser diode 502. In one embodiment, the third active layer 523 can be bonded using fusion bonding with, for example, an oxide layer, but any suitable bonding material and method can be used. Once bonded, the separate substrate can be removed.

[0072] After removing the separate substrate, a first through device via 529 and a second bonding layer 531 are formed. In one embodiment, the first through device via 529 extends through the third active layer 523 to provide a quick path for power, data, and ground through the third active layer 523. In one embodiment, the first through device via 529 can be formed by initially forming a through device via opening through the third active layer 523. The through device via opening can be formed by applying and developing a suitable photoresist (not shown) and removing the exposed portion of the third active layer 523.

[0073] Once the through device via opening is formed, the through device via opening may be lined with a liner. The liner may be an oxide formed, for example, from tetraethyl orthosilicate (TEOS) or silicon nitride, although any suitable dielectric material may be used. The liner may be formed using a plasma enhanced chemical vapor deposition (PECVD) process, although other suitable processes such as physical vapor deposition or thermal processes may be used.

[0074] Once the liner is formed along the sidewalls and bottom of the through-device via opening, a barrier layer (also not separately shown) can be formed, and the remainder of the through-device via opening can be filled with a first conductive material. The first conductive material can include copper, but other suitable materials such as aluminum, alloys, doped polysilicon, combinations thereof, etc. can also be used. The first conductive material can be formed by copper plating on a seed layer (not shown), filling, and overfilling the through-device via opening. Once the through-device via opening is filled, the excess liner, barrier layer, seed layer, and first conductive material outside the through-device via opening can be removed by a planarization process such as chemical mechanical polishing (CMP), but any suitable removal process can also be used.

[0075] Once the first through-device via 529 is formed, a second bonding layer 531 may be formed. In one embodiment, the second bonding layer 531 includes a second bonding pad 533 and a fifth dielectric 535, and may be formed using the same method as described above with respect to Figure 4 The first bonding layer 415, the first bonding pad 419, and the second dielectric material 417 are formed by similar processes and materials. Once the second bonding layer 531 is formed, the combined thickness of the second bonding layer 531 and the first dielectric material 411 on the first passivation layer 405 can be a first thickness T1 between about 0.8 μm and about 8 μm. However, any suitable process and material can be used.

[0076] In some embodiments, the second bonding pads 533 can be used not only to receive and / or transmit electrical signals. For example, in some embodiments, at least some of the second bonding pads 533 can be dummy bonding pads used for thermal conduction or structural reasons and are not functionally connected to the rest of the circuit, such as by being electrically isolated with a dielectric material. However, any suitable purpose or number of second bonding pads 533 can be used.

[0077] Figure 6A first semiconductor device 600 is shown that will also be electrically connected to the optical interposer 400. In some embodiments, the first semiconductor device 600 is an electronic integrated circuit (EIC, e.g., a device without an optical device), and may have a second semiconductor substrate 601, an active device layer (not shown separately), an overlying interconnect structure 603, a third bonding layer 605, and an associated third bonding pad 607. In one embodiment, the second semiconductor substrate 601 may be similar to the first substrate 101 (e.g., a semiconductor material such as silicon or silicon germanium, with a third thickness T3 between about 100 μm and about 650 μm), the active device may be a transistor, a capacitor, a resistor, etc. formed on the second semiconductor substrate 601, the interconnect structure 603 may be similar to the first metallization layer 401, the third bonding layer 605 may be similar to the first bonding layer 415, and the third bonding pad 607 may be similar to the first bonding pad 419. However, any suitable device may be used.

[0078] In one embodiment, the first semiconductor device 600 may be configured to work with the optical interposer 400 to achieve the desired functionality. In some embodiments, the first semiconductor device 600 may be a high bandwidth memory (HBM) module, an xPU, a logic die, a 3DIC die, a CPU, a GPU, a SoC die, a MEMS die, a combination of these, etc. Any suitable device having any suitable functionality may be used, and all such devices are fully intended to be included within the scope of the embodiments.

[0079] Fig. 7A An optional lens die 700 is shown, which will also be bonded to the optical interposer 400 later. In one embodiment, the lens die 700 includes a lens substrate 701 having a first lens 703 and a second lens 705 aligned with each other on opposite sides of the lens substrate 701. The lens substrate 701 can be a material transparent to the wavelength of light desired to be used, such as silicon, SiO2, Al2O3, combinations of these, etc. In one embodiment, the lens substrate 701 has a fourth thickness T4 between about 100 μm and about 650 μm. However, any suitable material and dimensions can be used.

[0080] In one embodiment, the first lens 703 may be formed by patterning the material of the lens substrate 701. In one embodiment, the patterning may be performed using a photolithography mask and etching process, whereby a photosensitive material is placed, exposed, developed, and reshaped to form a photomask, which is then used with one or more anisotropic etching processes (such as reactive ion etching) to etch into the material of the lens substrate 701.

[0081] Fig. 7AAlso shown is a first anti-reflective coating (ARC) 707 formed on the first lens 703. In one embodiment, the first ARC 707 can be one or more layers of material that helps prevent unwanted reflections when light is focused and / or passes through the first lens 703. In a particular embodiment, the one or more layers of material can be materials such as silicon oxide, silicon nitride, Ta2O5, MgF2, composites of these materials, combinations thereof, etc., which are formed using processes such as chemical vapor deposition, atomic layer deposition, physical vapor deposition, oxidation, nitridation, combinations of these, etc. In addition, the first ARC 707 can be formed to have a thickness between about 0.2 μm and about 2 μm. However, any suitable material, thickness, and deposition method can be utilized.

[0082] In certain embodiments, the first ARC 707 may include multiple layers of materials, such as a first silicon oxide layer and a first silicon nitride layer formed on the first silicon oxide layer. In addition, in other embodiments, a second silicon oxide layer and a second silicon nitride layer are further deposited on the first silicon oxide layer and the first silicon nitride layer to form an alternating stack of silicon oxide and silicon nitride. However, any suitable material combination may be used.

[0083] Fig. 7A Also shown is the deposition of a first filler material 709 to fill and / or overfill the recess formed by the first lens 703. In one embodiment, the first filler material 709 may be a dielectric material, such as silicon oxide, polyimide, a combination of these materials, etc., and may be deposited using methods such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition. However, any suitable material and any suitable deposition method may be used.

[0084] Additionally, if desired, dopants may be added to the first fill material 709 to help tune the desired properties of the first fill material 709. In one such embodiment where it is desired to change the optical properties, a dopant (e.g., carbon, silicon, hydrogen, oxygen, combinations of these, etc.) may be added to the oxide material of the first fill material 709 to a concentration between about 0.1 atomic % and about 95 atomic %. However, any suitable dopant and any suitable concentration may be used.

[0085] Once deposited, a planarization process may be used to remove excess material from the outside of the recess formed by the first lens 703. In one embodiment, the planarization process may be performed using a chemical mechanical polishing process, where an etchant and an abrasive are used together with a grinding process to remove unwanted material. However, any other suitable planarization process may also be utilized, such as a grinding process, or even one or more etching processes.

[0086] The second lens 705 may be formed on a side of the lens substrate 701 opposite to the first lens 703. In addition, a second ARC 711 and a second filling material 713 may be deposited. The second lens 705, the second ARC 711, and the second filling material 713 may be formed using materials and processes similar to the first lens 703, the first ARC 707, and the first filling material 709. However, any suitable materials and processes may be used.

[0087] Fig. 7A Also shown is the formation of a third bonding layer 715 formed adjacent to the second lens 705. In one embodiment, the third bonding layer 715 may include a bonding material suitable for fusion bonding, such as silicon oxide, silicon oxynitride, combinations of these, etc., which may be deposited using a deposition process, such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition, combinations of these, etc. However, any suitable material and any suitable process may be used.

[0088] Optionally, although Fig. 7A Not shown, but referenced below Fig.13 As shown, the third bonding layer 715 of the lens die 700 may further include a lens bonding pad 717 to enhance the bonding process and allow for additional heat dissipation even without electrical transmission. In one embodiment, the lens pad 717 may be used in conjunction with the above Figure 4 The first bonding pad 419 is formed using similar processes and materials. However, any suitable processes and materials may be used.

[0089] Figure 7B Another embodiment of a lens die 700 is shown. However, in this embodiment, rather than isolating the first fill material 709 and the second fill material 713 in a recess above the first lens 703 and the second lens 705, an optional side portion 721 is formed to extend away from the first lens 703 and the second lens 705. In this embodiment, in addition to forming the first lens 703 and the second lens 705, the side portion 721 can also be formed by patterning the lens substrate 701 to form an opening for the side portion 721 in the lens substrate 701. Once the opening for the side portion 721 is formed, the opening for the side portion 722 can be filled with the first ARC 707, the first fill material 709, the second ARC 711, and the second fill material 713, respectively.

[0090] In certain embodiments, the side portion 721 can be formed to provide a keep-out region such that once the lens die 700 is in place, no metal pads (e.g., first bonding pad 419) are located below the side portion 721 and below the first lens 703 and the second lens 705. For example, the side portion 721 can extend a first distance D1 less than about 10 μm from the first lens 703 and the second lens 705. However, any suitable distance can be utilized.

[0091] Figure 8 The laser die 500, the first semiconductor device 600, and the lens die 700 are shown bonded to the optical interposer 400. In certain embodiments, the laser die 500 and the first semiconductor device 600 can be bonded using dielectric-to-dielectric and metal-to-metal bonding processes. In certain embodiments utilizing dielectric-to-dielectric and metal-to-metal bonding processes, the process can be initiated by activating the surfaces of the laser die 500 (e.g., the second bonding layer 531), the first semiconductor device 600 (e.g., the third bonding layer 605), and the first bonding layer 415. As an example, activating the top surfaces of the first bonding layer 415, the second bonding layer 531, and the third bonding layer 605 can include dry processing, wet processing, plasma processing, exposure to inert gas plasma, exposure to H2, exposure to N2, exposure to O2, combinations thereof, and the like. In embodiments using wet processing, for example, RCA cleaning can be used. In another embodiment, the activation process can include other types of processing. The activation process facilitates the bonding of the first bonding layer 415, the second bonding layer 531, and the third bonding layer 605.

[0092] After the activation process, the optical interposer 400, the first semiconductor device 600, and the laser die 500 may be cleaned using, for example, chemical rinsing, and then the first semiconductor device 600 and the laser die 500 may be aligned and placed in physical contact with the optical interposer 400. Then, the optical interposer 400, the laser die 500, and the first semiconductor device 600 may be subjected to heat treatment and contact pressure to bond the optical interposer 40, the first semiconductor device 500, and the laser die 600. For example, the optical interposer 400, the laser die 500, and the first semiconductor device 600 may withstand a pressure of about 200 kPa or less, and a temperature of about 25° C. to about 250° C. to fuse the optical interposer 400, the laser die 500, and the first semiconductor device 600. Then, the optical interposer 400, the laser die 500, and the first semiconductor device 600 can be subjected to a temperature equal to or higher than the eutectic point of the materials of the first bonding pad 419, the second bonding pad 533, and the third bonding pad 607, for example, between about 150° C. and about 650° C., to melt the metal. In this way, the optical interposer 400, the laser die 500, and the first semiconductor device 600 form dielectric-to-dielectric and metal-to-metal bonds. In some embodiments, the bonded dies are subsequently baked, annealed, pressed, or otherwise treated to strengthen or complete the bond.

[0093] In addition, although specific processes for initiating and strengthening bonding have been described, these descriptions are intended to illustrate and are not intended to limit the embodiments. Instead, any suitable combination of baking, annealing, pressing or process combinations can be utilized. All of these processes are fully intended to be included within the scope of the embodiments.

[0094] In addition, although the above dielectric-to-dielectric and metal-to-metal bonding processes are described as one embodiment, this is merely illustrative and is not intended to limit the embodiments. Instead, any suitable bonding process may be used, such as an integrated fan-out (InFO) process, a chip-on-wafer-on-substrate (CoWoS) process, and flip-chip technology. All of these processes and combinations of processes are fully intended to be included within the scope of the embodiments.

[0095] Figure 8 The lens die 700 is also shown bonded to the optical interposer 400. In one embodiment, the lens die 700 can be bonded to the optical interposer 400 using, for example, a fusion bonding process, whereby the third bonding layer 715 is bonded to the dielectric material of the first bonding layer 415. In certain embodiments, the fusion bonding process can be similar to the dielectric-to-dielectric and metal-to-metal bonding processes described above, except that there is no bonding of metal components. However, any suitable bonding process can be utilized.

[0096] Finally, although Figure 8A single laser die 500, a single first semiconductor device 600, and a single lens die 700 are shown in the figure, but this is merely illustrative and is not meant to limit the embodiments. Instead, any suitable number of laser dies 500, any suitable number of first semiconductor devices 600 (having any suitable functions), and any suitable number of lens dies 700 may be used. All such combinations are fully intended to be included within the scope of the embodiments.

[0097] Fig. 9 The laser die 500, the first semiconductor device 600, and the lens die 700 are shown sealed with an encapsulant 901. In one embodiment, the encapsulant 901 can be a material such as a molding compound placed using an injection molding process. Once in place, the molding compound can be cured and planarized. However, any suitable material and process can be used.

[0098] Fig. 10A Removal of the carrier substrate 301 and thinning of the second active layer 207 are shown to expose the first through-device via 402. In one embodiment, the removal of the carrier substrate 301 and the thinning of the second active layer 207 may be performed using a planarization process such as a chemical mechanical polishing process or a grinding process. However, any suitable process may be utilized.

[0099] Fig. 10A Also shown is the formation of a fourth passivation layer 1001, a first redistribution layer 1003, a fifth passivation layer 1005, a first under bump metallization 1006, and a first external connector 1007. In one embodiment, the fourth passivation layer 1001, the first redistribution layer 1003, and the fifth passivation layer 1005 may be formed using materials and processes similar to the second passivation layer 513, the first metallization layer 401, and the second passivation layer 513, respectively. However, any suitable materials and processes may be used.

[0100] Fig. 10A Also shown is the formation of a first under bump metallization 1006 and the placement of a first external connector 1007, which can be formed to provide a conductive area for contact between the first redistribution layer 1003 and other external devices. In one embodiment, the first under bump metallization 1006 can include three layers of conductive material, such as a titanium layer, a copper layer, and a nickel layer (for clarity, Fig. 10AOnly one material is shown, but not limited to this). However, those of ordinary skill in the art will recognize that there are many suitable arrangements of materials and layers for forming the first under bump metallization 1006, such as an arrangement of chromium / chromium copper alloy / copper / gold, an arrangement of titanium / titanium tungsten / copper, or an arrangement of copper / nickel / gold. Any suitable material or material layer that can be used for the first under bump metallization 1006 is fully intended to be included within the scope of the embodiment. In one embodiment, the first under bump metallization 1006 is produced by forming each layer using a plating process (such as electrochemical plating), but other formation processes such as sputtering, evaporation, or PECVD processes may also be used depending on the desired material.

[0101] The first external connector 1007 may be a conductive bump (e.g., a C4 bump, a ball grid array, a microbump, etc.) or a conductive column utilizing materials such as solder and copper. In embodiments where the first external connector 1007 is a contact bump, the first external connector 1007 may include a material such as tin, or other suitable materials such as silver, lead-free tin, or copper. In embodiments where the first external connector 1007 is a tin solder bump, the first external connector 1007 may be formed by first forming a tin layer by common methods such as evaporation, electroplating, printing, solder transfer, ball placement, etc. Once the tin layer is formed on the structure, reflow may be performed to shape the material into the desired bump shape.

[0102] Of course, while the use of the first external connector 1007 is one embodiment that may be used to provide a connection for the optical interposer 400, this is merely illustrative and is not meant to limit the embodiment. Instead, any suitable method of physically, electrically, and in some cases optically connecting the optical interposer 400 may be utilized, such as dielectric-to-dielectric and metal-to-metal bonding. Any suitable method of bonding the optical interposer 400 may be used.

[0103] Fig. 10B The movement of optical signals (represented by arrows labeled 1011) and electrical signals (represented by arrows labeled 1013) through various devices during operation is shown. In one embodiment, optical signal 1011 is generated by laser die 500 and routed to second mirror 527, which redirects optical signal 1011 from laser die 500 through first opening 409 to grating coupler (one of first optical components 203 within first active layer 201) and first mirror 211. First mirror 211 then redirects optical signal 1011 from laser die 500 into second optical component 209 and from there to other parts of the device, such as first optical component 203 within first active layer 201 and third optical component 403 (e.g., optical-to-electrical converter) within first metallization layer 401.

[0104] Similarly, for an optical signal 1011 that is desired to be transmitted from the optical interposer 400, the optical interposer 400 generates the optical signal 1011 (e.g., using an electro-optical converter within the third optical component 403 within the first metallization layer 401), and then routes the optical signal 1011 to the second optical component 209 and the first reflector 211 located below the lens die 700. The first reflector 211 then redirects the optical signal 1011 through the first opening 409 and reaches the second lens 705 and the first lens 703 within the lens die 700, and the optical signal 1011 can be guided into or out of the entire device through the second lens 705 and the first lens 703, for example, via an optical fiber (not separately shown).

[0105] For the electrical signal 1013, the optical interposer 400 can provide the electrical signal to the laser die 500 and the first semiconductor device 600. For example, for the laser die 500, the electrical signal 1013 can be transmitted to the first metallization layer 401 through the first external connector 1007, then transmitted to the through-dielectric via 413, and then transmitted to the second bonding pad 533. Similarly, for the first semiconductor device 600, the electrical signal 1013 can be transmitted to the first metallization layer 401 through the first external connector 1007, then transmitted to the through-dielectric via 413, and then transmitted to the third bonding pad 607.

[0106] In addition, if desired, the optical signal 1011 can be converted into an electrical signal 1013 using the first optical component 203 and the third optical component 403, and vice versa. For example, in some embodiments, the optical signal 1011 can be converted into an electrical signal 1013 and transmitted to the first semiconductor device 600 for processing. Similarly, the electrical signal 1013 can be transmitted from the first semiconductor device 600 to the first optical component 203 and the third optical component 403 and converted into an optical signal 1011, for example, transmitted outside the device. However, any suitable conversion and any other suitable modulation can be used, and all of these actions are fully intended to be included within the scope of the embodiments.

[0107] By utilizing dielectric-to-dielectric and metal-to-metal bonding processes, bump pitch and density can be increased while using low-cost integration processes. In addition, by integrating the laser die 500, no additional silicon substrate is required to provide additional optical signal transmission paths, thereby shortening the optical path, reducing optical transmission losses, simplifying the process flow, and reducing costs. Finally, without using devices such as a supporting substrate covering the laser die 500 and the first semiconductor device 600, there is no dielectric interface within the heat dissipation path, thereby improving heat dissipation. All of this can make the device more efficient overall.

[0108] Figure 11-Figure 14Another embodiment is shown, in which the lens die 700 is not bonded to the optical interposer 400 as described above, but is bonded to the laser die 500 and the first semiconductor device 600 after the laser die 500 and the first semiconductor device 600 have been bonded to the optical interposer 400. In this embodiment, as Fig.11 As shown, the laser die 500 and the first semiconductor device 600 may be as described above with respect to Figure 8 The laser die 500 and the first semiconductor device 600 may be bonded to the optical interposer 400 as described. For example, the laser die 500 and the first semiconductor device 600 may be bonded using dielectric-to-dielectric and metal-to-metal bonding processes. However, any suitable bonding process may be utilized.

[0109] Fig.12 It is shown that once the laser die 500 and the first semiconductor device 600 are bonded, the laser die 500 and the first semiconductor device 600 can be planarized to thin the substrates and have similar heights, wherein the second semiconductor substrate 601 can have a fifth thickness T5 between about 20 μm and about 200 μm. In one embodiment, a planarization process such as a chemical mechanical polishing process, a grinding process, a combination of these processes, etc. can be used to planarize the laser die 500 and the first semiconductor device 600. However, any suitable planarization process can be used.

[0110] Once the laser die 500 and the first semiconductor device 600 are bonded, a first gap fill material 1201 may be deposited to fill the space between and around the laser die 500 and the first semiconductor device 600. In one embodiment, the first gap fill material 1201 may be a material such as silicon oxide, silicon nitride, silicon oxynitride, combinations of these materials, etc., which is deposited to fill and overfill the space around the first semiconductor device 600 and the laser die 500. However, any suitable material and deposition method may be utilized.

[0111] Once the first gap fill material 1201 is deposited, it may be planarized to expose the first semiconductor device 600 and the laser die 500. In one embodiment, the planarization process may be a chemical mechanical planarization process, a grinding process, etc. However, any suitable planarization process may be utilized.

[0112] Fig.12 Also shown is a fourth bonding layer 1203 having an optional lens bonding pad 717 formed on the first semiconductor device 600, the laser die 500, and the first gap filling material 1201. In one embodiment, the fourth bonding layer 1203 and the lens bonding pad 717 may be used in combination with the above. Figure 4 The first bonding layer 415 and the first bonding pad 419 are formed by similar processes and materials. However, any suitable process may be utilized.

[0113] Fig.13 The lens die 700 is shown bonded to the fourth bonding layer 1203. In one embodiment, the lens die 700 may be bonded using, for example, a fusion bonding process (as described above with respect to Figure 8 ) is bonded to the fourth bonding layer 1203, or, if the optional lens bonding pad 717 is present, dielectric-to-dielectric and metal-to-metal bonding processes (as described above with respect to Figure 8 However, any suitable bonding process may be utilized.

[0114] However, in this embodiment, the lens die 700 can be used to provide additional structural support for the entire device. Thus, the lens die 700 can extend the width of the optical interposer 400 and extend over each of the first semiconductor device 600, the laser die 500, and the first gap filling material 1201. However, any suitable dimensions can be used.

[0115] Fig.14 As shown, once the lens die 700 is bonded, it can be used as shown in reference Fig. 10A For example, the carrier substrate 301 may be removed, the first through-device via 402 may be exposed by thinning, and the fourth passivation layer 1001, the first redistribution layer 1003, the fifth passivation layer 1005, the first under-bump metallization 1006 and the first external connector 1007 may be formed. However, any suitable process and structure may be utilized.

[0116] Finally, once the first external connector 1007 is formed, the structure can be singulated to form the first integrated device 1400. In one embodiment, the structure can be cut using, for example, a saw blade, so that the sidewalls of the lens die 700 and the optical interposer 400 are coplanar. However, any other suitable singulation process can also be utilized, such as a series of etching processes, or even a combination of sawing and etching.

[0117] Figure 15A-Figure 15C As shown, the processes and devices such as the first integrated device 1400 described above can be used in various different packages to achieve improved performance. Fig.15A As shown, the device can be integrated into an integrated fan-out (InFO) package 1500. For example, a series of metallization layers 1501 can be formed, through vias 1503 (e.g., copper vias) can be formed, a first integrated device 1400 can be placed (using, for example, dielectric-to-dielectric and metal-to-metal bonding) and sealed with the through vias 1503, a memory device 1507 including a substrate and a plurality of memory dies (e.g., DRAM dies) wire-bonded to the substrate can be placed, and an external connector 1509 such as a ball grid array can be placed.

[0118] Fig. 15B Another device is shown where a first integrated device 1400 is integrated into a chip-on-wafer-on-substrate (CoWoS) package 1510. In this embodiment, one or more integrated devices may be bonded to a redistribution layer interposer 1511 and external connectors 1513 such as copper microbumps are placed.

[0119] Fig. 15C Another device is shown in which the first integrated device 1400 is bonded into a flip chip package 1520. In this embodiment, one or more of the first integrated devices 1400 are bonded to a substrate 1521, and a memory device 1507 is also bonded to the substrate 1521. An external connector 1523, such as a ball grid array, is then placed on the substrate 1521.

[0120] By utilizing dielectric-to-dielectric and metal-to-metal bonding processes, the bump spacing and density between devices can be increased while using a low-cost integration process. In addition, by integrating the laser die 500, it is not necessary to use other silicon substrates to provide additional optical signal transmission paths, thereby shortening the optical path, reducing optical transmission losses, simplifying the process flow, and reducing costs. Finally, without using devices such as a supporting substrate covering the laser die 500 and the first semiconductor device 600, there is no dielectric interface within the heat dissipation path, thereby improving heat dissipation. All of this can make the device more efficient overall.

[0121] In one embodiment, a method of manufacturing an optical device includes: forming a metallization layer over a first active layer of a first optical component; forming a first opening through the metallization layer; bonding a first semiconductor device over the metallization layer; and bonding a laser die to the metallization layer, wherein after bonding the laser die, a first reflector in the laser die is aligned with a second reflector through the first opening. In one embodiment, the method further includes bonding a lens die over the metallization layer, wherein after bonding the lens die, the lens die includes a first lens aligned with a third reflector through a second opening through the metallization layer. In one embodiment, the method further includes depositing a gap fill material around the first semiconductor die and the laser die. In one embodiment, the method further includes bonding the lens die to the gap fill material, wherein after bonding the lens die, the lens die includes a first lens aligned with the third reflector through a second opening through the metallization layer. In one embodiment, the method further includes forming a second reflector before bonding the laser die. In one embodiment, the method further includes thinning the first conductor die and the laser die after bonding the first semiconductor die and the laser die. In one embodiment, the first semiconductor die is bonded using a dielectric-to-dielectric and metal-to-metal bonding process.

[0122] In another embodiment, a method of manufacturing an optical device includes: forming a first active layer of a first optical component; forming a second active layer of a second optical component, the second optical component including a first reflector and a second reflector; forming a first metallization layer on a side of the first active layer opposite to the second active layer; forming a first opening through the first metallization layer above the first reflector; forming a second opening through the first metallization layer above the second reflector; filling the first opening and the second opening; bonding a laser die above the first opening and to a first surface; and bonding a first semiconductor device to the first surface. In one embodiment, the method also includes bonding a lens die above the second opening and to the first surface. In one embodiment, the method also includes depositing a gap filler material around the laser die and the first semiconductor die. In one embodiment, the method also includes bonding the lens die above the second opening and to the gap filler material. In one embodiment, bonding the lens die is performed using a fusion bonding process. In one embodiment, bonding the lens die is performed using a dielectric-to-dielectric and metal-to-metal bonding process. In one embodiment, forming the first opening exposes a grating coupler of the first optical component.

[0123] In another embodiment, an optical device includes: a metallization layer located above a first active layer of a first optical component; a first opening through the metallization layer; a first semiconductor device bonded above the metallization layer; and a laser die bonded above the metallization layer, wherein a first reflector located in the laser die is aligned with a second reflector through the first opening. In one embodiment, the optical device also includes a lens die bonded above the metallization layer. In one embodiment, the optical device also includes a gap filler material surrounding the first semiconductor die and the laser die. In one embodiment, the optical device also includes a lens die bonded above the gap filler material. In one embodiment, the lens die is bonded using dielectric-to-dielectric and metal-to-metal bonding. In one embodiment, a first lens within the lens die and a second lens within the lens die are aligned with a third reflector through a second opening through the metallization layer.

[0124] The features of several embodiments are summarized above so that those skilled in the art can better understand the various aspects of the present disclosure. Those skilled in the art will appreciate that they can easily use the present disclosure as a basis for designing or modifying other processes and structures for realizing the same purpose of the embodiments introduced herein and / or realizing the same advantages thereof. Those skilled in the art will also appreciate that such equivalent structures do not deviate from the spirit and scope of the present invention, and they can make various changes, substitutions and changes in the present invention without deviating from the spirit and scope of the present invention.

Claims

1. A method for manufacturing an optical device, the method comprising: forming a metallization layer over the first active layer of the first optical component; forming a first opening through the metallization layer; bonding a first semiconductor device over the metallization layer; as well as A laser die is bonded onto the metallization layer, wherein after bonding the laser die, a first reflector in the laser die is aligned with a second reflector through the first opening.

2. The method of claim 1 , further comprising bonding a lens die over the metallization layer, wherein After bonding the lens die, the lens die includes a first lens aligned with a third reflector through a second opening through the metallization layer. 3 . The method of claim 1 , further comprising depositing a gap fill material around the first semiconductor die and the laser die.

4. The method of claim 3, further comprising bonding a lens die to the gap-filling material, wherein: After bonding the lens die, the lens die includes a first lens aligned with a third reflector through a second opening through the metallization layer.

5. The method of claim 1, further comprising forming the second mirror before bonding the laser die. 6 . The method of claim 1 , further comprising thinning the first conductor die and the laser die after bonding the first semiconductor die and the laser die.

7. The method according to claim 1, wherein: The first semiconductor die is bonded using dielectric-to-dielectric and metal-to-metal bonding processes.

8. A method for manufacturing an optical device, the method comprising: forming a first active layer of a first optical component; forming a second active layer of a second optical assembly, the second optical assembly comprising a first reflector and a second reflector; forming a first metallization layer on a side of the first active layer opposite to the second active layer; forming a first opening through the first metallization layer over the first reflector; forming a second opening through the first metallization layer above the second reflector; filling the first opening and the second opening; bonding a laser die over the first opening and to the first surface; as well as A first semiconductor device is bonded to the first surface.

9. An optical device, comprising: a metallization layer located above the first active layer of the first optical component; a first opening passing through the metallization layer; a first semiconductor device bonded over the metallization layer; as well as A laser die is bonded over the metallization layer, wherein a first reflector in the laser die is aligned with a second reflector through the first opening.

10. The optical device of claim 9, further comprising a gap fill material surrounding the first semiconductor die and the laser die.

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