Liquid crystal display panel, method for suppressing crosstalk of liquid crystal display panel, display device, and storage medium

Abstract

This application discloses a liquid crystal display panel, a crosstalk suppression method, a display device, and a storage medium thereof, relating to the field of liquid crystal display technology. The circuit includes a pixel driving module, a crosstalk suppression module, and a thin-film chip module. The voltage feedback terminal of the pixel driving module is electrically connected to the signal acquisition terminal of the crosstalk suppression module, and the general signal terminal of the crosstalk suppression module is electrically connected to the signal polarity terminal of the thin-film chip module. The crosstalk suppression module is configured to, when the pixel driving module is driven by a gate driving signal to receive the pixel display voltage of the data line for pixel charging, receive the coupled analog signal between the common electrode line electrically connected to the pixel driving module and the data line sent by the voltage feedback terminal through the signal acquisition terminal, determine the minimum coupling value based on the coupled analog signal, and output the minimum coupling value as the optimal signal polarity value of the thin-film chip module to the signal polarity terminal. This application aims to suppress horizontal crosstalk in the liquid crystal display panel to improve display quality.

Description

Technical Field

[0001] This application relates to the field of liquid crystal display technology, and in particular to a liquid crystal display panel and its crosstalk suppression method, display device and storage medium. Background Technology

[0002] TFT-LCD (Thin Film Transistor-Liquid Crystal Display) occupies an important position in the display field due to its advantages such as thinness, low power consumption, and high resolution. However, as users' requirements for display quality have become increasingly demanding, display defects in LCD panels have gradually become apparent, among which horizontal crosstalk is particularly prominent.

[0003] Horizontal crosstalk occurs because of the coupling capacitance between the common electrode (VCOM) and the data line in a liquid crystal display panel. When the voltage on the data line changes, this change is transmitted to VCOM through the coupling capacitance, causing VCOM voltage fluctuations. This affects the pixel charging effect, resulting in a deviation between the actual and expected brightness, forming uneven brightness or horizontal crosstalk. Figure 1 As shown, when displaying on a gray background, the unstable Vcom voltage causes the charging effect of some pixels to be inconsistent with expectations, resulting in differences in screen brightness and forming obvious horizontal crosstalk stripes. This not only reduces the visual effect of the screen but also seriously affects the display quality.

[0004] Therefore, how to effectively suppress horizontal crosstalk in liquid crystal display panels to improve display quality is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] The main objective of this application is to provide a liquid crystal display panel, a crosstalk suppression method thereof, a display device, and a storage medium, which aim to effectively suppress horizontal crosstalk in the liquid crystal display panel to improve display quality.

[0006] To achieve the above objectives, this application provides a liquid crystal display panel, which includes a pixel driving module, a crosstalk suppression module, and a thin film chip module;

[0007] The voltage feedback terminal of the pixel driving module is electrically connected to the signal acquisition terminal of the crosstalk suppression module, and the general signal terminal of the crosstalk suppression module is electrically connected to the signal polarity terminal of the thin film chip module.

[0008] The crosstalk suppression module is configured to, when the pixel driving module is connected to the pixel display voltage of the data line for pixel charging under the drive of the gate driving signal, receive the coupling analog signal between the common electrode line electrically connected to the pixel driving module and the data line sent by the voltage feedback terminal through the signal acquisition terminal, determine the minimum coupling value based on the coupling analog signal, and output the minimum coupling value as the optimal signal polarity value of the thin film chip module to the signal polarity terminal.

[0009] In one embodiment, the liquid crystal display panel includes: in-plane wiring, a display substrate, and a circuit assembly board;

[0010] The in-plane trace connects the voltage feedback terminal of the pixel driving module and the circuit assembly board. The in-plane trace is configured to transmit the coupled analog signal from the voltage feedback terminal to the crosstalk suppression module disposed on the circuit assembly board.

[0011] The in-plane traces and the pixel driving module are both disposed within the display substrate. The side of the display substrate closest to the circuit assembly board is a flexible circuit board layer, and the thin-film chip module is electrically connected between the flexible circuit board layer and the circuit assembly board.

[0012] In one embodiment, the crosstalk suppression module includes an analog-to-digital conversion unit and a timing control unit;

[0013] The signal input terminal of the analog-to-digital conversion unit constitutes the signal acquisition terminal of the crosstalk suppression module, and is electrically connected to the voltage feedback terminal of the pixel driving module through the in-plane trace;

[0014] The signal output terminal of the analog-to-digital conversion unit is electrically connected to the feedback receiving terminal of the timing control unit;

[0015] The data signal terminal of the timing control unit constitutes the general signal terminal of the crosstalk suppression module and is electrically connected to the signal polarity terminal of the thin-film chip module.

[0016] In one embodiment, the liquid crystal display panel includes gate lines;

[0017] The gate driving terminal of the pixel driving module is electrically connected to the gate line, the data access terminal of the pixel driving module is electrically connected to the data line, and the data output terminal of the pixel driving module is electrically connected to the common electrode line.

[0018] The pixel driving module is configured to receive the gate driving signal sent by the gate line through the gate driving terminal, and after receiving the pixel display voltage sent by the data line through the signal input terminal under the drive of the gate driving signal, the pixel display voltage is transmitted to the common electrode line through the data output terminal for pixel charging.

[0019] In one embodiment, the pixel driving module includes a thin-film transistor, a first capacitor, and a second capacitor;

[0020] The control terminal of the thin-film transistor constitutes the gate driving terminal of the pixel driving module and is electrically connected to the gate line; the first path terminal of the thin-film transistor constitutes the data access terminal of the pixel driving module and is electrically connected to the data line.

[0021] The second terminal of the thin-film transistor constitutes the data output terminal of the pixel driving module and is electrically connected to the first terminal of the first capacitor and the first terminal of the second capacitor, respectively. The second terminal of the second capacitor is electrically connected to the common electrode line.

[0022] The second end of the first capacitor forms the voltage feedback terminal of the pixel driving module and is electrically connected to the signal acquisition terminal of the crosstalk suppression module.

[0023] In one embodiment, the liquid crystal display panel includes a third capacitor;

[0024] The third capacitor is electrically connected between the common electrode line and the data line, and the common electrode line is arranged perpendicularly to the data line.

[0025] Furthermore, to achieve the above objectives, this application also provides a crosstalk suppression method for a liquid crystal display panel, which is applied to the liquid crystal display panel described in any of the above claims, and the crosstalk suppression method for the liquid crystal display panel includes:

[0026] When the pixel driving module is driven by the gate driving signal to connect to the pixel display voltage of the data line for pixel charging, the signal acquisition terminal of the crosstalk suppression module connects to the voltage feedback terminal of the pixel driving module to send the coupled analog signal between the common electrode line electrically connected to the pixel driving module and the data line.

[0027] The minimum coupling value is determined based on the coupled analog signal, and the minimum coupling value is output to the signal polarity terminal as the optimal signal polarity value of the thin film chip module.

[0028] In one embodiment, the step of determining the minimum coupling value based on the coupled analog signal includes:

[0029] The system determines multiple signal setting states of the thin-film chip module and converts the coupled analog signals into coupled digital quantities corresponding to each signal setting state through an analog-to-digital converter.

[0030] The smallest coupled digital value is found among the multiple coupled digital values, and the smallest coupled digital value is taken as the minimum coupled value.

[0031] Furthermore, to achieve the above objectives, this application also provides a display device, which includes the aforementioned liquid crystal display panel; or,

[0032] The display device includes a processor, a memory, and a crosstalk suppression program for a liquid crystal display panel stored in the memory and executable by the processor. When the crosstalk suppression program for the liquid crystal display panel is executed by the processor, it implements the steps of the crosstalk suppression method for the liquid crystal display panel described above.

[0033] In addition, to achieve the above objectives, this application also provides a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the above-described crosstalk suppression method for a liquid crystal display panel.

[0034] The liquid crystal display panel configured in this application integrates a pixel driving module, a crosstalk suppression module, and a thin-film chip module. The voltage feedback terminal of the pixel driving module is connected to the signal acquisition terminal of the crosstalk suppression module, and the general signal terminal of the crosstalk suppression module is connected to the signal polarity terminal of the thin-film chip module. This effectively solves the horizontal crosstalk problem caused by the coupling capacitance between the common electrode and the data line, thereby improving the display quality of the liquid crystal display panel. Specifically, when the pixel driving module connects to the pixel display voltage of the data line to charge the pixel under the drive of the gate driving signal, the crosstalk suppression module can collect the coupling analog signal between the common electrode line and the data line in real time. Based on the coupling analog signal, the minimum coupling value can be accurately obtained. Thus, the minimum coupling value can be used to intuitively reflect the state of minimizing Vcom voltage fluctuation while maintaining stable pixel charging effect. Next, the minimum coupling value is output as the signal polarity optimal value of the thin film chip module to adjust the POLC signal of the thin film chip module to the signal polarity optimal value to maintain the optimal state of the POLC signal. This can suppress Vcom voltage fluctuation caused by coupling capacitor to the maximum extent, effectively prevent horizontal crosstalk stripes caused by Vcom voltage fluctuation, ensure uniform brightness of the LCD panel, and thus significantly improve the display quality of the LCD panel. Attached Figure Description

[0035] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0036] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of the horizontal crosstalk stripes involved in the liquid crystal display panel;

[0038] Figure 2 This is a structural block diagram of the first embodiment of the liquid crystal display panel of this application;

[0039] Figure 3 This is a schematic diagram showing the location of the coupling capacitors in one embodiment of the liquid crystal display panel of this application;

[0040] Figure 4 This is a schematic diagram of the inter-module layout of an embodiment of the liquid crystal display panel of this application;

[0041] Figure 5 This is a schematic diagram of a crosstalk suppression module circuit according to an embodiment of the liquid crystal display panel of this application;

[0042] Figure 6 This is a schematic diagram of a pixel driving module circuit according to an embodiment of the liquid crystal display panel of this application;

[0043] Figure 7 This is a schematic diagram of the structure of the display device involved in the embodiments of this application.

[0044] Explanation of icon numbers:

[0045] 10. Pixel driving module; 20. Crosstalk suppression module; 30. Thin film chip module; P1. Voltage feedback terminal; P2. Signal acquisition terminal; P3. General signal terminal; P4. Signal polarity terminal; L_vcom. Common electrode line; L_data. Data line; L_gate. Gate line; L_m. In-plane trace; 100. Display substrate; 200. Circuit assembly board; 201. Analog-to-digital conversion unit; 202. Timing control unit; T1. Thin film transistor; C1. First capacitor; C2. Second capacitor; C3. Third capacitor.

[0046] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0047] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0048] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0049] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0050] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application.

[0051] With the rapid development of liquid crystal thin-film transistor (LCD) displays, demands for high resolution, wide viewing angles, high response speeds, and high aperture ratios have placed higher requirements on display quality. However, as pixel sizes and line spacing decrease, the coupling capacitance between signals increases. When the voltage on one of these signals changes, all signals with coupling capacitance to it will be interfered with by this changing signal; horizontal crosstalk is a common phenomenon in this regard.

[0052] Horizontal crosstalk occurs because the common electrode (VCOM) is coupled to the data line, causing voltage instability at VCOM, which in turn affects the pixel charging performance. Figure 1 The charging effect shown in (b) is the same as Figure 1 (a) shows that the expected effect is not achieved, resulting in a brightness difference.

[0053] To address the horizontal crosstalk problem caused by the coupling capacitance between the common electrode and the data line and thus improve the display quality of the liquid crystal display panel, this application provides a liquid crystal display panel, a crosstalk suppression method thereof, a display device, and a storage medium.

[0054] This application provides a liquid crystal display panel, see reference. Figure 2 As shown, Figure 2 This is a structural block diagram of a first embodiment of the liquid crystal display panel of this application. The liquid crystal display panel includes a pixel driving module 10, a crosstalk suppression module 20, and a thin-film chip module 30; the voltage feedback terminal P1 of the pixel driving module 10 is electrically connected to the signal acquisition terminal P2 of the crosstalk suppression module 20, and the general signal terminal P3 of the crosstalk suppression module 20 is electrically connected to the signal polarity terminal P4 of the thin-film chip module 30; the crosstalk suppression module 20 is configured to, when the pixel driving module 10 is driven by the gate driving signal to receive the pixel display voltage of the data line L_data for pixel charging, receive the coupling analog signal Vcom_CF between the common electrode line L_vcom and the data line L_data sent by the voltage feedback terminal P1 through the signal acquisition terminal P2, determine the minimum coupling value based on the coupling analog signal Vcom_CF, and output the minimum coupling value as the optimal signal polarity value of the thin-film chip module 30 to the signal polarity terminal P4.

[0055] In this embodiment, refer to Figure 3 , Figure 3This is a schematic diagram of the location of the coupling capacitor in an embodiment of the liquid crystal display panel of this application. Since there is a coupling capacitor between the data line L_data and the common electrode line L_vcom, when the pixel display voltage of the data line L_data changes, the changed pixel display voltage is coupled to the common electrode line L_vcom through the coupling capacitor, thereby causing the Vcom voltage on the common electrode line L_vcom to be unstable. This application establishes an electrical connection between the voltage feedback terminal P1 of the pixel driving module 10, which is disposed within the surface of the liquid crystal display panel, and the signal acquisition terminal P2 of the crosstalk suppression module 20 on the circuit assembly board 200 via an in-plane trace L_m. Next, when the pixel driving module 10 charges the pixel by connecting to the pixel display voltage of the data line L_data under the drive of the gate driving signal, the voltage feedback terminal P1 of the pixel driving module 10 acquires the coupled analog signal Vcom_CF between the common electrode line L_vcom and the data line L_data, and transmits this coupled analog signal Vcom_CF to the signal acquisition terminal P2 of the crosstalk suppression module 20 via the in-plane trace L_m. At this time, after receiving the coupled analog signal Vcom_CF from the voltage feedback terminal P1 via the signal acquisition terminal P2, the crosstalk suppression module 20 suppresses the crosstalk signal. The analog-to-digital conversion unit 201 in the suppression module 20 converts the coupled analog signal Vcom_CF into a coupled digital quantity corresponding to each signal setting state configured in the thin-film chip module 30. Next, the timing control unit 202 in the crosstalk suppression module 20 compares the magnitudes of each coupled digital quantity to select the smallest coupled digital quantity as the minimum coupling value, reflecting the minimum influence of the coupling capacitor on the Vcom voltage. Then, this minimum coupling value is set to the optimal signal polarity value of the thin-film chip module 30 and output to the signal polarity terminal P4 of the thin-film chip module 30, thereby suppressing the influence of the coupling capacitor on the Vcom voltage, stabilizing the Vcom voltage, effectively avoiding the horizontal crosstalk phenomenon caused by the coupling capacitor between the data line L_data and the common electrode line L_vcom, and significantly improving the display quality of the liquid crystal display panel.

[0056] It should be noted that the gate drive signal can be used Figure 2 The V_gate shown indicates that the gate drive signal is provided by the gate line L_gate set in this application; the common electrode line L_vcom is used to provide the Vcom voltage; the data line L_data is used to provide the pixel display voltage, and the voltage transition of the changing pixel display voltage can be customized according to the application requirements. For example, the voltage transition of the changing pixel display voltage can be defined as 0V→10V. The above is only one feasible implementation of this application, and this application does not make any limitations.

[0057] In summary, the liquid crystal display panel configured in this application integrates a pixel driving module 10, a crosstalk suppression module 20, and a thin-film chip module 30. The voltage feedback terminal P1 of the pixel driving module 10 is connected to the signal acquisition terminal P2 of the crosstalk suppression module 20, and the general signal terminal P3 of the crosstalk suppression module 20 is connected to the signal polarity terminal P4 of the thin-film chip module 30. This effectively solves the horizontal crosstalk problem caused by the coupling capacitance between the common electrode and the data line L_data, thereby improving the display quality of the liquid crystal display panel. Specifically, when the pixel driving module 10 connects to the pixel display voltage of the data line L_data for pixel charging under the drive of the gate driving signal, the crosstalk suppression module 20 can collect the coupling analog signal Vcom_CF between the common electrode line L_vcom and the data line L_data in real time. Based on the coupling analog signal Vcom_CF, the minimum coupling value can be accurately obtained. Thus, the minimum coupling value can be used to intuitively reflect the state of minimum Vcom voltage fluctuation under the premise of maintaining stable pixel charging effect. Next, the minimum coupling value is output as the signal polarity optimal value of the thin film chip module 30 to adjust the POLC signal of the thin film chip module 30 to the signal polarity optimal value to maintain the optimal state of the POLC signal. This can suppress the Vcom voltage fluctuation caused by the coupling capacitor to the maximum extent, effectively prevent horizontal crosstalk stripes caused by Vcom voltage fluctuation, ensure uniform brightness of the liquid crystal display panel, and thus significantly improve the display quality of the liquid crystal display panel.

[0058] Furthermore, in some feasible embodiments, reference is made to Figure 4 , Figure 4 This is a schematic diagram of the inter-module layout according to an embodiment of the liquid crystal display panel of this application. The liquid crystal display panel provided in this application includes: an in-plane trace L_m, a display substrate 100, and a circuit assembly board 200; the in-plane trace L_m connects the voltage feedback terminal P1 of the pixel driving module 10 and the circuit assembly board 200, and the in-plane trace L_m is configured to transmit the coupled analog signal Vcom_CF from the voltage feedback terminal P1 to the crosstalk suppression module 20 disposed on the circuit assembly board 200; the in-plane trace L_m and the pixel driving module 10 are both disposed in the display substrate 100, and the side of the display substrate 100 near the circuit assembly board 200 is a flexible circuit board layer, and the thin film chip module 30 is electrically connected between the flexible circuit board layer and the circuit assembly board 200.

[0059] In this embodiment, the traditional VCOM compensation method requires a feedback network that pulls back the Vcom voltage from the in-plane of the liquid crystal display panel to perform negative feedback compensation on the Vcom voltage. However, the compensated Vcom voltage needs to pass through the in-plane trace L_m, which causes RC delay when the compensated Vcom voltage passes through the in-plane trace L_m, thus affecting the compensation effect of the Vcom voltage. This application introduces the voltage feedback terminal P1 (i.e., the Vcom voltage feedback network) of the pixel driving module 10 to the circuit assembly board 200 through the in-plane trace L_m, so that the analog-to-digital conversion unit 201 in the crosstalk suppression module 20 on the circuit assembly board 200 can perform high-speed acquisition and conversion of the coupled analog signal Vcom_CF output from the voltage feedback terminal P1, effectively avoiding the RC delay problem caused by the VCOM compensation signal needing to pass through the in-plane trace L_m in the traditional method, and reducing signal loss and interference during transmission; next, the timing control unit 202 in the crosstalk suppression module 20 records the output of the analog-to-digital conversion unit 201 on the thin film chip module 30 in The system automatically detects the coupling digital quantity corresponding to the display screen under different signal setting states, thus enabling its application to horizontal crosstalk in non-uniform display screens. Next, it finds the coupling digital quantity with the smallest value (i.e., the minimum coupling value) from multiple coupling digital quantities, so that the timing control unit 202 sets the minimum coupling value as the optimal value for the signal polarity of the thin-film chip module 30 and outputs it to the signal polarity terminal P4 of the thin-film chip module 30. This effectively prevents horizontal crosstalk stripes that may be caused by VCOM voltage fluctuations, ensures uniform brightness of the LCD panel, and significantly improves the display quality of the LCD panel.

[0060] It should be noted that, Figure 4 The dashed line shown represents the in-plane trace L_m provided in this application, and the common electrode line L_vcom is electrically connected to the gamma chip (i.e., Gamma IC), meaning that the Vcom voltage on the common electrode line L_vcom is provided by the gamma chip.

[0061] The thin-film chip module 30 can be understood as COF (Chip On Flex or Chip On Film), and the number of such thin-film chip modules 30 is at least one; this application does not impose any limitation on this. For example, Figure 4 The number of thin-film chip modules 30 shown is 6, which are represented by thin-film chip module 30-1, thin-film chip module 30-2, thin-film chip module 30-3, thin-film chip module 30-4, thin-film chip module 30-6 respectively.

[0062] For example, when the number of thin film chip modules 30 is 1, the signal setting state of the thin film chip module 30 has two types, namely "0" signal state and "1" signal state. The "0" signal state can be represented by [POLC1]=[0], and the "1" signal state can be represented by [POLC1]=[1], where [POLC1] represents the thin film chip module 30 with serial number 1. When the number of thin-film chip modules 30 is 2, each thin-film chip module 30 has 4 signal setting states: "00", "01", "10", and "11". The "00" signal state can be represented by [POLC12]=

[00] , the "01" signal state can be represented by [POLC12]=

[01] , the "10" signal state can be represented by [POLC12]=

[10] , and the "11" signal state can be represented by [POLC12]=

[11] . Here, [POLC12] represents the thin-film chip module 30 with serial number 1 and the thin-film chip module 30 with serial number 2. That is to say, the number of signal setting states is 2. n , where n is the number of thin-film chip modules 30.

[0063] Furthermore, in some other feasible embodiments, reference is made to... Figure 5 , Figure 5 This is a circuit diagram of a crosstalk suppression module 20 according to an embodiment of the liquid crystal display panel of this application. The crosstalk suppression module 20 provided in this application includes an analog-to-digital conversion unit 201 and a timing control unit 202; the signal input terminal of the analog-to-digital conversion unit 201 constitutes the signal acquisition terminal P2 of the crosstalk suppression module 20, and is electrically connected to the voltage feedback terminal P1 of the pixel driving module 10 through the in-plane trace L_m; the signal output terminal of the analog-to-digital conversion unit 201 is electrically connected to the feedback receiving terminal of the timing control unit 202.

[0064] In this embodiment, since horizontal crosstalk exists in any pixel architecture, traditional methods for suppressing horizontal crosstalk, besides VCOM compensation, also include changing the polarity inversion method. Specifically, when the timing controller detects horizontal crosstalk in the displayed image, it adjusts the polarity inversion method of the data on the data line L_data to reduce the coupling effect of the data line L_data on the Vcom voltage on the common electrode line L_vcom, thereby eliminating the horizontal crosstalk phenomenon. However, this method has limitations because changing the inversion method can only detect and process a limited number of images, and it is not effective for non-uniform image conditions. This application integrates an analog-to-digital converter (ADC) 201 and a timing control unit (TCU) 202 into the crosstalk suppression module 20, enabling automatic detection of the coupled digital quantities corresponding to the display screen under different signal setting states. This avoids the phenomenon that changing the inversion method can only detect and process a limited number of screens. Specifically, this application directly introduces the voltage feedback terminal P1 (i.e., the feedback network of the Vcom voltage) of the pixel driving module 10 to the circuit assembly board 200 through an in-plane trace L_m. This allows the ADC 201 on the circuit assembly board 200 to acquire the coupled analog signal Vcom_CF at a high speed, convert the coupled analog signal Vcom_CF into a coupled digital quantity corresponding to the thin-film chip module 30 under each signal setting state, and then transmit it to the timing control unit 202. Next, the timing control unit 202 records the analog signal. The conversion unit 201 outputs the coupled digital quantity of the thin-film chip module 30 in each signal setting state, thereby realizing automatic monitoring of the coupled digital quantity corresponding to different display screens in the liquid crystal display panel. Subsequently, the timing control unit 202 compares the coupled digital quantity of each thin-film chip module 30 in different signal setting states, and sets the optimal POLC signal (i.e., the optimal signal polarity value) of each thin-film chip module 30 in the signal setting state (i.e., the target signal state) corresponding to the minimum coupling value, thereby optimizing the Vcom voltage of each display screen in the liquid crystal display panel, so that the fluctuation of Vcom voltage in the target signal state has the least impact on the display screen, thereby effectively avoiding the generation of horizontal crosstalk stripes and significantly improving the display quality of the liquid crystal display panel.

[0065] It should be noted that the analog-to-digital conversion unit 201 can be understood as an A / D converter; the timing control unit 202 can be understood as a TCON IC (Timing Controller Integrated Circuit).

[0066] Furthermore, in some feasible embodiments, reference is made to Figures 2 to 3The liquid crystal display panel includes a gate line L_gate; the gate driving terminal of the pixel driving module 10 is electrically connected to the gate line L_gate, the data input terminal of the pixel driving module 10 is electrically connected to the data line L_data, and the data output terminal of the pixel driving module 10 is electrically connected to the common electrode line L_vcom; the pixel driving module 10 is configured to receive the gate driving signal sent by the gate line L_gate through the gate driving terminal, and after receiving the pixel display voltage sent by the data line L_data through the signal input terminal under the drive of the gate driving signal, the pixel display voltage is transmitted to the common electrode line L_vcom through the data output terminal for pixel charging.

[0067] In this embodiment, based on the electrical connection between the gate driving terminal of the pixel driving module 10 and the gate line L_gate, the pixel driving module 10, driven by the gate driving signal of the gate line L_gate, transmits the pixel display voltage received at the data input terminal to the common electrode line L_vcom through the electrical connection between the data access terminal of the pixel driving module 10 and the data line L_data, thereby completing the pixel charging process and ensuring the high efficiency and accuracy of pixel charging.

[0068] Furthermore, in some other feasible embodiments, reference is made to... Figure 6 , Figure 6 This is a schematic diagram of a pixel driving module 10 according to an embodiment of the liquid crystal display panel of this application. The pixel driving module 10 includes a thin-film transistor T1, a first capacitor C1, and a second capacitor C2. The control terminal of the thin-film transistor T1 constitutes the gate driving terminal of the pixel driving module 10 and is electrically connected to the gate line L_gate. The first path terminal of the thin-film transistor T1 constitutes the data access terminal of the pixel driving module 10 and is electrically connected to the data line L_data. The second path terminal of the thin-film transistor T1 constitutes the data output terminal of the pixel driving module 10 and is electrically connected to the first terminal of the first capacitor C1 and the first terminal of the second capacitor C2. The second terminal of the second capacitor C2 is electrically connected to the common electrode line L_vcom. The second terminal of the first capacitor C1 constitutes the voltage feedback terminal P1 of the pixel driving module 10 and is electrically connected to the signal acquisition terminal P2 of the crosstalk suppression module 20.

[0069] In this embodiment, refer to Figure 6(a) When the thin film transistor T1 is turned on by the gate drive signal connected to the gate line L_gate through the control terminal of the thin film transistor T1, the pixel display voltage connected to the data line L_data through the first path terminal of the thin film transistor T1 charges the second capacitor C2 electrically connected to the second path terminal of the thin film transistor T1. The second capacitor C2 transmits the voltage to the common voltage line. Since the first capacitor C1 detects the pixel display voltage connected to the first path terminal of the thin film transistor T1, that is, the first capacitor C1 detects the change in the pixel display voltage of the data line L_data, at this time, the pixel display voltage that is fed back in real time to the signal acquisition terminal P2 of the crosstalk suppression module 20 through the in-plane trace L_m electrically connected to the second terminal of the first capacitor C1 is coupled to the coupled analog signal Vcom_CF on the common electrode line L_vcom through the coupling capacitor (i.e., the third capacitor C3).

[0070] It should be noted that the first capacitor C1 can be understood as the liquid crystal capacitor of the thin-film transistor T1, and the second capacitor C2 can be understood as the storage capacitor.

[0071] Figure 6 (b) shows that L_gate_signal can be understood as the pixel display voltage of the data line L_data, where, Figure 6 The grid rectangles shown represent red pixel voltages, the shaded rectangles represent black pixel voltages, the vertical rectangles represent blue pixel voltages, and the diagonal rectangles represent green pixel voltages.

[0072] Furthermore, in some feasible embodiments, reference is made to Figure 6 The liquid crystal display panel includes a third capacitor C3; the third capacitor C3 is electrically connected between the common electrode line L_vcom and the data line L_data, and the common electrode line L_vcom and the data line L_data are arranged perpendicularly to each other.

[0073] In this embodiment, the third capacitor C3 represents the coupling capacitance between the common electrode line L_vcom and the data line L_data. Because there is a coupling capacitance between the data line L_data and the common electrode line L_vcom... Figure 6 The coupling capacitor shown in (a) (i.e., the third capacitor C3) will cause the voltage of Vcom on the common electrode line L_vcom to follow the... Figure 6 (b) shows the direction of Vcom fluctuation, exhibiting the following pattern: Figure 6(b) shows the signal waveform of L_vcom_signal, which causes the Vcom voltage on the common electrode line L_vcom to be unstable. In this application, after the first terminal of the thin film transistor T1 is connected to the pixel display voltage through the first terminal of the first capacitor C1, the changing pixel display voltage is fed back in real time to the signal acquisition terminal P2 of the crosstalk suppression module 20 through the in-plane trace L_m via the second terminal of the first capacitor C1, and then coupled to the coupled analog signal Vcom_CF on the common electrode line L_vcom through the coupling capacitor (i.e., the third capacitor C3).

[0074] In summary, this application introduces the Vcom voltage feedback network (i.e., voltage feedback terminal P1) into the PCBA (Printed Circuit Board Assembly, i.e., circuit assembly board 200) through in-plane traces L_m. The analog-to-digital converter 201 (i.e., A / D converter) on the PCBA converts the coupled analog signal Vcom_CF (i.e., Vcom analog signal) into a coupled digital signal (i.e., the coupled digital quantity corresponding to each signal setting state) through high-speed ACD acquisition. The timing control unit 202 (i.e., TCON IC) determines whether the Vcom voltage has the minimum coupled digital quantity by identifying the magnitude of the converted coupled digital signal. The optimal POLC signal for each COF is set by the coupled digital quantity with the minimum Vcom voltage value, so that the fluctuation of Vcom voltage has the least impact on the display screen of the liquid crystal display panel, thereby effectively avoiding the generation of horizontal crosstalk stripes and significantly improving the display quality of the liquid crystal display panel.

[0075] Furthermore, based on the first embodiment of the liquid crystal display panel of this application, a second embodiment of the crosstalk suppression method for the liquid crystal display panel of this application is proposed.

[0076] The crosstalk suppression method for liquid crystal display panels of this application is applied to any of the above-mentioned liquid crystal display panels. The crosstalk suppression method for liquid crystal display panels of this application is executed by a terminal device that suppresses the horizontal crosstalk phenomenon of the liquid crystal display panel. The crosstalk suppression method for liquid crystal display panels of this application includes the following implementation steps S10 to S20.

[0077] Step S10: When the pixel driving module 10 is driven by the gate driving signal to connect to the pixel display voltage of the data line L_data for pixel charging, the common electrode line L_vcom connected to the pixel driving module 10 and the data line L_data are coupled analog signal Vcom_CF sent by the voltage feedback terminal P1 of the pixel driving module 10 through the signal acquisition terminal P2 of the crosstalk suppression module 20.

[0078] In this embodiment, since there is a coupling capacitor between the data line L_data and the common electrode line L_vcom, when the pixel display voltage of the data line L_data changes, the changing pixel display voltage is coupled to the common electrode line L_vcom through the coupling capacitor, resulting in unstable Vcom voltage on the common electrode line L_vcom. This application establishes an electrical connection between the voltage feedback terminal P1 of the pixel driving module 10, which is disposed in the liquid crystal display panel, and the signal acquisition terminal P2 of the crosstalk suppression module 20 on the circuit assembly board 200 via an in-plane trace L_m. Next, when the pixel driving module 10 charges the pixel using the pixel display voltage of the data line L_data under the drive of the gate driving signal, the voltage feedback terminal P1 of the pixel driving module 10 acquires the coupling analog signal Vcom_CF between the common electrode line L_vcom and the data line L_data, and transmits this coupling analog signal Vcom_CF to the signal acquisition terminal P2 of the crosstalk suppression module 20 via the in-plane trace L_m.

[0079] Step S20: Determine the minimum coupling value based on the coupled analog signal Vcom_CF, and output the minimum coupling value as the optimal signal polarity value of the thin film chip module 30 to the signal polarity terminal P4.

[0080] In this embodiment, after receiving the coupled analog signal Vcom_CF from the voltage feedback terminal P1 via the signal acquisition terminal P2, the crosstalk suppression module 20 converts the coupled analog signal Vcom_CF into a coupled digital quantity corresponding to each signal setting state configured by the thin-film chip module 30 through the analog-to-digital conversion unit 201 in the crosstalk suppression module 20. Next, the timing control unit 202 in the crosstalk suppression module 20 compares the magnitudes of each coupled digital quantity and takes the smallest coupled digital quantity as the minimum coupling value to reflect the minimum influence of the coupling capacitor on the Vcom voltage. Then, the minimum coupling value is set as the optimal signal polarity value of the thin-film chip module 30 and output to the signal polarity terminal P4 of the thin-film chip module 30, thereby suppressing the influence of the coupling capacitor on the Vcom voltage, stabilizing the Vcom voltage, effectively avoiding the horizontal crosstalk phenomenon caused by the coupling capacitor between the data line L_data and the common electrode line L_vcom, and significantly improving the display quality of the liquid crystal display panel.

[0081] Furthermore, in some other feasible embodiments, the above step S20: determining the minimum coupling value based on the coupled analog signal Vcom_CF may also include the following implementation steps S201 to S202.

[0082] Step S201: Determine multiple signal setting states of the thin-film chip module 30, and convert the coupled analog signal Vcom_CF into a coupled digital quantity corresponding to each signal setting state through the analog-to-digital conversion unit 201.

[0083] In this embodiment, multiple signal setting states of the thin-film chip module 30 are determined, and the coupled analog signal Vcom_CF is converted into a coupled digital quantity corresponding to each signal setting state by the analog-to-digital conversion unit 201. This enables high-speed acquisition and conversion of the coupled analog signal Vcom_CF output from the voltage feedback terminal P1, effectively avoiding the RC delay problem caused by the VCOM compensation signal needing to pass through the in-plane trace L_m in the traditional method, and reducing signal loss and interference during transmission.

[0084] In a specific embodiment, when the number of thin film chip modules 30 is 1, the signal setting state of the thin film chip module 30 has two types, namely "0" signal state and "1" signal state. The "0" signal state can be represented by [POLC1]=[0], and the "1" signal state can be represented by [POLC1]=[1], where [POLC1] represents the thin film chip module 30 with serial number 1. When the number of thin-film chip modules 30 is 2, each thin-film chip module 30 has 4 signal setting states: "00", "01", "10", and "11". The "00" signal state can be represented by [POLC12]=

[00] , the "01" signal state can be represented by [POLC12]=

[01] , the "10" signal state can be represented by [POLC12]=

[10] , and the "11" signal state can be represented by [POLC12]=

[11] . Here, [POLC12] represents the thin-film chip module 30 with serial number 1 and the thin-film chip module 30 with serial number 2. That is to say, the number of signal setting states is 2. n , where n is the number of thin-film chip modules 30.

[0085] Step S202: Find the smallest coupled digital quantity from the plurality of coupled digital quantities, and take the smallest coupled digital quantity as the minimum coupled value.

[0086] In this embodiment, for each thin-film chip module 30, the timing control unit 202 compares the magnitude of the coupled digital quantity corresponding to different signal setting states of the thin-film chip module 30, thereby accurately finding the minimum coupled digital quantity (i.e., the minimum coupling value). The minimum coupling value is then used to set the optimal POLC signal (i.e., the optimal signal polarity value) for each thin-film chip module 30 under the signal setting state (i.e., the target signal state) corresponding to the minimum coupling value. This achieves Vcom voltage optimization for each display screen in the liquid crystal display panel, minimizing the impact of Vcom voltage fluctuations under the target signal state on the display screen, thereby effectively avoiding the generation of horizontal crosstalk stripes and significantly improving the display quality of the liquid crystal display panel.

[0087] In a specific embodiment, the POLC signal of each thin-film chip module 30 can be understood as an input control signal. This input control signal can control the output polarity of the corresponding thin-film chip module 30. In this application, the signal polarity terminal P4 of each thin-film chip module 30 is electrically connected to the general-purpose signal terminal P3 (i.e., GPIO port) of the timing control unit 202 through hardware settings. Specifically, the signal polarity terminals P4-1 of thin-film chip module 30-1, P4-2 of thin-film chip module 30-2, P4-3 of thin-film chip module 30-3, P4-4 of thin-film chip module 30-4, P4-5 of thin-film chip module 30-5, and P4-6 of thin-film chip module 30-6 are electrically connected to the general-purpose signal terminal P3 (i.e., GPIO port) of the timing control unit 202 so that the timing control unit 202 can automatically record... Figure 4 or Figure 5The coupled digital quantities of the Vcom voltage under different [POLC1...6] signal setting states of thin-film chip modules 30-1 to 30-6 are shown. For example, in the [POLC1...6]=[0...0] signal setting state, the coupled digital quantity corresponding to the acquired Vcom analog signal (i.e., the coupled analog signal Vcom_CF) is recorded as Vcom1; in the [POLC1...6]=[0...1] signal setting state, the coupled digital quantity corresponding to the acquired Vcom analog signal is recorded as Vcom2; and in the [POLC1...6]=[1...0] signal setting state, the coupled digital quantity corresponding to the acquired Vcom analog signal is recorded as Vcom2. The value is Vcomx. After sequential acquisition, the coupled digital quantities corresponding to the acquired Vcom analog signal under different signal setting states are obtained. The signal setting state of [POLC1...6] corresponding to the smallest coupled digital quantity (i.e., the minimum coupling value) is found. The setting value of the [POLC1...6] signal setting state at the corresponding COF position is output by the timing control unit 202, which is the minimum coupling value. This suppresses the influence of coupling capacitor on Vcom voltage, stabilizes Vcom voltage, effectively avoids horizontal crosstalk caused by the coupling capacitor between the data line L_data and the common electrode line L_vcom, and significantly improves the display quality of the LCD panel.

[0088] In addition, this application also provides a display device. Please refer to... Figure 7 , Figure 7 This is a schematic diagram of the display device involved in the embodiments of this application. Specifically, the display device in the embodiments of this application may be a device for locally running a crosstalk suppression method for a liquid crystal display panel.

[0089] like Figure 7 As shown, the display device in this embodiment may include: the liquid crystal display panel described above; or, a processor 1001, such as a CPU, a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used to enable communication between these components. The user interface 1003 may include a display screen and an input unit such as a keyboard; optionally, the user interface 1003 may also include a standard wired interface or a wireless interface. The network interface 1004 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface).

[0090] The memory 1005 is disposed on the main body of the display device. The memory 1005 stores a program that performs corresponding operations when executed by the processor 1001. The memory 1005 is also used to store parameters used by the display device. The memory 1005 can be a high-speed RAM or a stable, non-volatile memory, such as a disk drive. Optionally, the memory 1005 can also be a storage device independent of the aforementioned processor 1001.

[0091] Those skilled in the art will understand that Figure 7 The display device structure shown does not constitute a limitation on the display device and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0092] like Figure 7 As shown, the memory 1005, which serves as a storage medium, may include an operating system, a network communication module, a user interface module, and a crosstalk suppression program for the liquid crystal display panel of a display device.

[0093] exist Figure 7 In the display device shown, the processor 1001 can be used to call the crosstalk suppression program of the liquid crystal display panel of the display device stored in the memory 1005, and execute the steps of the display control method as described above.

[0094] In addition, to achieve the above objectives, this application also provides a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the above-described crosstalk suppression method for a liquid crystal display panel.

[0095] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0096] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0097] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a display device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0098] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A liquid crystal display panel, characterized in that, The liquid crystal display panel includes a pixel driving module, a crosstalk suppression module, a thin film chip module, a display substrate, in-plane wiring, and a circuit assembly board. The thin-film chip module is disposed between the display substrate and the circuit assembly board, and the thin-film chip module is electrically connected to both the display substrate and the circuit assembly board. The pixel driving module and the in-plane trace are disposed within the display substrate, and the crosstalk suppression module is disposed within the circuit assembly board. The voltage feedback terminal of the pixel driving module is electrically connected to the signal acquisition terminal of the crosstalk suppression module through the in-plane trace. The general signal terminal of the crosstalk suppression module is electrically connected to the signal polarity terminal of the thin-film chip module. The crosstalk suppression module includes an analog-to-digital conversion unit and a timing control unit. The analog-to-digital conversion unit is electrically connected to the in-plane trace and the timing control unit, respectively. The timing control unit is electrically connected to the signal polarity terminal of the thin-film chip module. The crosstalk suppression module is configured to, when the pixel driving module connects to the pixel display voltage of the data line for pixel charging under the drive of the gate driving signal, receive the coupling analog signal sent by the voltage feedback terminal transmitted by the in-plane trace through the signal acquisition terminal, determine the minimum coupling value based on the coupling analog signal, and output the minimum coupling value as the optimal signal polarity value of the thin film chip module to the signal polarity terminal. Here, the coupling analog signal refers to the voltage fluctuation between the common electrode line electrically connected to the pixel driving module and the data line.

2. The liquid crystal display panel as described in claim 1, characterized in that, The in-plane trace is configured to transmit the coupled analog signal from the voltage feedback terminal to the crosstalk suppression module disposed on the circuit assembly board; The side of the display substrate closest to the circuit assembly board is a flexible circuit board layer, and the thin-film chip module is electrically connected between the flexible circuit board layer and the circuit assembly board.

3. The liquid crystal display panel as described in claim 2, characterized in that, The signal input terminal of the analog-to-digital conversion unit constitutes the signal acquisition terminal of the crosstalk suppression module, and is electrically connected to the voltage feedback terminal of the pixel driving module through the in-plane trace; The signal output terminal of the analog-to-digital conversion unit is electrically connected to the feedback receiving terminal of the timing control unit; The data signal terminal of the timing control unit constitutes the general signal terminal of the crosstalk suppression module and is electrically connected to the signal polarity terminal of the thin-film chip module.

4. The liquid crystal display panel as described in claim 3, characterized in that, The liquid crystal display panel includes gate lines; The gate driving terminal of the pixel driving module is electrically connected to the gate line, the data access terminal of the pixel driving module is electrically connected to the data line, and the data output terminal of the pixel driving module is electrically connected to the common electrode line. The pixel driving module is configured to receive the gate driving signal sent by the gate line through the gate driving terminal, and after receiving the pixel display voltage sent by the data line through the signal input terminal under the drive of the gate driving signal, the pixel display voltage is transmitted to the common electrode line through the data output terminal for pixel charging.

5. The liquid crystal display panel as described in claim 4, characterized in that, The pixel driving module includes a thin-film transistor, a first capacitor, and a second capacitor; The control terminal of the thin-film transistor constitutes the gate driving terminal of the pixel driving module and is electrically connected to the gate line; the first path terminal of the thin-film transistor constitutes the data access terminal of the pixel driving module and is electrically connected to the data line. The second terminal of the thin-film transistor constitutes the data output terminal of the pixel driving module and is electrically connected to the first terminal of the first capacitor and the first terminal of the second capacitor, respectively. The second terminal of the second capacitor is electrically connected to the common electrode line. The second end of the first capacitor forms the voltage feedback terminal of the pixel driving module and is electrically connected to the signal acquisition terminal of the crosstalk suppression module.

6. The liquid crystal display panel as described in claim 1, characterized in that, The liquid crystal display panel includes a third capacitor; The third capacitor is electrically connected between the common electrode line and the data line, and the common electrode line is arranged perpendicularly to the data line.

7. A method for suppressing crosstalk in a liquid crystal display panel, characterized in that, The crosstalk suppression method for the liquid crystal display panel is applied to the liquid crystal display panel as described in any one of claims 1 to 6, wherein the crosstalk suppression method for the liquid crystal display panel includes: When the pixel driving module is driven by the gate driving signal to connect to the pixel display voltage of the data line for pixel charging, the signal acquisition terminal of the crosstalk suppression module connects to the voltage feedback terminal of the pixel driving module to send the coupled analog signal between the common electrode line electrically connected to the pixel driving module and the data line. The minimum coupling value is determined based on the coupled analog signal, and the minimum coupling value is output to the signal polarity terminal as the optimal signal polarity value of the thin film chip module. The step of determining the minimum coupling value based on the coupled analog signal includes: The system determines multiple signal setting states of the thin-film chip module and converts the coupled analog signals into coupled digital quantities corresponding to each signal setting state through an analog-to-digital converter. The smallest coupled digital value is found among the multiple coupled digital values, and the smallest coupled digital value is taken as the minimum coupled value.

8. A display device, characterized in that, The display device includes the liquid crystal display panel as described in claims 1 to 6; or... The display device includes a processor, a memory, and a crosstalk suppression program for a liquid crystal display panel stored in the memory and executable by the processor, wherein when the crosstalk suppression program for the liquid crystal display panel is executed by the processor, it implements the steps of the crosstalk suppression method for the liquid crystal display panel as described in claim 7.

9. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements the steps of the crosstalk suppression method for the liquid crystal display panel as described in claim 7.

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