Magnetic latching relay control circuit

Abstract

The invention provides a control circuit of a magnetic latching relay. The control circuit comprises a power supply circuit, a level conversion circuit used for converting an external input signal into high and low levels, and a soft start suppression circuit used for preventing misoperation. The on-off of the magnetic latching relay can be controlled just by providing a closing or opening signal like a common relay. A circuit logic and time sequence formed by reasonably designing and combining a power supply circuit, an energy storage circuit, a soft start suppression circuit, a level conversion circuit, a pulse generation circuit and a driving circuit is added between an external signal and a drive of the magnetic latching relay, so that whether the external signal is a closing signal or an opening signal is automatically identified; and then signals with fixed time delay are respectively given out through two ports of the pulse generating circuit, and after the signals are amplified by the driving circuit, the magnetic latching relay is controlled to be switched on and switched off.

Description

Technical Field

[0001] The present invention relates to the technical field of relays, and more particularly to a magnetic latching relay control circuit. Background Art

[0002] At present, in the field of power electronics, magnetic latching relays are increasingly widely used. With their greater current capacity and extremely low power consumption, magnetic latching relays have obvious advantages over ordinary relays. They are used in chargers, energy storage devices, and the power input / output ends of battery formation equipment, and are very suitable for use as input and output switches. However, the complexity of its control method is one of the important factors restricting its use.

[0003] For example, the most common control method is through software control, which outputs two signals with timing through the IO port, and drives the magnetic latching relay after being amplified by the external circuit. For example, through hardware control, the external signal gives two inputs, and the timing of the two driving signals is strictly controlled to control the on and off of the magnetic latching relay, but its feasibility is very low.

[0004] Software control has the following defects: a microcontroller is required, which involves cost, development difficulty and production cycle. It is difficult to apply to some circuits that do not have a microcontroller. Even if a microcontroller is available, two IOs are required, which wastes resources. Hardware control has the following defects: two fixed-timing signals need to be given manually, and it is difficult to control the time difference between the two signals.

[0005] Therefore, the existing magnetic latching relay control method often requires two input signals. Regardless of software control or hardware control, the two signals are independent inputs, which is a great waste of the control port. In addition, since the pulse width and timing of the two signals need to be strictly controlled, the magnetic latching relay may not respond normally or burn out if not handled with care. Summary of the invention

[0006] The technical problem to be solved by the present invention is to provide a magnetic latching relay control circuit which reduces the difficulty of using the magnetic latching relay and improves the circuit stability in view of the shortcomings of the above technical solutions.

[0007] The present invention provides a magnetic latching relay control circuit, which comprises a power supply circuit, a level conversion circuit for converting an external input signal into a high or low level, a soft start suppression circuit for preventing malfunction, an energy storage circuit, a pulse generating circuit for generating a pulse signal from a level differential signal, a drive circuit and a magnetic latching relay; the output end of the power supply circuit is electrically connected to the input end of the energy storage circuit and the soft start suppression circuit, and the output end of the energy storage circuit and the soft start suppression circuit is electrically connected to the input end of the pulse generating circuit; the energy storage circuit is electrically connected to the drive circuit and the magnetic latching relay, the level conversion circuit is electrically connected to the soft start suppression circuit and the pulse generating circuit, the output end of the drive circuit is electrically connected to the magnetic latching relay, the drive circuit is used to generate a drive signal after amplifying the pulse signal, and the drive signal is used to control the on and off of the relay.

[0008] In the magnetic latching relay control circuit of the present invention; the power supply circuit includes a rectifier bridge, a power supply chip, a first diode, a second diode, a third diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor and an inductor; the second AC input end of the rectifier bridge is connected to an AC power supply, the third AC input end of the rectifier bridge is electrically connected to an AC power supply, the first diode and the first resistor are connected in series, one end is electrically connected to the first AC output end of the rectifier bridge, and the other end is electrically connected to the second pin of the power supply chip; the first capacitor and the second resistor are connected in parallel, one end is electrically connected to the first resistor, and the other end is electrically connected to the second capacitor, one end of the third resistor is electrically connected to the second resistor, and the other end is electrically connected to the second capacitor; the fourth AC output end of the rectifier bridge is connected to the common end of the second capacitor and the third resistor, one end of the fourth resistor is electrically connected to the third pin of the power supply chip, and the other end is connected to the second pin of the power supply chip The fifth resistor is electrically connected to the fourth pin of the power chip at one end, and the other end is connected to the fourth AC output terminal of the rectifier bridge; the sixth resistor, the seventh resistor and the third capacitor are connected in series, one end is electrically connected to the fifth resistor, and the other end is grounded; the eighth resistor and the fourth capacitor are connected in series, one end is electrically connected to the first pin of the power chip, and the other end is electrically connected to the eighth pin of the power chip; the seventh pin of the power chip is electrically connected to the third capacitor, one end of the fifth capacitor is electrically connected to the sixth pin of the power chip, and the other end is electrically connected to the sixth resistor The second diode is electrically connected at one end to the eighth pin of the power chip, and the other end is electrically connected to the seventh pin of the power chip. The inductor, the third diode and the ninth resistor are connected in series, and one end is electrically connected to the third capacitor, and the other end is electrically connected to the second diode. The tenth resistor and the eleventh resistor are connected in series, and one end is connected to a 24V voltage, and the other end is electrically connected to the ninth resistor. The sixth capacitor is connected to the second diode at one end, and the other end is connected to the common end of the tenth resistor and the eleventh resistor. The fifth pin of the power chip is electrically connected to the tenth resistor.

[0009] In the magnetic latching relay control circuit of the present invention; the energy storage circuit includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a fourth diode, a fifth diode, a sixth diode and a seventh diode; the seventh capacitor and the twelfth resistor are connected in parallel, one end of which is grounded and the other end is electrically connected to a 24V voltage; the fourth diode and the eighth capacitor are connected in series, one end of which is electrically connected to the seventh capacitor and the other end is electrically connected to the twelfth resistor; the thirteenth resistor, the fourteenth resistor, the fifteenth resistor and the sixteenth resistor are connected in parallel, one end of which is electrically connected to one end of the fifth diode and the other end is electrically connected to the ninth capacitor, and the other end of the fifth diode is connected to the twelfth resistor; the ninth capacitor and the tenth capacitor are connected in parallel, one end of which is connected to the seventh capacitor and the other end is connected to the sixteenth resistor; one end of the sixth diode is electrically connected to the 24V voltage and the other end is electrically connected to the tenth capacitor; the seventh diode and the seventeenth resistor are connected in series, one end of which is connected to the common end of the fourth diode and the sixth diode and the other end is electrically connected to the tenth capacitor.

[0010] In the magnetic latching relay control circuit of the present invention; the soft start suppression circuit includes an eighth diode, a ninth diode, an eleventh capacitor, a twelfth capacitor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twentieth resistor and a first operational amplifier; one end of the eleventh capacitor is connected to the second pin of the first operational amplifier, and the other end is electrically connected to the 24V voltage; one end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the second pin of the first operational amplifier; one end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier; the nineteenth resistor is connected in series with the eighth diode, one end is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier; one end of the twelfth capacitor is grounded, and the other end is electrically connected to the eighteenth resistor; one end of the twentieth resistor is grounded, and the other end is electrically connected to the second pin of the first operational amplifier; the ninth diode is connected in series with the twenty-first resistor, one end is electrically connected to the twentieth resistor, and the other end is electrically connected to the second pin of the first operational amplifier, and the first pin of the first operational amplifier is electrically connected to the level conversion circuit.

[0011] In the magnetic latching relay control circuit of the present invention; the level conversion circuit includes a tenth diode, an eleventh diode, a thirteenth diode, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a first transistor and a thirteenth capacitor; the tenth diode and the eleventh diode are connected in series, one end of which is electrically connected to the soft-start suppression circuit, and the other end is connected to the reset circuit; the thirteenth capacitor and the twenty-second resistor are connected in series, one end of which is connected to the common end of the tenth diode and the eleventh diode, and the other end is electrically connected to the base of the first transistor, and the common end of the thirteenth capacitor and the twenty-second resistor is electrically connected to the emitter of the first transistor; the emitter of the first transistor is grounded; the collector of the first transistor is electrically connected to the pulse generating circuit, one end of the twenty-third resistor is connected to the 24V voltage, and the other end is connected to the collector of the first transistor; one end of the twenty-fourth resistor is electrically connected to the thirteenth capacitor, and the other end is connected to the external button; one end of the thirteenth diode is electrically connected to the twenty-fourth resistor, and the other end is electrically connected to the base of the first transistor.

[0012] In the magnetic holding relay control circuit described in the present invention; the pulse generating circuit includes a first pulse generating circuit and a second pulse generating circuit, one end of the first pulse generating circuit and the second pulse generating circuit are respectively electrically connected to the level conversion circuit, and the other end is respectively electrically connected to the drive circuit.

[0013] In the magnetic holding relay control circuit described in the present invention; the drive circuit includes a first drive circuit and a second drive circuit, the first drive circuit includes a second triode, a third triode and a twenty-fifth resistor; one end of the twenty-fifth resistor is electrically connected to the first pulse generating circuit, and the other end is connected to the series connection point of the base of the second triode and the base of the third triode; the second drive circuit includes a fourth triode, a fifth triode and a twenty-sixth resistor, one end of the twenty-sixth resistor is electrically connected to the second pulse generating circuit, the series connection point of the emitter of the second triode and the emitter of the third triode and the series connection point of the emitter of the fourth triode and the emitter of the fifth triode are connection points respectively used to connect the two ends of the magnetic holding relay coil.

[0014] The magnetic latching relay control circuit of the present invention also includes a reset circuit, the input end of the reset circuit is electrically connected to the power supply circuit, and the output end of the reset circuit is electrically connected to the first pulse generating circuit and the second pulse generating circuit.

[0015] The magnetic latching relay control circuit of the present invention is capable of controlling the on and off of the magnetic latching relay by only providing a closing or opening signal like an ordinary relay. A circuit logic and timing formed by a reasonable design and combination of a power supply circuit, an energy storage circuit, a soft start suppression circuit, a level conversion circuit, a pulse generating circuit and a driving circuit is added between the external signal and the drive of the magnetic latching relay to realize automatic identification of whether the external signal is a closing signal or a disconnecting signal. Then, fixed-delay signals are respectively given through the two ports of the pulse generating circuit. After being amplified by the driving circuit, the on and off of the magnetic latching relay are controlled. By simplifying the two signals that should have been strictly controlled in the timing input into one, the difficulty of using the magnetic latching relay is reduced and the stability of the circuit is improved. At the same time, the present application omits the MCU. Such a design not only reduces the cost, but also reduces the software burning process. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a principle block diagram of the magnetic latching relay control circuit of the present invention;

[0017] Figure 2 It is a circuit schematic diagram of a power supply circuit in a magnetic latching relay control circuit of the present invention;

[0018] Figure 3 It is a circuit schematic diagram of a level conversion circuit in a magnetic latching relay control circuit of the present invention;

[0019] Figure 4 It is a circuit principle diagram of a soft-start suppression circuit in a magnetic latching relay control circuit of the present invention;

[0020] Figure 5 It is a circuit schematic diagram of an energy storage circuit in a magnetic latching relay control circuit of the present invention;

[0021] Figure 6 It is a circuit principle diagram of a pulse generating circuit in a magnetic latching relay control circuit of the present invention;

[0022] Figure 7 It is a circuit schematic diagram of a driving circuit in a magnetic latching relay control circuit of the present invention;

[0023] Figure 8 The invention discloses a circuit schematic diagram of a reset circuit in a magnetic latching relay control circuit. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0025] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0026] like Figure 1 As shown, Figure 1-8 It is a flow chart of an embodiment of a magnetic latching relay control circuit of the present invention. A magnetic latching relay control circuit is provided, the control circuit comprising a power supply circuit, a level conversion circuit for converting an external input signal into a high and low level, a soft start suppression circuit for preventing malfunction, an energy storage circuit, a pulse generating circuit for generating a pulse signal from a level differential signal, a drive circuit and a magnetic latching relay; the output end of the power supply circuit is electrically connected to the input end of the energy storage circuit and the soft start suppression circuit, and the output end of the energy storage circuit and the soft start suppression circuit is electrically connected to the input end of the pulse generating circuit; the energy storage circuit is electrically connected to the drive circuit and the magnetic latching relay, the level conversion circuit is electrically connected to the soft start suppression circuit and the pulse generating circuit, the output end of the drive circuit is electrically connected to the magnetic latching relay, the drive circuit is used to generate a drive signal after amplifying the pulse signal, and the drive signal is used to control the on and off of the relay.

[0027] In one embodiment, the power supply circuit includes a rectifier bridge, a power supply chip, a first diode, a second diode, a third diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor and an inductor; the second AC input end of the rectifier bridge is connected to an AC power supply, the third AC input end of the rectifier bridge is electrically connected to an AC power supply, the first diode and the first resistor are connected in series, one end of which is electrically connected to the first AC output end of the rectifier bridge, and the other end is electrically connected to the second pin of the power supply chip; the first capacitor and the second resistor are connected in parallel, one end of which is electrically connected to the first resistor, and the other end is electrically connected to the second capacitor, one end of the third resistor is electrically connected to the second resistor, and the other end is electrically connected to the second capacitor; the fourth AC output end of the rectifier bridge is connected to the common end of the second capacitor and the third resistor, one end of the fourth resistor is electrically connected to the third pin of the power supply chip, and the other end is electrically connected to the second pin of the power supply chip; One end of the fifth resistor is electrically connected to the fourth pin of the power chip, and the other end is connected to the fourth AC output end of the rectifier bridge. The sixth resistor, the seventh resistor and the third capacitor are connected in series, one end is electrically connected to the fifth resistor, and the other end is grounded; the eighth resistor and the fourth capacitor are connected in series, one end is electrically connected to the first pin of the power chip, and the other end is electrically connected to the eighth pin of the power chip; the seventh pin of the power chip is electrically connected to the third capacitor, one end of the fifth capacitor is electrically connected to the sixth pin of the power chip, and the other end is electrically connected to the sixth resistor; one end of the second diode is electrically connected to the eighth pin of the power chip, and the other end is electrically connected to the seventh pin of the power chip; the inductor, the third diode and the ninth resistor are connected in series, one end is electrically connected to the third capacitor, and the other end is electrically connected to the second diode; the tenth resistor and the eleventh resistor are connected in series, one end is connected to a 24V voltage, and the other end is electrically connected to the ninth resistor; one end of the sixth capacitor is connected to the second diode, and the other end is connected to the common end of the tenth resistor and the eleventh resistor, and the fifth pin of the power chip is electrically connected to the tenth resistor.

[0028] In one embodiment, the energy storage circuit includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a fourth diode, a fifth diode, a sixth diode and a seventh diode; the seventh capacitor and the twelfth resistor are connected in parallel, one end of which is grounded and the other end is electrically connected to a 24V voltage; the fourth diode and the eighth capacitor are connected in series, one end of which is electrically connected to the seventh capacitor and the other end is electrically connected to the twelfth resistor; the thirteenth resistor, the fourteenth resistor, the fifteenth resistor and the sixteenth resistor are connected in parallel, one end of which is electrically connected to one end of the fifth diode and the other end is electrically connected to the ninth capacitor, and the other end of the fifth diode is connected to the twelfth resistor; the ninth capacitor and the tenth capacitor are connected in parallel, one end of which is connected to the seventh capacitor and the other end is connected to the sixteenth resistor; one end of the sixth diode is electrically connected to the 24V voltage and the other end is electrically connected to the tenth capacitor; the seventh diode and the seventeenth resistor are connected in series, one end of which is connected to a common end of the fourth diode and the sixth diode and the other end is electrically connected to the tenth capacitor.

[0029] In one embodiment, the soft-start suppression circuit includes an eighth diode, a ninth diode, an eleventh capacitor, a twelfth capacitor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twentieth resistor and a first operational amplifier; one end of the eleventh capacitor is connected to the second pin of the first operational amplifier, and the other end is electrically connected to the 24V voltage; one end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the second pin of the first operational amplifier; one end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier; the nineteenth resistor is connected in series with the eighth diode, one end is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier; one end of the twelfth capacitor is grounded, and the other end is electrically connected to the eighteenth resistor; one end of the twentieth resistor is grounded, and the other end is electrically connected to the second pin of the first operational amplifier; the ninth diode is connected in series with the twenty-first resistor, one end is electrically connected to the twentieth resistor, and the other end is electrically connected to the second pin of the first operational amplifier, and the first pin of the first operational amplifier is electrically connected to the level conversion circuit.

[0030] In one embodiment, the level conversion circuit includes a tenth diode, an eleventh diode, a thirteenth diode, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a first transistor and a thirteenth capacitor; the tenth diode and the eleventh diode are connected in series, one end of which is electrically connected to the soft-start suppression circuit, and the other end is connected to the reset circuit; the thirteenth capacitor and the twenty-second resistor are connected in series, one end of which is connected to the common end of the tenth diode and the eleventh diode, and the other end is electrically connected to the base of the first transistor, and the common end of the thirteenth capacitor and the twenty-second resistor is electrically connected to the emitter of the first transistor; the emitter of the first transistor is grounded; the collector of the first transistor is electrically connected to the pulse generating circuit, one end of the twenty-third resistor is connected to the 24V voltage, and the other end is connected to the collector of the first transistor; one end of the twenty-fourth resistor is electrically connected to the thirteenth capacitor, and the other end is connected to the external button; one end of the thirteenth diode is electrically connected to the twenty-fourth resistor, and the other end is electrically connected to the base of the first transistor.

[0031] In one embodiment, the pulse generating circuit includes a first pulse generating circuit and a second pulse generating circuit, wherein one end of the first pulse generating circuit and the second pulse generating circuit are respectively electrically connected to the level conversion circuit, and the other end thereof are respectively electrically connected to the driving circuit.

[0032] In one embodiment, the drive circuit includes a first drive circuit and a second drive circuit, the first drive circuit includes a second transistor, a third transistor and a twenty-fifth resistor; one end of the twenty-fifth resistor is electrically connected to the first pulse generating circuit, and the other end is connected to the series point of the base of the second transistor and the base of the third transistor; the second drive circuit includes a fourth transistor, a fifth transistor and a twenty-sixth resistor, one end of the twenty-sixth resistor is electrically connected to the second pulse generating circuit, the series point of the emitter of the second transistor and the emitter of the third transistor and the series point of the emitter of the fourth transistor and the emitter of the fifth transistor are connection points respectively used to connect the two ends of the magnetic holding relay coil.

[0033] In one embodiment, a reset circuit is further included, wherein an input end of the reset circuit is electrically connected to the power supply circuit, and an output end of the reset circuit is electrically connected to the first pulse generating circuit and the second pulse generating circuit.

[0034] Specifically, the main function of the power supply circuit is to convert the unstable voltage of the external input into a stable voltage to ensure the reliable operation of the subsequent circuit; the function of the energy storage circuit is to store a part of the electrical energy, so that when the power is cut off, it can maintain normal operation for a short period of time, so that the circuit can be effectively reset; the function of the soft-start suppression circuit is to avoid circuit malfunction when the voltage has not been fully established after power-on; the function of the reset circuit is to restore the state of the magnetic holding relay to the default state after power-off (generally disconnected, and can be selected to be disconnected or closed according to the circuit scheme); the level conversion circuit converts the on-off signal of the external input into high and low levels, and has the effect of signal filtering; the pulse generating circuit generates two fixed delay levels, and generates a pulse signal from the differential signal of these two levels; the function of the drive circuit is to amplify the pulse signal generated by the pulse generating circuit so that it can drive the magnetic holding relay.

[0035] The pulse width of the driving signal in the magnetic latching relay control circuit provided by the present invention is determined during the circuit design, and the pulse width will not be too wide or too narrow due to external reasons. The principle is that by adding a pulse generating circuit between the external signal and the driving of the magnetic latching relay, it can automatically identify whether the external signal is a closing signal or a disconnecting signal, and then give a fixed delay signal through the two ports of the pulse generating circuit respectively, and after being amplified by the driving circuit, the on and off of the magnetic latching relay is controlled.

[0036] In actual use, after power-on, the power supply circuit converts the input power into a stable power supply, a part of which is sent to the capacitor of the energy storage circuit for storage and standby, and the other part is supplied to other circuits; during the process from power-on to power stabilization, the subsequent circuit cannot operate, otherwise it will cause unpredictable consequences due to incomplete power-on. Therefore, the soft-start suppression circuit will output a signal during the power-on process to prevent the subsequent circuit from operating. After the power supply is stable, this signal will disappear.

[0037] When the external button is closed, the level conversion circuit will convert the on / off signal into a high / low level state; after the two input ends of the pulse generating circuit receive this high / low level, they will pass through two RC circuits with different time constants respectively and be compared with the voltage of the hysteresis comparator. Therefore, after a signal is input, the pulse generating circuit will output two signals in succession, and the difference between these two signals will obtain a group of pulse signals; then this pulse signal is amplified by the drive circuit to control the conduction and shutdown of the magnetic holding relay.

[0038] In actual use, after turning off the power supply, it is hoped that the magnetic latching relay can automatically disconnect. However, since the magnetic latching relay needs to receive a pulse signal to operate, if no additional circuit is set for triggering, the magnetic latching relay will maintain the current state, which is inconsistent with expectations. Therefore, a reset circuit is set. When the power supply voltage drops, the reset circuit detects the falling edge, and at this time, a high / low level signal is sent to the pulse generating circuit, thereby controlling the magnetic latching relay to disconnect. In this process, because the input power supply has been disconnected, the normal operation of the circuit cannot be guaranteed. At this time, the electrical energy stored in the energy storage circuit will be released to maintain the energy required to disconnect the magnetic latching relay.

[0039] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0040] Therefore, the above is only a preferred specific implementation mode of the present invention, and the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention. The protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A magnetic latching relay control circuit, characterized in that: The control circuit includes a power supply circuit, a level conversion circuit for converting an external input signal into a high or low level, a soft start suppression circuit for preventing malfunction, an energy storage circuit, a pulse generating circuit for generating a pulse signal from a level differential signal, a drive circuit and a magnetic holding relay; the output end of the power supply circuit is electrically connected to the input end of the energy storage circuit and the soft start suppression circuit, and the output end of the energy storage circuit and the soft start suppression circuit is electrically connected to the input end of the pulse generating circuit; the energy storage circuit is electrically connected to the drive circuit and the magnetic holding relay, the level conversion circuit is electrically connected to the soft start suppression circuit and the pulse generating circuit, the output end of the drive circuit is electrically connected to the magnetic holding relay, and the drive circuit is used to generate a drive signal after amplifying the pulse signal, and the drive signal is used to control the on and off of the relay.

2. The magnetic latching relay control circuit according to claim 1, characterized in that: The power supply circuit includes a rectifier bridge, a power supply chip, a first diode, a second diode, a third diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor and an inductor; the second AC input end of the rectifier bridge is connected to an AC power supply, the third AC input end of the rectifier bridge is electrically connected to an AC power supply, the first diode and the first resistor are connected in series, one end of which is electrically connected to the first AC output end of the rectifier bridge, and the other end is electrically connected to the second pin of the power supply chip; the first capacitor and the second resistor are connected in parallel, one end of which is electrically connected to the first resistor, and the other end is electrically connected to the second capacitor, one end of the third resistor is electrically connected to the second resistor, and the other end is electrically connected to the second capacitor; the fourth AC output end of the rectifier bridge is connected to the common end of the second capacitor and the third resistor, one end of the fourth resistor is electrically connected to the third pin of the power supply chip, and the other end is electrically connected to the second pin of the power supply chip; the fifth resistor is connected in series to the first AC output end of the rectifier bridge, and the first resistor is connected in series to the second AC output end of the rectifier bridge. The resistor is electrically connected at one end to the fourth pin of the power chip, and the other end is connected to the fourth AC output end of the rectifier bridge. The sixth resistor, the seventh resistor and the third capacitor are connected in series, one end is electrically connected to the fifth resistor, and the other end is grounded; the eighth resistor and the fourth capacitor are connected in series, one end is electrically connected to the first pin of the power chip, and the other end is electrically connected to the eighth pin of the power chip; the seventh pin of the power chip is electrically connected to the third capacitor, one end of the fifth capacitor is electrically connected to the sixth pin of the power chip, and the other end is electrically connected to the sixth resistor; the second diode is electrically connected at one end to the eighth pin of the power chip, and the other end is electrically connected to the seventh pin of the power chip; the inductor, the third diode and the ninth resistor are connected in series, one end is electrically connected to the third capacitor, and the other end is electrically connected to the second diode; the tenth resistor and the eleventh resistor are connected in series, one end is connected to the 24V voltage, and the other end is electrically connected to the ninth resistor; one end of the sixth capacitor is connected to the second diode, and the other end is connected to the common end of the tenth resistor and the eleventh resistor, and the fifth pin of the power chip is electrically connected to the tenth resistor.

3. The magnetic latching relay control circuit according to claim 1, characterized in that: The energy storage circuit includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a fourth diode, a fifth diode, a sixth diode and a seventh diode; the seventh capacitor and the twelfth resistor are connected in parallel, one end of which is grounded and the other end is electrically connected to a 24V voltage; the fourth diode and the eighth capacitor are connected in series, one end of which is electrically connected to the seventh capacitor and the other end is electrically connected to the twelfth resistor; the thirteenth resistor, the fourteenth resistor, the fifteenth resistor and the sixteenth resistor are connected in parallel, one end of which is electrically connected to one end of the fifth diode and the other end is electrically connected to the ninth capacitor, and the other end of the fifth diode is connected to the twelfth resistor; the ninth capacitor and the tenth capacitor are connected in parallel, one end of which is connected to the seventh capacitor and the other end is connected to the sixteenth resistor; one end of the sixth diode is electrically connected to the 24V voltage and the other end is electrically connected to the tenth capacitor; the seventh diode and the seventeenth resistor are connected in series, one end of which is connected to a common end of the fourth diode and the sixth diode and the other end is electrically connected to the tenth capacitor.

4. The magnetic latching relay control circuit according to claim 3, characterized in that: The soft start suppression circuit includes an eighth diode, a ninth diode, an eleventh capacitor, a twelfth capacitor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor and a first operational amplifier; one end of the eleventh capacitor is connected to the second pin of the first operational amplifier, and the other end is electrically connected to the 24V voltage; one end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the second pin of the first operational amplifier; one end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier; the nineteenth resistor is connected in series with the eighth diode, one end is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier; one end of the twelfth capacitor is grounded, and the other end is electrically connected to the eighteenth resistor; one end of the twentieth resistor is grounded, and the other end is electrically connected to the second pin of the first operational amplifier; the ninth diode is connected in series with the twenty-first resistor, one end is electrically connected to the twentieth resistor, and the other end is electrically connected to the second pin of the first operational amplifier; the first pin of the first operational amplifier is electrically connected to the level conversion circuit.

5. The magnetic latching relay control circuit according to claim 4, characterized in that: The level conversion circuit includes a tenth diode, an eleventh diode, a thirteenth diode, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a first transistor and a thirteenth capacitor; the tenth diode and the eleventh diode are connected in series, one end of which is electrically connected to the soft-start suppression circuit, and the other end is connected to the reset circuit; the thirteenth capacitor and the twenty-second resistor are connected in series, one end of which is connected to the common end of the tenth diode and the eleventh diode, and the other end is electrically connected to the base of the first transistor, and the common end of the thirteenth capacitor and the twenty-second resistor is electrically connected to the emitter of the first transistor; the emitter of the first transistor is grounded; the collector of the first transistor is electrically connected to the pulse generating circuit, one end of the twenty-third resistor is connected to the 24V voltage, and the other end is connected to the collector of the first transistor; one end of the twenty-fourth resistor is electrically connected to the thirteenth capacitor, and the other end is connected to the external button; one end of the thirteenth diode is electrically connected to the twenty-fourth resistor, and the other end is electrically connected to the base of the first transistor.

6. The magnetic latching relay control circuit according to claim 5, characterized in that: The pulse generating circuit includes a first pulse generating circuit and a second pulse generating circuit. One end of the first pulse generating circuit and the second pulse generating circuit are electrically connected to the level conversion circuit respectively, and the other end are electrically connected to the driving circuit respectively.

7. The magnetic latching relay control circuit according to claim 6, characterized in that: The driving circuit includes a first driving circuit and a second driving circuit, the first driving circuit includes a second triode, a third triode and a twenty-fifth resistor; one end of the twenty-fifth resistor is electrically connected to the first pulse generating circuit, and the other end is connected to the series point of the base of the second triode and the base of the third triode; the second driving circuit includes a fourth triode, a fifth triode and a twenty-sixth resistor, one end of the twenty-sixth resistor is electrically connected to the second pulse generating circuit, the series point of the emitter of the second triode and the emitter of the third triode and the series point of the emitter of the fourth triode and the emitter of the fifth triode are connection points respectively used to connect the two ends of the coil of the magnetic holding relay.

8. The magnetic latching relay control circuit according to claim 7, characterized in that: It also includes a reset circuit, wherein the input end of the reset circuit is electrically connected to the power supply circuit, and the output end of the reset circuit is electrically connected to the first pulse generating circuit and the second pulse generating circuit.

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