Full-bridge LLC circuit analysis method, apparatus and device, and storage medium

Abstract

The invention discloses an analysis method, device and equipment of a full-bridge LLC circuit and a storage medium, and belongs to the field of new energy automobiles. The method is executed by a control program of an OBC, and the OBC comprises a full-bridge LLC circuit. The method comprises the following steps: transmitting a frequency regulation factor to a digital control circuit; the digital control circuit is connected with the full-bridge LLC circuit and is used for providing a switch control signal for an MOS (Metal Oxide Semiconductor) tube of the full-bridge LLC circuit; the frequency regulation factor is used for generating the switching control signal and regulating the switching frequency of the MOS tube; detecting the output current and the output voltage of the full-bridge LLC circuit; and displaying a current oscillogram based on the output current, and displaying a voltage oscillogram based on the output voltage. According to the method, the soft switching working condition of the full-bridge LLC circuit can be analyzed.

Description

Technical Field

[0001] The present application relates to the field of new energy vehicles, and in particular to an analysis method, device, equipment and storage medium for a full-bridge LLC circuit. Background Art

[0002] An on-board charger (OBC) is a charger installed on an electric vehicle. It is mainly used in pure electric vehicles (Blade Electric Vehicles, BEV) and plug-in hybrid electric vehicles (Plug-in Hybrid Electric Vehicle, PHEV). Specifically, the function of OBC is to convert the alternating current (AC) from the power grid into the direct current (DC) required by the high-voltage battery of the electric vehicle. At the same time, it can also invert the DC power of the power battery into AC power for the external load (Vehicle to Load, V2L) or other vehicles (Vehicle-to-Vehicle, V2V) or directly feed back to the grid (Vehicle-to-Grid, V2G). That is, OBC can realize two-way energy transmission between the vehicle power battery and the external load or the grid.

[0003] The OBC in the related technology will adopt the full-bridge LLC topology DCDC, and the bidirectional OBC will adopt the CLLC topology. LLC is a resonant circuit that achieves a constant output voltage by controlling the switching frequency (frequency regulation). Its advantages are: realizing the zero voltage switch (Zero Voltage Switch, ZVS) of the four MOS (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET, Metal-Oxide Semiconductor Field-Effect Transistor) switches on the primary side and the zero current switch (Zero Current Switch, ZCS) of the secondary side rectifier diode. Through this soft switching technology, the switching loss of the DCDC power supply can be reduced, and the efficiency and power density of the OBC can be improved.

[0004] The related technology lacks a detailed analysis of the method for implementing soft switching of the full-bridge LLC circuit of the OBC control system, and is limited to using the OBC development solution recommended by a specific supplier, which is not conducive to developers freely choosing chips from any manufacturer for independent and controllable development. Summary of the invention

[0005] The present application provides a method, device, equipment and storage medium for analyzing a full-bridge LLC circuit, which can enrich the analysis methods of the full-bridge LLC circuit. The technical solution is as follows:

[0006] According to one aspect of the present application, a method for analyzing a full-bridge LLC circuit is provided, the method being executed by a terminal, the terminal being logged in with a first account; the method comprising:

[0007] Displaying a first live broadcast room that starts a live broadcast barrage game, wherein the live broadcast barrage game is a game that at least one account in the first live broadcast room participates in by sending barrage messages;

[0008] receiving a first sensing operation, where the first sensing operation is a user operation received by a sensor in the terminal;

[0009] In response to the first sensing operation, displaying in the first live broadcast room a first bullet screen message corresponding to the first sensing operation sent by the first account;

[0010] Display the response result of the live barrage game to the first barrage message.

[0011] According to another aspect of the present application, a device for analyzing a full-bridge LLC circuit is provided, wherein a first account is logged into the device; the device comprises:

[0012] A display module is used to display a first live broadcast room that starts a live broadcast barrage game, where the live broadcast barrage game is a game that at least one account in the first live broadcast room participates in by sending barrage messages;

[0013] A sensing module, configured to receive a first sensing operation, where the first sensing operation is a user operation received by a sensor in the terminal;

[0014] The display module is configured to display, in response to the first sensing operation, a first bullet screen message corresponding to the first sensing operation sent by the first account in the first live broadcast room;

[0015] The display module is used to display the response result of the live barrage game to the first barrage message.

[0016] According to another aspect of the present application, a computer device is provided, comprising a processor and a memory, wherein the memory stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the analysis method of the full-bridge LLC circuit as described above.

[0017] According to another aspect of the present application, a computer-readable storage medium is provided, in which at least one instruction, at least one program, a code set or an instruction set is stored, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by a processor to implement the analysis method of the full-bridge LLC circuit as described above.

[0018] According to another aspect of the present application, a computer program product or a computer program is provided, the computer program product or the computer program comprising computer instructions, the computer instructions being stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the analysis method of the full-bridge LLC circuit provided in various optional implementations of the above aspects.

[0019] The beneficial effects of the technical solution provided by this application include at least:

[0020] This paper provides an analysis method for a full-bridge LLC circuit. The switching frequency of the MOS tube of the full-bridge LLC circuit can be dynamically adjusted through a digital control circuit to change the working state of the full-bridge LLC circuit. The output voltage and current of the full-bridge LLC circuit are measured, and the current waveform and voltage waveform are displayed, which is convenient for developers to analyze the soft switching working conditions of the full-bridge LLC circuit and understand the soft switching waveform details and efficiency advantages of LLC DCDC. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 is a schematic diagram of a computer device provided by an exemplary embodiment of the present application;

[0023] Figure 2 is a schematic diagram of a charging system provided by an exemplary embodiment of the present application;

[0024] Figure 3 is a schematic diagram of module 1 provided by an exemplary embodiment of the present application;

[0025] Figure 4 is a schematic diagram of module 2 provided by an exemplary embodiment of the present application;

[0026] Figure 5 is a schematic diagram of module three provided by an exemplary embodiment of the present application;

[0027] Figure 6 is a schematic diagram of module 4 provided by an exemplary embodiment of the present application;

[0028] Figure 7 is a schematic diagram of module 5 provided by an exemplary embodiment of the present application;

[0029] Figure 8 is a schematic diagram of module six provided by an exemplary embodiment of the present application;

[0030] Fig. 9 is a circuit diagram of a charging system provided by an exemplary embodiment of the present application;

[0031] Fig.10 is a flow chart of an analysis method of a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0032] Fig.11 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0033] Fig.12 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0034] Fig.13 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0035] Fig.14 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0036] Fig.15 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0037] Fig.16 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0038] Fig.17 is a schematic diagram of an analysis method of a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0039] Fig.18 is a flow chart of an analysis method of a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0040] Fig.19 is a structural schematic diagram of an analysis device for a full-bridge LLC circuit provided by an exemplary embodiment of the present application;

[0041] Fig. 20It is a structural diagram of a computer device provided by an exemplary embodiment of the present application.

[0042] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application. DETAILED DESCRIPTION

[0043] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0044] The full-bridge LLC circuit is an efficient DCDC power conversion topology. Exemplarily, a full-bridge LLC circuit includes a power switch, a resonant cavity, a transformer, and a diode rectifier. The power switch usually uses a MOSFET power switch to convert the input DC voltage into a high-frequency square wave. The resonant cavity is composed of a resonant capacitor (Cr), a resonant inductor (Lr), and an excitation inductor (Lm). The function of the resonant cavity is to filter out the harmonics of the square wave and output a sine wave of the fundamental switching frequency to the input of the transformer. Among them, the resonant inductor (Lr) is connected in series with the capacitor and the transformer, and the excitation inductor (Lm) is connected in parallel with them. Transformer: used to transmit sinusoidal wave signals and boost or buck the voltage according to application requirements. The diode rectifier is used to convert the sine wave into a stable DC output.

[0045] The working process of the full-bridge LLC circuit can include the following 4 steps:

[0046] Step 1, input voltage conversion: First, use four MOSFET power switches (full bridge structure) to convert the input DC voltage into a high-frequency AC square wave. The four MOSFET power switches work in a complementary manner to ensure that at any time, two MOSFET power switches are turned on and the other two MOSFET power switches are turned off, thus forming a continuous AC signal.

[0047] Step 2, resonance and voltage division: The AC square wave then enters the resonant cavity. In the resonant cavity, the harmonics of the square wave are filtered out, leaving only the fundamental frequency sine wave. The amplitude of the sine wave is affected by the parameters of the resonant cavity, especially the ratio of the resonant inductor to the excitation inductor. By adjusting these parameters, the voltage division of the sine wave on the excitation inductor can be controlled, and then the output voltage can be adjusted.

[0048] Step 3, Transformer Transmission: The sine wave signal processed by the resonant cavity is transmitted to the high-frequency transformer. The transformer steps up or down the voltage according to the application requirements to ensure that the output voltage meets the design requirements.

[0049] Step 4, Rectification and Output: On the secondary side of the transformer, the sine wave signal is converted into a stable DC output by a diode rectifier. The function of the rectifier is to convert the AC signal into a DC signal while ensuring the smoothness and stability of the output voltage.

[0050] Figure 1 A schematic diagram of a computer device 101 provided by an exemplary embodiment of the present application is shown.

[0051] Exemplarily, the analysis method of the full-bridge LLC circuit shown in the embodiment of the present application can be applied in a computer device, and the computer device 101 runs an OBC control program 102. The computer device may include a vehicle terminal, a mobile phone, a tablet computer, a notebook computer, a laptop computer, a desktop computer, an all-in-one computer, an Internet of Things device, an intelligent robot workstation, a television, a set-top box, smart glasses, a smart watch, a digital camera, an MP4 player, an MP5 player, a learning machine, a point-reading machine, an electronic paper book, an electronic dictionary, a virtual reality (VR) player or an augmented reality (AR) player, etc.

[0052] The computer device 101 includes a first memory and a first processor. The first memory stores an analysis program for a full-bridge LLC circuit; the analysis program for the full-bridge LLC circuit is called and executed by the first processor to implement the analysis method for the full-bridge LLC circuit provided in the present application. The first memory may include but is not limited to the following: random access memory (RAM), read only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), and electrically erasable read-only memory (EEPROM).

[0053] The first processor may be composed of one or more integrated circuit chips. Optionally, the first processor may be a general-purpose processor, such as a central processing unit (CPU) or a network processor (NP). Optionally, the first processor may implement the analysis method of the full-bridge LLC circuit provided in the present application by running a program or code.

[0054] Exemplarily, the computer device 101 is connected to the OBC, and the OBC includes a digital control circuit and a full-bridge LLC circuit. The digital control circuit is used to generate a switch control signal based on the resonant frequency adjustment factor provided by the program, and input the switch control signal into the full-bridge LLC circuit. Figure 2 As shown, the digital control circuit includes: module one resonant frequency adjustment factor 301, module two period reset integrator 302 and module three full-bridge PWM (Pulse Width Modulation) generator 303; the full-bridge LLC circuit includes: module four full-bridge drive 304, module five LLC resonant cavity 305 and module six full-bridge rectifier circuit 306.

[0055] For example, the overall design goal of LLCDCDC is input voltage Vin=400V, rated output voltage Vo=350V, minimum output voltage Vomin=280V, maximum output voltage Vomax=420V, rated output power Po=6.6kW, LLC resonant frequency fr=500kHz. The above design goals are only for illustration, and the full-bridge LLC circuit provided in the embodiment of the present application can also adopt other design goals. Based on the above design goals, an example of a digital control circuit and a full-bridge LLC circuit is given.

[0056] Modules like Figure 3 As shown, the frequency adjustment factor K_rel_freq 401 is multiplied by the first gain 402: the resonant frequency 500kHz, and then multiplied by the second gain 403: 2π, and then discretized using a 100kHz sampling clock 404 source to obtain a discrete signal; then the discrete signal is delayed 405 by a time step, and the result is used as the input of the subsequent period reset integrator 302. Figure 3 Take the frequency adjustment factors as 1.2, 1, and 0.8 for example.

[0057] Module 2 Figure 4 As shown, the modulated frequency adjustment factor is input to the integrator 406 of module two, and the integrator 406 is reset with a period of 2π, so the integrator will output a sawtooth wave of the modulated resonant frequency with a peak value of 2π and a frequency of 500kHs*K_rel_freq, which is converted into a sine wave with a frequency of 500kHs*K_rel_freq through the sin function 407.

[0058] According to the above design goal, when K_rel_freq=1, the output frequency fs of module 2=the resonant frequency fr of the full-bridge LLC circuit=500kHz, and the full-bridge LLC circuit operates in a resonant state.

[0059] When K_rel_freq = 1.2, the output frequency fs of Module 2 is 600 kHz > fr, and the full-bridge LLC circuit operates in the under-resonant state.

[0060] When K_rel_freq = 0.8, the output frequency fs of Module 2 is 400 kHz < fr, and the full-bridge LLC circuit operates in the over-resonant state.

[0061] Module 3 is as Figure 5 shown. The sine wave output by Module 2 is input to Module 3. The front-end comparator 408 of Module 3 synchronously outputs a square wave signal corresponding to the frequency, and then through the dead-time control module 409, two dead-time complementary switch control signals S12 and S34 are output. The dead-time control module 409 includes a buffer 410 and a NOT gate 411. The buffer 410 is used to delay the square wave signal for a dead time to obtain the switch control signal S12. The dead time is a delay time set to avoid the simultaneous conduction of the high-side and low-side power transistors. For example, the dead time can be 50 nanoseconds or 100 nanoseconds. The NOT gate 411 is used to invert the square wave signal and output a switch control signal S34 that is complementary to the switch control signal S12.

[0062] Module 4 is as Figure 6 shown. The full-bridge driver 304 is composed of 4 silicon carbide (SiC) MOS 412. The MOS 412 can use CREE's C3M0030090K. At the same time, a 1 nF capacitor 413 is connected in parallel to the Vds of the MOS 412 to absorb the transient reverse current. The gate of the MOS 412 uses RC filtering to limit the edge time of the MOS 412 and optimize the EMI (Electromagnetic Interference) performance. The switching frequency of the full-bridge driver 304 is determined by the frequencies of the switch control signals S12 and S34 output by the previous-stage PWM generator 303.

[0063] Module 5 is as Figure 7 shown. The mainstream bidirectional CLLC topology structure is adopted. Since the forward and reverse analysis processes are similar, only the forward charging process of the LLC is taken as an example for illustration below. Among them, the 4 MOS transistors in the secondary can be replaced by rectifier diodes, and the high-voltage battery is replaced by a resistor with the same power.

[0064] Exemplarily, there are two choices for the LLC primary resonant inductor 414 and the secondary resonant inductor 415. One is to use independent inductor elements. The advantage is that the flexibility can be adjusted according to the circuit needs, which is beneficial to development and debugging. The other is to use the leakage inductance of the transformer to replace the resonant inductor, that is, the magnetically integrated LLC transformer. The advantage is that the cost is reduced by eliminating the separate resonant inductor, but it is difficult to adjust the leakage inductance and the flexibility is poor.

[0065] Module 6 Figure 8 As shown, the high-voltage battery of the vehicle is replaced by a resistor 416 18.56Ω with the same power of 6.6kW. The default battery rated voltage is 350V, the low-power voltage is 280V, and the full-power voltage is 420. At the same time, the output voltage Vo_fbk and the output current Io_fbk are collected as feedback parameters of the software closed-loop control to achieve constant current charging or constant voltage charging control.

[0066] After connecting modules 1 to 6, the following can be obtained: Fig. 9 The circuit shown. The resonant frequency adjustment factor 301 of module one, the periodic reset integrator 302 of module two and the full-bridge PWM generator 303 of module three are sequentially connected to obtain a digital control circuit. The input of the digital control circuit is the frequency adjustment factor, and the output is the switch control signal S12 and the switch control signal S34. The full-bridge LLC circuit is obtained by sequentially connecting the full-bridge driver 304 of module four, the LLC resonant cavity 305 of module five and the full-bridge rectifier circuit 306 of module six. A DC power supply 417 is used to power the full-bridge LLC circuit, and the switch control signal S12 and the switch control signal S34 output by the digital control circuit are used as the switch control signals of the full-bridge LLC circuit.

[0067] Fig.10 FIG. 1 is a flow chart of an analysis method for a full-bridge LLC circuit provided by an exemplary embodiment of the present application. The method can be used for Figure 1 The computer device shown. The method is executed by a control program of an OBC running in the computer device, and the OBC includes a full-bridge LLC circuit. The method includes the following steps.

[0068] Step 210: transmitting the frequency adjustment factor to the digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit and is used to provide a switch control signal to the MOS tube of the full-bridge LLC circuit; the frequency adjustment factor is used to generate a switch control signal to adjust the switching frequency of the MOS tube.

[0069] The frequency adjustment factor is a constant, for example, the frequency adjustment factor is a positive number. The frequency adjustment factor is used to adjust the switching frequency of the full-bridge LLC circuit. Optionally, the frequency adjustment factor is multiplied by the resonant frequency of the full-bridge LLC circuit to obtain the switching frequency, which is convenient for developers to adjust the switching frequency based on the resonant frequency of the full-bridge LLC circuit and control the working state of the full-bridge LLC circuit. For example, the frequency adjustment factor is input into the module 1 resonant frequency adjustment factor 301 of the digital control circuit, so that the digital control circuit outputs the switch control signals S12 and S34 based on the frequency adjustment factor.

[0070] Exemplarily, the frequency adjustment factor can be dynamically changed, and the control program can dynamically adjust the frequency adjustment factor based on the detected output voltage and / or output current of the full-bridge LLC circuit to control the full-bridge LLC circuit to be in a target operating state, or to control the output current and / or output voltage of the full-bridge LLC circuit to meet expectations.

[0071] For example, at a first moment, the control program inputs a first frequency adjustment factor, and based on the detected output current, determines that the output current deviates from the target output current; then at a second moment, the control program may input a second frequency adjustment factor to control the output current to approach the target output current. In this way, the control program may generate a signal of a dynamically changing frequency adjustment factor in real time based on an error signal between the output voltage and / or output current and the target output voltage and / or target output current.

[0072] Optionally, the control program transmits a first frequency adjustment factor to the digital control circuit; the first frequency adjustment factor corresponds to a first switching frequency, and the first switching frequency is equal to the resonant frequency of the full-bridge LLC circuit. For example, if the first frequency adjustment factor is 1, the first switching frequency is 500 Hz, and the resonant frequency of the full-bridge LLC circuit is 500 Hz, the full-bridge LLC circuit operates in a resonant state.

[0073] Or, a second frequency adjustment factor is transmitted to the digital control circuit; the second frequency adjustment factor corresponds to a second switching frequency, and the second switching frequency is greater than the resonant frequency of the full-bridge LLC circuit. For example, if the second frequency adjustment factor is 1.2, the second switching frequency is 600 Hz, and the resonant frequency of the full-bridge LLC circuit is 500 Hz, the full-bridge LLC circuit operates in an under-resonant state.

[0074] Or, a third frequency adjustment factor is transmitted to the digital control circuit; the third frequency adjustment factor corresponds to a third switching frequency, and the third switching frequency is less than the resonant frequency of the full-bridge LLC circuit. For example, if the third frequency adjustment factor is 0.8, the third switching frequency is 400 Hz, and the resonant frequency of the full-bridge LLC circuit is 500 Hz, the full-bridge LLC circuit operates in an over-resonance state.

[0075] Step 220: Detect the output current and output voltage of the full-bridge LLC circuit.

[0076] For example, Figure 8 As shown, the control program can detect the output voltage Vo_fbk and the output current Io_fbk of the full-bridge LLC circuit.

[0077] Optionally, the control program can also detect other data in the full-bridge LLC circuit to analyze the working condition of the full-bridge LLC circuit. For example, the Vds (drain-source voltage) of each of the four MOS tubes, the current of the MOS tube, the switch control signal input to the MOS tube, the voltage and current of each of the four diodes in the module six full-bridge rectifier circuit 306, etc. can also be detected.

[0078] Step 230: Display a current waveform diagram based on the output current, and display a voltage waveform diagram based on the output voltage.

[0079] Exemplarily, the control program can display a current waveform of the output current and a voltage waveform of the output voltage on a computer device. From the current waveform and the voltage waveform, it can be intuitively seen that the full-bridge LLC circuit periodically performs a soft switching process, which makes it easy for developers to understand the soft switching operation of the LLC circuit by analyzing the current waveform and the voltage waveform, and understand the soft switching waveform details and efficiency advantages of the LLC DCDC.

[0080] Optionally, if the control program also detects other circuit data, the corresponding waveform diagram can also be displayed to facilitate analysis by developers.

[0081] In an optional embodiment, if Fig.11 As shown, the computer device displays the corresponding output voltage and primary resonant current when different frequency adjustment factors K_rel_freq are input.

[0082] When the first frequency adjustment factor is input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the resonant state are respectively displayed based on the output current and the output voltage. Fig.11 As shown, when K_rel_freq=1, switching frequency fs=500kHz, Vout=350V, the primary resonant inductor current is approximately a sine wave, and the full-bridge LLC circuit operates in a resonant state.

[0083] When the second frequency adjustment factor is input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the under-resonance state are respectively displayed based on the output current and the output voltage. Fig.11 As shown, when K_rel_freq=1.2, switching frequency fs=600kHz, Vout=284V, the primary resonant inductor current is under-resonant, and K_rel_freq is slightly increased, Vout=280V.

[0084] When the third frequency adjustment factor is input, the current waveform and voltage waveform of the full-bridge LLC circuit operating in the over-resonance state are respectively displayed based on the output current and the output voltage. Fig.11As shown, when K_rel_freq=0.8, switching frequency fs=400kHz, Vout=420V, the primary resonant inductor current is over-resonant.

[0085] In an optional embodiment, the computer device can also display the resonant, under-resonant, and over-resonant ZVS zero voltage turn-on waveforms. It can be seen from the figure that before the gate is turned on, the MOS tube Vds has dropped, achieving soft turn-on, and avoiding the loss caused by the crossover of voltage and current during the MOS turn-on stage.

[0086] like Fig.12 As shown, when the full-bridge LLC circuit operates in a resonant state, a first zero voltage switching ZVS waveform diagram is displayed; the first ZVS waveform diagram is used to analyze the ZVS situation when the full-bridge LLC circuit operates in a resonant state; the first ZVS waveform diagram includes at least one of the following: a waveform diagram of a switch control signal, a waveform diagram of a drain-source voltage of a MOS tube, and a waveform diagram of a current of a MOS tube;

[0087] like Fig.13 As shown, when the full-bridge LLC circuit operates in an under-resonance state, a second ZVS waveform is displayed; the second ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an under-resonance state; the second ZVS waveform includes at least one of the following: a waveform of a switch control signal, a waveform of a drain-source voltage of a MOS tube, and a waveform of a current of a MOS tube;

[0088] like Fig.14 As shown, when the full-bridge LLC circuit operates in an over-resonance state, a third ZVS waveform diagram is displayed; the third ZVS waveform diagram is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZVS waveform diagram includes at least one of the following: a waveform diagram of a switch control signal, a drain-source voltage waveform diagram of a MOS tube, and a current waveform diagram of a MOS tube.

[0089] In an optional embodiment, the computer device can also display the resonance, under-resonance, and over-resonance ZCS zero current shutdown waveform. It can be seen from the figure that before the diode is turned off, the diode current has dropped, achieving soft shutdown, avoiding the loss caused by the crossover of voltage and current during the diode turn-off stage.

[0090] like Fig.15 As shown, when the full-bridge LLC circuit operates in a resonant state, a first zero current shutdown ZCS waveform diagram is displayed; the first ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in a resonant state; the first ZCS waveform diagram includes at least one of the following: a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit, and a current waveform diagram of a secondary diode;

[0091] like Fig.16 As shown, when the full-bridge LLC circuit operates in an under-resonance state, a second ZCS waveform is displayed; the second ZCS waveform is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an under-resonance state; the second ZCS waveform includes at least one of the following: a voltage waveform of a secondary diode in the full-bridge LLC circuit, and a current waveform of a secondary diode;

[0092] like Fig.17 As shown, when the full-bridge LLC circuit operates in an over-resonance state, a third ZCS waveform diagram is displayed; the third ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZCS waveform diagram includes at least one of the following: a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit, and a current waveform diagram of a secondary diode.

[0093] In summary, the method provided in this embodiment provides an analysis method for a full-bridge LLC circuit, which can dynamically adjust the switching frequency of the MOS tube of the full-bridge LLC circuit through a digital control circuit to change the working state of the full-bridge LLC circuit. The output voltage and current of the full-bridge LLC circuit are measured, and the current waveform and voltage waveform are displayed, which is convenient for developers to analyze the soft switching working conditions of the full-bridge LLC circuit and understand the soft switching waveform details and efficiency advantages of LLC DCDC.

[0094] The method provided in the embodiment of the present application can analyze the output voltage of LLC in the three states of resonance, under-resonance and over-resonance, the LLC output current, the primary MOS tube ZVS waveform, and the secondary diode ZCS waveform, reflecting the different ZVS and ZCS waveform characteristics corresponding to different frequency adjustment factors, so that developers can fully understand the soft switching waveforms in the three states involved in LLC DCDC, and fully evaluate the possible development results and optimization paths of the developed LLC DCDC.

[0095] In an optional embodiment, the computer device may dynamically adjust the frequency adjustment factor according to the target charging voltage or target charging current of the OBC, so that the actual output voltage or the actual output current approaches the target value.

[0096] Fig.18 FIG. 1 is a flow chart of an analysis method for a full-bridge LLC circuit provided by an exemplary embodiment of the present application. The method can be used for Figure 1 The computer equipment shown. Fig.10 In the illustrated embodiment, step 210 includes step 211 and step 212 .

[0097] Step 211: Calculate a voltage error signal between the output voltage and the target charging voltage; or calculate a current error signal between the output current of the full-bridge LLC circuit and the target charging current.

[0098] For example, the OBC may be set with a target charging voltage during constant voltage charging and a target charging current during constant current charging. The control program may calculate the frequency adjustment factor based on the error between the detected output current and / or output voltage of the full-bridge LLC circuit and the target output current and / or target output voltage.

[0099] Exemplarily, the value of the frequency adjustment factor can be calculated based on the error signal. For example, when the target charging voltage is higher than the output voltage, the output voltage can be increased by reducing the frequency adjustment factor.

[0100] Exemplarily, the control program provides a frequency adjustment factor. By adjusting this variable, the control program changes the switching frequency of the gate signal of the driving circuit accordingly, thereby adjusting the output voltage of the LLC DCDC. The frequency adjustment factor can be obtained according to the error signal of the target charging current of constant current charging, or according to the error signal of the target charging voltage of constant voltage charging. The frequency adjustment factor facilitates the control program of the OBC to implement constant current and constant voltage control of the battery for two stages of fast charging. Then, the ZVS and ZCS waveforms corresponding to the frequency adjustment factor are obtained for analysis and evaluation, thereby realizing the evaluation of the soft switching effect of the overall LLC DCDC combined with the software control circuit.

[0101] Step 212: adjusting the frequency adjustment factor based on the voltage error signal to control the output voltage to approach the target charging voltage; or adjusting the frequency adjustment factor based on the current error signal to control the output current to approach the target charging current.

[0102] In summary, the method provided in this embodiment, the control program of OBC can calculate the error between the output current or output voltage of the full-bridge LLC circuit and the target value according to the set target charging current or target charging voltage, dynamically adjust the switching frequency of the MOS tube of the full-bridge LLC circuit through the digital control circuit, and adjust the output current or output voltage of the full-bridge LLC circuit. And measure the output voltage and current of the full-bridge LLC circuit, and display the current waveform and voltage waveform, which is convenient for developers to analyze the soft switching working condition of the full-bridge LLC circuit and understand the soft switching waveform details and efficiency advantages of LLC DCDC.

[0103] It should be noted that before collecting relevant data of users and during the process of collecting relevant data of users, this application can display a prompt interface, pop-up window or output voice prompt information, and the prompt interface, pop-up window or voice prompt information is used to prompt the user that its relevant data is currently being collected, so that this application only starts to execute the relevant steps of obtaining relevant data of users after obtaining the confirmation operation issued by the user to the prompt interface or pop-up window, otherwise (that is, when the confirmation operation issued by the user to the prompt interface or pop-up window is not obtained), the relevant steps of obtaining relevant data of users are terminated, that is, the relevant data of users are not obtained. In other words, all user data collected by this application are collected with the consent and authorization of the user, and the collection, use and processing of relevant user data need to comply with the relevant laws, regulations and standards of relevant countries and regions.

[0104] It should be noted that the sequence of the method steps provided in the embodiments of the present application can be appropriately adjusted, and the steps can be increased or decreased accordingly according to the circumstances. Any technician familiar with the technical field can easily think of the changed methods within the technical scope disclosed in the present application, and they should be included in the protection scope of the present application, so they will not be repeated here.

[0105] Fig.19 1 is a schematic diagram of a full-bridge LLC circuit analysis device provided by an exemplary embodiment of the present application. The device runs a control program of an on-board charger OBC, and the OBC includes the full-bridge LLC circuit; the device includes:

[0106] The transmission module 1001 is used to transmit a frequency adjustment factor to a digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit and is used to provide a switch control signal to the MOS tube of the full-bridge LLC circuit; the frequency adjustment factor is used to generate the switch control signal to adjust the switch frequency of the MOS tube;

[0107] A detection module 1002, used to detect the output current and output voltage of the full-bridge LLC circuit;

[0108] The display module 1003 is configured to display a current waveform diagram based on the output current, and to display a voltage waveform diagram based on the output voltage.

[0109] In an optional embodiment, the transmission module 1001 is used to perform at least one of the following:

[0110] transmitting a first frequency adjustment factor to the digital control circuit; the first frequency adjustment factor corresponds to a first switching frequency, the first switching frequency being equal to the resonant frequency of the full-bridge LLC circuit;

[0111] transmitting a second frequency adjustment factor to the digital control circuit; the second frequency adjustment factor corresponds to a second switching frequency, the second switching frequency being greater than a resonant frequency of the full-bridge LLC circuit;

[0112] A third frequency adjustment factor is transmitted to the digital control circuit; the third frequency adjustment factor corresponds to a third switching frequency, and the third switching frequency is less than the resonant frequency of the full-bridge LLC circuit.

[0113] In an optional embodiment, the display module 1003 is used to perform at least one of the following:

[0114] When the first frequency adjustment factor is input, the current waveform diagram and the voltage waveform diagram of the full-bridge LLC circuit operating in a resonant state are respectively displayed based on the output current and the output voltage;

[0115] When the second frequency adjustment factor is input, the current waveform diagram and the voltage waveform diagram of the full-bridge LLC circuit operating in an under-resonance state are respectively displayed based on the output current and the output voltage;

[0116] When the third frequency adjustment factor is input, the current waveform diagram and the voltage waveform diagram of the full-bridge LLC circuit operating in an over-resonance state are respectively displayed based on the output current and the output voltage.

[0117] In an optional embodiment, the display module 1003 is used to perform at least one of the following:

[0118] When the full-bridge LLC circuit operates in a resonant state, a first zero voltage switching ZVS waveform is displayed; the first ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in a resonant state; the first ZVS waveform includes at least one of the following: a waveform of the switch control signal, a waveform of the drain-source voltage of the MOS tube, and a waveform of the current of the MOS tube;

[0119] When the full-bridge LLC circuit operates in an under-resonance state, a second ZVS waveform is displayed; the second ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an under-resonance state; the second ZVS waveform includes at least one of the following: a waveform of the switch control signal, a waveform of the drain-source voltage of the MOS tube, and a waveform of the current of the MOS tube;

[0120] When the full-bridge LLC circuit operates in an over-resonance state, a third ZVS waveform is displayed; the third ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZVS waveform includes at least one of the following: a waveform of the switch control signal, a waveform of the drain-source voltage of the MOS tube, and a current waveform of the MOS tube.

[0121] In an optional embodiment, the display module 1003 is used to perform at least one of the following:

[0122] When the full-bridge LLC circuit operates in a resonant state, a first zero current shutdown ZCS waveform diagram is displayed; the first ZCS waveform diagram is used to analyze the ZCS condition when the full-bridge LLC circuit operates in a resonant state; the first ZCS waveform diagram includes at least one of the following: a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit, and a current waveform diagram of the secondary diode;

[0123] When the full-bridge LLC circuit operates in an under-resonance state, a second ZCS waveform is displayed; the second ZCS waveform is used to analyze the ZCS condition when the full-bridge LLC circuit operates in an under-resonance state; the second ZCS waveform includes at least one of the following: a voltage waveform of a secondary diode in the full-bridge LLC circuit, and a current waveform of the secondary diode;

[0124] When the full-bridge LLC circuit operates in an over-resonance state, a third ZCS waveform diagram is displayed; the third ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZCS waveform diagram includes at least one of the following: a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit, and a current waveform diagram of the secondary diode.

[0125] In an optional embodiment, the OBC is provided with a target charging voltage;

[0126] The transmission module 1001 is used to calculate a voltage error signal between the output voltage and the target charging voltage;

[0127] The transmission module 1001 is used to adjust the frequency adjustment factor based on the voltage error signal to control the output voltage to approach the target charging voltage.

[0128] In an optional embodiment, the OBC is provided with a target charging current;

[0129] The transmission module 1001 is used to calculate a current error signal between the output current of the full-bridge LLC circuit and the target charging current;

[0130] The transmission module 1001 is used to adjust the frequency adjustment factor based on the current error signal to control the output current to approach the target charging current.

[0131] In an optional embodiment, the transmission module 1001 is used to multiply the frequency adjustment factor by the resonant frequency of the full-bridge LLC circuit, and then multiply by 2π to obtain a first result;

[0132] The transmission module 1001 is used to discretize the first result using a sampling clock to obtain a discrete signal;

[0133] The transmission module 1001 is used to delay the discrete signal by one time step to obtain an input signal;

[0134] The transmission module 1001 is used to input the input signal into the digital control circuit.

[0135] In an optional embodiment, the digital control circuit comprises: a period reset integrator and a full-bridge pulse width modulation PWM generator connected in sequence;

[0136] The period reset integrator is used to convert the input signal into a sine wave;

[0137] The full-bridge PWM generator is used to convert the sine wave into the switch control signal.

[0138] It should be noted that: the analysis device of the full-bridge LLC circuit provided in the above embodiment is only illustrated by the division of the above functional modules. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the analysis device of the full-bridge LLC circuit provided in the above embodiment and the analysis method embodiment of the full-bridge LLC circuit belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.

[0139] The embodiment of the present application also provides a computer device, which includes: a processor and a memory, wherein at least one instruction, at least one program, code set or instruction set is stored in the memory, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by the processor to implement the analysis method of the full-bridge LLC circuit provided by the above-mentioned method embodiments. The computer device can be implemented as a terminal.

[0140] For example, Fig. 20 It is a structural diagram of a computer device provided by an exemplary embodiment of the present application.

[0141] Typically, the computer device 1700 includes a processor 1701 and a memory 1702 .

[0142] The processor 1701 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 1701 may be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 1701 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 1701 may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 1701 may also include an AI (Artificial Intelligence) processor, which is used to process computing operations related to machine learning.

[0143] The memory 1702 may include one or more computer-readable storage media, which may be non-transitory. The memory 1702 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In some embodiments, the non-transitory computer-readable storage medium in the memory 1702 is used to store at least one instruction, which is used to be executed by the processor 1701 to implement the analysis method of the full-bridge LLC circuit provided in the method embodiment of the present application.

[0144] In some embodiments, the computer device 1700 may also optionally include: a peripheral device interface 1703 and at least one peripheral device. The processor 1701, the memory 1702 and the peripheral device interface 1703 may be connected via a bus or a signal line. Each peripheral device may be connected to the peripheral device interface 1703 via a bus, a signal line or a circuit board. Specifically, the peripheral device includes: at least one of a radio frequency circuit 1704, a display screen 1705, a camera assembly 1706, an audio circuit 1707 and a power supply 1708.

[0145] The peripheral device interface 1703 may be used to connect at least one peripheral device related to I / O (Input / Output) to the processor 1701 and the memory 1702. In some embodiments, the processor 1701, the memory 1702, and the peripheral device interface 1703 are integrated on the same chip or circuit board; in some other embodiments, any one or two of the processor 1701, the memory 1702, and the peripheral device interface 1703 may be implemented on a separate chip or circuit board, which is not limited in the embodiments of the present application.

[0146] The radio frequency circuit 1704 is used to receive and transmit RF (Radio Frequency) signals, also known as electromagnetic signals. The radio frequency circuit 1704 communicates with the communication network and other communication devices through electromagnetic signals. The radio frequency circuit 1704 converts the electrical signal into an electromagnetic signal for transmission, or converts the received electromagnetic signal into an electrical signal. Optionally, the radio frequency circuit 1704 includes: an antenna system, an RF transceiver, one or more amplifiers, a tuner, an oscillator, a digital signal processor, a codec chipset, a user identity module card, and the like. The radio frequency circuit 1704 can communicate with other computer devices through at least one wireless communication protocol. The wireless communication protocol includes, but is not limited to: the World Wide Web, a metropolitan area network, an intranet, various generations of mobile communication networks (2G, 3G, 4G and 5G), a wireless local area network and / or a WiFi (Wireless Fidelity) network. In some embodiments, the radio frequency circuit 1704 may also include circuits related to NFC (Near Field Communication), which is not limited in this application.

[0147] The display screen 1705 is used to display a UI (User Interface). The UI may include graphics, text, icons, videos, and any combination thereof. When the display screen 1705 is a touch display screen, the display screen 1705 also has the ability to collect touch signals on the surface or above the surface of the display screen 1705. The touch signal can be input to the processor 1701 as a control signal for processing. At this time, the display screen 1705 can also be used to provide virtual buttons and / or virtual keyboards, also known as soft buttons and / or soft keyboards. In some embodiments, the display screen 1705 can be one, and the front panel of the computer device 1700 is set; in other embodiments, the display screen 1705 can be at least two, which are respectively set on different surfaces of the computer device 1700 or are folded; in some other embodiments, the display screen 1705 can be a flexible display screen, which is set on the curved surface or folded surface of the computer device 1700. Even, the display screen 1705 can also be set to a non-rectangular irregular shape, that is, a special-shaped screen. The display screen 1705 can be made of materials such as LCD (Liquid Crystal Display) and OLED (Organic Light-Emitting Diode).

[0148] The camera assembly 1706 is used to capture images or videos. Optionally, the camera assembly 1706 includes a front camera and a rear camera. Typically, the front camera is arranged on the front panel of the computer device 1700, and the rear camera is arranged on the back of the computer device. In some embodiments, there are at least two rear cameras, which are any one of a main camera, a depth of field camera, a wide-angle camera, and a telephoto camera, so as to realize the fusion of the main camera and the depth of field camera to realize the background blur function, the fusion of the main camera and the wide-angle camera to realize the panoramic shooting and VR (Virtual Reality) shooting function or other fusion shooting functions. In some embodiments, the camera assembly 1706 may also include a flash. The flash can be a monochrome temperature flash or a dual-color temperature flash. A dual-color temperature flash refers to a combination of a warm light flash and a cold light flash, which can be used for light compensation at different color temperatures.

[0149] The audio circuit 1707 may include a microphone and a speaker. The microphone is used to collect sound waves from the user and the environment, and convert the sound waves into electrical signals and input them into the processor 1701 for processing, or input them into the radio frequency circuit 1704 to achieve voice communication. For the purpose of stereo acquisition or noise reduction, there may be multiple microphones, which are respectively arranged at different parts of the computer device 1700. The microphone may also be an array microphone or an omnidirectional acquisition microphone. The speaker is used to convert the electrical signal from the processor 1701 or the radio frequency circuit 1704 into sound waves. The speaker may be a traditional film speaker or a piezoelectric ceramic speaker. When the speaker is a piezoelectric ceramic speaker, it can not only convert the electrical signal into sound waves audible to humans, but also convert the electrical signal into sound waves inaudible to humans for purposes such as ranging. In some embodiments, the audio circuit 1707 may also include a headphone jack.

[0150] The power supply 1708 is used to power various components in the computer device 1700. The power supply 1708 can be an alternating current, a direct current, a disposable battery, or a rechargeable battery. When the power supply 1708 includes a rechargeable battery, the rechargeable battery can be a wired rechargeable battery or a wireless rechargeable battery. A wired rechargeable battery is a battery that is charged through a wired line, and a wireless rechargeable battery is a battery that is charged through a wireless coil. The rechargeable battery can also be used to support fast charging technology.

[0151] In some embodiments, the computer device 1700 further includes one or more sensors 1709 , including but not limited to: an acceleration sensor 1710 , a gyroscope sensor 1711 , a pressure sensor 1712 , an optical sensor 1713 , and a proximity sensor 1714 .

[0152] The acceleration sensor 1710 can detect the magnitude of acceleration on the three coordinate axes of the coordinate system established by the computer device 1700. For example, the acceleration sensor 1710 can be used to detect the components of gravity acceleration on the three coordinate axes. The processor 1701 can control the touch display screen 1705 to display the user interface in a horizontal view or a vertical view according to the gravity acceleration signal collected by the acceleration sensor 1710. The acceleration sensor 1710 can also be used to collect game or user motion data.

[0153] The gyro sensor 1711 can detect the body direction and rotation angle of the computer device 1700, and the gyro sensor 1711 can cooperate with the acceleration sensor 1710 to collect the user's 3D actions on the computer device 1700. The processor 1701 can implement the following functions based on the data collected by the gyro sensor 1711: motion sensing (such as changing the UI according to the user's tilt operation), image stabilization during shooting, game control, and inertial navigation.

[0154] The pressure sensor 1712 can be set on the side frame of the computer device 1700 and / or the lower layer of the touch display screen 1705. When the pressure sensor 1712 is set on the side frame of the computer device 1700, it can detect the user's grip signal of the computer device 1700, and the processor 1701 performs left and right hand recognition or shortcut operations according to the grip signal collected by the pressure sensor 1712. When the pressure sensor 1712 is set on the lower layer of the touch display screen 1705, the processor 1701 controls the operability controls on the UI interface according to the user's pressure operation on the touch display screen 1705. The operability controls include at least one of a button control, a scroll bar control, an icon control, and a menu control.

[0155] The optical sensor 1713 is used to collect the ambient light intensity. In one embodiment, the processor 1701 can control the display brightness of the touch display screen 1705 according to the ambient light intensity collected by the optical sensor 1713. Specifically, when the ambient light intensity is high, the display brightness of the touch display screen 1705 is increased; when the ambient light intensity is low, the display brightness of the touch display screen 1705 is reduced. In another embodiment, the processor 1701 can also dynamically adjust the shooting parameters of the camera assembly 1706 according to the ambient light intensity collected by the optical sensor 1713.

[0156] The proximity sensor 1714, also called a distance sensor, is usually arranged on the front panel of the computer device 1700. The proximity sensor 1714 is used to collect the distance between the user and the front of the computer device 1700. In one embodiment, when the proximity sensor 1714 detects that the distance between the user and the front of the computer device 1700 is gradually decreasing, the processor 1701 controls the touch display screen 1705 to switch from the screen-on state to the screen-off state; when the proximity sensor 1714 detects that the distance between the user and the front of the computer device 1700 is gradually increasing, the processor 1701 controls the touch display screen 1705 to switch from the screen-off state to the screen-on state.

[0157] Those skilled in the art will understand that Fig. 20 The structure shown in the figure does not constitute a limitation on the computer device 1700, and the computer device 1700 may include more or less components than shown in the figure, or combine some components, or adopt a different arrangement of components.

[0158] A computer-readable storage medium is also provided in an embodiment of the present application, in which at least one instruction, at least one program, code set or instruction set is stored. When the at least one instruction, at least one program, code set or instruction set is loaded and executed by a processor of a computer device, the analysis method of the full-bridge LLC circuit provided by the above-mentioned method embodiments is implemented.

[0159] The present application also provides a computer program product or a computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the analysis method of the full-bridge LLC circuit provided by the above-mentioned method embodiments.

[0160] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned readable storage medium may be a read-only memory, a disk or an optical disk, etc.

[0161] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent switching, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for analyzing a full-bridge LLC circuit, characterized in that: The method is executed by a control program of an on-board charger OBC, wherein the OBC includes the full-bridge LLC circuit; the method includes: The frequency adjustment factor is transmitted to the digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit and is used to provide a switch control signal to the MOS tube of the full-bridge LLC circuit; the frequency adjustment factor is used to generate the switch control signal and adjust the switch frequency of the MOS tube; Detecting the output current and output voltage of the full-bridge LLC circuit; A current waveform graph is displayed based on the output current, and a voltage waveform graph is displayed based on the output voltage.

2. The method according to claim 1, characterized in that The transmitting the frequency adjustment factor to the digital control circuit includes at least one of the following: transmitting a first frequency adjustment factor to the digital control circuit; the first frequency adjustment factor corresponds to a first switching frequency, the first switching frequency being equal to the resonant frequency of the full-bridge LLC circuit; transmitting a second frequency adjustment factor to the digital control circuit; the second frequency adjustment factor corresponds to a second switching frequency, the second switching frequency being greater than a resonant frequency of the full-bridge LLC circuit; A third frequency adjustment factor is transmitted to the digital control circuit; the third frequency adjustment factor corresponds to a third switching frequency, and the third switching frequency is less than the resonant frequency of the full-bridge LLC circuit.

3. The method according to claim 2, characterized in that The displaying of the current waveform diagram based on the output current and the displaying of the voltage waveform diagram based on the output voltage include at least one of the following: When the first frequency adjustment factor is input, the current waveform diagram and the voltage waveform diagram of the full-bridge LLC circuit operating in a resonant state are respectively displayed based on the output current and the output voltage; When the second frequency adjustment factor is input, the current waveform diagram and the voltage waveform diagram of the full-bridge LLC circuit operating in an under-resonance state are respectively displayed based on the output current and the output voltage; When the third frequency adjustment factor is input, the current waveform diagram and the voltage waveform diagram of the full-bridge LLC circuit operating in an over-resonance state are respectively displayed based on the output current and the output voltage.

4. The method according to any one of claims 1 to 3, characterized in that: The method further comprises at least one of the following: When the full-bridge LLC circuit operates in a resonant state, a first zero voltage switching ZVS waveform is displayed; the first ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in a resonant state; the first ZVS waveform includes at least one of the following: a waveform of the switch control signal, a waveform of the drain-source voltage of the MOS tube, and a waveform of the current of the MOS tube; When the full-bridge LLC circuit operates in an under-resonance state, a second ZVS waveform is displayed; the second ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an under-resonance state; the second ZVS waveform includes at least one of the following: a waveform of the switch control signal, a waveform of the drain-source voltage of the MOS tube, and a waveform of the current of the MOS tube; When the full-bridge LLC circuit operates in an over-resonance state, a third ZVS waveform is displayed; the third ZVS waveform is used to analyze the ZVS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZVS waveform includes at least one of the following: a waveform of the switch control signal, a waveform of the drain-source voltage of the MOS tube, and a current waveform of the MOS tube.

5. The method according to any one of claims 1 to 3, characterized in that: The method further comprises at least one of the following: When the full-bridge LLC circuit operates in a resonant state, a first zero current shutdown ZCS waveform diagram is displayed; the first ZCS waveform diagram is used to analyze the ZCS condition when the full-bridge LLC circuit operates in a resonant state; the first ZCS waveform diagram includes at least one of the following: a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit, and a current waveform diagram of the secondary diode; When the full-bridge LLC circuit operates in an under-resonance state, a second ZCS waveform is displayed; the second ZCS waveform is used to analyze the ZCS condition when the full-bridge LLC circuit operates in an under-resonance state; the second ZCS waveform includes at least one of the following: a voltage waveform of a secondary diode in the full-bridge LLC circuit, and a current waveform of the secondary diode; When the full-bridge LLC circuit operates in an over-resonance state, a third ZCS waveform diagram is displayed; the third ZCS waveform diagram is used to analyze the ZCS situation when the full-bridge LLC circuit operates in an over-resonance state; the third ZCS waveform diagram includes at least one of the following: a voltage waveform diagram of a secondary diode in the full-bridge LLC circuit, and a current waveform diagram of the secondary diode.

6. The method according to any one of claims 1 to 3, characterized in that: The OBC is provided with a target charging voltage; the method further comprising: Calculating a voltage error signal between the output voltage and the target charging voltage; The frequency adjustment factor is adjusted based on the voltage error signal to control the output voltage to approach the target charging voltage.

7. The method according to any one of claims 1 to 3, characterized in that: The OBC is provided with a target charging current; the method further comprises: Calculating a current error signal between an output current of the full-bridge LLC circuit and the target charging current; The frequency adjustment factor is adjusted based on the current error signal to control the output current to approach the target charging current.

8. The method according to any one of claims 1 to 3, characterized in that: The transmitting the frequency adjustment factor to the digital control circuit comprises: Multiplying the frequency adjustment factor by the resonant frequency of the full-bridge LLC circuit and then by 2π to obtain a first result; Discretize the first result using a sampling clock to obtain a discrete signal; Delaying the discrete signal by one time step to obtain an input signal; The input signal is input into the digital control circuit.

9. The method according to claim 8, characterized in that The digital control circuit comprises: a period reset integrator and a full-bridge pulse width modulation PWM generator connected in sequence; The period reset integrator is used to convert the input signal into a sine wave; The full-bridge PWM generator is used to convert the sine wave into the switch control signal.

10. An analysis device for a full-bridge LLC circuit, characterized in that: The device comprises: A transmission module, used for transmitting a frequency adjustment factor to a digital control circuit; the digital control circuit is connected to the full-bridge LLC circuit, and is used for providing a switch control signal to the MOS tube of the full-bridge LLC circuit; the frequency adjustment factor is used for generating the switch control signal to adjust the switch frequency of the MOS tube; A detection module, used for detecting the output current and output voltage of the full-bridge LLC circuit; The display module is used to display a current waveform diagram based on the output current, and to display a voltage waveform diagram based on the output voltage.

11. A computer device, characterized in that: The computer device includes a processor and a memory, wherein the memory stores at least one program, and the at least one program is loaded and executed by the processor to implement the analysis method of the full-bridge LLC circuit as described in any one of claims 1 to 9.

12. A computer-readable storage medium, characterized in that: The readable storage medium stores at least one program, and the at least one program is loaded and executed by the processor to implement the analysis method of the full-bridge LLC circuit as described in any one of claims 1 to 9.

13. A computer program product, characterized in that The computer program product includes computer instructions, which are stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the analysis method of the full-bridge LLC circuit as described in any one of claims 1 to 9.

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