Time delay analysis method, system, device, equipment and readable medium

Abstract

The invention provides a time delay analysis method, system, device and equipment and a readable medium, and belongs to the technical field of wireless communication. The method comprises the following steps: acquiring external data representation acquired by each single interface in a new air interface voice over noise ratio (VORR) calling process; synthesizing the external data representations acquired by the single interfaces according to the mutual relevance of the signaling to obtain a single whole-flow external data representation; and performing time delay analysis on the single whole-process external data representation to obtain an analysis result. The method is used for effectively analyzing the time delay of the VORR.

Description

Technical Field

[0001] The present disclosure relates to the field of wireless communication technology, and in particular to a delay analysis method, system, device, equipment and readable medium. Background Art

[0002] From the perspective of the development stage of voice communication, the application of segmented delay technology is mainly concentrated in the long-term evolution voice bearer (VoLTE) of the 4th generation mobile communication technology (4G) and the voice fallback (EPS Fallback, EPS FB; Evolved Packet System (EPS)) of the 5th generation mobile communication technology (5G). However, with the deepening of the 5G era, major domestic operators have enabled the 5G new air interface voice bearer (VoNR) function. Compared with 4G VoLTE and EPS FB, VoNR has the following advantages: ultra-low call connection delay, higher sound quality, ultra-clear picture quality, voice and data are resident on the 5G network at the same time, etc.

[0003] From the perspective of 5G latency complaint application scenarios, current 5G VoNR latency complaints rely on 4G latency slice analysis tools, which mainly attempt to improve on "5G external data representation (External Data Representation, XDR) collection and storage" and "slice analysis logic". However, the two improved methods still take 110 minutes, and the positioning accuracy is only 42%, which cannot meet the customer satisfaction quality requirements of positioning time ≤ 60 minutes and demarcation accuracy ≥ 95%.

[0004] In order to tackle the end-to-end quality of VoNR and achieve the same quality and feeling of VoNR and VoLTE, the quality of the existing network is continuously optimized and improved through signaling analysis, complaint analysis, manual testing, etc. to solve blind spots. Among them, the VoNR call connection time (that is, the time difference between the call initiation and the reception of the SPING180 Ring message sent by the network side) is the main assessment indicator. The relevant requirements have clear requirements for the VoNR connection delay, and the call connection benchmark value is <2.5s / challenge value <2.3s.

[0005] Effective analysis of VoNR latency is the basis for continuously optimizing and improving the quality of existing networks. Summary of the invention

[0006] The present disclosure provides a delay analysis method, system, device, equipment and readable medium.

[0007] The first aspect of the present disclosure provides a delay analysis method, including:

[0008] Obtain the external data representation collected by each single interface during the new air interface carrying voice VoNR call;

[0009] The external data representations collected by each single interface are synthesized according to the signaling interrelationship to obtain a single full-process external data representation;

[0010] Perform a time delay analysis on the single full-process external data representation to obtain an analysis result.

[0011] A second aspect of the present disclosure provides a delay analysis system, including:

[0012] A collection device, used to obtain external data representation collected by each single interface during a new air interface carrying voice VoNR call;

[0013] A synthesis device, used to synthesize the external data representations collected by each of the single interfaces according to the signaling interrelationship to obtain a single full-process external data representation;

[0014] The analysis device is used to perform delay analysis on the single full-process external data representation to obtain analysis results.

[0015] A third aspect of the present disclosure provides a delay analysis device, including:

[0016] An acquisition module is used to obtain external data representation collected by each single interface during a new air interface carrying voice VoNR call;

[0017] A synthesis module, used to synthesize the external data representations collected by each of the single interfaces according to the signaling interrelationships to obtain a single full-process external data representation;

[0018] The analysis module is used to perform delay analysis on the single full-process external data representation to obtain analysis results.

[0019] A fourth aspect of the present disclosure provides an electronic device, including:

[0020] at least one processor;

[0021] A memory having one or more programs stored thereon, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the method according to the first aspect;

[0022] At least one I / O interface is connected between the processor and the memory and is configured to implement information interaction between the processor and the memory.

[0023] A fifth aspect of the present disclosure provides a computer-readable medium having a computer program stored thereon, wherein when the program is executed by a processor, the method according to the first aspect is implemented.

[0024] The present disclosure has the following advantages:

[0025] In the delay analysis method, the external data representations collected by each single interface during the VoNR call process are synthesized into a single full-process external data representation according to the signaling interrelationship, and delay analysis is performed based on the single full-process external data representation, so that the analysis results can be targeted at the data of the entire call process, not just a certain domain or a certain port, and the analysis results obtained are comprehensive. Moreover, the analysis method based on the single full-process external data representation of the entire call process is more conducive to optimizing the signaling association processing logic and improving the analysis efficiency and accuracy compared to the single-interface analysis method that can only analyze the delay of a single interface. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A schematic diagram of a delay analysis method provided in an embodiment of the present disclosure;

[0027] Figure 2 A dotted schematic diagram for segmented delay analysis provided in an embodiment of the present disclosure;

[0028] Figure 3 A schematic diagram of an example of a delay statistics method provided in an embodiment of the present disclosure;

[0029] Figure 4a A dotted diagram for slice delay analysis provided in an embodiment of the present disclosure;

[0030] Figure 4b A schematic diagram of calculating T0_7 delay in an embodiment of the present disclosure;

[0031] Figure 4c This is a schematic diagram of IMS internal consumption delay in an embodiment of the present disclosure;

[0032] Figure 4d This is a schematic diagram of counting T9_10 delay in an embodiment of the present disclosure;

[0033] Figure 4e A schematic diagram of counting T10_11 delay in an embodiment of the present disclosure;

[0034] Figure 4fA comparative schematic diagram of the average delay of call origination within a period of time in an embodiment of the present disclosure;

[0035] Figure 4g This is a schematic diagram of the connection delay in the embodiment of the present disclosure;

[0036] Figure 4h This is a schematic diagram of data recording related to the invite message in an embodiment of the present disclosure;

[0037] Figure 4i This is another schematic diagram of data recording related to an invite message in an embodiment of the present disclosure;

[0038] Figure 4j This is a schematic diagram of the average delay change of invite messages over a period of time in an embodiment of the present disclosure;

[0039] Figure 4k This is a schematic diagram of the invite message transmission process in an embodiment of the present disclosure;

[0040] Figure 5 A schematic diagram of a time delay analysis system architecture provided in an embodiment of the present disclosure;

[0041] Figure 6 A schematic diagram of another system architecture for delay analysis provided in an embodiment of the present disclosure;

[0042] Figure 7 A schematic diagram of the structure of a time delay analysis device provided in an embodiment of the present disclosure;

[0043] Figure 8 A schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.

[0045] As used in this disclosure, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0046] The terms used in the present disclosure are only used to describe specific embodiments and are not intended to limit the present disclosure.As used in the present disclosure, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0047] When the terms “comprising” and / or “made of…” are used in the present disclosure, it specifies the existence of the stated features, integers, steps, operations, elements and / or components, but does not exclude the existence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0048] Unless otherwise defined, all terms (including technical and scientific terms) used in this disclosure have the same meaning as those commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning unless explicitly defined in this disclosure.

[0049] The application scenario involved in the embodiments of the present disclosure is the 5G VoNR service, which is an ultra-clear video call application in the 5G era. Major communication operators have successively supported VoNR related functions and opened related services. It is a call service that only requires a 5G network to complete. 5G VoNR voice calls require horizontal collaboration between the 5G network and the IMS network, involving multiple network elements such as UE, eNB, gNB, EPC, 5GC, IMS, and bearer network, and vertically includes the interaction between the control plane and the user plane.

[0050] A delay analysis method is provided in an embodiment of the present disclosure, and the method can be applied to any electronic device, which can be a terminal or a server, and the electronic device can obtain the external data representation (External Data Representation, XDR) collected by each single interface during the VoNR call process. XDR is a general term for call detail record (CDR), transaction detail record (TDR), and service detail record (SDR).

[0051] Figure 1 The figure is a schematic diagram of the delay analysis method provided by the embodiment of the present disclosure, and the delay analysis method mainly includes the following steps:

[0052] Step 101, obtaining external data representation collected by each single interface during the VoNR call process.

[0053] Step 102, synthesize the external data representations collected by each of the single interfaces according to the signaling interrelationships to obtain a single full-process external data representation.

[0054] In some embodiments, the external data representations collected by each of the single interfaces are synthesized according to the mutual correlation of signaling to obtain a single full-process external data representation, including: obtaining the voice trigger scenario corresponding to the VoNR call process; according to the signaling process of the voice trigger scenario in each domain and the signaling in the external data representation collected by the single interface, the external data representations collected by each of the single interfaces are concatenated to obtain a single full-process external data representation.

[0055] Among them, the full-process external data representation can connect the external data representations of each domain in the entire call process, which can more comprehensively reflect the situation of the entire call process, improve the efficiency of data synthesis, and optimize the signaling association processing logic, thereby improving the efficiency and accuracy of multiple links such as data analysis and network element positioning.

[0056] Step 103, performing a delay analysis on the single full-process external data representation to obtain an analysis result.

[0057] In some embodiments, the analysis results include at least one of the following:

[0058] A first delay analysis result, wherein the first delay analysis result is obtained by segmenting the single full-process external data representation and performing delay analysis on each segment;

[0059] The second delay analysis result is obtained by analyzing the network element based on the single full-process external data representation.

[0060] In some embodiments, the delay analysis of the single full-process external data representation is performed to obtain the analysis result, including: performing a first dot mark on the first key signaling in the VoNR call process; dividing the VoNR call process into at least one segment according to the first dot mark; determining the delay of each segment and the delay of the network element in each segment according to the data corresponding to each segment in the single full-process external data representation; determining the first delay analysis result according to the delay of each segment and the delay of the network element in each segment.

[0061] Among them, the delay situation of the network element in the first delay analysis result includes the delay value from the first signaling to the second signaling in the segment; the first signaling is the signaling entering the network element in the segment, and the second signaling is the signaling outputting the network element in the segment; or, the first signaling is the signaling outputting the network element in the segment, and the second signaling is the signaling entering the network element in the segment.

[0062] In some embodiments, the at least one segment includes at least one of the following segments:

[0063] The segment corresponding to the caller dedicated bearer establishment phase;

[0064] The segment corresponding to the value-added service triggering stage;

[0065] The segment corresponding to the called party's paging phase;

[0066] The segment corresponding to the call control stage.

[0067] In some embodiments, the segment corresponding to the calling dedicated bearer establishment phase may be further divided into at least one segment formed with at least one target network element in the calling dedicated bearer establishment phase as a segment boundary;

[0068] The segment corresponding to the value-added service triggering phase may be further divided into at least one segment formed with at least one target network element in the value-added service triggering phase as a segment boundary;

[0069] The segment corresponding to the called paging phase may be further divided into at least one segment formed with at least one target network element in the called paging phase as a segment boundary;

[0070] The segment corresponding to the call control stage may be further divided into at least one segment formed by taking at least one target network element in the call control stage as a segment boundary.

[0071] Among them, the call process is segmented according to four stages or network elements, and refined to each stage and each network element (for example, in some scenarios, the call process involves more than 60 network elements). It can accurately analyze the delay of each segment, and can more comprehensively and accurately analyze the delay of each process, laying a solid foundation for problem location after delay analysis, so that the problem segment or problem network element can be directly located. For example, through segment delay analysis, it is possible to further focus on scenarios such as slow paging response, high delay caused by caller video dedicated carrier negotiation scenario, slow invite message forwarding delay, etc., thereby providing a basis for targeted solution to delay problems.

[0072] In an exemplary embodiment, the first key signaling mark is performed on the VoNR full-process message, and the time difference between each signaling mark is counted respectively. The abnormal network element is judged based on the time it takes for each network element to process the service. This method can count the time consumed by the base station (gNB) / session border controller (SBC) / user plane function (PCF) / access and mobility management function (AMF) / session management function (SMF) to process various services. If an abnormally high segment delay is found, optimization can be carried out in terms of characteristics, parameters, processes, etc. Figure 2 The figure shows a dotted diagram for segmented delay analysis. 0-17 is the first key signaling marked by dots. The entire call process is divided into four stages, namely stage 1-caller dedicated bearer establishment stage, stage 2-value-added service triggering stage, stage 3-called party paging stage, and stage 4-call control stage, which is convenient for stage-by-stage delay analysis and problem root cause location. Figure 2 For the dotting situation shown, the relevant calculation formulas, dotting positions, delimiting network elements and delimiting instructions for segment delay analysis can be found in Table 1.

[0073] Table 1

[0074]

[0075]

[0076] In some embodiments, the delay analysis of the single full-process external data representation is performed to obtain the analysis result, including: obtaining the voice trigger scenario corresponding to the single full-process external data representation; obtaining the delay reference value of each network element corresponding to the voice trigger scenario through a mapping relationship, and the mapping relationship includes the voice trigger scenario and the delay reference value of the corresponding network element; performing a second dot mark on the second key signaling in the VoNR call process, and the second key signaling includes the input signaling and output signaling of each network element; determining the delay value of each network element according to the second key signaling; and determining the second delay analysis result according to the delay reference value of each network element and the delay value of each network element.

[0077] In some embodiments, the delay value of the network element used to determine the second delay analysis result refers to the delay value between the signaling input port of the network element to the signaling output port of the network element, that is, the delay value from a port belonging to the same network element to another port.

[0078] Among them, the end-to-end 5G voice VoNR service is the entire loop that starts from the terminal, reaches the service platform and returns the result to the terminal. This loop includes the terminal, base station, EPC, IMS, 5GC and the bearer equipment connecting each network element. Any problem in the end-to-end loop will lead to a decline in the 5G voice user experience. Here, the delay analysis is refined to the network element, so that the analysis results can accurately locate the problem network element, providing an important reference for subsequent use and maintenance. This analysis method can also be called the slice delay analysis method.

[0079] In some embodiments, before obtaining the delay reference value of each network element corresponding to the voice trigger scenario through a mapping relationship, the method also includes: obtaining a large data set, the large data set including external data representations of VoNR calls of various voice trigger scenarios collected historically; performing voice analysis on the external data representation of each voice trigger scenario in the large data set respectively to obtain the delay reference value of each network element in the corresponding voice trigger scenario; and establishing a mapping relationship between the voice trigger scenario and the delay reference value of each network element.

[0080] In the exemplary embodiment, VoNR calls pass through many network elements, and the segmented delay analysis can roughly define the delay. If it is necessary to measure the degree of impact of the services of the application server (AS) triggered in all call scenarios on the overall delay, statistics based on delay slices (i.e., network elements) between different interfaces of the calling and called parties are introduced, namely, sliced ​​delay analysis, which facilitates insights into the processing delay of signaling events by network elements and further discovers the root cause of delay fluctuations or deterioration.

[0081] The implementation principle of the fragmentation delay analysis method is: the second key signaling mark is performed on the VoNR full process message, and the fragmentation delay from the invite message to the 180 message on each interface is counted respectively. This method is based on the invite routing message for comparison. Similarly, statistics can also be made according to the 183, update and other messages to 180. Figure 3 The figure shows an example of a delay statistics method, where time A minus time B is the delay of the AS in processing services.

[0082] In the slicing delay analysis method, through macro big data comparison and multi-dimensional combination, the delay parameter value of the network element in each triggering scenario is formed, that is, the normal baseline value of the network element delay. Through comparison, individual network elements that deviate abnormally from the baseline value are found for analysis and demarcation. This method can realize the statistics of the time consumed by various services such as SBC / SCSCF / SCC AS / MMTEL AS / color printing AS / color ringback tone AS / and multi-number AS / other AS / SCP AS. If abnormally high network element delay is found, optimization can be carried out from the aspects of characteristics, parameters, and processes.

[0083] Figure 4a The figure shows a schematic diagram of dotting for slicing delay analysis, where the arrows refer to the signaling transmitted through the port, and the dotted signaling is the signaling transmitted through the port between network elements. The calculation indicators, calculation formulas, dotting positions, delimited network elements, delimited instructions and parameter values ​​for slicing delay analysis based on the dotted signaling can be found in Table 2.

[0084] Table 2

[0085]

[0086]

[0087]

[0088]

[0089] In the disclosed embodiment, in the delay analysis method, the external data representations collected by each single interface during the VoNR call process are synthesized into a single full-process external data representation according to the signaling interrelationships, and delay analysis is performed based on the single full-process external data representation, so that the analysis results can be targeted at the data of the entire call process, not just a certain domain or a certain port, and the obtained analysis results are comprehensive. Moreover, the analysis method based on the single full-process external data representation of the entire call process is beneficial to optimizing the signaling association processing logic and improving the analysis efficiency and accuracy compared to the single interface analysis method.

[0090] A certain region adopted the delay analysis method provided by the embodiment of the present disclosure, and carried out tracking analysis on various types of scenarios involved in the new method for evaluating 5G voice VoNR call delay. 100,000 calls were sampled as analysis samples every month, and statistics showed that the average delimitation time for 3 months was 34.07 minutes, with an accuracy rate of 97.89%, both of which achieved the goals.

[0091] In an exemplary embodiment, after segmenting the end-to-end connection delay of 5G voice VoNR, the following combined analysis methods can be used to discover the problem of excessive delay and improve user perception: 1. Delay segmentation and slice delay comparison method: statistics on the delay of each segment and slice through the centralized performance platform of each province, and compare the difference analysis with the reference delay value to find out the nodes that can be optimized; 2. Horizontal comparison method of segment delay in different cities: extract segment delay data of various cities through the centralized performance platform, and compare the delay differences between different networks and different manufacturers; 3. Ultra-long delay analysis method: extract ultra-long delay call details through the signaling platform of each province, compare the difference analysis with the reference delay value, and find out the common problems from point to surface. Table 3 shows the segment delay analysis of Province H.

[0092] Table 3

[0093]

[0094]

[0095] Based on the delay analysis of each segment in Table 3, the delay analysis is further conducted from four stages: the calling party dedicated bearer establishment stage, the value-added service triggering stage, the called party paging stage, and the call control stage, as follows:

[0096] (1) The calling party’s dedicated carrier establishment phase

[0097] Figure 4b To show the schematic diagram of T0_7 latency statistics, the latency in QHD, CD, and TS is relatively long, at 263ms, 248ms, and 240ms, respectively. The following results are obtained by analyzing the segmented latency in these areas:

[0098] The T3_4 latency of QHD is 87ms, which is 44ms higher than the best in the market, and needs to be optimized on the wireless side;

[0099] The T2_3 latency of CD is 57ms, which is 24ms higher than the best in the city. The core network needs to be optimized and AMF and SMF need to be checked. The T5_6 latency is 63ms, which is 39ms higher than the best in the city. The core network needs to be optimized and PCRF needs to be checked.

[0100] The T3_4 latency of TS is 66ms, which is 22ms higher than the best performance in the city, and requires optimization on the wireless side.

[0101] (2) Value-added service triggering stage

[0102] IMS consumption delay = T7_16-T8_15. According to this formula, the delay statistics consumed by each city in IMS can be obtained. Figure 4c shown.

[0103] It is impossible to determine the extent to which the services triggered by the AS in all call scenarios affect the overall latency. Therefore, by dividing the slices according to the different interfaces of the calling and called parties, we can gain insight into the processing latency of the network elements for signaling events and further discover the cause of latency fluctuation or deterioration. The latency statistics of the slices are shown in Table 4.

[0104] Table 4

[0105]

[0106]

[0107] The following conclusions are drawn from the analysis of the fragmentation delay statistics:

[0108] The SCPAS delay of LF and CZ is longer than that of other cities, about 200ms higher than that of better cities, and further investigation is needed;

[0109] The AS delay of QHD, ZJK, and BD video ringtones is longer than that of other cities, about 60ms higher than that of better cities, and needs further investigation;

[0110] The SJZ color printing AS delay is longer than that of other cities and requires further investigation. It is about 60ms higher than that of better cities.

[0111] (3) The called party's paging phase

[0112] Figure 4d The schematic diagram of T9_10 delay statistics shows that the delays of XT, BD, SJZ, TS, and ZJK are relatively large, and the delay of the called party's response 183 is relatively long, all exceeding 450ms, which requires optimization on the wireless side.

[0113] (4) Call Control Phase

[0114] Figure 4e To show the schematic diagram of T10_11 latency, the LF latency is significantly higher than that of other cities, requiring core network SBC optimization.

[0115] In summary, based on the end-to-end analysis method of call connection delay based on segment delay and slice delay, a special analysis of the province's delay is carried out, and the wireless side and core network are optimized in a targeted manner:

[0116] The key optimization targets on the wireless side are: the delays of QHD and CD in establishing dedicated carriers are relatively long, at 278ms and 270ms respectively, 50ms higher than the provincial average of 220ms; the paging delays of XA, TS, and BD are relatively long, at 626ms, 572ms, and 551ms respectively, higher than the provincial average of 460ms; from the perspective of wireless cells, according to certain quality difference rules, a total of 101 poor quality cells were selected and further investigation and optimization on the wireless side was required;

[0117] The key optimization targets of the core network are: the latency consumed when the LF virtualized network PSBC forwards the 183 message is about 30ms higher than that of other cities. After investigation, it is found that this is caused by the virtualization CU separation of equipment in other regions. After discussion, the equipment manufacturers are required to evaluate and verify the feasibility of PSBC forwarding 183 and media resource reservation serial to parallel; the average number of ASs triggered by ZJK and XT is higher than that of other cities, resulting in a larger latency consumed in the IMS domain. After discussion, the evaluation will be carried out after the big data platform completes the AS list configuration;

[0118] We regularly conduct segmented and sliced ​​delay analysis, as well as topN poor-quality cells and poor-quality terminals analysis. We also add new features such as the VoLTE AS fast forwarding function pilot, which reduces the VoNR connection delay of the corresponding equipment by 100ms, and optimizes the joint wireless side paging and dedicated bearer establishment phase. The H-province delay has been comprehensively improved. Figure 4f A comparative diagram of the average delay of call origination within a period of time.

[0119] In an exemplary embodiment, through the analysis of big data segmentation delay and ultra-long delay, it is found that 5G new media will not respond for a long time under abnormal media resource scheduling conditions, and there will be a probability of ultra-long connection delay, which affects user perception. At present, the problem of ultra-long delay is circumvented by modifying the 5G new media timeout timer from the previous 5-second timeout to 1-second timeout. Detect abnormal problems of the 5G new media platform before customer complaints, and improve user perception.

[0120] Figure 4g The following is a schematic diagram of the call connection delay. During the call connection process, SCSCF needs to trigger multiple AS platforms according to the user's contract. The AS fragmentation delay function filters out the scenarios that trigger the 5G multimedia platform and generates an extremely long delay.

[0121] The 5G new media platform changes the timeout timer from 5 seconds to 1 second. Even if there is a resource scheduling anomaly, the platform will return a response within 1 second to avoid excessive delays. According to statistics from the big data platform, after the timer was modified, the 5G new media platform's processing delay for invite messages dropped by 20ms.

[0122] In the early morning of July 30, the 5G new media platform changed the timeout timer from 5 seconds to 1 second. Even if there is an abnormality in resource scheduling, the platform will return a response within 1 second to avoid excessive delays. According to statistics from the big data platform, after the timer was changed in the early morning of July 30, the delay of the 5G new media platform in processing invite messages decreased by 20ms. Figure 4h shown.

[0123] From the ultra-long latency signaling obtained, we can see that it takes more than 3 seconds for the 5G multimedia platform to receive the invite message and return the response. Figure 4i shown.

[0124] We contacted the 5G multimedia platform of a competitor and found that according to the packet capture signaling, the 5G multimedia platform would have a probability of abnormal resource scheduling, resulting in a long period of unresponsiveness on the platform side. We temporarily circumvented this problem by adjusting the timeout timer. In the early morning of July 30, the 5G new media platform of a competitor adjusted the timeout timer from 5 seconds to 1 second. Statistics show that the average delay of the 5G new media platform in processing invite messages decreased by 25ms. Figure 4j shown.

[0125] In an exemplary embodiment, a multi-dimensional analysis is performed using the 5G voice big data platform to sort the absolute time of INVITE transmission between the calling and called MW ports from large to small and analyze the call records. It is found that the AS network element SC-SCP09 has a problem of excessive delay in forwarding INVITE messages.

[0126] Case 1: The call delay of this session is about 5.4 seconds, while the INVITE forwarding delay is 2.1 seconds, accounting for 39% of the total delay (the normal proportion is about 10%). The proportion of INVITE forwarding delay is too high.

[0127] Signaling traceback analysis shows that after the INVITE is transmitted to the AS network element SC-SCP09, about 2.1 seconds later, the network element forwards the INVITE to the called party, resulting in excessive latency. Figure 4k shown.

[0128] Case 2: Signaling traceback analysis shows that after the INVITE is transmitted to the AS network element SC-SCP09, about 3.4 seconds later, the network element forwards the INVITE to the called party, resulting in excessive latency.

[0129] Case 3: For the ISC port, the source network element is I / CSCF, and the number of filtered calls is greater than 100,000. The latency of the destination network element is statistically analyzed, and the overall latency of AS network element SC-SCP09 is relatively high. The core network locates that SCP09 is overloaded, and will start capacity expansion to solve the problem of high INVITE forwarding latency.

[0130] The step division of the above various methods is only for clear description. When implemented, they can be combined into one step or some steps can be split and decomposed into multiple steps. As long as they include the same logical relationship, they are all within the protection scope of this disclosure. Adding insignificant modifications to the algorithm or process or introducing insignificant designs without changing the core design of the algorithm and process are all within the protection scope of this disclosure.

[0131] The present disclosure also provides a time delay analysis system. Figure 5 and Figure 6 The following is a schematic diagram of the system architecture. The system mainly includes:

[0132] The collection device 501 is used to obtain the external data representation collected by each single interface during the new air interface carrying voice VoNR call;

[0133] A synthesis device 502, used to synthesize the external data representations collected by each of the single interfaces according to the signaling interrelationship to obtain a single full-process external data representation;

[0134] The analysis device 503 is used to perform delay analysis on the single full-process external data representation to obtain an analysis result.

[0135] In some embodiments, the synthesis device 502 includes a storage sub-device 5021 and a multi-domain association sub-device 5022;

[0136] The storage sub-device 5021 is used to store the external data representations collected by each single interface and transmitted by the collection device;

[0137] The multi-domain association sub-device 5022 is used to obtain the external data representation collected by the single interface corresponding to the VoNR call process from the storage sub-device, and concatenate the external data representations collected by each single interface to obtain a single full-process external data representation.

[0138] In some embodiments, the system further includes a display device 504 for displaying a human-computer interaction interface of the analysis device, and displaying the analysis result of the analysis device through the human-computer interaction interface.

[0139] In the exemplary embodiment, the acquisition device 501 is specifically used to decode, check, clean, convert and pre-process the external data representations collected by each single interface and save them to the storage sub-device. The acquisition device processes the original signaling or code stream transmitted through a single interface into a single-interface XDR.

[0140] In an exemplary embodiment, the storage sub-device 5021 includes a relational database module, a real-time processing module and a big data platform, wherein the big data platform includes spark, hive, HASE, HDFS, etc. The big data platform helps to collect, store, process and analyze massive amounts of data.

[0141] In an exemplary embodiment, the multi-domain association sub-device 5022 formulates different multi-domain association logics according to various call scenarios of 5G to adapt a single full-process external data representation. The multiple domains include IP multimedia subsystem (IMS) domain, 5G core network (5GC) domain, 4G core network (EPC) domain, circuit switching (CS) domain, etc.

[0142] In an exemplary embodiment, the display device 504 is used to display the analysis results and draw performance conclusions on the analysis results according to the analysis logic. For example, the display device 504 performs slice delimitation presentation, plug-in call, swim lane diagram presentation, slice performance evaluation, interface call arrangement, etc. in the human-computer interaction interface.

[0143] A delay analysis device is provided in an embodiment of the present disclosure. The specific implementation of the device can refer to the relevant description of the method embodiment, which will not be repeated here. Figure 7 The schematic diagram of the structure of the device is shown, which mainly includes:

[0144] The acquisition module 701 is used to obtain the external data representation collected by each single interface during the new air interface carrying voice VoNR call;

[0145] A synthesis module 702, configured to synthesize the external data representations collected by the single interfaces according to the signaling interrelationships to obtain a single full-process external data representation;

[0146] The analysis module 703 is used to perform a time delay analysis on the single full-process external data representation to obtain an analysis result.

[0147] The functions or modules included in the device provided in the embodiments of the present disclosure can be used to execute the method described in the method embodiments. The specific implementation and technical effects thereof can be referred to the description of the method embodiments above, and will not be described again here for the sake of brevity.

[0148] It should be noted that all modules involved in this embodiment are logic modules. In practical applications, a logic unit may be a physical unit, or a part of a physical unit, or may be implemented as a combination of multiple physical units. In addition, in order to highlight the innovative part of the present disclosure, this embodiment does not introduce units that are not closely related to solving the technical problems proposed by the present disclosure, but this does not mean that there are no other units in this embodiment.

[0149] Reference Figure 8, an embodiment of the present disclosure provides an electronic device, comprising:

[0150] at least one processor 801;

[0151] A memory 802 having at least one program stored thereon, and when the at least one program is executed by the at least one processor, the at least one processor implements the above method;

[0152] At least one I / O interface 803 is connected between the processor and the memory and is configured to implement information exchange between the processor and the memory.

[0153] Among them, the processor 801 is a device with data processing capabilities, including but not limited to a central processing unit (CPU); the memory 802 is a device with data storage capabilities, including but not limited to random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory (FLASH); the I / O interface (read-write interface) 803 is connected between the processor 801 and the memory 802, and can realize information interaction between the processor 801 and the memory 802, including but not limited to a data bus (Bus), etc.

[0154] In some embodiments, the processor 801 , the memory 802 , and the I / O interface 803 are connected to each other via a bus, and further connected to other components of the computing device.

[0155] This embodiment further provides a computer-readable medium on which a computer program is stored. When the program is executed by a processor, the method provided in this embodiment is implemented. To avoid repeated description, the specific steps of the method are not repeated here.

[0156] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods applied for above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0157] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0158] Those skilled in the art will understand that although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features from different embodiments is meant to be within the scope of the present embodiment and to form different embodiments.

[0159] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A delay analysis method, characterized in that: include: Obtain the external data representation collected by each single interface during the new air interface carrying voice VoNR call; The external data representations collected by each single interface are synthesized according to the signaling interrelationship to obtain a single full-process external data representation; Perform a time delay analysis on the single full-process external data representation to obtain an analysis result.

2. The method according to claim 1, characterized in that The analysis results include at least one of the following: A first delay analysis result, wherein the first delay analysis result is obtained by segmenting the single full-process external data representation and performing delay analysis on each segment; The second delay analysis result is obtained by analyzing the network element based on the single full-process external data representation.

3. The method according to claim 2, characterized in that The performing delay analysis on the single full-process external data representation to obtain the analysis result includes: Performing a first dot marking on the first key signaling in the VoNR call process; Dividing the VoNR call process into at least one segment according to the first dot mark; Determine the delay of each segment and the delay of the network element in each segment according to the data corresponding to each segment in the single full-process external data representation; The first delay analysis result is determined according to the delay conditions of each segment and the delay conditions of the network elements in each segment.

4. The method according to claim 3, characterized in that The at least one segment includes at least one of the following segments: The segment corresponding to the caller dedicated bearer establishment phase; The segment corresponding to the value-added service triggering stage; The segment corresponding to the called party's paging phase; The segment corresponding to the call control stage.

5. The method according to claim 2, characterized in that: The performing delay analysis on the single full-process external data representation to obtain the analysis result includes: Acquire the voice triggering scenario corresponding to the single full-process external data representation; Obtaining a delay reference value of each network element corresponding to the voice triggering scenario through a mapping relationship, wherein the mapping relationship includes a voice triggering scenario and a delay reference value of a corresponding network element; Performing a second dot marking on the second key signaling in the VoNR call process, where the second key signaling includes input signaling and output signaling of each of the network elements; Determining a delay value of each of the network elements according to the second key signaling; A second delay analysis result is determined according to the delay reference value of each network element and the delay value of each network element.

6. The method according to claim 5, characterized in that Before acquiring the delay reference value of each network element corresponding to the voice triggering scenario through the mapping relationship, the method further includes: Acquire a large data set, wherein the large data set includes external data representations of VoNR call processes of various voice triggering scenarios collected historically; Performing voice analysis on the external data representation of each voice triggering scenario in the big data set respectively, to obtain a delay reference value of each network element in the corresponding voice triggering scenario; A mapping relationship between the voice triggering scenario and the delay reference value of each network element is established.

7. The method according to claim 1, characterized in that The external data representations collected by each single interface are synthesized according to the signaling interrelationship to obtain a single full-process external data representation, including: Obtaining the voice triggering scenario corresponding to the VoNR call process; According to the signaling process of the voice trigger scenario in each domain and the signaling in the external data representation collected by the single interface, the external data representations collected by each single interface are concatenated to obtain a single full-process external data representation.

8. A time delay analysis system, characterized in that: include: A collection device, used to obtain external data representation collected by each single interface during a new air interface carrying voice VoNR call; A synthesis device, used to synthesize the external data representations collected by each of the single interfaces according to the signaling interrelationship to obtain a single full-process external data representation; The analysis device is used to perform delay analysis on the single full-process external data representation to obtain analysis results.

9. The system according to claim 8, characterized in that The synthesis device includes a storage sub-device and a multi-domain association sub-device; The storage sub-device is used to store the external data representations collected by each single interface and transmitted by the collection device; The multi-domain association sub-device is used to obtain the external data representation collected by the single interface corresponding to the VoNR call process from the storage sub-device, and concatenate the external data representations collected by each single interface to obtain a single full-process external data representation.

10. A time delay analysis device, characterized in that: include: An acquisition module is used to obtain external data representation collected by each single interface during a new air interface carrying voice VoNR call; A synthesis module, used to synthesize the external data representations collected by each of the single interfaces according to the signaling interrelationships to obtain a single full-process external data representation; The analysis module is used to perform delay analysis on the single full-process external data representation to obtain analysis results.

11. An electronic device, characterized in that: include: at least one processor; A memory having at least one program stored thereon, wherein when the at least one program is executed by the at least one processor, the at least one processor implements the method according to any one of claims 1 to 7; At least one I / O interface is connected between the processor and the memory and is configured to implement information interaction between the processor and the memory.

12. A computer readable medium having a computer program stored thereon, wherein when the program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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