Semiconductor light-emitting element and method for manufacturing semiconductor light-emitting element

Abstract

Provided is a semiconductor light-emitting element having better light-emitting characteristics than conventional light-emitting elements. This semiconductor light-emitting element is provided with a light-emitting layer having a laminate in which a first group III-V compound semiconductor layer and a second group III-V compound semiconductor layer are repeatedly laminated, the group III element in the first group III-V compound semiconductor layer and the second group III-V compound semiconductor layer is one or more elements selected from the group consisting of Al, Ga, and In, and the group V element in the first group III-V compound semiconductor layer and the second group III-V compound semiconductor layer is one or more elements selected from the group consisting of As, Sb, and P. The difference between the composition wavelength of the first group III-V compound semiconductor layer and the composition wavelength of the second group III-V compound semiconductor layer is 70 nm or more, the well depth (Dc) on the conduction band side in the energy band structure of the laminate is greater than the well depth (Dv) on the valence band side, and Dc / (Dc + Dv) is 65% or more.

Description

Technical Field

[0001] The present invention relates to a semiconductor light emitting element and a method for manufacturing the semiconductor light emitting element. Background Art

[0002] As the semiconductor material of the semiconductor layer in the semiconductor light-emitting element, III-V compound semiconductors such as InGaAsP, InGaAlAs, and InAsSbP are used. By adjusting the composition ratio of the light-emitting layer formed by the III-V compound semiconductor material, the light-emitting wavelength of the semiconductor light-emitting element can be widely adjusted between green and infrared. For example, if the infrared light-emitting semiconductor light-emitting element has a wavelength of more than 750nm as the infrared region as the light-emitting wavelength, it can be widely used in sensors, gas analysis, monitoring cameras, communications, etc.

[0003] Patent document 1 describes a semiconductor light-emitting element, which has a light-emitting layer, wherein the light-emitting layer has a stacked structure obtained by repeatedly stacking a first III-V compound semiconductor layer and a second III-V compound semiconductor layer having different composition ratios, wherein the difference in composition wavelength between the first III-V compound semiconductor layer and the second III-V compound semiconductor layer is less than 50 nm, and the ratio of the lattice constant difference between the lattice constant of the first III-V compound semiconductor layer and the lattice constant of the second III-V compound semiconductor layer is greater than 0.05% and less than 0.60%.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2020-109817 Summary of the invention

[0007] Problem that the invention aims to solve

[0008] In recent years, further improvement of the luminous efficiency of light-emitting elements has been sought. The present inventors have conducted research to further improve the luminous efficiency compared with the structure of Patent Document 1.

[0009] In addition, in sensors such as wearable devices used at wavelengths of 1300nm to 2200nm, and gas analysis applications such as carbon dioxide used at wavelengths of 2600nm to 4700nm, it is preferred that the half-value width of the luminescence peak in the luminescence spectrum is narrow due to the use of a specific wavelength. In semiconductor light-emitting elements, both high luminescence output power and half-value width (FWHM) of the luminescence peak are sought to have good luminescence characteristics. Therefore, the object of the present invention is to obtain a semiconductor light-emitting element with better luminescence characteristics than conventional light-emitting elements.

[0010] Solutions for solving problems

[0011] The present inventors have conducted intensive studies to achieve the above-mentioned objects, and as a result, have completed the following invention.

[0012] That is, the gist of the present invention is as follows.

[0013] (1) A semiconductor light emitting device, characterized in that it comprises a light emitting layer, wherein the light emitting layer comprises a stacked body obtained by repeatedly stacking a first Group III-V compound semiconductor layer and a second Group III-V compound semiconductor layer,

[0014] The Group III elements in the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are one or more selected from the group consisting of Al, Ga, and In.

[0015] The Group V elements in the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer are one or more selected from the group consisting of As, Sb, and P.

[0016] The difference in composition wavelength between the composition wavelength of the first III-V compound semiconductor layer and the composition wavelength of the second III-V compound semiconductor layer is 70 nm or more,

[0017] The well depth (Dc) on the conduction band side in the energy band structure of the aforementioned stack is greater than the well depth (Dv) on the valence band side, and the ratio of the well depth (Dc) on the conduction band side formed due to the aforementioned component wavelength difference to the sum of the well depth (Dc) on the conduction band side and the well depth (Dv) of the aforementioned valence band (Dc / (Dc+Dv)) is greater than 65%.

[0018] (2) A semiconductor light-emitting element according to (1) above, wherein the value obtained by dividing the absolute value of the difference between the lattice constant of the first III-V compound semiconductor layer and the lattice constant of the second III-V compound semiconductor layer by the average value of the two lattice constants is greater than 0.10% and less than 0.40%.

[0019] (3) The semiconductor light emitting device according to (1) or (2), wherein the well depth (Dv) on the valence band side is 0.11 eV or less.

[0020] (4) A semiconductor light-emitting element according to any one of (1) to (3) above, wherein the Group V element in the first Group III-V compound semiconductor layer and the second Group III-V compound semiconductor layer is one selected from the group consisting of As, Sb, and P.

[0021] (5) The semiconductor light-emitting device according to any one of (1) to (4) above, wherein the compositional wavelength difference between the compositional wavelength of the first III-V compound semiconductor layer and the compositional wavelength of the second III-V compound semiconductor layer is 100 nm or more and 290 nm or less.

[0022] (6) A method for manufacturing a semiconductor light-emitting device, which is a method for manufacturing the semiconductor light-emitting device according to any one of (1) to (5) above,

[0023] The manufacturing method includes a light-emitting layer forming step of forming the light-emitting layer,

[0024] The light-emitting layer forming step forms the laminate by repeatedly performing a first step of forming the first III-V compound semiconductor layer and a second step of forming the second III-V compound semiconductor layer.

[0025] Effects of the Invention

[0026] According to the present invention, a semiconductor light-emitting device having good light-emitting characteristics and a method for manufacturing the same can be provided as compared with conventional light-emitting devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a diagram showing an example of the energy band structure in the light-emitting layer of the present embodiment calculated using simulation software.

[0028] Figure 2 is a schematic cross-sectional view showing one mode of the light-emitting layer in the semiconductor light-emitting device based on the present invention.

[0029] Figure 3 is a schematic cross-sectional view showing a semiconductor light-emitting device according to one embodiment of the present invention.

[0030] Figure 4 is a schematic cross-sectional view showing a manufacturing method of a semiconductor light-emitting device according to one embodiment of the present invention using a bonding method. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0031] Before describing the embodiments of the present invention, each definition in this specification will be described.

[0032] <III-V Compound Semiconductor Layer>

[0033] First, when simply referred to as "III-V compound semiconductor" in this specification, its composition is represented by the general formula: (In a Ga b Al c )(P x Asy Sb z Here, regarding the composition ratio of each element, the following relationship holds.

[0034] Regarding Group III elements, c=1-ab, 0≤a≤1, 0≤b≤1, 0≤c≤1.

[0035] Regarding group V elements, z=1-xy, 0≤x≤1, 0≤y≤1, 0≤z≤1.

[0036] The III-V compound semiconductor layer in the light-emitting layer of the present invention is composed of one or more III-group elements selected from the group consisting of Al, Ga, and In and one or more V-group elements selected from the group consisting of As, Sb, and P.

[0037] In addition, regarding the composition of the III-V compound semiconductor layer in the light-emitting layer composed of one or more III group elements selected from the group consisting of Al, Ga, and In and one V group element selected from the group consisting of As, Sb, and P, the composition ratios of the elements show the following relationship.

[0038] Regarding Group III elements, c=1-ab, 0≤a≤1, 0≤b≤1, 0≤c≤1.

[0039] For Group V elements, any one of x, y, and z is 1, and the other two are 0.

[0040] Furthermore, in the III-V compound semiconductor layer in the light-emitting layer, when there is one type of group V element, the group III element is preferably composed of two or more elements, and more preferably composed of three elements. The group V element of the III-V compound semiconductor layer in the light-emitting layer preferably includes at least As or Sb. If the total of the group III elements and the group V elements is less than three elements, when it is desired to obtain the desired light-emitting wavelength, the options for the combination of the first layer and the second layer that presents a composition ratio within the scope of the present invention are limited. Therefore, it is preferred that the group III elements and the group V elements in at least one of the first layer and the second layer use a total of four or more elements, and it is more preferred that both the first layer and the second layer use a total of four or more elements of the group III elements and the group V elements.

[0041] <Lattice constants based on composition>

[0042] The calculation of the lattice constant of the mixed crystal in this specification is explained. When the lattice constant exists in two directions, vertical (growth direction) and horizontal (in-plane direction) relative to the substrate plane, the value in the vertical direction is used in this specification. First, the simple lattice constant of the mixed crystal is calculated according to Feger's law. If the InGaAsP system (i.e., the general formula: (In aGa b )(P x As y )) is used as an example. When the composition ratio (solid ratio) is known, the physical property constant A abxy (Lattice constant based on Feger's law) Based on the physical property constants B of the four binary mixed crystals that form the basis of the pseudo-quaternary mixed crystal ax , B bx , B ay , B by (the lattice constant of the literature value in Table 1 below) and using the following formula <1> to calculate.

[0043] A abxy =a×x×B ax +b×x×B bx +a×y×B ay +b×y×B by … <1>

[0044] [Table 1]

[0045] Lattice constant [nm] <![CDATA[C 11 ]]> <![CDATA[C 12 ]]> InP 0.58688 10.22 5.76 GaP 0.54512 14.12 6.253 InAs 0.60584 8.329 4.526 GaAs 0.56533 11.88 5.38

[0046] Next, for the elastic constant C 11 , C 12 , and the above formula <1> The same operation is performed to calculate (In a Ga b )(P x As y ) of the elastic constant C 11abxy , C 12abxy .

[0047] Furthermore, if the lattice constant of the growth substrate is set to a s , then the following formula is applied considering the lattice deformation based on the elastic properties of semiconductor crystals <2> , the lattice constant a (in the vertical direction) after taking into account the lattice deformation can be calculated abxy .

[0048] a abxy =A abxy -2×(a s -A abxy )×C 12abxy / C 11abxy … <2>

[0049] Here, in this embodiment, since InP is used as the growth substrate, the lattice constant a of the growth substrate is s It is sufficient to use the lattice constant of InP.

[0050] In the case of a pseudo-ternary mixed crystal, if the general formula: (In a Ga bAl c )(As)) as an example, according to the following formula <3> , <4> The band gap Eg can be calculated abcy and the lattice constant A based on Feger's law abcy .

[0051] [Mathematical formula 1]

[0052]

[0053] A abcy =a×B ay +b×B by +c×B cy … <4>

[0054] It should be noted that even when the III-V compound semiconductor is a ternary system, a quinary system or a hexavalent system, the composition wavelength and the lattice constant can be obtained by transforming the formula according to the same idea as above. In addition, for a binary system, the values ​​described in the above literature can be used.

[0055] <Well Depth (Dc) on the Conduction Band Side and Well Depth (Dv) on the Valence Band Side Based on Composition, and Composition Wavelength>

[0056] The band structure was calculated by using simulation software (SiLENSe_Version 6.4) manufactured by STR Japan and inputting the value of the composition ratio of each layer in an initial setting state. Figure 1 The energy band structure in the light-emitting layer of this embodiment calculated using the simulation software is shown in the figure. The horizontal line near the center of the figure is the Fermi level. If the simulation software is used, while showing the energy band structure, the energy band gap Eg (eV) of each layer, the band gap difference between the barrier layer and the well layer on the conduction band side, i.e., the well depth (Dc, in eV), and the band gap difference between the barrier layer and the well layer on the valence band side, i.e., the well depth (Dv, in eV) are calculated. And, based on the energy band gap Eg, the following formula is calculated. <5> The wavelength λ to be converted indicates the component wavelength of each layer.

[0057] Eg=1239.8 / λ… <5>

[0058] <Thickness and composition of each layer>

[0059] In addition, the thickness of each formed layer as a whole can be measured using an optical interference film thickness measuring instrument. Furthermore, the thickness of each layer can be calculated based on cross-sectional observation of the growth layer using an optical interference film thickness measuring instrument and a transmission electron microscope. In addition, when the thickness of each layer is about several nm and is as small as that of a superlattice structure, TEM-EDS can be used to measure the thickness. Regarding the composition ratio (solid phase ratio) of each layer in this specification, the value obtained by SIMS analysis is used. Regarding the composition ratio (solid phase ratio) of each layer of the light-emitting layer in this specification, the value obtained by performing SIMS analysis (quadrupole type) along the thickness direction of the light-emitting layer after exposing the vicinity of the uppermost layer of the light-emitting layer by etching is used. It should be noted that for the SIMS analysis result, the average element concentration value in the half-thickness range of the central part of each layer in the thickness direction of each layer is used. During manufacturing, for a layer grown in the form of a single film, the solid phase ratio is calculated by using the value obtained by converting the lattice constant measured by XRD and the emission center wavelength measured by PL into Eg, thereby determining the growth conditions presenting the target composition ratio, and the layer with the target composition ratio can be stacked using these growth conditions.

[0060] <p-type, n-type, and i-type, and doping concentration>

[0061] In this specification, a layer that functions electrically as a p-type is referred to as a p-type layer, and a layer that functions electrically as an n-type is referred to as an n-type layer. On the other hand, when specific impurities such as Si, Zn, S, Sn, and Mg are not actively added and the layer does not function electrically as a p-type or an n-type, it is referred to as "i-type" or "undoped". The undoped III-V compound semiconductor layer may contain impurities that are inevitable during the manufacturing process. Specifically, when the doping concentration is low (for example, less than 7.6×10 15 atoms / cm 3 ), it is regarded as "undoped" in this specification. The values of the impurity concentrations of impurities such as Si, Zn, S, Sn, and Mg are based on SIMS analysis. Similarly, the values of the impurity concentrations ("doping concentrations") of the n-type dopants (for example, Si, S, Te, Sn, Ge, O, etc.) in the active layer are also based on SIMS analysis. It should be noted that near the boundary of each semiconductor layer, the value of the doping concentration changes significantly. Therefore, the value of the doping concentration at the center in the thickness direction is set as the doping concentration value of this layer.

[0062] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be noted that for the same component, the same reference numerals are generally used in principle, and repeated descriptions are omitted. In each figure, for the sake of convenience of explanation, the aspect ratio of the substrate and each layer is exaggerated compared to the actual ratio.

[0063] (Semiconductor light-emitting element)

[0064] Referring to the embodiment of the present invention Figure 2 . The semiconductor light-emitting element based on the present invention has a light-emitting layer 50, and the light-emitting layer 50 has a stacked body obtained by repeatedly stacking a first III-V compound semiconductor layer 51 and a second III-V compound semiconductor layer 52. The first III-V compound semiconductor layer 51 and the second III-V compound semiconductor layer 52 have different composition ratios. Hereinafter, the first III-V compound semiconductor layer 51 and the second III-V compound semiconductor layer 52 are respectively abbreviated as the first layer 51 and the second layer 52. In addition, in the semiconductor light-emitting element based on the present invention, the III group element in the first layer 51 and the second layer 52 is one or more selected from the group consisting of Al, Ga, and In, and the V group element in the first layer 51 and the second layer 52 is one or more selected from the group consisting of As, Sb, and P. Hereinafter, the case where the first layer 51 is a barrier layer and the second layer 52 is a well layer is described as an example.

[0065] Furthermore, the inventors discovered through experiments that in the present invention, by making the composition wavelength difference between the composition wavelength of the first layer 51 and the composition wavelength of the second layer 52 greater than 70 nm, the well depth (Dc) on the conduction band side formed due to the composition wavelength difference is greater than the well depth (Dv) on the valence band side, and the ratio of the well depth (Dc) on the conduction band side to the sum of the well depth (Dc) on the conduction band side and the well depth (Dv) on the valence band is greater than 65% in percentage (Dc / (Dc+Dv)), thereby improving the luminescence characteristics of the semiconductor light-emitting element compared to previous semiconductor light-emitting elements, and achieving at least one of an increase in the luminescence output power and a narrowing of the half-value width in the luminescence spectrum.

[0066] The reason why the light output power can be increased and the half-value width can be reduced by making the composition wavelength difference satisfy the above conditions and making the well depth (Dc) on the conduction band side greater than the well depth (Dv) on the valence band side in order to present the above conditions is still uncertain, and the inventors consider it as follows. It can be considered that: in patent document 1, a structure basically the same as a double heterojunction is made as a band structure, but the valence band is split due to the strain caused by the lattice constant difference, and an electron confinement effect similar to the quantum well structure is obtained. It can be considered that: in the present invention, the valence band can reduce the well depth (Dv) of the band structure and reduce the barrier height, and the valence band is split due to the strain caused by the lattice constant difference, and on the other hand, the conduction band side will increase the well depth (Dc). It can be considered that: in this way, by confining electrons / holes in different modes between the valence band and the conduction band, the efficiency of the quantum well structure can be improved.

[0067] As described above, the composition wavelength difference between the composition wavelength of the first III-V compound semiconductor layer and the composition wavelength of the second III-V compound semiconductor layer is 70 nm or more. The composition wavelength difference is preferably 600 nm or less. In addition, in order to improve the luminous efficiency, the composition wavelength difference is more preferably 100 nm or more and 290 nm or less.

[0068] The ratio of the well depth (Dc) on the conduction band side formed due to the difference in composition wavelength to the sum of the well depth (Dc) on the conduction band side and the well depth (Dv) of the valence band (Dc / (Dc+Dv)) is as described above, and is 65% or more in percentage. The well depth (Dv) on the valence band side is preferably less than 0.11eV, more preferably less than 0.08eV, and further preferably greater than 0.00eV and less than 0.05eV. It should be noted that the well depth (Dv) on the valence band side may be zero. The well depth (Dc) on the conduction band side is greater than the well depth (Dv) on the valence band side, and is preferably greater than 0.02eV, and more preferably greater than 0.04eV. The upper limit of the well depth (Dc) on the conduction band side is not particularly limited, and the upper limit value may be set to half the value of the band gap between the conduction band and the valence band of the barrier layer. It should be noted that when the well depth (Dv) on the valence band side is zero, the ratio of the sum of the well depth (Dc) on the conduction band side and the well depth (Dv) on the valence band is 100%, so the upper limit of the ratio (Dc / (Dc+Dv)) is 100% in principle. The upper limit of the ratio (Dc / (Dc+Dv)) is preferably 80% or less. The ratio (Dc / (Dc+Dv)) is more preferably 67 to 70%.

[0069] The value obtained by dividing the absolute value of the difference between the lattice constants of the first layer 51 and the lattice constant of the second layer 52 by the average value of the two lattice constants (hereinafter referred to as "lattice constant difference ratio") is preferably 0.10% or more and 0.40% or less in percentage. It is more preferably 0.10% or more and 0.38% or less. In order to increase the light output power, it is further preferably 0.20% or more.

[0070] The group V element in the first layer 51 and the second layer 52 is preferably one selected from the group consisting of As, Sb, and P, and more preferably As or Sb. By limiting the group V element to one, the diffusion phenomenon of the group V element at the boundary between the well layer and the barrier layer can be eliminated. By eliminating the diffusion area of ​​the group V, the boundary between the well layer and the barrier layer can be made steep, thereby amplifying the effect of the present invention.

[0071] Various changes can be made as long as they are within the scope of the present invention. For example, not only can the stack composed of the first layer 51 and the second layer 52 be throughout the entire quantum well structure as in the present embodiment, but the stack composed of the first layer 51 and the second layer 52 can also be a part of the quantum well structure and be combined with other stacks to set mountains and valleys in the energy band structure.

[0072] <Luminous Layer>

[0073] Hereinafter, details of each structure of the light emitting layer 50 in the embodiment of the present invention will be further described.

[0074] -Film thickness-

[0075] The overall film thickness of the light-emitting layer 50 is not limited, and can be set to, for example, 1 μm to 8 μm. In addition, the film thickness of each layer of the first layer 51 and the second layer 52 in the stack of the light-emitting layer 50 is also not limited, and can be set to, for example, about 1 nm or more and about 15 nm or less. The film thickness of each layer can be the same or different. In addition, the film thickness of each first layer 51 can be the same or different in the stack. The film thickness of each second layer 52 is also the same. Among them, setting the film thickness of each first layer 51 and the film thickness of each second layer 52 to be the same and making the light-emitting layer 50 into a superlattice structure is one of the preferred embodiments of the present invention.

[0076] -Number of stacked groups-

[0077] Reference Figure 2 The number of groups of the first layer 51 and the second layer 52 is not limited, and can be set to 3 or more and 50 or less, for example. One end of the stack can be set to the first layer 51, and the other end can be set to the second layer 52. In this case, the number of groups of the first layer 51 and the second layer 52 is expressed as n groups (n is a natural number).

[0078] In addition, one end of the stacked body may be set as the first layer 51, and a repeating structure of the second layer 52 and the first layer 51 may be provided, and the other end may also be set as the first layer 51. Alternatively, conversely, both ends may be set as the second layer 52. In this case, the number of sets of the first layer 51 and the second layer 52 is expressed as n (n is a natural number), and is called n.5 sets. Figure 2 In the figure, both ends of the stacked body are shown as the first layer 51.

[0079] - Composition ratio -

[0080] As long as the conditions of the difference in composition wavelength and lattice constant are met, the general formula of each layer of the first layer 51 and the second layer 52 is: a Ga b Al c )(P x Asy Sb z ) is not limited to the composition ratios a, b, c, x, y, and z of the III-V compound semiconductors shown in FIG. 1 . In order to suppress the deterioration of the crystallinity of the light-emitting layer, the composition ratio is preferably selected such that the ratio of the lattice constant difference between the growth substrate and the first layer and the second layer in the light-emitting layer is set to 1% or less. That is, the value obtained by dividing the absolute value of the lattice constant difference between the growth substrate and the first layer by the average value of the growth substrate and the first layer, and the value obtained by dividing the absolute value of the lattice constant difference between the growth substrate and the second layer by the average value of the growth substrate and the second layer are both preferably 1% or less. For example, when the emission center wavelength is set to be greater than 1000nm and less than 1900nm, if the substrate for growth is set to an InP substrate, the composition ratio a of In in each layer can be set to be greater than 0.0 and less than 1.0, the composition ratio b of Ga can be set to be greater than 0.0 and less than 1.0, the composition ratio c of Al can be set to be greater than 0.0 and less than 0.35, the composition ratio x of P can be set to be greater than 0.0 and less than 0.95, the composition ratio y of As can be set to be greater than 0.15 and less than 1.0, and the composition ratio z of Sb can be set to be greater than 0.0 and less than 0.7. As long as the conditions of the ratio of the composition wavelength difference and the lattice constant difference are satisfied within these ranges, it can be appropriately set. The above-mentioned emission center wavelength is just an example. For example, in the case of InGaAsP semiconductors and InGaAlAs semiconductors, the emission center wavelength can be set to be within the range of greater than 1000nm and less than 2200nm, preferably the emission center wavelength is set to be greater than 1300nm, and more preferably to be greater than 1400nm. When Sb is contained, infrared light having a longer wavelength (11 μm or less) can be further provided.

[0081] - Adulterants -

[0082] The dopant of each layer in the light emitting layer 50 is not limited, but in order to reliably obtain the effect of the present invention, it is preferable that both the first layer 51 and the second layer 52 are i-type. However, each layer may be doped with an n-type dopant or a p-type dopant.

[0083] The following does not limit the specific structure of the semiconductor light emitting device of the present invention, but describes specific aspects that the semiconductor light emitting device of the present invention may further have. Figure 3 , a semiconductor light emitting element 100 according to one embodiment of the present invention is described.

[0084] The semiconductor light emitting device 100 according to one embodiment of the present invention preferably includes at least the light emitting layer 50 having the above-mentioned stacked body, and further includes a desired structure selected from the support substrate 10, the intercalation layer 20, the first conductivity type III-V compound semiconductor layer 30, the first spacer layer 41, the second spacer layer 42, and the second conductivity type III-V compound semiconductor layer 70 in order. In addition, the semiconductor light emitting device 100 may further include a second conductivity type electrode 80 on the second conductivity type III-V compound semiconductor layer 70, and further include a first conductivity type electrode 90 on the back surface of the support substrate 10. It should be noted that if the first conductivity type is n-type, the second conductivity type becomes p-type, and conversely, if the first conductivity type is p-type, the second conductivity type becomes n-type. The following describes the mode when the first conductivity type is n-type and the second conductivity type is p-type. In the following, for the sake of convenience, the first conductive type III-V compound semiconductor layer 30 is described as an n-type semiconductor layer 30, and the second conductive type III-V compound semiconductor layer 70 is described as a p-type semiconductor layer 70, and the present embodiment is described according to this specific example. By making the light-emitting layer 50 sandwiched by the n-type semiconductor layer 30 and the p-type semiconductor layer 70, by energizing the light-emitting layer 50, electrons and holes are combined in the light-emitting layer 50 to emit light.

[0085] <Growth Substrate>

[0086] The growth substrate can be appropriately selected from compound semiconductor substrates such as InP substrates, InAs substrates, GaAs substrates, GaSb substrates, and InSb substrates according to the composition of the light emitting layer 50. The conductivity type of each substrate is preferably made to correspond to the conductivity type of the semiconductor layer on the growth substrate, and examples of compound semiconductor substrates applicable to this embodiment include n-type InP substrates and n-type GaAs substrates.

[0087] <Support substrate>

[0088] As the support substrate 10, a growth substrate on which the light emitting layer 50 can be grown can be used. When the bonding method described later is used, various substrates different from the growth substrate can be used as the support substrate 110 (see Figure 4 ).

[0089] <Inclusion layer>

[0090] An inclusion layer 20 can be provided on the support substrate 10. When using a growth substrate as the support substrate 10, the inclusion layer 20 can be made of a group III-V compound semiconductor layer. It can be used as an initial growth layer for epitaxially growing a semiconductor layer on the support substrate 10 as a growth substrate. Additionally, for example, it can also be used as a buffer layer for buffering the lattice strain between the support substrate 10 as a growth substrate and the n-type semiconductor layer 30. Further, by making the growth substrate lattice-matched with the inclusion layer 20 and changing the semiconductor composition, it can also be used as an etching stop layer. For example, when the support substrate is an n-type InP substrate, it is preferable to set the inclusion layer 20 as an n-type InGaAs layer. At this time, in order to make the inclusion layer 20 lattice-matched with the InP growth substrate, it is preferable to set the In composition ratio in group III elements to 0.3 or more and 0.7 or less, and more preferably 0.5 or more and 0.6 or less. Additionally, if the composition ratio is set to be similar to that of the above InGaAs in terms of lattice constant to the InP substrate, it can be AlInAs, AlInGaAs, or InGaAsP. The inclusion layer 20 can be a single layer, or it can also be a composite layer with other layers (such as a superlattice layer).

[0091] <n-type semiconductor layer>

[0092] An n-type semiconductor layer 30 can be provided on the support substrate 10 and the inclusion layer 20 as needed, and this n-type semiconductor layer 30 can be used as an n-type cladding layer. It is only necessary to appropriately determine the composition of the group III-V compound semiconductor of the n-type semiconductor layer 30 according to the composition of the group III-V compound semiconductor of the light-emitting layer 50. When the light-emitting layer 50 is composed of an InGaAsP-based semiconductor or an InGaAlAs-based semiconductor, for example, an n-type InP layer can be used. The n-type semiconductor layer 30 can have a single-layer structure or a composite layer stacked with multiple layers. As the thickness of the n-type cladding layer, values of 1 μm or more and 5 μm or less can be exemplified.

[0093] <spacer layer>

[0094] It is also preferable to provide a first spacer layer 41 and a second spacer layer 42 between the n-type semiconductor layer 30 and the p-type semiconductor layer 70 and the light-emitting layer 50, respectively. The first spacer layer 41 can be set as an undoped or n-type group III-V compound semiconductor layer. For example, it is preferable to use an i-type InP spacer layer. On the other hand, the second spacer layer 42 on the p side is preferably set as an undoped group III-V compound semiconductor layer. For example, an i-type InP spacer layer can be used. By providing the undoped spacer layer 42, the diffusion of useless dopants between the light-emitting layer 50 and the p-type layer can be prevented. The thickness of each spacer layer 41, 42 is not limited, and for example, it can be set to 5 nm or more and 500 nm or less.

[0095] <p-type semiconductor layer>

[0096] A p-type semiconductor layer 70 can be provided on the light-emitting layer 50 and, if necessary, the second spacer layer 42. The p-type semiconductor layer 70 can sequentially include a p-type cladding layer 71 and a p-type contact layer 73 from the light-emitting layer 50 side. It is also preferable to provide an intermediate layer 72 between the p-type cladding layer 71 and the p-type contact layer 73. By providing the intermediate layer 72, the lattice mismatch between the p-type cladding layer 71 and the p-type contact layer 73 can be alleviated. The composition of the III-V compound semiconductor of the p-type semiconductor layer 70 can be appropriately determined according to the composition of the III-V compound semiconductor of the light-emitting layer 50. When the light-emitting layer 50 is composed of an InGaAlAs-based semiconductor, p-type InP can be exemplified as the p-type cladding layer, p-type InGaAsP can be exemplified as the intermediate layer, and p-type InGaAs without P can be exemplified as the p-type contact layer 73. The film thickness of each layer of the p-type semiconductor layer 70 is not particularly limited. As the film thickness of the p-type cladding layer 71, values of 1 μm or more and 5 μm or less can be exemplified. As the film thickness of the intermediate layer 72, values of 10 nm or more and 200 nm or less can be exemplified. As the film thickness of the p-type contact layer 73, values of 50 nm or more and 200 nm or less can be exemplified.

[0097] <Electrode>

[0098] A second conductive type electrode 80 and a first conductive type electrode 90 can be provided on the p-type semiconductor layer 70 and the back surface of the support substrate 10, respectively. As the metal material for forming each electrode, metals such as Ti, Pt, and Au can be used; general metal materials such as metals (such as Sn) that form a eutectic alloy with gold can be used. Furthermore, the electrode pattern of each electrode is arbitrary and not limited in any way.

[0099] So far, an embodiment has been described in which a compound semiconductor substrate is used as a growth substrate and directly used as the support substrate 10, but the present invention is not limited to this. As the support substrate of the semiconductor light-emitting element of the present invention, after forming each semiconductor layer on the growth substrate, the growth substrate can also be removed by a bonding method, and at the same time, a semiconductor substrate such as an Si substrate, a metal substrate such as Mo, W, or Kovar, various submount substrates using AlN, etc. can be pasted and used as the support substrate (hereinafter referred to as the "bonding method", refer to Japanese Unexamined Patent Application Publication No. 2018-006495 and Japanese Unexamined Patent Application Publication No. 2019-114650). For the case of using the bonding method, refer to Figure 4 , which will be described below. It should be noted that the last two digits of the symbols in the figure are the same as those of the foregoing configuration, and repeated descriptions are omitted.

[0100] When the bonding method is used, for example, it is sufficient to form each semiconductor layer on the growth substrate 10. And, after forming each semiconductor layer, the two are bonded using the metal reflective layer 122 and the metal bonding layer 121 provided on the support substrate 110, and then the growth substrate 10 is removed. The implementation of the manufacturing method is described in detail later. The structure of the semiconductor light emitting element 200 after the growth substrate 10 is removed is described in more detail. In the semiconductor light emitting element 200, in addition to providing each electrode, a layer other than the III-V group compound semiconductor may also be provided. For example, when the bonding method is used, on the support substrate 110 formed by a Si substrate, a metal bonding layer 121 for bonding to the support substrate may be formed in an inclusive manner instead of the above-mentioned initial growth layer, and a p-type semiconductor layer 170, a light emitting layer 150, and an n-type semiconductor layer 130 are sequentially arranged thereon. It should be noted that a metal reflective layer 122 may be provided on the metal bonding layer 121. Furthermore, in addition to the III-V compound semiconductor layer, an ohmic electrode portion 181 and a dielectric layer 160 dispersed in an island shape and surrounding the ohmic electrode portion 181 may be provided on the metal reflective layer 122 as needed. Examples of the dielectric material include SiO2, SiN, and ITO.

[0101] It should be noted that, as described above, in the above embodiment, the case where the first conductive semiconductor layer is n-type and the second conductive semiconductor layer is p-type is described as an example, but it can be understood that the conductivity type of each layer can be opposite to the above embodiment.

[0102] (Method for manufacturing semiconductor light emitting element)

[0103] The method for manufacturing the semiconductor light emitting element according to the present invention includes at least a light emitting layer forming step of forming the light emitting layer 50 , wherein the stacked body is formed by repeatedly performing a first step of forming the first layer 51 and a second step of forming the second layer 52 .

[0104] In addition, as needed, references can be included Figure 3 The process of each layer of the semiconductor light emitting element 100 is described. The III-V compound semiconductor materials that can be used as the first layer 51 and the second layer 52, the conditions of their composition wavelength difference and lattice constant difference, and further the film thickness, the number of stacking groups, etc. are as described above, and repeated description is omitted.

[0105] Each layer of the III-V compound semiconductor layer can be formed by a known thin film growth method such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), sputtering, etc. If it is an InGaAsP semiconductor, for example, trimethyl indium (TMIn) as an In source, trimethyl gallium (TMGa) as a Ga source, arsine (AsH3) as an As source, phosphine (PH3) as a P source, etc. can be used in a predetermined mixing ratio, and these raw material gases can be vapor-phase grown while using a carrier gas, thereby making the InGaAsP semiconductor layer epitaxially grow with a desired thickness according to the growth time. In addition, when Al is used as a III group element, as an Al source, for example, trimethyl aluminum (TMA) can be used, and when Sb is used as a V group element, as an Sb source, TMSb (trimethyl antimony) can be used. Furthermore, when each semiconductor layer is doped to become p-type or n-type, a dopant source gas containing Si, Zn, or the like as constituent elements may be used as desired.

[0106] In addition, the formation of the metal layer such as the first conductive electrode and the second conductive electrode can use a known method, such as sputtering, electron beam evaporation or resistance heating. When the bonding method is used, as long as the dielectric layer is formed, a known film forming method such as plasma CVD or sputtering can be applied, and a known etching method can also be used to form the concave and convex as needed.

[0107] The bonding method (see Japanese Patent Application Laid-Open No. 2018-006495 and Japanese Patent Application Laid-Open No. 2019-114650) is used to form Figure 4 When the element shown is used, for example, a semiconductor light emitting element can be produced by the following operation.

[0108] First, the layers of the III-V group compound semiconductor layer including the etching stop layer 120, the n-type semiconductor layer 130, the light emitting layer 150, the p-type cladding layer 171, the intermediate layer 172, and the p-type contact layer 173 are sequentially formed on the growth substrate 10 (it should be noted that Figure 4It is in a state after bonding, so it is upside down.) Next, a p-type ohmic electrode portion 181 dispersed in an island shape is formed on the p-type contact layer 173. Thereafter, an etching mask is formed on the p-type ohmic electrode portion and its surroundings, and the p-type contact layer 173 except for the portion where the ohmic electrode portion is formed is removed by wet etching or the like to expose the intermediate layer 172. In addition, a dielectric layer 160 is formed on the intermediate layer 172. Furthermore, the upper part of the p-type ohmic electrode portion 181 and the intermediate layer 172 of the surrounding part of the p-type ohmic electrode portion 181 are exposed by partially etching the dielectric layer 160. The metal reflective layer 122 is formed on the entire surface including the p-type ohmic electrode portion 181, the intermediate layer 172 exposed in the surrounding part of the p-type ohmic electrode portion 181, and the upper part of the dielectric layer 160 in the area not removed.

[0109] On the other hand, a conductive Si substrate or the like is used as the support substrate 110, and a metal bonding layer 121 is formed on the support substrate. The metal reflective layer 122 and the metal bonding layer 121 are arranged opposite to each other and bonded by heating and compression. Furthermore, the growth substrate is etched away to expose the etching stop layer 120. An n-type electrode 90 is formed on the etching stop layer 20, and the etching stop layer 120 except for the n-type electrode formation portion is etched away, or an n-type electrode 190 is formed on a portion of the etching stop layer 120 after a portion other than a portion of the etching stop layer 120 is etched away, thereby obtaining a junction-type semiconductor light-emitting element 200. As described above, the conductivity type of each layer, n-type / p-type, may be opposite to the above example.

[0110] Hereinafter, the present invention will be described in more detail using examples, but the present invention is not limited to the following examples at all.

[0111] Example

[0112] The target emission center wavelength was set to 1480 nm, and the semiconductor light emitting elements described in the following Examples 1 to 4 and Comparative Examples 1 to 9 were produced by a bonding method.

[0113] (Example 1)

[0114] For the components of the III-V compound semiconductor layer of the semiconductor light emitting element 200 described in Example 1, refer to Figure 4 Table 2 shows the thickness and doping concentration of the growth state on the growth substrate before bonding to the support substrate described later. An S-doped n-type InP substrate was used as the growth substrate 10. 18 atoms / cm 3 ) on the (100) surface of the substrate, an n-type InP layer with a thickness of 100 nm and an n-type In layer with a thickness of 20 nm were sequentially formed by MOCVD.0.57 Ga 0.43 As layer (the initial growth layer and the etching stop layer 120 respectively), a 3500nm thick n-type InP layer (the n-type semiconductor layer 130 as the n-type cladding layer), a 100nm thick i-type InP layer (the first spacer layer 141), a light emitting layer 150 described later, a 320nm thick i-type InP layer (the second spacer layer 142), a 2400nm thick p-type InP layer (the p-type cladding layer 171), a 50nm thick p-type In 0.8 Ga 0.2 As 0.5 P 0.5 layer (intermediate layer 172), p-type In 0.57 Ga 0.43 As layer (p-type contact layer 173). The n-type InP layer and n-type InGaAs layer (initial growth layer and etching stop layer 120, respectively), and the n-type InP layer (n-type semiconductor layer 130 as n-type cladding layer) are doped with Si, and the doping concentration is set to 5.0×10 17 atoms / cm 3 The p-type InP layer (p-type cladding layer 171) is doped with Zn, and the doping concentration is set to 7.0×10 17 atoms / cm 3 The p-type InGaAsP layer (intermediate layer 172) and the p-type InGaAs layer (p-type contact layer 173) are doped with Zn, and the doping concentration is set to 1.5×10 19 atoms / cm 3 .

[0115] When forming the light emitting layer 150, first, an i-type In a1 Ga b1 Al c1 As layer (first layer 151), then, the i-type In a2 Ga b2 Al c2 As layer (second layer 152) and i-type In a1 Ga b1 Al c1 As layers (first layers 151) are alternately stacked in 10 layers each, and 10.5 stacks are made. That is, both ends of the light-emitting layer 150 are barrier layers (first layers 51). The barrier layer (first layer 151) is an In layer with a thickness of 8 nm. 0.5264 Ga 0.3597 Al 0.1139As. That is, the In composition ratio (a1) is 0.5264, the Ga composition ratio (b1) is 0.3597, and the Al composition ratio (c1) is 0.1139. In addition, the well layer (second layer 152) is an In layer with a thickness of 10 nm. 0.5663 Ga 0.3516 Al 0.0821 As. That is, the In composition ratio (a2) is 0.5663, the Ga composition ratio (b2) is 0.3516, and the Al composition ratio (c2) is 0.0821. In addition, the lattice constants are calculated as described above, and the band structure is calculated using the simulation software (SiLENSe) manufactured by STRJapan. The thickness, composition ratio, composition wavelength and lattice constant values ​​of the barrier layer (first layer 51) and the well layer (second layer 152) are recorded in Table 3. The composition wavelength difference in the composition ratio of the light-emitting layer of Example 1 is 126.6nm, the value obtained by dividing the absolute value of the difference between the two lattice constants by the average value of the two lattice constants (the ratio of the lattice constant difference) is 0.28% in percentage, and the ratio of the well depth (Dc) on the conduction band side to the sum of the well depth (Dc) on the conduction band side and the well depth (Dv) of the valence band (Dc / (Dc+Dv)) is 66.5% in percentage. These values ​​are recorded in Table 4. In addition, the total film thickness of the light-emitting layer was 180 nm. It should be noted that the composition of each layer in the above-mentioned Example 1 is a value measured by SIMS analysis. It should be noted that for each layer of the light-emitting layer, after the light-emitting layer is exposed, SIMS analysis is performed to confirm the solid phase ratio of each layer.

[0116] [Table 2]

[0117]

[0118] A p-type ohmic electrode portion 181 (Au / AuZn / Au, total thickness: 530nm) dispersed in an island shape is formed on the p-type contact layer. It should be noted that when forming the island pattern, a resist pattern is formed, and then the ohmic electrode 181 is vapor deposited and formed by peeling off the resist pattern. The ratio of the p-type ohmic electrode portion area to the chip area (contact area ratio) is 0.95%, and the chip size is 280μm square.

[0119] Next, an etching mask is formed on the p-type ohmic electrode portion 181 and its surroundings, and the p-type contact layer 173 except for the portion where the ohmic electrode portion 181 is formed is removed by wet etching using a tartaric acid-hydrogen peroxide system, thereby exposing the intermediate layer 172. Thereafter, a dielectric layer 160 (thickness: 700 nm) composed of SiO2 is formed on the entire surface of the intermediate layer 172 by a plasma CVD method. Furthermore, in the upper region of the p-type ohmic electrode portion 181, an etchant is used to form a window pattern having a shape with a width of 3 μm in the width direction and the length direction, and the p-type ohmic electrode portion 181 and the dielectric layer 160 surrounding the p-type ohmic electrode portion are removed by wet etching using BHF, thereby exposing the upper portion of the p-type ohmic electrode portion 181 and the intermediate layer 172 surrounding the p-type ohmic electrode portion (not shown).

[0120] Next, a metal reflective layer 122 is formed on the entire surface of the intermediate layer 172 (the upper part of the p-type ohmic electrode portion 181, the upper part of the dielectric layer 60, and the intermediate layer 172 exposed around the p-type ohmic electrode portion) by evaporation. The thickness of each metal layer of the metal reflective layer (Ti / Au / Pt / Au) is 2nm, 650nm, 100nm, and 900nm, respectively. On the other hand, a metal bonding layer 121 is formed on a conductive Si substrate (thickness: 200μm) serving as a supporting substrate. The thickness of each metal layer of the metal bonding layer (Ti / Pt / Au) is 650nm, 10nm, and 900nm, respectively.

[0121] The metal reflective layer 122 and the metal bonding layer 121 are arranged to face each other and are heat-compressed and bonded at 315° C. Then, the n-type InP substrate 110 is wet-etched with a hydrochloric acid dilute solution to be removed.

[0122] On the n-type etch stop layer 120, as a wiring portion of the top surface electrode, an n-type electrode 190 (Au (thickness: 10nm) / Ge (thickness: 33nm) / Au (thickness: 57nm) / Ni (thickness: 34nm) / Au (thickness: 800nm) / Ti (thickness: 100nm) / Au (thickness: 1000nm)) is formed by forming a resist pattern, evaporating the n-type electrode, and peeling off the resist pattern. Furthermore, a portion (Ti (thickness: 150nm) / Pt (thickness: 100nm) / Au (thickness: 2500nm)) is formed on the n-type electrode to form a pattern of the top surface electrode. In addition, the n-type etch stop layer 120 except for the area directly below and in the vicinity of the n-type electrode 190 is removed by wet etching to perform a roughening treatment. Thereafter, a dielectric protective film (not shown) is formed on the top surface and side surfaces of the light-emitting element 100 except for the top surface of the pad portion.

[0123] (Example 2)

[0124] The composition of the first layer 151 to be the barrier layer is changed from In 0.5264 Ga 0.3597 Al 0.1139 As changed to In 0.5264 Ga 0.3166 Al 0.1570 As, except for this, the same operation as in Example 1 was performed to obtain the semiconductor light-emitting element described in Example 2. The thickness, composition ratio, composition wavelength and lattice constant values ​​of the barrier layer (first layer 151) and the well layer (second layer 152) are recorded in Table 3. The composition wavelength difference in the composition ratio of the light-emitting layer of Example 2 is 218.4nm, the value obtained by dividing the absolute value of the difference between the two lattice constants by the average value of the two lattice constants (lattice constant difference ratio) is 0.28%, and the ratio of the well depth (Dc) on the conduction band side to the sum of the well depth (Dc) on the conduction band side and the well depth (Dv) of the valence band (Dc / (Dc+Dv)) is 68.7%. Their values ​​are recorded in Table 4.

[0125] (Examples 3 to 5, Comparative Examples 1 to 9)

[0126] Except that the composition and thickness of the barrier layer (first layer 151) and the well layer (second layer 152) were changed as described in Table 3, the same operation as in Example 1 was carried out to obtain semiconductor light emitting elements described in Examples 3 to 5 and Comparative Examples 1 to 9.

[0127] Furthermore, for the examples and comparative examples, the respective composition wavelengths and lattice constants calculated from the composition of the barrier layer (first layer 151) and the composition of the well layer (second layer 152) are described in Table 3. In addition, the composition wavelength difference between the barrier layer (first layer 151) and the well layer (second layer 152), the value obtained by dividing the absolute value of the difference between the two lattice constants by the average value of the two lattice constants (lattice constant difference ratio), the calculated values ​​of the well depth (Dc) of the conduction band and the well depth (Dv) of the valence band, and the value of the ratio (Dc / (Dc+Dv)) of the sum of the well depth (Dc) on the conduction band side and the well depth (Dv) of the valence band are described in Table 4.

[0128] [Table 3]

[0129] Table 3

[0130]

[0131] [Table 4]

[0132] Table 4

[0133]

[0134] The forward voltage Vf (V) when a 36 mA current was passed through the semiconductor light emitting elements described in Examples 1 to 5 and Comparative Examples 1 to 9, the luminous output power Po (mW) based on an integrating sphere, and the luminous center wavelength λp (nm) and half-value width (FWHM, unit: nm) based on a spectrum analyzer (AQ6374 manufactured by Yokogawa Instruments Co., Ltd.) were measured using a constant current voltage power supply, and the average value of the measurement results of the three samples was calculated. The respective measurement results are shown in Table 4, and the correlation evaluation between the half-value width and the luminous output power is also shown.

[0135] In Table 4, the full width at half maximum (FWHM) of the emission peak and the emission output were evaluated according to the following criteria.

[0136] Half value width

[0137] ++…less than 110nm

[0138] +…110nm or more and less than 120nm

[0139] -…120nm and above

[0140] Luminous output power

[0141] ++…4.80mW or more

[0142] +…4.40mW or more and less than 4.80mW

[0143] -…less than 4.40mW

[0144] According to the results in Table 4, it can be seen that the embodiments that have both the composition wavelength difference based on the present invention and the value of (Dc / (Dc+Dv)) all have large luminous output power and small half-value width. If Comparative Examples 1 to 2 with one V group element are compared with Examples 1 to 5, the luminous output power of the embodiments is large and the half-value width is also small. In addition, it can be seen that compared with Comparative Examples 1 and 3 with a composition wavelength difference of less than 50nm, the luminous output power of Examples 1, 2 and 5 is greatly improved, and while Examples 3 and 4 have the same luminous output power, the half-value width becomes smaller. Although Comparative Examples 4 to 9 have a large composition wavelength difference, the value of (Dc / (Dc+Dv)) is less than 65%, so the output power is small compared to the embodiments.

[0145] Industrial Applicability

[0146] According to the present invention, a semiconductor light emitting element having better light emitting characteristics than conventional light emitting elements and a method for manufacturing the same can be provided, and thus the present invention is useful.

[0147] Description of Reference Numerals

[0148] 10 Support base plate

[0149] 20 Interlayer

[0150] 30 n-type semiconductor stack

[0151] 41 first spacer layer

[0152] 42 second spacer layer

[0153] 50 Luminous Layers

[0154] 51 First floor

[0155] 52 Second Floor

[0156] 60 Dielectric layer

[0157] 70 p-type semiconductor layer

[0158] 71 p-type cladding

[0159] 72 Middle Layer

[0160] 73 p-type contact layer

[0161] 80 Second conductive type electrode

[0162] 90 first conductive type electrode

[0163] 100 Semiconductor light emitting device

Claims

1. A semiconductor light emitting element, characterized in that: The invention comprises a light-emitting layer, wherein the light-emitting layer comprises a stacked body obtained by repeatedly stacking a first III-V group compound semiconductor layer and a second III-V group compound semiconductor layer, The group III elements in the first group III-V compound semiconductor layer and the second group III-V compound semiconductor layer are one or more selected from the group consisting of Al, Ga, and In. The group V elements in the first group III-V compound semiconductor layer and the second group III-V compound semiconductor layer are one or more selected from the group consisting of As, Sb, and P. The difference between the composition wavelength of the first III-V compound semiconductor layer and the composition wavelength of the second III-V compound semiconductor layer is 70 nm or more, The well depth Dc on the conduction band side in the band structure of the stack is greater than the well depth Dv on the valence band side, and the ratio Dc / (Dc+Dv) of the well depth Dc on the conduction band side formed due to the component wavelength difference to the sum of the well depth Dc on the conduction band side and the well depth Dv on the valence band is greater than 65%.

2. The semiconductor light emitting element according to claim 1, wherein A value obtained by dividing an absolute value of a difference between the lattice constant of the first Group III-V compound semiconductor layer and the lattice constant of the second Group III-V compound semiconductor layer by an average value of the two lattice constants is 0.10% to 0.40%.

3. The semiconductor light emitting element according to claim 1, wherein The well depth Dv on the valence band side is 0.11 eV or less.

4. The semiconductor light emitting element according to claim 1, wherein The group V element in the first group III-V compound semiconductor layer and the second group III-V compound semiconductor layer is one selected from the group consisting of As, Sb, and P.

5. The semiconductor light emitting element according to claim 1, wherein A difference in composition wavelength between a composition wavelength of the first Group III-V compound semiconductor layer and a composition wavelength of the second Group III-V compound semiconductor layer is greater than or equal to 100 nm and less than or equal to 290 nm.

6. A method for manufacturing a semiconductor light emitting element, which is a method for manufacturing the semiconductor light emitting element according to any one of claims 1 to 5, The manufacturing method includes a light emitting layer forming step of forming the light emitting layer. The light emitting layer forming step forms the stacked body by repeatedly performing a first step of forming the first Group III-V compound semiconductor layer and a second step of forming the second Group III-V compound semiconductor layer.

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