Power distribution network fault positioning method and system

Abstract

The invention discloses a power distribution network fault positioning method and system, and the method comprises the steps: building a power distribution network simulation model, and carrying out the pre-modeling analysis of different grounding faults at a plurality of fault positions; extracting the characteristic value of the zero-sequence current; obtaining a function relationship between a fault zero-sequence current characteristic value and a fault occurrence position under the topology through fitting analysis of data; and when a grounding fault occurs, matching the zero-sequence current characteristic value of the grounding fault to obtain a fault positioning result. By adopting the method, the accuracy and rapidity of power distribution network fault positioning can be improved, and the method has very important practical significance in the aspects of shortening power failure time, reducing economic loss, improving power supply reliability and the like.

Description

Technical Field

[0001] The present invention belongs to the technical field of power distribution network automation, and in particular relates to a power distribution network fault locating method and system. Background Art

[0002] In recent years, with the continuous expansion of the distribution network, the number of short-circuit faults has also been increasing. If the fault is not identified and handled in time, it may cause damage to equipment or even large-scale power outages. Through real-time data monitoring, the fault location of the distribution network can be discovered in time. With the continuous improvement and progress of the 10kV distribution network data real-time monitoring system, a large amount of operating electrical quantity data, fault data and other information in many areas can be uploaded to various systems in real time. A large amount of historical data from the distribution side to the user side has laid a solid foundation for the distribution network to conduct behavior analysis, load forecasting, and fault section location.

[0003] With the increasingly complex operating environment of distribution network systems and the increasing requirements for power supply reliability, the safety and reliability of traditional distribution networks need to be further improved to achieve the transformation to smart and strong power grids. The research on accurate line selection and precise positioning technology for distribution network faults is the basic work to ensure the safe and reliable operation of smart distribution networks, and is of great significance to improving power supply quality and the construction of smart distribution networks. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a method and system for solving the technical problem of difficulty in locating single-phase grounding faults in distribution networks in view of the deficiencies in the above-mentioned prior art.

[0005] The present invention adopts the following technical solutions:

[0006] A method for locating a distribution network fault comprises the following steps:

[0007] S1. Distribution network fault modeling to obtain a distribution network fault simulation model;

[0008] S2, extracting fault features from the distribution network fault simulation model of step S1 and establishing a fault feature library;

[0009] S3, obtaining a functional relationship between the fault feature value and the fault location based on the fault feature library of step S2;

[0010] S4. Extract the actual fault characteristic value, and obtain the fault location by combining it with the functional relationship obtained in step S3 to achieve positioning.

[0011] Preferably, step S1 specifically includes:

[0012] A distribution network simulation model is established to simulate and analyze faults, and ergodic simulation is performed on different grounding locations under different grounding conditions.

[0013] More preferably, the distribution network simulation model includes transformer, line, load and fault models.

[0014] Preferably, step S2 specifically includes:

[0015] The waveform kurtosis, waveform skewness and waveform factor fault characteristic values ​​of the zero-sequence current waveform in the ergodic simulation result obtained in step S1 are extracted to establish a fault characteristic library under different grounding positions and different grounding conditions.

[0016] Preferably, step S3 is specifically:

[0017] Perform data fitting analysis on the waveform kurtosis, waveform skewness and waveform factor eigenvalues ​​obtained in step S2 and the fault location to obtain the functional relationship between the waveform kurtosis, waveform skewness and waveform factor eigenvalues ​​and the fault location, and use the principal component analysis method to fuse the waveform kurtosis, waveform skewness and waveform factor eigenvalues ​​to obtain the final weighted function, and obtain the functional relationship between the fault location and the three eigenvalues.

[0018] More preferably, the final weighted function is obtained to obtain the functional relationship between the fault location and the three eigenvalues ​​as follows:

[0019] K=6e -0.15l , S = 1.9e -0.12l , F = 1.35e -0.03l

[0020] Where l is the distance from the fault location to the busbar, K is the waveform kurtosis, S is the waveform skewness, and F is the waveform factor.

[0021] Preferably, step S4 is specifically:

[0022] The kurtosis, waveform skewness and waveform factor characteristic values ​​of the zero-sequence current waveform of the actual fault are extracted, and the results are substituted into the function obtained in step S3 to obtain the fault location.

[0023] In a second aspect, an embodiment of the present invention provides a distribution network fault location system, including:

[0024] Building modules, distribution network fault modeling, and obtaining a distribution network fault simulation model;

[0025] The extraction module extracts fault features from the distribution network fault simulation model of the construction module and establishes a fault feature library;

[0026] A function module, which obtains a functional relationship between a fault feature value and a fault location based on a fault feature library of an extraction module;

[0027] The positioning module extracts the actual fault feature value and obtains the fault location by combining the functional relationship obtained by the function module to achieve positioning.

[0028] In a third aspect, a computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned distribution network fault location method when executing the computer program.

[0029] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, including a computer program, which implements the steps of the above-mentioned distribution network fault location method when executed by a processor.

[0030] Compared with the prior art, the present invention has at least the following beneficial effects:

[0031] A distribution network fault location method is proposed. The waveform kurtosis, waveform skewness and waveform factor of the fault signal are calculated to obtain characteristic information of the waveform. The three characteristics are integrated through information fusion calculation to obtain the functional relationship between the fault position and the three characteristics, thereby realizing fault location.

[0032] Furthermore, distribution network pre-modeling can establish models for the outgoing line conditions, load conditions, etc. of the substation, laying the foundation for fault simulation.

[0033] Furthermore, the distribution network fault simulation can determine the waveform characteristic information of the substation and determine the fault characteristic library by varying parameters.

[0034] Furthermore, through the above feature library, the functional relationship between the fault location and the feature information can be determined by calculation.

[0035] Furthermore, for actual faults, the fault location information can be output by matching the functional relationship established by the above-mentioned feature library.

[0036] It can be understood that the beneficial effects of the second to fourth aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here.

[0037] In summary, the method of the present invention can improve the accuracy and rapidity of fault location in the distribution network, and has very important practical significance in shortening power outage time, reducing economic losses, and improving power supply reliability.

[0038] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 It is a schematic diagram of the process of the present invention;

[0040] Figure 2A schematic diagram of a computer device provided by an embodiment of the present invention;

[0041] Figure 3 The block diagram of a chip provided according to an embodiment of the present invention. DETAILED DESCRIPTION

[0042] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0043] In the description of the present invention, it should be understood that the terms “include” and “comprises” indicate the presence of described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.

[0044] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0045] It should be further understood that the term "and / or" used in the present specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present invention generally indicates that the associated objects are in an "or" relationship.

[0046] It should be understood that, although the terms first, second, third, etc. may be used to describe preset ranges, etc. in the embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are only used to distinguish preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0047] The word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0048] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0049] The present invention provides a distribution network fault location method, establishes a distribution network simulation model, performs pre-modeling analysis on different grounding faults at multiple fault locations; extracts the characteristic value of zero-sequence current; obtains the functional relationship between the fault zero-sequence current characteristic value and the fault location under the topology through data fitting analysis; when a grounding fault occurs, matches the zero-sequence current characteristic value of the grounding fault to obtain the fault location result. The present invention can improve the accuracy and speed of distribution network fault location, which has very important practical significance in shortening power outage time, reducing economic losses, and improving power supply reliability.

[0050] The present invention provides a method for locating a distribution network fault, comprising the following steps:

[0051] S1. Distribution network fault pre-modeling analysis;

[0052] Establish distribution network simulation model and fault simulation analysis, and realize accurate fault analysis through accurate modeling of distribution network, including transformer, line, load and fault model; perform ergodic simulation on different grounding positions under different grounding conditions.

[0053] S2, fault feature extraction, establishing a fault feature library;

[0054] The waveform kurtosis, waveform skewness and waveform factor fault characteristic values ​​of the zero-sequence current waveform in the ergodic simulation result obtained in step S1 are extracted to establish a fault characteristic library under different grounding positions and different grounding conditions.

[0055] S3, obtaining a functional relationship between the fault characteristic value and the fault location;

[0056] Perform data fitting analysis on the waveform kurtosis, waveform skewness and waveform factor eigenvalues ​​obtained in step S2 and the fault location to obtain the functional relationship between the waveform kurtosis, waveform skewness and waveform factor eigenvalues ​​and the fault location, and use the principal component analysis method to fuse the above three eigenvalues ​​to obtain the final weighted function, and obtain the functional relationship between the fault location and the three eigenvalues.

[0057] The functional relationship between the waveform kurtosis, waveform skewness and waveform factor characteristic values ​​and the fault location is as follows:

[0058] K=6e -0.15l , S = 1.9e -0.12l , F = 1.35e -0.03l

[0059] Where l is the distance from the fault location to the busbar, K is the waveform kurtosis, S is the waveform skewness, and F is the waveform factor.

[0060] The principal component analysis method is used to fuse the above three eigenvalues ​​as follows:

[0061] First, the original data is standardized and the covariance matrix of the data is calculated. The covariance matrix is ​​decomposed into eigenvalues ​​to obtain eigenvalues ​​and eigenvectors. The eigenvectors are sorted according to the corresponding eigenvalue sizes. The principal component coefficients are the selected eigenvectors.

[0062] The final weighting function is:

[0063] W=0.49K+0.28S+0.23F

[0064] Among them, K is the waveform kurtosis, S is the waveform skewness, F is the waveform factor, and W is the weighted result.

[0065] The functional relationship between the fault location and the three characteristic values ​​is as follows:

[0066] l=9.65-3.27lnK-2.33lnS-7.67lnF

[0067] Where l is the distance from the fault location to the busbar, K is the waveform kurtosis, S is the waveform skewness, and F is the waveform factor.

[0068] S4. Extract and match the actual fault feature values ​​to achieve positioning.

[0069] The kurtosis, skewness and waveform factor characteristic values ​​of the zero-sequence current waveform of the actual fault are extracted, and the result is substituted into the function obtained in step S3 to obtain the fault location.

[0070] In yet another embodiment of the present invention, a distribution network fault locating system is provided, which can be used to implement the above-mentioned distribution network fault locating method. Specifically, the distribution network fault locating system includes a construction module, an extraction module, a function module and a locating module.

[0071] Among them, the construction module, distribution network fault modeling, obtains the distribution network fault simulation model;

[0072] The extraction module extracts fault features from the distribution network fault simulation model of the construction module and establishes a fault feature library;

[0073] A function module, which obtains a functional relationship between a fault feature value and a fault location based on a fault feature library of an extraction module;

[0074] The positioning module extracts the actual fault feature value and obtains the fault location by combining the functional relationship obtained by the function module to achieve positioning.

[0075] In another embodiment of the present invention, a terminal device is provided, which includes a processor and a memory, wherein the memory is used to store a computer program, the computer program includes program instructions, and the processor is used to execute the program instructions stored in the computer storage medium. The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. It is the computing core and control core of the terminal, which is suitable for implementing one or more instructions, and is specifically suitable for loading and executing one or more instructions to implement the corresponding method flow or corresponding function; the processor described in the embodiment of the present invention can be used for the operation of the distribution network fault location method, including:

[0076] Distribution network fault modeling is carried out to obtain a distribution network fault simulation model; fault features are extracted from the distribution network fault simulation model to establish a fault feature library; the functional relationship between the fault feature value and the fault location is obtained based on the fault feature library; the actual fault feature value is extracted, and the fault location is obtained in combination with the functional relationship to achieve positioning.

[0077] See also Figure 2, the terminal device is a computer device. The computer device 60 of this embodiment includes: a processor 61, a memory 62, and a computer program 63 stored in the memory 62 and executable on the processor 61. When the computer program 63 is executed by the processor 61, the method for calculating the fluid composition in the reservoir transformation wellbore in the embodiment is implemented. To avoid repetition, it is not described one by one here. Alternatively, when the computer program 63 is executed by the processor 61, the functions of each model / unit in the distribution network fault location system in the embodiment are implemented. To avoid repetition, it is not described one by one here.

[0078] The computer device 60 may be a computing device such as a desktop computer, a notebook, a PDA, or a cloud server. The computer device 60 may include, but is not limited to, a processor 61 and a memory 62. Those skilled in the art will appreciate that Figure 2 This is only an example of the computer device 60 and does not constitute a limitation of the computer device 60. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the computer device may also include input and output devices, network access devices, buses, etc.

[0079] The processor 61 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.

[0080] The memory 62 may be an internal storage unit of the computer device 60, such as a hard disk or memory of the computer device 60. The memory 62 may also be an external storage device of the computer device 60, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc., equipped on the computer device 60.

[0081] Furthermore, the memory 62 may include both an internal storage unit of the computer device 60 and an external storage device. The memory 62 is used to store computer programs and other programs and data required by the computer device. The memory 62 may also be used to temporarily store data that has been output or is to be output.

[0082] See also Figure 3 , the terminal device is a chip, and the chip 600 of this embodiment includes a processor 622, which may be one or more, and a memory 632 for storing a computer program executable by the processor 622. The computer program stored in the memory 632 may include one or more modules, each corresponding to a set of instructions. In addition, the processor 622 may be configured to execute the computer program to execute the above-mentioned distribution network fault location method.

[0083] In addition, the chip 600 may further include a power supply component 626 and a communication component 650, wherein the power supply component 626 may be configured to perform power management of the chip 600, and the communication component 650 may be configured to implement communication, for example, wired or wireless communication, of the chip 600. In addition, the chip 600 may further include an input / output (I / O) interface 658. The chip 600 may operate based on an operating system stored in the memory 632.

[0084] In another embodiment of the present invention, the present invention further provides a storage medium, specifically a computer-readable storage medium (Memory), which is a memory device in a terminal device for storing programs and data. It can be understood that the computer-readable storage medium here can include both the built-in storage medium in the terminal device and the extended storage medium supported by the terminal device. The computer-readable storage medium provides a storage space, which stores the operating system of the terminal. In addition, one or more instructions suitable for being loaded and executed by the processor are also stored in the storage space, and these instructions can be one or more computer programs (including program codes). It should be noted that the computer-readable storage medium here can be a high-speed RAM memory, or a non-volatile memory (Non-Volatile Memory), such as at least one disk memory.

[0085] The processor may load and execute one or more instructions stored in a computer-readable storage medium to implement the corresponding steps of the distribution network fault location method in the above embodiment; the processor may load and execute the following steps:

[0086] Distribution network fault modeling is carried out to obtain a distribution network fault simulation model; fault features are extracted from the distribution network fault simulation model to establish a fault feature library; the functional relationship between the fault feature value and the fault location is obtained based on the fault feature library; the actual fault feature value is extracted, and the fault location is obtained in combination with the functional relationship to achieve positioning.

[0087] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present invention described and shown in the drawings here can usually be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0088] A distribution network fault location method proposed in the present invention uses MATLAB / Simulink simulation software to carry out effect simulation and build a complete simulation model of the distribution network, including transformers, lines, distribution transformers and loads, etc., with a total of 16 outgoing lines with a length of 10km to 17.5km.

[0089] Based on this model, a single-phase grounding fault signal fault location study is carried out. Single-phase grounding faults with different transition resistance values ​​and fault phases are set on different lines and different positions. The distribution network fault location method of the present invention is used to extract the waveform kurtosis, waveform skewness and waveform factor of the fault signal in real time, and the principal component analysis method is used to calculate the weights of each parameter. The final determined weight is used to determine the fault location.

[0090] The results show that the fault location method proposed in the present invention can determine the fault location, has strong robustness, and the fault location error is no more than 200m.

[0091] In summary, the present invention provides a distribution network fault location method, system, chip and device, which analyze and calculate the fault signal to obtain its three characteristic quantities, waveform kurtosis, waveform skewness and waveform factor, and determine the weight of each characteristic quantity through principal component analysis. The fault location calculation function is used to locate the fault, which can determine the location of the fault with small error and strong applicability.

[0092] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0093] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0094] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in the present invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0095] In the embodiments provided by the present invention, it should be understood that the disclosed devices / terminals and methods can be implemented in other ways. For example, the device / terminal embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0096] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0097] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0098] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0099] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0100] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0101] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0102] The above contents are only for explaining the technical idea of ​​the present invention and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the claims of the present invention.

Claims

1. A distribution network fault location method, characterized in that: The following steps are involved: S1. Distribution network fault modeling to obtain a distribution network fault simulation model; S2, extracting fault features from the distribution network fault simulation model of step S1 and establishing a fault feature library; S3, obtaining a functional relationship between the fault feature value and the fault location based on the fault feature library of step S2; S4. Extract the actual fault characteristic value, and obtain the fault location by combining it with the functional relationship obtained in step S3 to achieve positioning.

2. The method for locating a distribution network fault according to claim 1, characterized in that: Step S1 is specifically as follows: A distribution network simulation model is established to simulate and analyze faults, and ergodic simulation is performed on different grounding locations under different grounding conditions.

3. The method for locating a distribution network fault according to claim 2, characterized in that: The distribution network simulation model includes transformer, line, load and fault models.

4. The method for locating a distribution network fault according to claim 1, characterized in that: Step S2 is specifically as follows: The waveform kurtosis, waveform skewness and waveform factor fault characteristic values ​​of the zero-sequence current waveform in the ergodic simulation result obtained in step S1 are extracted to establish a fault characteristic library under different grounding positions and different grounding conditions.

5. The method for locating a distribution network fault according to claim 1, characterized in that: Step S3 is specifically as follows: Perform data fitting analysis on the waveform kurtosis, waveform skewness and waveform factor eigenvalues ​​obtained in step S2 and the fault location to obtain the functional relationship between the waveform kurtosis, waveform skewness and waveform factor eigenvalues ​​and the fault location, and use the principal component analysis method to fuse the waveform kurtosis, waveform skewness and waveform factor eigenvalues ​​to obtain the final weighted function, and obtain the functional relationship between the fault location and the three eigenvalues.

6. The method for locating a distribution network fault according to claim 5, characterized in that: The final weighted function is obtained, and the functional relationship between the fault location and the three eigenvalues ​​is obtained as follows: K=6e -0.15l ,S=1.9e -0.12l ,F=1.35e -0.03l Where l is the distance from the fault location to the busbar, K is the waveform kurtosis, S is the waveform skewness, and F is the waveform factor.

7. The method for locating a distribution network fault according to claim 1, characterized in that: Step S4 is specifically as follows: The kurtosis, waveform skewness and waveform factor characteristic values ​​of the zero-sequence current waveform of the actual fault are extracted, and the results are substituted into the function obtained in step S3 to obtain the fault location.

8. A distribution network fault location system, characterized in that: include: Building modules, distribution network fault modeling, and obtaining distribution network fault simulation model; The extraction module extracts fault features from the distribution network fault simulation model of the construction module and establishes a fault feature library; A function module, which obtains a functional relationship between a fault feature value and a fault location based on a fault feature library of an extraction module; The positioning module extracts the actual fault feature value and obtains the fault location by combining the functional relationship obtained by the function module to achieve positioning.

9. A chip, characterized in that: a memory having a computer program stored thereon; A processor, configured to execute the computer program in the memory to implement the steps of the method according to any one of claims 1 to 7.

10. An electronic device, characterized in that: Comprising the chip as claimed in claim 9.

Images