A CCD temperature control system and control method using a multi-stage TEC stack

Abstract

The application is a CCD temperature control system and control method using a multi-stage TEC stack, comprising a host computer, a CPU control processing module, a TEC drive and temperature acquisition module, and a CCD detector refrigeration assembly; the CPU control processing module is connected with the host computer and the TEC drive and temperature acquisition module, and the CCD detector refrigeration assembly is connected with the TEC drive and temperature acquisition module; the application can automatically adjust the upper TEC control parameters according to the remote temperature CCD temperature change model, meet the requirements of temperature control rate and temperature control accuracy within a certain range, and automatically adjust the lower TEC control parameters according to the remote temperature CCD temperature change model, the temperature control accuracy and the requirements of target temperature, so as to ensure the temperature control accuracy and expand the temperature control depth.

Description

Technical Field

[0001] This invention relates to a high-precision, wide-temperature-depth TEC control system with multiple independent TEC stages, and more particularly to a high-precision, wide-temperature-depth CCD temperature control system and parameter adjustment control method for stacking two TECs of different models. Background Technology

[0002] TEC Refrigeration Technology: Thermoelectric Coolers (TECs), also known as semiconductor coolers, utilize the thermoelectric effect of thermoelectric materials to achieve cooling. They are characterized by their small size, lack of mechanical noise, long lifespan, and high reliability. They typically consist of numerous thermocouples. When current flows from the neutral (N) terminal to the polar (P) terminal, the TEC's cold junction absorbs heat from the environment, becoming the cold end of the cooler. By applying different currents to the two ends of the cooler, precise temperature control of the cold junction can be achieved. The hot junction of the thermoelectric cooler is generally connected to a heat sink, thus transferring heat from the hot junction to the heat sink, achieving thermal energy transfer.

[0003] Semiconductor coolers have a wide range of applications, including defense, medical, industrial, and scientific research fields, each employing corresponding precision temperature control systems based on specific application requirements. There are two main application approaches: one is wide temperature range, considering multiple TEC stacked packages and multi-level or independent TEC control to achieve a wide cooling depth. The other is multi-TEC distributed packaging, with individual control to achieve wide-density cooling requirements. In multi-TEC control technology, the design of the optimized control system and parameter configuration methods for multiple TECs, based on their assembly and layout, as well as the heat dissipation capacity of the hot ends, significantly impacts the overall performance of the temperature control system.

[0004] Temperature control technology for high-stability deep-cooled detectors on space-based platforms: Effective temperature control is the preferred way to suppress CCD dark current. Due to constraints such as size, weight, and power, especially the weak signals of faint targets on space-based platforms and the unfavorable atmospheric environment, the observation system is required to have high sensitivity and low noise. Good temperature control capability directly affects the quality of the imaging system. Therefore, for a large number of scientific and image sensors, high-stability deep cooling is one of the key factors to give full play to the performance of the detector.

[0005] Multi-TEC temperature control technology: PID control is a mature control technology applied in the field of automatic control. It is a control method that collects the state feedback of the controlled object, compares it with the target quantity, and calculates the control results. Based on the system model, appropriate PID control parameters are established for the upper-level TEC, which can realize an automatic control system that meets the control requirements. PID control can not only be implemented independently on a hardware platform for automatic system control, but also, with the help of certain hardware platforms, PID control functions can be implemented through software algorithms. Software PID control can improve the flexibility and convenience of system testing and parameter configuration.

[0006] Due to the increasing complexity of real-world applications, the number of controlled objects often increases significantly, and the feedback information from the control system is often insufficient. Using a single-reference PID control algorithm for multiple controlled objects is detrimental to control convergence and can lead to system control chaos. Therefore, actively seeking and optimizing control parameters for joint control of multiple controlled objects based on their characteristics and feedback information, whether direct or indirect, is a crucial step in improving the performance of multi-controlled object systems.

[0007] In the complex environment of a space-based platform, the demand for high-precision, wide-depth detector temperature cooling, coupled with a unique stacked configuration of two independent temperature control devices (TECs) and dedicated temperature sensors, necessitates separate PID algorithms for closed-loop temperature control of the two TECs. This approach struggles to achieve stable temperature control and convergence. Furthermore, the dedicated temperature sensor installation forces one control system to employ indirect feedback, hindering effective coordination between the indirect and direct control components. This results in poor temperature stability, low efficiency, and long stabilization times. Therefore, to address the aforementioned installation configuration, a method for automatic parameter configuration is needed. This method would allow the indirect control component to provide a robust temperature control platform for the direct control component while simultaneously automatically adjusting to meet the wide-depth, high-precision control requirements of the entire control system through indirect feedback. Summary of the Invention

[0008] The purpose of this invention is to solve the technical problems in the prior art where the increased number of controlled objects leads to insufficient feedback information from the control system, resulting in chaotic system control, poor temperature stability, low temperature control efficiency, and long stabilization time. This invention provides a CCD temperature control system and control method that utilizes multi-stage TEC stacking.

[0009] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0010] A CCD temperature control system employing multi-stage TEC stacking is characterized by comprising a host computer, a CPU control and processing module, a TEC driver and temperature acquisition module, and a CCD detector cooling assembly; the CPU control and processing module is connected to both the host computer and the TEC driver and temperature acquisition module, and the CCD detector cooling assembly is connected to the TEC driver and temperature acquisition module.

[0011] The CCD detector cooling assembly includes an area CCD array, a temperature sensor assembly, and a TEC cooler. The TEC cooler consists of two independent single-stage TEC coolers. Each TEC cooler includes a stacked upper-stage TEC and a lower-stage TEC, with the cold end of the upper-stage TEC attached to the back of the area CCD array. The temperature sensor assembly is located on the back of the area CCD array. The cold end of the lower-stage TEC is attached to the hot end of the upper-stage TEC. The output of the temperature sensor assembly is connected to the temperature input of the temperature acquisition module. The input of the TEC cooler is connected to the drive output of the temperature acquisition module. Output end; The CPU control processing module is used to receive protocol instructions and various parameters returned by the telemetry protocol to the host computer; it parses the various instructions and control parameters transmitted by the host computer, configures the working status of the TEC driver and temperature acquisition module according to the parsed data and the stored program software algorithm, outputs the digital control timing of the TEC driver and temperature acquisition module, analyzes the various telemetry acquisition quantities required by the control algorithm, calculates the temperature control quantity of the upper-level TEC in a closed loop, designs the control quantity of the lower-level TEC, and outputs the digital values ​​of the drive control of the two TECs in real time after the calculation is completed; and realizes the interface conversion of the front-end and back-end circuit levels.

[0012] Furthermore, the CPU control processing module includes a CAN communication interface, a CPU processor, and a level conversion circuit module. The CPU processor is connected to both the CAN communication interface and the level conversion circuit module. The CAN communication interface is connected to a host computer and is used to receive various instructions and control parameters transmitted from the host computer and forward them to the CPU processor. It also receives protocol instructions from the CPU processor and various parameters returned from telemetry via the transmission protocol and sends them to the host computer. The CPU processor is used to parse the various instructions and control parameters transmitted from the host computer and, based on the feedback temperature and target temperature, calculate and output the drive digital control quantities of the upper-level TEC and the lower-level TEC in real time. The level conversion circuit module is connected to the TEC drive and temperature acquisition module and is used to perform interface conversion on the drive digital control quantities output by the CPU processor and then output them to the TEC drive and temperature acquisition module. It also converts the temperature signals acquired by the TEC drive and temperature acquisition module and sends them to the CPU processor.

[0013] Furthermore, the TEC drive and temperature acquisition module includes an AD conversion circuit module, a temperature acquisition circuit module, a DA conversion circuit module, and a drive circuit module; the input terminal of the temperature acquisition circuit module is connected to the output terminal of the temperature sensor assembly, and the output terminal is connected to the input terminal of the AD conversion circuit module; the output terminal of the AD conversion circuit module (31) is connected to the level conversion circuit module; the input terminal of the DA conversion circuit module is connected to the level conversion circuit module, and the output terminal is connected to the input terminal of the drive circuit module; the output terminal of the drive circuit module is connected to the TEC cooler.

[0014] Furthermore, the AD conversion circuit module and the DA conversion circuit module are 12-bit digital-to-analog mixed circuit chips, and all their control timing is provided by the CPU processor.

[0015] Furthermore, the temperature sensor assembly includes two temperature sensors that serve as backups for each other; the two temperature sensors are disposed on the back of the area array CCD and are located at both ends of the upper-level TEC, respectively, to characterize the cooling temperature of the CCD.

[0016] Furthermore, the CCD detector cooling assembly also includes a tube shell with an opening at the lower end, a molybdenum plate, and a heat sink; the tube shell is disposed on the heat sink, forming a sealed structure filled with rare gas between the tube shell and the heat sink; the area array CCD, temperature sensor assembly, TEC cooler, and molybdenum plate are all located within the sealed structure; the molybdenum plate is disposed on the upper surface of the heat sink, and the hot end of the lower-level TEC is attached to the upper surface of the molybdenum plate.

[0017] Furthermore, the model of the area array CCD is CCD42-80; the detection capability is +22.5Mv, and the temperature control index is -75±2℃.

[0018] Furthermore, the host computer includes a ground inspection computer and a power control box; the ground inspection computer is connected to the power control box; the power control box is connected to the power supply terminals of the CPU control processing module and the TEC drive and temperature acquisition module respectively; the ground inspection computer is communicatively connected to the CPU control processing module.

[0019] A control method for a CCD temperature control system using multi-stage TEC stacking is characterized by the following steps:

[0020] Step S1: After the host computer 1 is powered on, the CPU control and processing module, TEC driver and temperature acquisition module are powered on, and the CPU control and processing module establishes communication with the host computer.

[0021] Step S2: The CPU control processing module is powered on and loads the default control parameters of the upper-level TEC and the lower-level TEC.

[0022] Step S3: Set the temperature control accuracy, temperature control rate, and target temperature value through the host computer. After the settings are completed, the host computer issues a cooling command.

[0023] Step S4: The CPU control processing module performs PID calculations on the upper-level TEC with default parameters based on the current temperature feedback value and the target temperature value of the area array CCD, and outputs a control quantity to the lower-level TEC with a constant output of 1 / 2 full-scale control quantity.

[0024] Step S5: The CPU control processing module compares the current temperature of the area array CCD with the target temperature value based on the control output of the upper-level TEC and the lower-level TEC. If the area array CCD temperature is within ±2℃ of the target temperature, return to step S4; if the area array CCD temperature is outside the target temperature +2℃, proceed to step S6; if the area array CCD temperature is outside the target temperature -2℃, proceed to step S7.

[0025] Step S6: The output control quantity of the lower-level TEC is increased stepwise to 3 / 2 times the current value. Combined with the current temperature rise rate, the step size of the lower-level TEC is controlled to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the array CCD is stable within the range of the target temperature +2℃.

[0026] In step S7, the output control quantity of the lower-level TEC is gradually reduced to half of the current value. At the same time, combined with the current temperature control rate, the step size of the lower-level TEC is controlled to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the array CCD stabilizes within the target temperature range of -2℃.

[0027] Furthermore, the temperature control accuracy setting value in step S3 is ±1℃ or ±2℃; the temperature control rate setting value is 4℃ / m or 3℃ / m.

[0028] Compared with the prior art, the present invention has the following beneficial technical effects:

[0029] 1. The present invention allows the target temperature, temperature control accuracy, and temperature control rate to be set on the host computer according to the actual cooling requirements. The host computer can establish a CCD cooling temperature change model based on the telemetry temperature to evaluate the temperature control accuracy and temperature control rate.

[0030] 2. The CCD temperature control system of the present invention, which utilizes multi-stage TEC stacking, is equipped with a CPU control processing module and a TEC drive and temperature acquisition module. It can automatically adjust the control parameters of the upper-level TEC based on the CCD temperature telemetry digital quantity converted into a temperature value, thereby meeting the requirements of temperature control rate and accuracy within a certain range. Furthermore, it can automatically adjust the control parameters of the lower-level TEC based on the telemetry temperature CCD temperature change model, temperature control accuracy, and target temperature requirements, ensuring temperature control accuracy and expanding the depth of temperature control.

[0031] 3. The present invention applies a CCD temperature control system and control method with multiple independent TEC stacks. According to the CCD temperature change, the CPU software algorithm can actively match the control quantity of the upper TEC to optimize the control parameters of the lower TEC, and establish a lower-level control optimization strategy based on the upper TEC and the target temperature, so as to ensure the temperature control accuracy and expand the temperature control depth under dynamic conditions. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the composition of the CCD temperature control system using multi-stage TEC stacking as described in this invention;

[0033] Figure 2 This is a schematic diagram of the CPU control processing module in an embodiment of the CCD temperature control system using multi-stage TEC stacking according to the present invention;

[0034] Figure 3 This is a schematic diagram of the TEC drive and temperature acquisition module in an embodiment of the CCD temperature control system using multi-stage TEC stacking according to the present invention;

[0035] Figure 4 This is a schematic diagram of the CCD detector cooling component in an embodiment of the CCD temperature control system using multi-stage TEC stacking according to the present invention;

[0036] Figure 5 This is a schematic diagram of the control process of the control method of the CCD temperature control system using multi-stage TEC stacking according to the present invention;

[0037] The annotations in the attached figures are explained as follows:

[0038] 1-Host computer; 2-CPU control and processing module; 3-TEC driver and temperature acquisition module; 4-CCD detector cooling assembly; 21-CAN communication interface; 22-CPU processor; 23-Level conversion circuit module; 31-AD conversion circuit module; 32-Temperature acquisition circuit module; 33-DA conversion circuit module; 34-Drive circuit module; 41-Area array CCD; 42-Temperature sensor assembly; 43-Upper-level TEC; 44-Lower-level TEC; 45-Shell. Detailed Implementation

[0039] To make the objectives, advantages, and features of the present invention clearer, the following detailed description of the CCD temperature control system and control method using multi-stage TEC stacking proposed in this invention, in conjunction with the accompanying drawings and specific embodiments, is provided. Those skilled in the art should understand that these embodiments are merely used to explain the technical principles of the present invention and are not intended to limit the scope of protection of the present invention.

[0040] This invention applies a multi-stage TEC stacked CCD temperature control system, using a customized CCD detector cooling assembly for astronomical observation as an example. It aims to meet temperature control requirements under various conditions, including cooling depth, cooling accuracy, cooling rate, and maneuvering. The optimal matching control parameters for the upper-stage TEC43 and lower-stage TEC44 are determined to satisfy these requirements. The target cooling temperature for the CCD detector is -75±2℃, the hot-end temperature range is -21℃ to -60℃, and the temperature control rate is no greater than 4℃ / min. The optimal matching parameters include the control parameters of the upper-stage TEC43 and the optimal control values ​​of the lower-stage TEC44. Maneuvering conditions refer to changes in load attitude where the hot-end temperature range of the heat dissipation surface suddenly increases by within +10%.

[0041] like Figure 1 As shown, the CCD temperature control system of the present invention, which utilizes multi-stage TEC stacking, consists of the following modules: a host computer 1, a CPU control and processing module 2, a TEC driver and temperature acquisition module 3, and a CCD detector cooling assembly 4. The host computer 1 includes a ground-based computer and a power command control box. The command control box is used for power supply and distribution control of the temperature control system, controlling the system hardware with a power-off switch during ground testing, setting the system control mode and control parameters, and processing telemetry return information on the ground. The ground-based computer sets the target temperature and temperature control accuracy, and plots real-time telemetry return curves of the controlled object's temperature and the heat dissipation surface temperature, providing real-time evaluation of temperature control accuracy and rate.

[0042] After the ground inspection computer is powered on, the ground inspection system is started. The power control box is powered on, and the CPU control processing module 2 and the TEC drive and temperature acquisition module 3 are powered on and establish communication with the ground inspection computer. This allows for the input of control system modes and control command parameters on the ground and the transmission of test return parameters. Data analysis and curve plotting are performed synchronously on the ground inspection computer.

[0043] like Figure 2As shown, the CPU control processing module 2 includes a CAN communication interface 21, a CPU processor 22, and a level conversion circuit module 23. The CAN communication interface 21 is used to receive protocol instructions and transmit various parameters returned by the protocol telemetry to the host computer 1. The CPU processor 22 is used to parse the various instructions and control parameters transmitted by the host computer 1, and configure the working state of each digital-analog circuit according to the parsed data and the stored program software algorithm. Here, the working state of the digital-analog circuit is issued by the ground detection software of the host computer 1, transmitted through the CAN communication interface 21, parsed by the CPU processor 22, output by the CPU's I / O interface, and connected to the control interface of the AD conversion circuit module 31, temperature acquisition circuit module 32, DA conversion circuit module 33, and drive circuit module 34 through the level conversion circuit module 23. The CPU control processing module 2 outputs the digital control timing of the digital-analog circuit, and at the same time analyzes the various telemetry acquisition quantities required by the control algorithm, calculates the temperature control quantity of the upper-level TEC43 in a closed loop, and focuses on finding a reasonable control quantity to match the lower-level TEC44. After completing the calculation, it outputs the digital values ​​of the drive control of the two TECs in real time.

[0044] The CPU processor 22 includes a temperature change mismatch module and an optimization control system calculation module. The temperature change mismatch module is used to calculate the difference between the current CCD temperature and the target set temperature, whether it is within the target temperature control accuracy (±1℃ or ±2℃), and whether the temperature change rate meets the set temperature control rate requirements (4℃ / m or 3℃ / m). The optimization control calculation module is used to calculate the lower-level TEC44 digital control quantities.

[0045] The level conversion circuit module 23 consists of a level array composed of multiple identical chips, the chip model being HCC40109. Its function is to convert the output digital and control signal levels of the CPU into levels that are compatible with the logic and digital signals received by the circuit in the TEC driver and temperature acquisition module 3, thereby realizing the logic control of the TEC driver and temperature acquisition module 3 and the interface conversion of the front-end and back-end circuit levels.

[0046] The core of CPU control processing module 2 lies in processing telemetry parameters, including the temperature value of the temperature sensor encapsulated inside the detector package, representing the current cooling temperature. The control strategy of the upper-level TEC is based on PID constant current control. Since the lower-level TEC lacks direct temperature feedback telemetry, its control strategy is based on the difference between the current temperature of the controlled object and the target temperature, combined with the control input of the upper-level TEC, to optimize and match the constant current control input of the lower-level TEC, thereby improving control efficiency and the ability to adjust randomly.

[0047] like Figure 3As shown, the TEC drive and temperature acquisition module 3 includes an AD conversion circuit module 31, a temperature acquisition circuit module 32, a DA conversion circuit module 33, and a drive circuit module 34. The digital control quantity obtained by the CPU processor 22 through analysis and calculation is converted into a voltage operation analog quantity through the level conversion circuit module 23 and the DA conversion circuit module 33, and then the drive circuit module 34 realizes the precise control of the TEC drive current.

[0048] The level conversion circuit module 23 converts the analog signal of the temperature sensor into a digital quantity according to the control timing output by the CPU processor 22 and transmits it to the CPU processor 22, providing the analog conversion quantity required by the processing analysis and calculation module.

[0049] like Figure 4 As shown, the temperature control system of this invention is mainly applied to a customized CCD detector cooling assembly 4 for astronomical observation. This CCD detector cooling assembly 4 consists of a CCD array 41, two independent single-stage TECs of different models stacked together (upper-stage TEC 43 and lower-stage TEC 44), and a pair of temperature sensors installed at the cold end of the upper-stage TEC 43 (characterizing the detector's cooling temperature). The CCD detector cooling assembly 4 is housed within a tube shell 45 with an opening at the lower end. The tube shell 45 is mounted on a heat sink, and the entire structure is encapsulated in a sealed structure filled with rare gas. The two TECs utilize the control platform designed in this invention, forming a good temperature control path based on parameters such as the target temperature and temperature sensor feedback.

[0050] The CCD41 array is model CCD42-80 manufactured by E2V. The system detection capability needs to reach +22.5Mv (signal-to-noise ratio > 5). To meet the signal-to-noise ratio requirement, the temperature control specification of the CCD detector cooling assembly 4 is -75±2℃. Two TECs stacked and packaged in the CCD detector cooling assembly 4 are the upper-level TEC CP14.71.10L and the lower-level TEC CP14.71.06L. A PT1000 temperature sensor pair is installed on the cold end of the upper-level TEC43 to characterize the CCD cooling temperature. Two sensors are used as backups and are installed symmetrically. The cold end of the upper-level TEC43 is directly attached to the back substrate of the CCD detector cooling assembly 4, and the cold end of the lower-level TEC44 is attached to the hot end of the upper-level TEC43. The heat conduction device achieves heat conduction through a molybdenum plate attached to the hot end of the lower-level TEC44. The hot end of the lower-level TEC44 is connected to the heat sink through the molybdenum plate. Two temperature sensors are installed on the cold side of the back of the detector to measure the current temperature of the back of the actual detector, and also serve as the temperature feedback quantity of the temperature control system.

[0051] Since the hot end of the TEC dissipates heat to the external hot and cold environment through a molybdenum plate and a heat sink, the temperature change of the hot end fluctuates greatly with changes in the ambient environment. In a CCD temperature control system using multiple stacked TECs, this invention actively matches the control input of the upper-level TEC to optimize the control parameters of the lower-level TEC through a CPU software algorithm, establishing a lower-level control optimization strategy based on the upper-level TEC and the target temperature. The specific methods and procedures for the control process and the joint optimization control process between the upper and lower TECs are as follows: Figure 5 As shown, it includes the following steps:

[0052] Step S1: After the host computer 1 is powered on, the CPU control and processing module 2 and the TEC drive and temperature acquisition module 3 are powered on and establish communication with the host computer 1.

[0053] Step S2: Load the default control parameters of the upper-level TEC43 and the lower-level TEC44. First, the upper-level TEC43 uses the current temperature feedback and target value to perform PID process control based on the default parameters, and the lower-level TEC44 performs control with the default control value. At the same time, the CPU control processing module 2 calculates the current temperature control rate of the CCD.

[0054] Step S3 involves setting the temperature control accuracy, temperature control rate, and target temperature value. These settings are configured on the control interface of the host computer 1. The temperature control accuracy can be set to ±1℃, ±2℃, etc., and the temperature control rate can be set to 4℃ / m, 3℃ / m, etc. These settings are used for software calculations during the temperature control process.

[0055] Step S4: The CPU control processing module 2 performs PID calculation of the upper-level TEC43 with default parameters based on the current temperature feedback value and the target temperature value of the area array CCD41, and outputs the control quantity, and outputs a constant 1 / 2 full-scale control quantity to the lower-level TEC44.

[0056] The optimization process of this invention is as follows: when the cooling control is started, the CPU control processing module 2 first performs PID calculation of the upper-level TEC43 with default parameters based on the current temperature feedback value of the CCD detector cooling component 4 and the target temperature, and outputs the control quantity. Since the lower-level TEC44 lacks direct temperature feedback, the first step directly adopts 1 / 2 full-scale control quantity and outputs 1 / 2 full-scale control value at a constant value. The full-scale design digital quantity range is (48-4048).

[0057] Due to changes in the space environment, satellite pointing direction, and maneuvering, the hot end temperature of the TEC fluctuates significantly. During temperature control, only the upper-level TEC full-range PID control and the lower-level constant TEC control are insufficient to meet the temperature control requirements of keeping the controlled object temperature stable at ±2℃ when the hot end temperature changes rapidly during cooling depth and maneuvering.

[0058] Step S5: The CPU control processing module 2 compares the current temperature of the area array CCD 41 with the target temperature value based on the control output of the upper-level TEC43 and the lower-level TEC44. If the temperature of the area array CCD 41 is within ±2℃ of the target temperature, the process returns to step S4; if the temperature of the area array CCD 41 is outside the target temperature +2℃, the process proceeds to step S6; if the temperature of the area array CCD 41 is outside the target temperature -2℃, the process proceeds to step S7.

[0059] Step S6, the output control quantity of the lower-level TEC (44) is increased stepwise to 3 / 2 times the current value. Combined with the current temperature rise rate, the stepwise growth step of the lower-level TEC (44) is controlled to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD (41) is stable within the range of the target temperature +2℃.

[0060] In step S7, the output control quantity of the lower-level TEC (44) is gradually reduced to 1 / 2 of the current value. At the same time, combined with the current temperature control rate, the step size of the lower-level TEC (44) is controlled to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD (41) is stable within the target temperature range of -2℃.

[0061] The specific calculation process is as follows: If the current CCD temperature is higher than the target temperature +2℃, and the calculated value of the upper-level TEC 43 PID has exceeded 2 / 3 of the full range, the output control quantity of the lower-level TEC 44 increases stepwise to 3 / 2 times the current value. Simultaneously, based on the current temperature rise rate, the step size of the lower-level TEC 44 is controlled to ensure that the temperature change rate does not exceed the set value in step S3, until the current temperature of the controlled object CCD stabilizes within the target temperature +2℃ range. Similarly, if the current CCD temperature is lower than the target temperature -2℃, and the calculated value of the upper-level TEC 43 PID has exceeded 1 / 3 of the full range, the output control quantity of the lower-level TEC 44 decreases stepwise to 1 / 2 times the current value. Simultaneously, based on the current temperature control rate, the step size of the lower-level TEC 44 is controlled to ensure that the temperature change rate does not exceed the set value in step S3, until the current temperature of the controlled object CCD stabilizes within the target temperature -2℃ range.

[0062] The optimization control strategy in the control method of this invention relies on the aforementioned hardware platform, has undergone comprehensive testing and verification in engineering projects using thermo-optics and thermo-vacuum methods, and has achieved stable working results on on-orbit space payloads.

[0063] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the present invention.

Claims

1. A control method for a CCD temperature control system employing multi-stage TEC stacking, characterized in that, Includes the following steps: Step S1: After the host computer (1) is powered on, the CPU control processing module (2) and the TEC drive and temperature acquisition module (3) are powered on, and the CPU control processing module (2) establishes communication with the host computer (1). Step S2, the CPU control processing module (2) is powered on and the default control parameters of the upper-level TEC (43) and the lower-level TEC (44) are loaded; Step S3: Set the temperature control accuracy, temperature control rate and target temperature value through the host computer (1). After the setting is completed, the host computer (1) issues a cooling command. Step S4, the CPU control processing module (2) calculates the PID control quantity of the upper-level TEC (43) based on the current temperature feedback value and target temperature value of the area array CCD (41) and outputs a control quantity of 1 / 2 full scale to the lower-level TEC (44). Step S5: The CPU control processing module (2) compares the current temperature of the area array CCD (41) with the target temperature value according to the control output of the upper-level TEC (43) and the lower-level TEC (44). If the temperature of the area array CCD (41) is within ±2℃ of the target temperature, it returns to step S4; if the temperature of the area array CCD (41) is outside the target temperature +2℃, it proceeds to step S6; if the temperature of the area array CCD (41) is outside the target temperature -2℃, it proceeds to step S7. Step S6, the output control quantity of the lower-level TEC (44) is increased stepwise to 3 / 2 times the current value. Combined with the current temperature rise rate, the step size of the lower-level TEC (44) is controlled to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD (41) is stable within the range of the target temperature +2℃. In step S7, the output control quantity of the lower-level TEC (44) is gradually reduced to 1 / 2 of the current value. At the same time, combined with the current temperature control rate, the step size of the lower-level TEC (44) is controlled to ensure that the temperature change rate is not greater than the set value in step S3, until the current temperature of the area array CCD (41) is stable within the target temperature range of -2℃.

2. The control method of the CCD temperature control system using multi-stage TEC stacking according to claim 1, characterized in that: In step S3, the temperature control accuracy is set to ±1℃ or ±2℃; the temperature control rate is set to 4℃ / m or 3℃ / m.

3. A CCD temperature control system using the control method of the CCD temperature control system with multi-stage TEC stacking as described in claim 1, characterized in that: It includes a host computer (1), a CPU control and processing module (2), a TEC drive and temperature acquisition module (3), and a CCD detector cooling assembly (4); the CPU control and processing module (2) is connected to the host computer (1) and the TEC drive and temperature acquisition module (3) respectively, and the CCD detector cooling assembly (4) is connected to the TEC drive and temperature acquisition module (3). The CCD detector cooling assembly (4) includes an area CCD (41), a temperature sensor assembly (42), and a TEC cooler; the TEC cooler consists of two independent single-stage TEC coolers; the TEC cooler includes a stacked upper-stage TEC (43) and a lower-stage TEC (44), with the cold end of the upper-stage TEC (43) attached to the back of the area CCD (41); the temperature sensor assembly (42) is located on the back of the area CCD (41); the cold end of the lower-stage TEC (44) is attached to the hot end of the upper-stage TEC (43); the output end of the temperature sensor assembly (42) is connected to the temperature input end of the temperature acquisition module (3); the input end of the TEC cooler is connected to the drive output end of the temperature acquisition module (3). The CPU control processing module (2) is used to receive protocol instructions and transmit various parameters returned by the telemetry protocol to the host computer (1); parse the instructions and control parameters transmitted by the host computer (1), configure the working status of the TEC drive and temperature acquisition module (3), output the digital control timing of the TEC drive and temperature acquisition module (3), calculate the temperature control quantity of the upper-level TEC (43) in closed loop, design the control quantity of the lower-level TEC (44) and output it in real time.

4. The CCD temperature control system with multi-stage TEC stacking according to claim 3, characterized in that: The CPU control processing module (2) includes a CAN communication interface (21), a CPU processor (22), and a level conversion circuit module (23); the CPU processor (22) is connected to the CAN communication interface (21) and the level conversion circuit module (23) respectively; the CAN communication interface (21) is connected to the host computer (1) and is used to receive various instructions and control parameters transmitted from the host computer (1) and forward them to the CPU processor (22), and to receive the protocol instructions and various parameters returned by the telemetry of the transmission protocol from the CPU processor (22) and send them to the host computer (1); the CAN communication interface (21) is connected to the host computer (1) and is used to receive various instructions and control parameters transmitted from the host computer (1) and forward them to the CPU processor (22); the CPU processor (22) is connected to the CPU processor (22) and the level conversion circuit module (23) respectively. The U processor (22) is used to parse the various instructions and control parameters transmitted by the host computer (1), and calculate and output the control quantities of the upper-level TEC (43) and the lower-level TEC (44) in real time according to the feedback temperature and the target temperature; the level conversion circuit module (23) is connected to the TEC drive and temperature acquisition module (3), and is used to convert the drive digital control quantity output by the CPU processor (22) to the TEC drive and temperature acquisition module (3) and send the temperature signal acquired by the TEC drive and temperature acquisition module (3) to the CPU processor (22) after level conversion.

5. The CCD temperature control system using multi-stage TEC stacking as described in claim 4, characterized in that: The TEC drive and temperature acquisition module (3) includes an AD conversion circuit module (31), a temperature acquisition circuit module (32), a DA conversion circuit module (33), and a drive circuit module (34). The input terminal of the temperature acquisition circuit module (32) is connected to the output terminal of the temperature sensor assembly (42), and the output terminal is connected to the input terminal of the AD conversion circuit module (31). The output terminal of the AD conversion circuit module (31) is connected to the level conversion circuit module (23). The input terminal of the DA conversion circuit module (33) is connected to the level conversion circuit module (23), and the output terminal is connected to the input terminal of the drive circuit module (34). The output terminal of the drive circuit module (34) is connected to the TEC cooler.

6. The CCD temperature control system using multi-stage TEC stacking as described in claim 5, characterized in that: The AD conversion circuit module (31) and DA conversion circuit module (33) are 12-bit digital-to-analog mixed circuit chips, and all their control timing is provided by the CPU processor (22).

7. The CCD temperature control system using multi-stage TEC stacking as described in claim 6, characterized in that: The temperature sensor assembly (42) includes two temperature sensors that are backups of each other; the two temperature sensors are located on the back of the area array CCD (41) and at both ends of the upper TEC (43) respectively, and are used to characterize the cooling temperature of the CCD.

8. The CCD temperature control system using multi-stage TEC stacking according to claim 7, characterized in that: The CCD detector cooling assembly (4) also includes a tube shell (45) with an opening at the lower end, a molybdenum plate, and a heat sink. The tube shell (45) is disposed on the heat sink, forming a sealed structure filled with rare gas between it and the heat sink. The area array CCD (41), temperature sensor assembly (42), TEC cooler, and molybdenum plate are all located within the sealed structure. The molybdenum plate is disposed on the upper surface of the heat sink, and the hot end of the lower-level TEC (44) is attached to the upper surface of the molybdenum plate.

9. The CCD temperature control system using multi-stage TEC stacking according to claim 8, characterized in that: The model of the area array CCD (41) is CCD42-80; the detection capability is +22.5Mv and the temperature control index is -75±2℃.

10. The CCD temperature control system using multi-stage TEC stacking according to claim 9, characterized in that: The host computer (1) includes a ground inspection computer and a power control box; the ground inspection computer is connected to the power control box; the power control box is connected to the power supply terminals of the CPU control processing module (2) and the TEC drive and temperature acquisition module (3) respectively; the ground inspection computer is communicatively connected to the CPU control processing module (2).

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