Current compensation circuit, logarithmic detector, and chip

Abstract

Embodiments of the present disclosure disclose a current compensation circuit, a logarithmic detector, and a chip. The current compensation circuit includes: a current mirror including a first transistor and a second transistor, the first transistor and the second transistor respectively including a first end, a second end, and a control end, the current mirror being configured to mirror a first current flowing through the first end of the first transistor to the first end of the second transistor, and the first end of the second transistor outputting a compensation current; a resistor module connected to the first end of the first transistor, the resistance value of the resistor module and a first voltage at the first end of the first transistor being used to determine the magnitude of the first current; a fuse module connected to the resistor module and / or the first end of the first transistor, configured to output a first control signal based on a blown state, the first control signal being used to calibrate the resistance value of the resistor module and / or the magnitude of the first voltage.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of electronic devices, including but not limited to a current compensation circuit, a logarithmic detector, and a chip. Background Art

[0002] Common detectors or signal processors often have detection or processing errors due to process corner mismatch and process deviation, so accuracy calibration is required. For example: detectors, ring oscillators, amplifiers, etc.

[0003] Taking the logarithmic detector as an example, it is often used to measure and detect the amplitude of a signal, and has the characteristic of converting an input signal into an output voltage or current proportional to the logarithm of the input signal. Logarithmic detectors are mainly used in devices such as radar, satellite communication, microwave point-to-point communication, test instruments, and radio spectrum monitoring, and are suitable for application scenarios such as signal strength indication, broadband spectrum detection, fault detection, and automatic gain control.

[0004] Due to process corner mismatch and process deviation, different logarithmic detectors affect the performance of the logarithmic detector, resulting in different logarithmic curves for different logarithmic detectors, thereby causing a deviation in the intercept of the logarithmic curve, where the logarithmic curve is the curve of the output voltage versus the input power.

[0005] The deviation of devices such as logarithmic detectors can be adjusted by means of current correction to compensate for the performance differences of different devices themselves. Therefore, how to achieve current calibration is one of the problems that need to be considered in this field. Summary of the Invention

[0006] In view of this, embodiments of the present disclosure provide a current compensation circuit, a logarithmic detector, and a chip for outputting an adjustable current.

[0007] On the one hand, embodiments of the present disclosure provide a current compensation circuit, including:

[0008] A current mirror, including a first transistor and a second transistor, the first transistor and the second transistor respectively include a first end, a second end, and a control end, the current mirror is configured to mirror a first current flowing through the first end of the first transistor to the first end of the second transistor, and a compensation current is output from the first end of the second transistor;

[0009] A resistor module, connected to the first end of the first transistor, the resistance value of the resistor module and the first voltage at the first end of the first transistor are used to determine the magnitude of the first current;

[0010] The fuse module is connected to the first end of the resistor module and / or the first transistor, and is configured to output a first control signal based on a fusing state, where the first control signal is used to calibrate the resistance value of the resistor module and / or the magnitude of the first voltage.

[0011] In the current compensation circuit according to the embodiments of the present disclosure, the fuse module is a programmable memory, which stores data based on the fusing state of internal fuses, and the internal fuses are fused based on the magnitude of the compensation current to be output; the fuse module outputs a first control signal according to the fusing state, and the first control signal is used to calibrate the resistance value of the resistor module and / or the magnitude of the first voltage. The resistance value of the resistor module and the first voltage at the first end of the first transistor are used to determine the magnitude of the first current. Thus, through adjustment, the first voltage at the first end of the first transistor of the current mirror and / or the resistance value of the resistor module can be adjusted by the fuse module, and further the magnitude of the first current can be adjusted; and the compensation current is a copy of the first current, and the compensation current changes with the first current. Therefore, the magnitude of the compensation current can be adjusted by the first control signal output by the fuse module, realizing precise calibration of the magnitude of the compensation current, which is beneficial to improving the calibration accuracy and calibration efficiency.

[0012] When the fuse module is connected to both the resistor module and the first end of the first transistor at the same time, the first control signal is used to calibrate the resistance value of the resistor module and the magnitude of the first voltage, so that at least two-dimensional adjustment of the first voltage and the resistance value of the resistor module can be achieved through the fuse module, and multi-level adjustment of the compensation current output by the current compensation circuit can be realized, thereby further improving the accuracy of the compensation current.

[0013] In some embodiments, the resistor module includes one or more variable resistor units connected in series and one or more resistor array units. At this time, the resistance value can be adjusted by the variable resistor units or the resistor array units. That is to say, the resistance value has two-level adjustment. Coupled with the adjustment of the first voltage value, the current compensation circuit can achieve three-level adjustment in total, thereby realizing precise calibration of the magnitude of the compensation current, which is beneficial to improving the calibration accuracy and calibration efficiency.

[0014] In addition, applying the current output circuit to the logarithmic detection component to calibrate the logarithmic detector can calibrate the intercept of the logarithmic curve of the logarithmic detector by debugging the current output circuit, effectively reducing the abnormal deviation of the intercept of the logarithmic curve caused by process foot mismatch and process deviation of different logarithmic detector products, thereby improving the detection accuracy of the logarithmic detection component and improving the product yield. Description of the Drawings

[0015] Figure 1 It is a circuit structure block diagram of a logarithmic detector in the embodiments of the present disclosure;

[0016] Figure 2 It is a circuit structure block diagram for calibrating the intercept of a logarithmic detector in an embodiment of the present disclosure;

[0017] Figure 3 It is a schematic diagram of a current compensation circuit provided by an embodiment of the present disclosure;

[0018] Figure 4 It is a schematic diagram of another current compensation circuit provided by an embodiment of the present disclosure;

[0019] Figure 5 It is a schematic diagram of the current compensation circuit and one of its resistor modules provided by an embodiment of the present disclosure;

[0020] Figure 6 It is a schematic diagram of the resistance characteristic curve of a MOS transistor in an embodiment of the present disclosure;

[0021] Figure 7A and Figure 7B They are respectively schematic diagrams of two resistor array units in the current compensation circuit provided by an embodiment of the present disclosure;

[0022] Figure 8 It is a schematic diagram of the current compensation circuit and its voltage follower provided by an embodiment of the present disclosure;

[0023] Figure 9 It is a schematic diagram of the structure of the voltage switching module in the current compensation circuit provided by an embodiment of the present disclosure;

[0024] Figure 10 It is a schematic diagram of the structure of the fuse module in the current compensation circuit provided by an embodiment of the present disclosure;

[0025] Figure 11 It is a schematic diagram of yet another current compensation circuit provided by an embodiment of the present disclosure;

[0026] Figure 12 It is a flowchart of a calibration method for a logarithmic detector provided by an embodiment of the present disclosure;

[0027] Figure 13 It is a structure block diagram of a chip provided by an embodiment of the present disclosure. Detailed implementation manners

[0028] To facilitate the understanding of the present disclosure, the present disclosure will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present disclosure more thorough and comprehensive.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this disclosure pertains. The terms used in the description of this disclosure herein are for the purpose of describing specific embodiments only and are not intended to limit this disclosure. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items. In the embodiments of this disclosure, the terms "first", "second", "third", and "fourth" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, features defined with "first", "second", "third", and "fourth" may explicitly or implicitly include one or more of such features.

[0030] It should be understood that in the description of the embodiments of this disclosure, it should be noted that unless otherwise clearly specified and limited, the terms "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a direct connection or an indirect connection through an intermediate medium, and it may be the internal communication of two components.

[0031] The following are the explanations of the terms related to the embodiments of this disclosure:

[0032] Logarithmic detector: Used to measure and detect the amplitude of a signal, and the DC signal (such as a voltage signal) output is proportional to the logarithm of the input signal voltage amplitude.

[0033] Logarithmic curve: The curve of the DC voltage signal output by the logarithmic detector changing with the input signal. The abscissa of the logarithmic curve is the signal power of the input RF signal. Exemplarily, the unit of the RF signal power can be decibel-milliwatt (dBm). The ordinate of the logarithmic curve is the DC voltage of the output signal, and the unit can be volt (V) or millivolt (mV).

[0034] Intercept of the logarithmic curve: The voltage value corresponding to the intersection point of the logarithmic curve and the vertical coordinate axis. The intercept of the logarithmic curve can also be understood as the output offset of the logarithmic detector.

[0035] Logarithmic amplifier: An amplifier with a logarithmic amplification relationship between input and output.

[0036] Efuse programming: Efuse is a fuse-like device and belongs to a one-time programmable memory. Usually, a certain device is blown or shorted by a large current to achieve a one-time change in the circuit.

[0037] Process Corner: It refers to the different process variations and parameter variations considered during the design and manufacturing of chips. On a wafer, it is impossible for the average drift velocity of carriers in each chip to be the same. With different voltages and temperatures, the characteristics of different chips will also be different. Classifying different process characteristics gives rise to characteristics such as PVT (Process, Voltage, Temperature). And the process characteristics are further divided into different process limits, which are called process corners. There will be a certain degree of dispersion in the logarithmic characteristics of detector chips under different process corners.

[0038] The logarithmic detector is based on the working principle of a logarithmic amplifier. It amplifies the input signal after taking the logarithm, and then performs an antilogarithmic operation on the amplified signal to finally obtain a DC output signal. Because it performs logarithmic and antilogarithmic operations, there is a linear relationship between the input signal and the DC output signal of the logarithmic detector. Logarithmic detectors are mainly used in devices such as radar, satellite communication, microwave point-to-point communication, test instruments, and radio spectrum monitoring, and are suitable for application scenarios such as signal strength indication, broadband spectrum detection, fault detection, and automatic gain control. Logarithmic detectors have good application prospects and research significance.

[0039] Such as Figure 1 is a circuit structure block diagram of a logarithmic detector, and the logarithmic detector is used to implement logarithmic detection. Such as Figure 1 shown, the logarithmic detector 100 is composed of multiple modules, including a radio frequency logarithmic amplifier 110, a current operation module 120, an output module 130, and a feedback module 140, etc. After the radio frequency signal RF to be detected is input, it will be logarithmically amplified by the radio frequency logarithmic amplifier 110 and output a current I corresponding to the amplitude; the current operation module 120 realizes the addition or subtraction operation of the input current and outputs a current; the output module 130 converts the current into a DC voltage (DC) output. The logarithmic detector may also include a feedback module 140. The input end of the feedback module 140 is connected to the output end of the output module 130, and the output end of the feedback module 140 is connected to the input end of the current operation module 120. After the feedback module 140 converts the voltage of the DC output into a current, it outputs it to the current operation module 120. Through the feedback loop formed by the feedback module 140, it is beneficial to achieve a stable DC voltage output. In some cases, there is also an antilogarithmic circuit between the radio frequency logarithmic amplifier 110 and the current operation module 120. The antilogarithmic circuit can use the exponential characteristics of diodes or transistors to perform an antilogarithmic operation on the current I. The current I after the antilogarithmic operation has a linear relationship with the radio frequency signal RF.

[0040] In some embodiments, the input terminal of the feedback module 140 may not be connected to the output terminal of the output module 130, but instead a fixed voltage may be provided to the input terminal of the feedback module 140. However, Figure 1 the circuit shown cannot achieve calibration of the intercept of the logarithmic curve. If the intercept of the logarithmic curve is not calibrated, there will be a certain degree of dispersion in the logarithmic curves of the logarithmic detectors in different batches of wafers or different wafer regions, thereby affecting the screening of good products.

[0041] It can be understood that the logarithmic detector amplifies the input radio frequency signal through a logarithmic amplifier and outputs a current corresponding to the amplitude. The magnitude of the output current is in one-to-one correspondence with the signal to be detected (i.e., the amplitude of the input radio frequency signal). Taking Figure 1 the logarithmic detector shown with a negative slope logarithmic curve as an example: Assume that the slope of the logarithmic curve of the logarithmic detector is 20 mV / dBm, the power of the signal to be detected is -20 dBm, the current I flowing into the current operation module is 0.6 mA, and the DC DC voltage output by the output module 130 is 0.8 V; due to process dispersion, the output voltages of chips in different batches are 0.7 V to 0.9 V. This may be due to the deviation of the logarithmic amplifier caused by the process, resulting in a deviation in the current I output by the logarithmic amplifier, and thus a deviation in the current I flowing into the current operation module 120. For example, the current I flowing into the current operation module 120 of chips in different batches is between 0.5 mA and 0.7 mA. In this way, for the same radio frequency input signal, the detected values will have a difference of 0.2 V / (20 mV / dBm) = 10 dBm, resulting in a large intercept error in the logarithmic curves detected by different batches of detectors.

[0042] Embodiments of the present disclosure provide a solution that can be used to calibrate the intercept of a logarithmic detector. As Figure 2 shown, this solution uses a current compensation circuit 200 to output a compensation current I0 and provide it to the current operation module 120 of the logarithmic detector 100. Among them, the current compensation circuit 200 includes a fuse module for fixing the value of the compensation current I0. Specifically, in the calibration stage before use, first determine the magnitude of the required compensation current I0 according to the value of the DC DC output voltage; then, according to the magnitude of the required compensation current I0, program the fuse module in the current compensation circuit 200 to ensure that the current compensation circuit 200 can output a compensation current I0 of appropriate magnitude; during operation, the first control signal output by the fuse module in the current compensation circuit 200 can cause the current compensation circuit 200 to output an appropriate compensation current I0, thereby effectively compensating for the intercept error of the logarithmic curve of the logarithmic detector caused by batch differences.

[0043] Specifically, embodiments of the present disclosure provide a current compensation circuit. As Figure 3As shown, the current compensation circuit 200 provided by the embodiments of the present disclosure includes:

[0044] A current mirror 220, including a first transistor 221 and a second transistor 222. The first transistor 221 and the second transistor 222 respectively include a first end, a second end, and a control end. The current mirror 220 is configured to mirror a first current I1 flowing through the first end of the first transistor 221 to the first end of the second transistor 222, and a compensation current I0 is output from the first end of the second transistor 222. Wherein, the voltage at the first end of the first transistor 221 is a first voltage V1;

[0045] A resistor module 230, connected to the first end of the first transistor 221. The resistor module 230 can be connected in series between the first end of the first transistor 221 and the ground. The resistance value R of the resistor module 230 and the first voltage V1 are used to determine the magnitude of the first current I1;

[0046] A fuse module 210, which can include multiple fuses. The blown state of the fuses is used to store data, and the blown state of the internal fuses can reflect the magnitude of the compensation current. The fuse module 210 is connected to the resistor module 230 and / or the first end of the first transistor 221. The figure shows the case where the fuse module 210 is respectively connected to the resistor module 230 and the first end of the first transistor 221. The fuse module 210 is used to output a first control signal T1 based on the blown state, and the first control signal T1 is used to calibrate the magnitude of the resistance value R of the resistor module 230 and / or the magnitude of the first voltage V1.

[0047] In the embodiments of the present disclosure, the currents in the two current branches of the current mirror 220 are mirrored to each other. Therefore, the magnitude of the compensation current I0 output from the other branch (the branch where the second transistor 222 is located) can be changed by adjusting the magnitude of the first current I1 in one branch (the branch where the first transistor 221 is located). Therefore, the relevant components for adjusting the first current I1 can be connected to the first end or the second end of the first transistor 221, so as to control the magnitude of the first current I1 in the current path where the first transistor 221 is located.

[0048] It should be noted that the current mirror can be a mirror structure including two transistors. The structure of the current mirror can include a reference transistor and a mirror transistor. The control ends of the two transistors are connected, so they have the same on state. The current in the current path where the reference transistor is located will be completely mirrored to the current path where the mirror transistor is located, that is, the mirror current is made equal to the reference current (which can be provided by a current source connected in series with the reference transistor). It can be understood that if the sizes (channel width-to-length ratios) of the reference transistor and the mirror transistor are different, then the mirrored current can also have a corresponding proportional relationship with the reference current. Therefore, a fixed proportional output current can be output using the current mirror.

[0049] In one embodiment, the current mirror may be a PMOS current mirror, and both the first transistor 221 and the second transistor 222 are PMOS. Therefore, the second ends of both the first transistor 221 and the second transistor 222 are connected to the power supply terminal VDD, and the resistor module 230 is connected between the first end of the first transistor 221 and the ground terminal GND. In another embodiment, the current mirror may also be an NMOS current mirror, and both the first transistor 221 and the second transistor 222 are NMOS. Therefore, the second ends of both the first transistor 221 and the second transistor 222 are connected to the ground terminal GND, and the resistor module 230 is connected between the first end of the first transistor 221 and the power supply terminal VDD. In some other embodiments, the current mirror 220 may also be a self - biased current mirror, a Wilson current mirror, a "cascode" current mirror, etc.; in addition, the first transistor 221 may include two or more transistors connected in sequence from source to drain, and the second transistor 222 may also include two or more transistors connected in sequence from source to drain. In a self - biased current mirror, for example, in a self - biased current mirror and a "cascode" current mirror, both the first transistor 221 and the second transistor 222 include more than two transistors; in a Wilson current mirror, the first transistor 221 and the second transistor 222 may also be triodes.

[0050] In the embodiments of the present disclosure, the first transistor 221 serves as the reference transistor in the current mirror 220, and the second transistor 222 serves as the mirror transistor in the current mirror 220. The embodiments of the present disclosure are described by taking the first transistor and the second transistor having the same size (the output compensation current I0 being equal to the first current I1) as an example. In practical applications, the proportional relationship between the sizes of the first transistor and the second transistor can also be set according to requirements, so as to obtain a compensation current I0 that is in a fixed ratio to the first current I1.

[0051] In the embodiments of the present disclosure, the first transistor 221 and the resistor module 230 are connected in series on the current path of the first current I1. The fuse module 210 is used to adjust the resistance value of the resistor module 230 or adjust the first voltage V1 at the first end of the first transistor 221 to adjust the magnitude of the first current I1, so that the magnitude of the output compensation current I0 can be adjusted by the fuse module 210.

[0052] In the embodiments of the present disclosure, the magnitude of the first current I1 can be adjusted by the fuse module 210. Specifically, the fuse module 210 has a one - time editable ability. It can be written with a first control signal T1, and the first control signal T1 can be applied to the first end of the first transistor 221 to adjust the first voltage V1, or applied to the resistor module 230 to adjust the resistance value of the resistor module 230, thereby realizing the editing of the magnitude of the first current I1.

[0053] For process deviations of logarithmic detectors or other devices such as amplifiers, calibration can be performed before product use to determine the magnitude of the required compensation current I0. Therefore, after determining the required compensation current I0, the fuse module 210 can be used for one-time editing to output a specified first control signal T1, and then a first current I1 corresponding to and equal to the required compensation current I0 can be obtained.

[0054] The first control signal T1 output by the fuse module 210 can include one or more, which are respectively used to calibrate the resistance value of the resistance module 230 and the magnitude of the first voltage V1. In this way, the control of the first current I1 can be realized from at least two dimensions, and then coarse calibration and fine calibration can be realized. Exemplarily, the fuse module 210 can include multiple fuse arrays, and different fuse arrays are used to output different first control signals T1.

[0055] In addition, the current compensation circuit can also include one or more resistance modules connected in series or parallel on the path of the first current I1, and each resistance module can have an adjustable resistance value respectively. Exemplarily, the current compensation circuit can include two or more resistance modules connected in series or parallel, and the resistance value ranges of each resistance module are different, so that current adjustment in different ranges can be realized, thereby further improving the accuracy of the compensation current.

[0056] Because the deviations of different logarithmic detectors are different, the data written in the fuse module in different logarithmic detectors are different, and the fuse module needs to know in advance the data to be written. To obtain the data to be written in the fuse module, in some embodiments, as Figure 4 shown, the current compensation circuit 200 further includes:

[0057] One or more voltage switching modules 240 (such as the voltage switching module 240a and the voltage switching module 240b shown in Figure 4 ), the output end is used to output a plurality of second control signals T2; the second control signal T2 is used to calibrate the resistance value of the resistance module 230 and / or the magnitude of the first voltage V1;

[0058] One or more check modules 250 (such as Figure 4The check modules 250a and 250b shown in the figure have their input ends connected to the output ends of the corresponding voltage switching module 240 and the output end of the fuse module 210. The output end of the check module 250a is connected to the first end of the first transistor 221, and the output end of the check module 250b is connected to the resistor module 230. The check module 250a is used to select one of the second control signal T2 and the first control signal T1 for output to control the magnitude of the first voltage V1. The check module 250b is used to select one of the second control signal T2 and the first control signal T1 for output to control the resistance value of the resistor module 230.

[0059] As mentioned above, in order to calibrate the process corner deviation of devices such as logarithmic detectors, calibration and debugging need to be carried out before the product is used to determine the required compensation current I0. Therefore, in the embodiments of the present disclosure, during calibration, the check module 250 selects the second control signal T2 for output, and the voltage switching module 240 provides a switchable second control signal T2 to find a second control signal with an appropriate magnitude as the target control signal and burn the target control signal into the fuse module. When the product is in use, the check module 250 selects the first control signal T1 for output. Since the data in the fuse module is not lost due to power-down, the fuse module can provide a stable first control signal T1, so that the current compensation circuit can provide a stable and reliable compensation current to compensate for the process corner deviation of devices such as logarithmic detectors.

[0060] The check module 250 can be implemented by structures such as a signal selector, a multiplexer (MUX), or other logic circuits that can select one of multiple input signals as the output signal. The check module has multiple inputs and a single output, and it can also have a selection control signal terminal for receiving a selection signal. The selection signal is used to determine the selected input signal as the output signal and output it. For example, when the check module 250 has two input signals T1 and T2, the selection signal can include a one-bit binary digital signal of 0 or 1. When the selection signal is 0, the input signal T1 can be used as the output signal, and when the selection signal is 1, the input signal T2 can be used as the output signal.

[0061] Here, the signal that can be selected and output by the check module 250 is the first control signal T1 provided by the fuse module 210 or the second control signal T2 provided by the voltage switching module 240. In addition, since there can be multiple first control signals T1 and multiple second control signals T2, the check module 250 can also be used to select one of the multiple second control signals T2 or output one of the first control signals T1.

[0062] In addition, the first control signal T1 and the second control signal T2 can be digital signals or analog signals.

[0063] In some embodiments, the voltage switching module 240 may be within the same chip as the fuse module; in other embodiments, the voltage switching module 240 may be an external test module. After obtaining the required second control signal T2, correspondingly editing the fuse module 210 and switching the selection module 250 to select the output of the fuse module 210, the voltage switching module 240 can be removed.

[0064] In some embodiments, as Figure 5 shown, the resistance module 230 includes:

[0065] a variable resistance unit Rb, a resistor array unit Ra, or a series connection of the variable resistance unit Rb and the resistor array unit Ra; the figure shows the case of a series connection of one variable resistance unit Rb and one resistor array unit Ra. In other embodiments, it may also include only the variable resistance unit Rb or the resistor array unit Ra. And, there are 3 selection modules 250, which are respectively: the selection module 250a connected to the first end of the first transistor 122 (the voltage switching module connected thereto is 240a), the selection module 250b connected to the control end of the variable resistance unit Rb (the voltage switching module connected thereto is 240b), and the selection module 250c connected to the resistor array unit Ra (the voltage switching module connected thereto is 240c).

[0066] During the calibration phase, the control end of the variable resistance unit Rb receives the second control signal T2 output by the selection module 250b; during use after calibration, the control end of the variable resistance unit Rb receives the first control signal T1 output by the selection module 250b to control the first resistance value of the variable resistance unit Rb;

[0067] The resistor array unit Ra may include multiple resistor elements ri (i represents the number of the resistor element, 0 ≤ i ≤ n, and the total number of resistor elements in the resistor array unit Ra is n + 1), and is used to change the number of resistor elements ri in the path where the first current I1 is connected through the first control signal T1 or the second control signal T2 output by the selection module 250c, so as to control the second resistance value of the resistor array unit Rb.

[0068] In Figure 5 , the variable resistance unit Rb is connected in series between the first voltage V1 and the resistor array unit Ra. In some other embodiments, it may also be that the resistor array unit Ra is connected in series between the first voltage V1 and the variable resistance unit Rb.

[0069] It can be understood that since the variable resistor unit Rb is connected in series with the resistor array unit Ra, the respective resistance values of both will affect the magnitude of the first current I1 in the entire path. When the first voltage V1 is fixed, the larger the sum of the first resistance value and the second resistance value, the smaller the first current I1. And two different types of resistors can provide current control with different precisions. For example, the adjustment range of the first resistance value is small, which can achieve fine adjustment of the first current I1, and the adjustment range of the second resistance value is large, which can achieve coarse adjustment of the first current I1.

[0070] Through design, the resistance value of the resistance module can be adjusted through the variable resistor unit or the resistor array unit. That is to say, the resistance value has two-level adjustment. Coupled with the adjustment of the first voltage value, the current compensation circuit can achieve three-level adjustment in total, so as to achieve precise calibration of the magnitude of the compensation current, which is beneficial to improving the calibration accuracy and calibration efficiency.

[0071] In some embodiments, the variable resistor unit Rb includes: a third transistor;

[0072] The control terminal of the third transistor receives the first control signal or the second control signal, and the first end and the second end of the third transistor are connected in series with the resistor array unit to adjust the first resistance value of the third transistor.

[0073] It can be understood that here the resistance characteristic of the transistor is utilized to implement the variable resistor unit Rb. Taking the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET, simply referred to as MOS transistor) as an example, when the voltage applied to its gate is within a certain range, the MOS transistor has a resistance characteristic that the resistance changes with the gate voltage.

[0074] Figure 6 The change curve between the gate voltage and the on-resistance of the MOS transistor is shown, that is, the abscissa represents the gate voltage Vg, and the ordinate represents the on-resistance Ron. Among them, Figure 6 (1) is the overall switching characteristic of the MOS transistor, Figure 6 (2) is the enlarged view within the range circled in Figure 6 (1), among which, Figure 6 (1) The resistance unit magnitude of the ordinate is in the kΩ level, Figure 6 (2) The current unit magnitude of the ordinate is in Ω, Figure 6 (1) and Figure 6 (2) The unit of the abscissa is volts. It can be seen that within a certain voltage range, the MOS transistor has the characteristic that the on-resistance changes uniformly with the voltage. Therefore, this characteristic can be utilized to adjust the resistance value of the MOS transistor by adjusting the gate voltage within this range.

[0075] In other embodiments, the variable resistance unit Rb may also be other types of variable resistors other than transistors, and the embodiments of the present disclosure do not make any limitations.

[0076] In some embodiments, as Figure 7A shown, the resistor array unit Ra includes:

[0077] A plurality of first resistance elements r1i connected in series, and a plurality of first switches k1i; the first end and the second end of the first switch k1i are connected in parallel with the first resistance element r1i; the control end of the first switch k1i receives the corresponding first control signal T1 or the second control signal T2.

[0078] When the first switch k1i is turned off, the corresponding first resistance element r1i connected in parallel is connected to the path through which the first current I1 flows; the first control signal T1 or the second control signal T2 is used to control the first switch k1i.

[0079] Specifically, there may be multiple first control signals T1 or second control signals T2, which are respectively connected to each first switch k1i. When the first control signal T1 or the second control signal T2 is an enabling signal (a voltage or current signal that enables the first switch k1i to be in an on state), the first switch k1i connected thereto is in an on state, and the corresponding first resistance element r1i is short-circuited and thus not connected to the path; when the first control signal T1 or the second control signal T2 is a disabling signal (a voltage or current signal that enables the first switch k1i to be in an off state), the first switch k1i connected thereto is in an off state, and the corresponding first resistance element r1i is connected to the path. It should be noted that if all the first switches k1i corresponding to the plurality of first resistance elements r1i connected in series in the resistor array unit Ra are in a conducting state, then none of the plurality of first resistance elements r1i are connected to the circuit, and at this time, the total resistance value of the resistor array unit Ra is approximately equal to 0.

[0080] It can be understood that the resistance values of the plurality of first resistance elements r1i may be equal. In this way, as long as the number of first resistance elements r1i connected to the path is changed, the total resistance value of the resistor array unit Ra can be adjusted. Of course, the resistance values of the plurality of first resistance elements r1i may also be different and designed according to actual requirements, so as to achieve flexible resistance value adjustment.

[0081] In some embodiments, as Figure 7B shown, the resistor array unit Ra includes:

[0082] A plurality of second resistance elements r2i connected in parallel, and a plurality of second switches k2i; the first end and the second end of the second switch k2i are connected in series with the second resistance element r2i; the control end of the second switch k2i receives the corresponding first control signal T1 or the second control signal T2.

[0083] When the second switch K2i is turned on, the corresponding second resistor element R2i connected in series is connected to the path through which the first current I1 flows; the first control signal T1 or the second control signal T2 is used to control the second switch.

[0084] Similar to the series connection case, there can be multiple first control signals T1 or second control signals T2, which are respectively connected to each second switch K2i. When the first control signal T1 or the second control signal T2 is an on signal (a voltage or current signal that enables the second switch K2i to be in the on state), the second switch K2i connected in series with it is in the on state, and the corresponding second resistor element R2i is connected to the circuit; when the first control signal T1 or the second control signal T2 is an off signal (a voltage or current signal that enables the second switch K2i to be in the off state), the second switch K2i connected to it is in the off state, and the branch where the corresponding second resistor element R2i is located is disconnected, so that the second resistor element R2i is not connected to the path.

[0085] It can be understood that the resistance values of multiple second resistor elements R2i can be equal. In this way, as long as the number of second resistor elements R2i connected to the path is changed, the total resistance value of the resistor array unit Ra can be adjusted. Of course, the resistance values of multiple second resistor elements R2i can also be different and designed according to actual requirements, so as to achieve flexible resistance value adjustment. In addition, it should be noted that for the case where multiple second resistor elements R2i are connected in parallel, the branch where each second resistor element R2i is connected to the circuit can be turned on, so at least one second resistor element R2i should be connected, otherwise the circuit will be disconnected.

[0086] It should be noted that for the resistor array unit Ra, the first switch or the second switch corresponding to each resistor element can receive a control signal through a multiplexing module 250. The input signals of the multiplexing module 250 can only include the on voltage for controlling the conduction of the first switch or the second switch and the off voltage for controlling the disconnection of the first switch or the second switch, that is, the high voltage (such as the power supply voltage) and the low voltage (such as the ground voltage). Therefore, the two input terminals of the multiplexing module 250 can be respectively connected to the power supply terminal VDD and the ground terminal GND.

[0087] In some embodiments, as Figure 8 shown, the current compensation circuit 200 further includes:

[0088] A voltage follower 260, connected between the multiplexing module 250 and the first end of the first transistor 221, for controlling the first voltage V1 at the first end of the first transistor 221.

[0089] The voltage follower 260 can ensure that the output voltage closely follows the change of the input voltage. Its working principle is based on the negative feedback of the operational amplifier. When the input voltage changes, this change is sensed and amplified by the operational amplifier. Due to the negative feedback of the operational amplifier, the output voltage of the amplifier will be partially or fully fed back to its input terminal and compared with the original input voltage. The comparison result serves as an adjustment signal to adjust the output of the amplifier to ensure that the output voltage always follows the change of the input voltage.

[0090] In some embodiments, such as Figure 8 shown, the voltage follower 260 includes: an operational amplifier OPA; the negative input terminal (-) of the operational amplifier OPA is connected to the output terminal of the selection module 250a, the positive input terminal (+) of the operational amplifier OPA is connected to the drain of the first transistor 221, and the output terminal of the operational amplifier OPA is connected to the gate of the first transistor 221. The output terminal of the operational amplifier OPA is connected to its positive input terminal (+) to form negative feedback.

[0091] The voltage follower 260 can act as a buffer to transfer the output signal of the previous-stage circuit to the next-stage circuit. At the same time, it also acts as an isolation function to protect the previous-stage circuit from the influence of the next-stage circuit. And the voltage follower 260 can drive a relatively large load to improve the load-carrying capacity of the circuit.

[0092] In some embodiments, such as Figure 9 shown, the specific structure of the voltage switching module 240 involved in the embodiment may include: a plurality of first voltage-dividing resistors R0 - Rn connected in series between the power supply terminal VDD and the ground terminal GND. The voltage switching module 240 includes a plurality of output terminals, and the connection nodes between adjacent first voltage-dividing resistors R0 - Rn serve as output terminals. The plurality of output terminals are used to output a corresponding alternative voltage to the selection module 250, where Figure 9 the alternative voltages include Vbias-0 to Vbiasn, where n is a positive integer; the selection module 250 is connected to the plurality of output terminals of the voltage switching module 240 and selects an alternative voltage (such as Vbias-x) as the second control signal T2, where 0 ≤ x ≤ n.

[0093] It can be understood that the first voltage-dividing resistor Rx connected in series between the power supply terminal VDD and the ground terminal GND can be fixed. The resistance value of each first voltage-dividing resistor Rx can be the same or different. The voltage division of each first voltage-dividing resistor Rx is the ratio of the resistance value of the first voltage-dividing resistor Rx to the total resistance value of all the series-connected first voltage-dividing resistors multiplied by the power supply voltage. The alternative voltage Vbias-x output by each output terminal node is the sum of the voltage divisions of all the first voltage-dividing resistors Rx connected in series between this node and the ground terminal GND. Therefore, the output voltages of the nodes from the power supply terminal VDD to the ground terminal GND decrease in sequence.

[0094] Multiple input terminals of the multiplexing module 250 can be respectively connected to each output node, and by switching, an alternative voltage Vbias-x is selected for output and provided to the input terminal of the voltage follower, or provided to the control terminal of the variable resistor unit Rb.

[0095] Figure 9 The voltage switching module 240 in Figure 4 The voltage switching module 240a in Figure 5 The voltage switching module 240a and the voltage switching module 240b in are used to provide an analog second control signal T2.

[0096] In some embodiments, as Figure 10 shown, the specific structure of the fuse module 210 involved in the embodiments of the present application may include: a first fuse array 211 and a voltage switching unit 212 connected to the first fuse array 211; wherein, the first fuse array 211 is used to output a plurality of third control signals T3 <n:0>(n is a positive integer), where the third control signal can be a digital signal;

[0097] The voltage switching unit 212 includes: a plurality of second voltage dividing resistors Ry connected in series between the power supply terminal VDD and the ground terminal GND, and the connection nodes of adjacent second voltage dividing resistors Ry are connected to the first ends of corresponding third switches K3; the second ends of the third switches K3 serve as the output terminals of the first fuse array 211 for connecting corresponding check modules and outputting the first control signal T1; the control terminals of the third switches K3 are connected to the first fuse array 211 to receive corresponding third control signals, and the third control signals T3<0>-T3 <n>For separately controlling the turning on or off of a plurality of third switches K3.

[0098] It can be understood that the voltage switching unit 212 includes a second voltage dividing resistor Ry connected in series between the power supply terminal VDD and the ground terminal GND, such that the output voltages of the nodes between every two adjacent second voltage dividing resistors Ry are different. A third switch K3 is connected to each output node, and by selectively turning on one or more third switches K3, the corresponding output voltage is output as the first control signal T1. The on / off states of these third switches K3 are controlled by the third control signal output by the fuse array 211, thereby realizing the function of editing the output voltage using the fuse array.

[0099] It should be noted that in the embodiment of the present disclosure, the fuse module 210 may include a plurality of first fuse arrays 211 and voltage switching units 212. As Figure 11 shown, the fuse module 210 includes a first fuse array 211a and a voltage switching unit 212a connected thereto, a first fuse array 211b and a voltage switching unit 212b connected thereto. At the node for adjusting the first voltage V1, the output terminal of the voltage switching unit 212a can be connected through a check box module 250a; at the control terminal for adjusting the variable resistance unit Vb, the output terminal of a voltage switching unit 212b is connected through a check box module 250b.

[0100] In addition, in an embodiment, as Figure 11 shown, the fuse module 210 may further include a second fuse array 213 and does not include a voltage switching unit. The second fuse array 213 may include a plurality of output terminals, which are respectively connected to Figure 7A the control terminals of the first switches k11 - k13 in Figure 7B or the control terminals of the second switches k21 - k23 in

[0101] It should be noted that since the multiple control switches (first switches or second switches) of the resistor array unit Ra respectively switch between on / off states by high / low levels, the control signal T1 or T2 is a digital signal, and the resistor array unit Ra corresponds to the second fuse array 213 and does not include a voltage switching unit. At this time, the voltage switching module corresponding to the resistor array unit Ra may be a circuit that provides a plurality of digital signals for providing a plurality of control signals T2, and the voltage value of the control signal T2 may be 0V or the power supply voltage VDD.

[0102] Based on the same inventive concept, the embodiment of the present disclosure also provides a calibration method for a logarithmic detector, which is used to calibrate the Figure 2 shown logarithmic detector. The following will describe this calibration method with reference to Figure 2 and Figure 12 as follows: The calibration method includes the following steps:

[0103] Step S101, start calibration; since there are deviations in the processes of log detectors of different batches, different log detectors will output different signals when input with the same RF signal, so calibration is required;

[0104] Step S102, input an RF signal to the log detector; specifically, input a known RF signal to the Figure 2 RF log amplifier 110 therein. When there is no process deviation in the log detector, after receiving the known RF signal, the log detector will output a fixed output signal, and this fixed output signal is the target output signal;

[0105] Step S103, all the check modules select the corresponding second control signal T2 as the output, sequentially control different second control signals T2 output by each check module, and sequentially detect the output signal of the log detector under different output values; if there is a process deviation in the log detector, the output signal of the log detector is not the target output signal, and compensation is required to make the output signal of the log detector reach the target output signal. Specifically, during calibration, the check module selects the corresponding second control signal T2 as the output, sequentially traverses the values of the second control signal T2, and controls the gear of the compensation current I0 at each value of the second control signal T2; and under different gears of the compensation current I0, detect whether the output signal of the log detector reaches the target output signal.

[0106] Taking the current compensation circuit as the Figure 11 current compensation circuit shown as an example for illustration, it includes three check modules and has three-level adjustment. Assume that the check module 250a corresponds to A1 second control signals T2, the check module 250b corresponds to A2 second control signals T2, and the check module 250c corresponds to A3 second control signals T2. Then the entire current compensation circuit can achieve A1×A2×A3 gears of the compensation current I0, and in step S103, the output adjustment can be sequentially performed on A1×A2×A3 gears.

[0107] Step S104, determine the output value of the second control signal T2 selected by each check module according to the output signal of the log detector; specifically, when the value of the second control signal T2 is in a certain situation and the output signal of the log detector is the same as the target output signal, it means that at this time, the compensation current I0 can compensate for the process deviation; so the second control signal T2 at this time is used as the target control signal to compensate for the process deviation;

[0108] Step S105: Burn the output value (target control signal) of the second control signal selected by each check module into the fuse module. For example, burn the target second control signal of each check module into the corresponding fuse array, and control each check module to receive the first control signal T1 provided by the fuse module. At this time, the connection terminals for each check module to receive the second control signal can be cut off, or can be retained.

[0109] Under the condition of normal operation after calibration, the check module selects to receive the first control signal T1 output by the fuse module; through the first control signal T1, the current compensation circuit can output an appropriate compensation current, so as to compensate the intercept of the logarithmic curve of the logarithmic detector, thereby eliminating the influence brought by process deviation.

[0110] The logarithmic detectors in the foregoing embodiments can be used to detect the radio frequency channel, such as Figure 13 As shown, the present disclosure embodiment also provides a chip 400, including: at least one radio frequency channel 410; a logarithmic detector 420, connected to the radio frequency channel 410, for detecting the radio frequency signal RF provided by the radio frequency channel 410. Generally, the chip 400 also includes a radio frequency amplifier, a mixer, a filter, etc., which are not limited here.

[0111] The logarithmic detector 300 and the chip 400 have the same inventive concept as the current compensation circuit 200, and their specific implementation manners can refer to the descriptions in any of the embodiments, which will not be elaborated here.

[0112] It should be understood that "some embodiments", "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, the appearances of "in one embodiment" or "in an embodiment" throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present disclosure, the magnitudes of the sequence numbers of the processes do not mean the order of execution, and the execution order of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present disclosure. The sequence numbers of the embodiments of the present disclosure are only for description and do not represent the advantages or disadvantages of the embodiments.

[0113] It should be noted that in this document, the terms "including", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, such that a process, method, article or apparatus comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or apparatus. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or apparatus comprising such element.

[0114] The above are only the implementation manners of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present disclosure can easily conceive of changes or substitutions, which should all be covered within the protection scope of the present disclosure.< / n>

Claims

1. A current compensation circuit, characterized in that, Comprising: A current mirror including a first transistor and a second transistor, wherein the first transistor and the second transistor respectively include a first terminal, a second terminal, and a control terminal. The current mirror is configured to mirror a first current flowing through the first terminal of the first transistor to the first terminal of the second transistor, and a compensation current is output from the first terminal of the second transistor; A resistor module connected to the first terminal of the first transistor, and the resistance value of the resistor module and the first voltage at the first terminal of the first transistor are used to determine the magnitude of the first current; A fuse module connected to the resistor module and / or the first terminal of the first transistor, and configured to output a first control signal based on a fusing state, where the first control signal is used to calibrate the resistance value of the resistor module and / or the magnitude of the first voltage; One or more voltage switching modules, whose output terminals are configured to output a plurality of second control signals; the second control signals are used to calibrate the resistance value of the resistor module and / or the magnitude of the first voltage; One or more selection modules, whose input terminals are connected to the output terminals corresponding to the voltage switching modules and are also connected to the output terminal of the fuse module, and the output terminal of the selection module is connected to the resistor module and / or the first terminal of the first transistor; the selection module is configured to select one of the second control signals and the first control signal for output.

2. The current compensation circuit according to claim 1, wherein The resistor module includes: A variable resistor unit, a resistor array unit, or a series / parallel combination of a variable resistor unit and a resistor array unit; The control terminal of the variable resistor unit receives the first control signal or the second control signal output from the corresponding selection module to control the first resistance value of the variable resistor unit; The resistor array unit includes a plurality of resistor elements, and is configured to change the number of resistor elements connected to the path where the first current is located through the first control signal or the second control signal output from the corresponding selection module to control the second resistance value of the resistor array unit.

3. The current compensation circuit according to claim 2, wherein The variable resistor unit includes: a third transistor; The control terminal of the third transistor receives the first control signal or the second control signal, and the first terminal and the second terminal of the third transistor are connected in series with the resistor array unit to adjust the first resistance value of the third transistor.

4. The current compensation circuit according to claim 2, wherein The resistor array unit includes: A plurality of first resistor elements connected in series, and a plurality of first switches, where the first terminal and the second terminal of the first switch are connected in parallel with the first resistor element; The control terminal of the first switch receives the corresponding first control signal or the second control signal.

5. The current compensation circuit according to claim 2, wherein The resistor array unit includes: A plurality of second resistor elements connected in parallel, and a plurality of second switches, where the first terminal and the second terminal of the second switch are connected in series with the second resistor element; The control terminal of the second switch receives the corresponding first control signal or the second control signal.

6. The current compensation circuit according to any one of claims 1 to 5, characterized in that, Further comprising: A voltage follower connected between the selection module and the first terminal of the first transistor, and configured to control the first voltage at the first terminal of the first transistor.

7. The current compensation circuit according to claim 6, characterized in that The voltage follower includes: an operational amplifier; the negative input terminal of the operational amplifier is connected to the output terminal of the multiplexing module, the positive input terminal of the operational amplifier is connected to the drain of the first transistor, and the output terminal of the operational amplifier is connected to the gate of the first transistor; or, The voltage follower includes an operational amplifier and a fourth transistor. The negative input terminal of the operational amplifier is connected to the output terminal of the multiplexing module, the positive input terminal of the operational amplifier is connected to the first end of the fourth transistor, the output terminal of the operational amplifier is connected to the control terminal of the fourth transistor, and the second end of the fourth transistor is connected to the drain of the first transistor.

8. The current compensation circuit according to any one of claims 1 to 5, characterized in that The voltage switching module includes: a plurality of first voltage-dividing resistors connected in series between the power supply terminal and the ground terminal, and the node of adjacent first voltage-dividing resistors is used as the output terminal, and the output terminal is used to output an alternative voltage to the multiplexing module; The multiplexing module selects one of the alternative voltages as the second control signal.

9. The current compensation circuit according to any one of claims 1 to 5, characterized in that, The fuse module includes: A first fuse array for outputting a plurality of third control signals based on the blown state; A voltage switching unit includes: a plurality of second voltage-dividing resistors connected in series between the power supply terminal and the ground terminal, and a plurality of third switches; the node of adjacent second voltage-dividing resistors is connected to the first end of the corresponding third switch; the second ends of the third switches are connected together as the output terminal of the fuse module for outputting the first control signal; the control terminals of the third switches are connected to the first fuse array to receive the corresponding third control signals.

10. A logarithmic detector, characterized in that, Includes: A logarithmic amplifier for receiving a radio frequency signal and outputting a second current ； The current compensation circuit according to any one of claims 1 to 9; An arithmetic unit connected to the logarithmic amplifier and the current compensation circuit, and the arithmetic unit receives the second current and the compensation current and outputs a third current.

11. The logarithmic detector according to claim 10, wherein Further includes: An output unit connected to the arithmetic unit, receiving the third current and converting it into an output voltage; A feedback unit connected to the arithmetic unit and the output terminal of the output unit; the feedback unit is used to provide a feedback current to the arithmetic unit based on the output voltage; The arithmetic unit specifically obtains the third current according to the first current and the second current and outputs the third current to the output unit.

12. A chip, characterized in that, Includes: At least one radio frequency channel; The logarithmic detector according to claim 10 or 11, connected to the radio frequency channel for detecting the radio frequency signal provided by the radio frequency channel.

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