Control block resynchronization method and system, storage medium and electronic equipment

Abstract

The embodiment of the invention provides a control block resynchronization method and system, a storage medium and electronic equipment, and relates to the technical field of servers, the control block resynchronization method is applied to a control block resynchronization device, and the control block resynchronization device comprises a resynchronization execution signal buffer unit. The method comprises: receiving a target execution signal sent by a host based on a control request; detecting a resynchronization identifier of the target execution signal, and writing the target execution signal into a resynchronization execution signal buffer unit of a resynchronization device of the control block under the condition that the resynchronization identifier is detected to indicate that the target execution signal needs to be subjected to resynchronization processing; and resynchronizing the plurality of execution signals in the resynchronization execution signal buffer unit to obtain a synchronization completion result of the plurality of control blocks, the plurality of control blocks belonging to the same control page. The problem that the resynchronization efficiency of the control block is low in the related technology is solved.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of server technology, and in particular, to a control block resynchronization method, system, storage medium, and electronic device. Background Art

[0002] Currently, in UAA (Universal Acceleration Architecture), control pages (CP) and control blocks (CB) are defined. CP usually corresponds to a control request from the host. In a CP, there are several CBs, which correspond one by one to a series of operation steps required to complete the control request. In the UAA architecture, multiple CBs are supported to be triggered in parallel. However, due to external conditions, concurrently executed CBs cannot be guaranteed to be completed at the same time, which requires additional resynchronization devices to resynchronize multiple concurrently executed CBs. Subsequent operations can only be performed after all CBs are confirmed to be completed.

[0003] In the traditional solution, after the resynchronization device receives a DONE signal (execution signal), if the resynchronization flag in the DONE signal is valid, it is necessary to read the resyncCurrentCnt (current number) field and resyncTargetCnt (target number) field in the corresponding CP from the host memory to determine whether all CBs are completed. For each DONE, it is necessary to go through the process of reading data from the host memory and updating data to the host memory. Frequent memory access operations affect the read and write performance of the host, resulting in low resynchronization efficiency of the control block.

[0004] Therefore, in the related art, there is a problem of low resynchronization efficiency of the control block.

[0005] In view of the problem of low resynchronization efficiency of control blocks in the related art, no effective solution has been proposed yet. Summary of the invention

[0006] Embodiments of the present application provide a control block resynchronization method, system, storage medium, and electronic device to at least solve the problem of low control block resynchronization efficiency in the related art.

[0007] According to one embodiment of the present application, a control block resynchronization method is applied to a control block resynchronization device, the control block resynchronization device includes a resynchronization execution signal buffer unit, the method includes: receiving a target execution signal sent by a host based on a control request, wherein the control request corresponds to a target control page, the target control page includes multiple control blocks, each control block corresponds to a control command, and the target execution signal is a signal generated after the target control block in the target control page completes the control command; detecting a resynchronization identifier of the target execution signal, and writing the target execution signal into the resynchronization execution signal buffer unit of the control block resynchronization device when it is detected that the resynchronization identifier indicates that the target execution signal needs to be resynchronized; resynchronizing multiple execution signals in the resynchronization execution signal buffer unit to obtain synchronization completion results of multiple control blocks, wherein the multiple control blocks belong to the same control page.

[0008] In an exemplary embodiment, the resynchronization device of the control block also includes a query unit, an update unit, an internal cache unit, a first offset address buffer unit, a write unit, and a control page identifier buffer unit; multiple execution signals in the resynchronization execution signal buffer unit are resynchronized to obtain synchronization completion results of multiple control blocks, including: querying the target number and current number of the target control page from the internal cache unit through the query unit, wherein the target number represents the number of execution signals that need to be resynchronized in the target control page, and the current number represents the number of execution signals that have been resynchronized in the target control page; when it is determined that the query unit has queried the target number and the current number from the internal cache unit, The update unit updates the target quantity and the current quantity in the internal cache unit; caches the first offset address to the first offset address buffer unit through the primary update unit, wherein the first offset address represents the storage address of the target quantity and the current quantity in the memory space of the host; updates the target quantity and the current quantity in the memory space of the host according to the first offset address through the write unit; sends an update completion notification to the control page identifier buffer unit when it is determined that the write unit has completed the update; and sends the identifier of the target control page to the control command scheduling engine of the host when it is determined that the identifier of the target control page has been cached in the control page identifier buffer unit to obtain the synchronization completion result of the multiple control blocks.

[0009] In an exemplary embodiment, the target execution signal includes address information of the target control block, and the target quantity and current quantity of the target control pages are queried from the internal cache unit through the primary query unit, including: obtaining the address information of the target control block from the target execution signal, wherein the address information is composed of multiple bits; reading the bit information of a preset position from the address information according to the size of the control page preset by the host to obtain the index of the target control page; and querying the target quantity and the current quantity from the internal cache unit according to the index of the target control page.

[0010] In an exemplary embodiment, when it is determined that the first query unit has queried the target quantity and the current quantity from the internal cache unit, the target quantity and the current quantity in the internal cache unit are updated by the first update unit, including: judging whether the difference between the target quantity and the current quantity is equal to a first preset value; when it is determined that the difference between the target quantity and the current quantity is not equal to the first preset value, updating the value of the current quantity in the internal cache unit to the sum of the value of the current quantity and the first preset value; when it is determined that the difference between the target quantity and the current quantity is equal to the first preset value, updating the values ​​of the target quantity and the current quantity in the internal cache unit to a second preset value.

[0011] In an exemplary embodiment, before caching the first offset address to the first offset address buffer unit through the one-update unit, the method further includes: determining whether the difference between the target quantity and the current quantity is equal to a second preset value; and when it is determined that the difference between the target quantity and the current quantity is equal to the second preset value, caching the first offset address to the first offset address buffer unit through the one-update unit.

[0012] In an exemplary embodiment, the resynchronization device of the control block also includes a second offset address buffer unit and a control page identifier acquisition unit. When it is determined that the primary query unit has queried the target quantity and the current quantity from the internal cache unit, the method also includes: caching the second offset address to the second offset address buffer unit through the primary update unit, wherein the second offset address represents the storage address of the identifier of the target control page in the memory space of the host; acquiring the second offset address from the second offset address buffer unit through the control page identifier acquisition unit, reading the identifier of the target control page from the memory space of the host according to the second offset address, and caching the identifier of the target control page to the control page identifier buffer unit.

[0013] In an exemplary embodiment, the resynchronization device of the control block also includes a missing signal buffer unit, a primary missing processing unit, a control page header information buffer unit, a secondary query unit, and a secondary update unit, and the method also includes: when it is determined that the primary query unit has not queried the target quantity and the current quantity from the internal cache unit, caching the target execution signal to the missing signal buffer unit; when it is determined that the target execution signal exists in the missing signal buffer unit, reading the header information of the target control page from the memory space of the host through the primary missing processing unit, wherein the header information of the target control page includes the target quantity and the identifier of the target control page; caching the header information of the target control page to the control page header information buffer unit; and querying the target control page through the secondary query unit. The target quantity and the current quantity are obtained by the secondary query unit; the target quantity and the current quantity in the internal cache unit are updated according to the target quantity and the current quantity obtained by the secondary query unit through the secondary update unit; the first offset address is cached to the first offset address buffer unit through the secondary update unit; the target quantity and the current quantity in the memory space of the host are updated according to the first offset address through the write unit; when it is determined that the write unit has completed the update, an update completion notification is sent to the control page identifier buffer unit; when it is determined that the identifier of the target control page has been cached in the control page identifier buffer unit, the identifier of the target control page is sent to the control command scheduling engine to obtain the synchronization completion result of the multiple control blocks.

[0014] In an exemplary embodiment, acquiring the target quantity and the current quantity through the secondary query unit includes: querying the target quantity and the current quantity from the internal cache unit through the secondary query unit.

[0015] In an exemplary embodiment, the method further includes: in a case where it is determined that the secondary query unit has not queried the target quantity and the current quantity from the internal cache unit, judging whether the target control page is a header control page, wherein the header control page represents the first control page in a chain of control pages, and the chain of control pages represents a plurality of interrelated control pages; in a case where it is determined that the target control page is a header control page, obtaining the target quantity from the control page header information buffer unit, and determining a third preset value as the value of the current quantity.

[0016] In an exemplary embodiment, the resynchronization device of the control block also includes a secondary miss processing unit. After determining whether the target control page is a header control page, the method also includes: when it is determined that the target control page is not a header control page, obtaining the target quantity and the current quantity through the secondary miss processing unit.

[0017] In an exemplary embodiment, the target quantity and the current quantity are obtained through the secondary miss processing unit, including: searching for a target header control page corresponding to the target control page from the memory space of the host, wherein the target header control page represents the first control page in the chain of control pages where the target control page is located; obtaining the target quantity from the control page header information of the target header control page, and determining the third preset value as the value of the current quantity.

[0018] In an exemplary embodiment, when it is determined that the target control page is not a header control page, after obtaining the target quantity and the current quantity through the secondary miss processing unit, the method further includes: reading the identifier of the target control page from the memory space of the host through the control page identifier acquisition unit, and caching the identifier of the target control page to the control page identifier buffer unit.

[0019] In an exemplary embodiment, the target quantity and the current quantity in the internal cache unit are updated by the secondary update unit according to the target quantity and the current quantity obtained by the secondary query unit, including: when it is determined that the secondary query unit has queried the target quantity and the current quantity from the internal cache unit, judging whether the difference between the target quantity and the current quantity is a fourth preset value; when it is determined that the difference between the target quantity and the current quantity is not equal to the fourth preset value, updating the value of the current quantity in the internal cache unit to the sum of the value of the current quantity and the fourth preset value; when it is determined that the difference between the target quantity and the current quantity is equal to the fourth preset value, updating the values ​​of the target quantity and the current quantity in the internal cache unit to the fifth preset value.

[0020] In an exemplary embodiment, the method further includes: when it is determined that the secondary query unit does not query the target quantity and the current quantity from the internal cache unit, updating the target quantity in the internal cache unit to the target quantity obtained by the secondary query unit, and updating the current quantity in the internal cache unit to the current quantity obtained by the secondary query unit.

[0021] In an exemplary embodiment, after caching the header information of the target control page to the control page header information buffer unit, the method further includes: obtaining the identifier of the target control page in the header information of the target control page from the control page header information buffer unit through the control page identifier acquisition unit, and caching the identifier of the target control page to the control page identifier buffer unit.

[0022] In an exemplary embodiment, the method further includes: when it is determined that there are multiple requests to simultaneously access the memory space of the host, determining the access order of the multiple requests according to preset rules, wherein the preset rules are used to indicate access priorities of different types of requests.

[0023] According to another embodiment of the present application, a control block resynchronization device is provided, and the control block resynchronization device is used to execute the steps in any one of the above method embodiments.

[0024] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.

[0025] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0026] According to another embodiment of the present application, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the steps in the above method embodiment are implemented.

[0027] Through the present application, after receiving the target execution signal sent by the host, the resynchronization mark of the target execution signal can be detected. If it is detected that the resynchronization mark indicates that the target execution signal needs to be resynchronized, the target execution signal is written into the resynchronization execution signal buffer unit of the resynchronization device of the control block. By resynchronizing multiple execution signals in the resynchronization execution signal buffer unit, multiple control blocks in the same control page can be resynchronized. Therefore, the problem of low resynchronization efficiency of the control block in the related art can be solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a hardware structure block diagram of a server device of a control block resynchronization method according to an embodiment of the present application;

[0029] Figure 2is a flowchart of a control block resynchronization method according to an embodiment of the present application;

[0030] Figure 3 is a structural block diagram of a resynchronization device of a control block according to an embodiment of the present application;

[0031] Figure 4 is a schematic diagram of a data structure according to an embodiment of the present application;

[0032] Figure 5 is a schematic diagram of requesting arbitration according to an embodiment of the present application;

[0033] Figure 6 is a schematic flow chart of a control block resynchronization method according to an embodiment of the present application;

[0034] Figure 7 It is a schematic diagram of state transition according to an embodiment of the present application. DETAILED DESCRIPTION

[0035] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0036] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0037] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 1 is a hardware structure block diagram of a server device of a control block resynchronization method according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the above-mentioned server device may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations shown.

[0038] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the resynchronization method of the control block in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, the resynchronization method of the control block is realized. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0039] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the server device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0040] In this embodiment, a control block resynchronization method is provided, which is applied to a control block resynchronization device. The control block resynchronization device includes a resynchronization execution signal buffer unit. Figure 2 is a flowchart of a control block resynchronization method according to an embodiment of the present application, such as Figure 2 As shown, the process includes the following steps:

[0041] Step S202, receiving a target execution signal sent by the host based on a control request, wherein the control request corresponds to a target control page, the target control page includes multiple control blocks, each control block corresponds to a control command, and the target execution signal is a signal generated after the target control block in the target control page completes the control command;

[0042] It should be noted that in the above step S202, a control request needs to execute a series of control commands to be completed, so a control request corresponds to a control page, and the control page includes multiple control blocks, and the multiple control blocks correspond one by one to the above series of control commands.

[0043] Step S204, detecting a resynchronization flag of the target execution signal, and when detecting that the resynchronization flag indicates that the target execution signal needs to be resynchronized, writing the target execution signal into a resynchronization execution signal buffer unit of the resynchronization device of the control block;

[0044] Optionally, in the above step S204, the resynchronization flag of the target execution signal has two indications, one indicating that synchronization is required, and the other indicating that synchronization is not required. The concurrently executed control blocks in the same control page need to be synchronized.

[0045] Step S206, resynchronizing the multiple execution signals in the resynchronization execution signal buffer unit to obtain synchronization completion results of multiple control blocks, wherein the multiple control blocks belong to the same control page.

[0046] Through the above steps, after receiving the target execution signal sent by the host, the resynchronization mark of the target execution signal can be detected. If it is detected that the resynchronization mark indicates that the target execution signal needs to be resynchronized, the target execution signal is written into the resynchronization execution signal buffer unit of the resynchronization device of the control block. By resynchronizing multiple execution signals in the resynchronization execution signal buffer unit, multiple control blocks in the same control page can be resynchronized. Therefore, the problem of low resynchronization efficiency of the control block in the related art can be solved.

[0047] In an alternative embodiment, Figure 3 is a structural block diagram of a resynchronization device of a control block according to an embodiment of the present application, such as Figure 3 As shown, the control command scheduling engine of the host will send a DONE signal (equivalent to the target execution signal) to the resynchronization device after the control command corresponding to the target control block is executed. After receiving the DONE signal, the resynchronization device will check the resynchronization flag and write the DONE signal that needs to be synchronized into the resynchronization DONE buffer unit (equivalent to the resynchronization execution signal buffer unit).

[0048] In an exemplary embodiment, the resynchronization device of the control block also includes a query unit, an update unit, an internal cache unit, a first offset address buffer unit, a write unit, and a control page identifier buffer unit; multiple execution signals in the resynchronization execution signal buffer unit are resynchronized to obtain synchronization completion results of multiple control blocks, including: querying the target number and current number of the target control page from the internal cache unit through the query unit, wherein the target number represents the number of execution signals that need to be resynchronized in the target control page, and the current number represents the number of execution signals that have been resynchronized in the target control page; when it is determined that the query unit has queried the target number and the current number from the internal cache unit, The update unit updates the target quantity and the current quantity in the internal cache unit; caches the first offset address to the first offset address buffer unit through the primary update unit, wherein the first offset address represents the storage address of the target quantity and the current quantity in the memory space of the host; updates the target quantity and the current quantity in the memory space of the host according to the first offset address through the write unit; sends an update completion notification to the control page identifier buffer unit when it is determined that the write unit has completed the update; and sends the identifier of the target control page to the control command scheduling engine of the host when it is determined that the identifier of the target control page has been cached in the control page identifier buffer unit to obtain the synchronization completion result of the multiple control blocks.

[0049] In an optional embodiment, if Figure 3 As shown, Figure 3 The query unit in the first query will query the DONE signal that needs to be synchronized from the resynchronization DONE buffer unit. For the DONE signal, the resyncCurrentCnt (equivalent to the current number) field and resyncTargetCnt (equivalent to the target number) field of the CP to which the CB corresponding to the DONE signal belongs will be queried from the internal cache unit. The target number indicates the total number of CBs that need to be resynchronized in the CP, and the current number indicates the number of CBs that have been resynchronized in the CP.

[0050] After querying the above resyncCurrentCnt field and resyncTargetCnt field, the update unit will determine whether resyncCurrentcnt+1 is equal to resycTargetCnt. If not, it means that after the CB corresponding to the current DONE signal completes synchronization, there are other CBs in the CP that need to be synchronized. At this time, the update unit adds 1 to the value of resyncCurrentcnt in the internal buffer unit, indicating that another CB that needs to be synchronized has been completed. If equal, it means that the CB corresponding to the current DONE signal is the last CB that needs to be synchronized in the CP. After completing the current CB, the entire CP is completed. At this time, the update unit updates all resyncCurrentcnt and resyncTargetCnt in the internal buffer unit to 0.

[0051] After an update unit is updated, the storage addresses of the resyncCurrentCnt field and the resyncTargetCnt field in the host memory will be cached in the write CP offset address buffer unit (equivalent to the first offset address buffer unit). Because after determining that the CB corresponding to the current DONE signal is the last CB in the CP that needs to be synchronized, the resyncCurrentCnt field and the resyncTargetCnt field in the host memory need to be updated. The specific process is that the write CP unit (equivalent to the write unit) reads the corresponding storage address from the write CP offset address buffer unit to update the resyncCurrentCnt field and the resyncTargetCnt field in the host memory space.

[0052] After the write CP unit updates the resyncCurrentCnt field and the resyncTargetCnt field in the host memory, it means that all the synchronous execution of the CB of the CP is completed. Then, the identifier of the CP (equivalent to the identifier of the target control page) is sent to the control command scheduling engine of the host through the ENQ buffer unit (equivalent to the control page identifier buffer unit) to notify the control command scheduling engine for subsequent processing.

[0053] Through the above embodiment, the synchronized control blocks can be recorded inside the resynchronization device of the control block, and synchronization with the host can be performed after all control blocks that need to be synchronized are completed, thereby reducing the frequency of accessing the host memory and improving the synchronization efficiency of the control blocks.

[0054] In an exemplary embodiment, the target execution signal includes address information of the target control block, and the target quantity and current quantity of the target control pages are queried from the internal cache unit through the primary query unit, including: obtaining the address information of the target control block from the target execution signal, wherein the address information is composed of multiple bits; reading the bit information of a preset position from the address information according to the size of the control page preset by the host to obtain the index of the target control page; and querying the target quantity and the current quantity from the internal cache unit according to the index of the target control page.

[0055] In an optional embodiment, the query unit queries the target number and the current number of the target control page from the internal cache unit once, and needs to query according to the index of the target control page, and the index of the target control page can be obtained from the address information of the target control block carried by the target execution signal, such as Figure 4 As shown, the bits of the CB address in the DONE signal are at bits 23-4, where the index CP_IDX of the control page is related to the size of the CP. The specific rules are as follows: when the CP size is 512b, CP_IDX is bits 21-9 of the CB address; when the CP size is 1Kb, CP_IDX is bits 20-10 of the CB address; when the CP size is 2Kb, CP_IDX is bits 20-11 of the CB address.

[0056] In an exemplary embodiment, when it is determined that the first query unit has queried the target quantity and the current quantity from the internal cache unit, the target quantity and the current quantity in the internal cache unit are updated by the first update unit, including: judging whether the difference between the target quantity and the current quantity is equal to a first preset value; when it is determined that the difference between the target quantity and the current quantity is not equal to the first preset value, updating the value of the current quantity in the internal cache unit to the sum of the value of the current quantity and the first preset value; when it is determined that the difference between the target quantity and the current quantity is equal to the first preset value, updating the values ​​of the target quantity and the current quantity in the internal cache unit to a second preset value.

[0057] In an optional embodiment, if Figure 3As shown, after the query unit queries the resyncCurrentCnt field and the resyncTargetCnt field from the internal cache unit, the update unit will determine whether resyncCurrentcnt+1 is equal to resycTargetCnt. If not, it means that after the CB corresponding to the current DONE signal completes synchronization, there are other CBs in the CP that need to be synchronized. At this time, the update unit adds 1 to the value of resyncCurrentcnt in the internal buffer unit (equivalent to the first preset value), indicating that another CB that needs to be synchronized has been completed. If equal, it means that the CB corresponding to the current DONE signal is the last CB that needs to be synchronized in the CP. After completing the current CB, the entire CP is completed. At this time, the update unit updates all resyncCurrentcnt and resyncTargetCnt in the internal buffer unit to 0 (equivalent to the second preset value).

[0058] In an exemplary embodiment, before caching the first offset address to the first offset address buffer unit through the one-update unit, the method further includes: determining whether the difference between the target quantity and the current quantity is equal to a second preset value; and when it is determined that the difference between the target quantity and the current quantity is equal to the second preset value, caching the first offset address to the first offset address buffer unit through the one-update unit.

[0059] In an optional embodiment, after the update unit determines that resyncCurrentcnt+1 is equal to resycTargetCnt, it will also cache the storage addresses of the resyncCurrentCnt field and the resyncTargetCnt field in the host memory to the write CP offset address buffer unit (equivalent to the first offset address buffer unit).

[0060] In an exemplary embodiment, the resynchronization device of the control block also includes a second offset address buffer unit and a control page identifier acquisition unit. When it is determined that the primary query unit has queried the target quantity and the current quantity from the internal cache unit, the method also includes: caching the second offset address to the second offset address buffer unit through the primary update unit, wherein the second offset address represents the storage address of the identifier of the target control page in the memory space of the host; acquiring the second offset address from the second offset address buffer unit through the control page identifier acquisition unit, reading the identifier of the target control page from the memory space of the host according to the second offset address, and caching the identifier of the target control page to the control page identifier buffer unit.

[0061] In an optional embodiment, if Figure 3 As shown, before the ENQ buffer unit sends ENQ (equivalent to the identifier of the control page) to the control command scheduling engine of the host, it is necessary to obtain ENQ first. The specific process of obtaining ENQ is as follows: the primary update unit caches the storage address of ENQ in the host memory (equivalent to the second offset address) to the hit DONE offset address buffer unit (equivalent to the second offset address buffer unit), and then the ENQ acquisition unit (equivalent to the control page identifier acquisition unit) reads ENQ from the host memory according to the storage address of ENQ in the host memory, and then caches ENQ to the ENQ buffer unit.

[0062] In an exemplary embodiment, the resynchronization device of the control block also includes a missing signal buffer unit, a primary missing processing unit, a control page header information buffer unit, a secondary query unit, and a secondary update unit, and the method also includes: when it is determined that the primary query unit has not queried the target quantity and the current quantity from the internal cache unit, caching the target execution signal to the missing signal buffer unit; when it is determined that the target execution signal exists in the missing signal buffer unit, reading the header information of the target control page from the memory space of the host through the primary missing processing unit, wherein the header information of the target control page includes the target quantity and the identifier of the target control page; caching the header information of the target control page to the control page header information buffer unit; and querying the target control page through the secondary query unit. The target quantity and the current quantity are obtained by the secondary query unit; the target quantity and the current quantity in the internal cache unit are updated according to the target quantity and the current quantity obtained by the secondary query unit through the secondary update unit; the first offset address is cached to the first offset address buffer unit through the secondary update unit; the target quantity and the current quantity in the memory space of the host are updated according to the first offset address through the write unit; when it is determined that the write unit has completed the update, an update completion notification is sent to the control page identifier buffer unit; when it is determined that the identifier of the target control page has been cached in the control page identifier buffer unit, the identifier of the target control page is sent to the control command scheduling engine to obtain the synchronization completion result of the multiple control blocks.

[0063] In an optional embodiment, if Figure 3As shown, if the primary query unit does not query the resyncCurrentCnt field and resyncTargetCnt field of the CP to which the CB corresponding to the DONE signal belongs in the internal cache unit, it means that this is the first CB processed in the CP. At this time, the DONE signal is saved to the missing DONE buffer unit (equivalent to the missing signal buffer unit), and the primary missing processing unit will obtain the CP header information of the CP to which the CB corresponding to the DONE signal belongs from the host memory. The CP header information contains the resyncTargetCnt field and ENQ of the CP, and then save the CP header information to the CP header information buffer unit (equivalent to the control page header information buffer unit). Next, the secondary query unit needs to obtain the resyncCurrentCnt field and resyncTargetCnt field of the CP, and then update the internal cache unit according to the resyncCurrentCnt field and resyncTargetCnt field through the secondary update unit, and at the same time cache the first offset address to the write CP offset address buffer unit, and the write CP unit updates the resyncCurrentCnt field and resyncTargetCnt field in the host memory according to the first offset address.

[0064] After the write CP unit updates the resyncCurrentCnt field and resyncTargetCnt field in the host memory, it means that all CB synchronization executions of the CP are completed. Then the identifier of the CP is sent to the control command scheduling engine of the host through the ENQ buffer unit to notify the control command scheduling engine for subsequent processing.

[0065] In an exemplary embodiment, acquiring the target quantity and the current quantity through the secondary query unit includes: querying the target quantity and the current quantity from the internal cache unit through the secondary query unit.

[0066] In an exemplary embodiment, the method further includes: in a case where it is determined that the secondary query unit has not queried the target quantity and the current quantity from the internal cache unit, judging whether the target control page is a header control page, wherein the header control page represents the first control page in a chain of control pages, and the chain of control pages represents a plurality of interrelated control pages; in a case where it is determined that the target control page is a header control page, obtaining the target quantity from the control page header information buffer unit, and determining a third preset value as the value of the current quantity.

[0067] In an exemplary embodiment, the resynchronization device of the control block also includes a secondary miss processing unit. After determining whether the target control page is a header control page, the method also includes: when it is determined that the target control page is not a header control page, obtaining the target quantity and the current quantity through the secondary miss processing unit.

[0068] In an exemplary embodiment, the target quantity and the current quantity are obtained through the secondary miss processing unit, including: searching for a target header control page corresponding to the target control page from the memory space of the host, wherein the target header control page represents the first control page in the chain of control pages where the target control page is located; obtaining the target quantity from the control page header information of the target header control page, and determining the third preset value as the value of the current quantity.

[0069] The secondary query unit obtains the target number and current number of CPs and caches them in the internal cache unit. The specific process is as follows: Considering a special situation, that is, the resynchronization device receives two DONE signals in succession, and they belong to the same CP. The first DONE signal does not query the resyncCurrentCnt field and the resyncTargetCnt field from the internal cache unit, so it queries through the secondary query unit. After the secondary query unit queries the data, it has not notified the secondary update unit to update the internal cache unit when it receives the second DONE. Therefore, the second DONE signal does not query the resyncCurrentCnt field and the resyncTargetCnt field from the internal cache unit. However, when the second DONE signal is queried through the secondary query unit, the update of the internal cache unit has been completed in the process of the first DONE signal. Therefore, the secondary query unit first chooses to query from the internal cache unit when obtaining the resyncCurrentCnt field and the resyncTargetCnt field of the CP. If the resyncCurrentCnt field and the resyncTargetCnt field are not queried from the internal cache unit, it is determined whether the current CP is the head CP. The head CP refers to the first CP in the chain CP. In the chain CP, the resyncTargetCnt field of the CP and ENQ are saved in the CP header information of the head CP. If the current CP is the head CP, the resyncTargetCnt field of the CP is directly obtained from the CP header buffer unit. Because the current CB is the first CB, the resyncCurrentCnt field of the CP is directly set to 1 (equivalent to the third preset value, the initial value is regarded as 0, and it is 1 after the current CB is completed), and then the resyncTargetCnt field and resyncCurrentCnt field of the CP are written into the internal cache unit through the secondary update unit. When processing the next CB, the resyncTargetCnt field and resyncCurrentCnt field can be directly queried from the internal cache unit through a query unit. If the current CP is not the head CP, the resyncTargetCnt field cached in the CP header information buffer unit in the above embodiment is inaccurate. At this time, the secondary missing processing unit is required to query the CP header information of the head CP corresponding to the CP from the host memory, and then obtain the resyncTargetCnt field from the CP header information, and directly set the resyncCurrentCnt field to 1, and then write the resyncTargetCnt field and resyncCurrentCnt field of the CP into the internal cache unit through the secondary update unit.

[0070] In an exemplary embodiment, when it is determined that the target control page is not a header control page, after obtaining the target quantity and the current quantity through the secondary miss processing unit, the method further includes: reading the identifier of the target control page from the memory space of the host through the control page identifier acquisition unit, and caching the identifier of the target control page to the control page identifier buffer unit.

[0071] In an exemplary embodiment, the target quantity and the current quantity in the internal cache unit are updated by the secondary update unit according to the target quantity and the current quantity obtained by the secondary query unit, including: when it is determined that the secondary query unit has queried the target quantity and the current quantity from the internal cache unit, judging whether the difference between the target quantity and the current quantity is a fourth preset value; when it is determined that the difference between the target quantity and the current quantity is not equal to the fourth preset value, updating the value of the current quantity in the internal cache unit to the sum of the value of the current quantity and the fourth preset value; when it is determined that the difference between the target quantity and the current quantity is equal to the fourth preset value, updating the values ​​of the target quantity and the current quantity in the internal cache unit to the fifth preset value.

[0072] Optionally, in the above embodiment, when the secondary update unit updates the resyncTargetCnt field and the resyncCurrentCnt field in the internal cache unit, it is also necessary to determine whether resyncCurrentcnt+1 is equal to resycTargetCnt. If not, the value of resyncCurrentcnt in the internal buffer unit is increased by 1 (equivalent to the fourth preset value); if equal, resyncCurrentcnt and resyncTargetCnt are all updated to 0 (equivalent to the fifth preset value).

[0073] In an exemplary embodiment, the method further includes: when it is determined that the secondary query unit does not query the target quantity and the current quantity from the internal cache unit, updating the target quantity in the internal cache unit to the target quantity obtained by the secondary query unit, and updating the current quantity in the internal cache unit to the current quantity obtained by the secondary query unit.

[0074] In an exemplary embodiment, after caching the header information of the target control page to the control page header information buffer unit, the method further includes: obtaining the identifier of the target control page in the header information of the target control page from the control page header information buffer unit through the control page identifier acquisition unit, and caching the identifier of the target control page to the control page identifier buffer unit.

[0075] In an optional embodiment, if the current CP is not the head CP, the control page identifier acquisition unit reads the identifier of the current CP directly from the host memory.

[0076] In an exemplary embodiment, the method further includes: when it is determined that there are multiple requests to simultaneously access the memory space of the host, determining the access order of the multiple requests according to preset rules, wherein the preset rules are used to indicate access priorities of different types of requests.

[0077] In an optional embodiment, if Figure 5 As shown, a missing DONE cache unit will initiate a request to obtain the CP header information, the CP header information buffer unit will initiate a request to obtain the resyncCurrentcnt information, and a hit DONE offset address buffer will initiate a request to obtain the ENQ information. All of the above requests need to be read from the host memory through the AXI bus, so the arbitration unit is required to arbitrate according to preset rules to determine the access priority of the request.

[0078] Through the above embodiments, access requests to the host memory can be executed in an orderly manner under high concurrency, reducing the problem of incorrect data version read due to simultaneous access to the host memory, and ensuring the accuracy of the control block synchronization process.

[0079] Obviously, the embodiments described above are only some embodiments of the present application, not all embodiments. In order to better understand the verification method of the above test case, the above process is described below in conjunction with the embodiments, but it is not intended to limit the technical solutions of the embodiments of the present application, specifically:

[0080] In an alternative embodiment, Figure 6 is a schematic flow chart of a control block resynchronization method according to an embodiment of the present application, and the above method is applied in Figure 3 The resynchronization device of the control block shown, such as Figure 6 As shown, the above method comprises the following steps:

[0081] Step 1, detect the status of the resynchronization DONE buffer unit. Step 2, determine whether the resynchronization DONE buffer unit has a DONE signal that needs to be synchronized. If so, execute step 3, otherwise enter the idle state. Step 3, determine the index CP_IDX of the corresponding current CP according to the current DONE signal, and query the resyncTargetCnt field and resyncCurrentCnt field of the current CP from the internal cache unit according to the index CP_IDX. Step 4, determine whether the resyncTargetCnt field and resyncCurrentCnt field of the current CP exist in the internal cache unit. If it hits, execute step 5, otherwise execute step 12. Step 5, determine whether resyncCurrentCnt+1 is equal to resyncTargetCnt. If so, execute steps 7 and 8, otherwise execute step 6. Step 6, increase the resyncCurrentCnt value in the internal cache unit by 1. Step 7, update the resyncTargetCnt field and resyncCurrentCnt field in the internal cache unit to 0. Step 8, write the storage address of the current CP's ENQ in the host memory into the hit DONE offset address buffer unit. Step 9, detect the status of the hit DONE offset address buffer unit. Step 10, determine whether the hit DONE offset address buffer unit is empty, if so, repeat steps 9-10, otherwise, execute steps 11 and step 26. Step 11, read ENQ from the host memory, and execute step 17. Step 12, cache the current DONE signal to the missing DONE buffer unit. Step 13, detect the status of the missing DONE buffer unit. Step 14, determine whether the missing DONE buffer unit is empty, if so, repeat steps 13-14, otherwise, execute step 15. Step 15, read the CP header information corresponding to the current DONE signal. Step 16, cache the CP header information to the CP header information buffer unit, wherein the CP header information includes ENQ and resyncTargetCnt, and execute steps 17 and 18. Step 17, cache the obtained ENQ to the ENQ buffer unit. Step 18, detect the status of the CP header information buffer unit. Step 19, determine whether the CP header information buffer unit is empty, if yes, jump to step 1, otherwise execute step 20 and step 26. Step 20, determine the index CP_IDX of the corresponding current CP according to the current DONE signal, and query the resyncTargetCnt field and resyncCurrentCnt field of the current CP from the internal cache unit according to the index CP_IDX. Step 21, determine whether the resyncTargetCnt field and resyncCurrentCnt field of the current CP exist in the internal cache unit, if yes, execute step 22, if no, execute step 23.Step 22, determine whether resyncCurrentCnt+1 is equal to resyncTargetCnt, if yes, execute step 7, otherwise execute step 6. Step 23, determine whether the current CP is the head CP, if yes, execute step 25, otherwise execute step 24. Step 24, read resyncTargetCnt and resyncCurrentCnt from the host memory. Step 25, if the current CP is the head CP, write resyncTargetCnt and resyncCurrentCnt=1 in the CP header information buffer unit into the internal cache space, if the current CP is not the head CP, write resyncTargetCnt and resyncCurrentCnt=1 read from the host in step 24 into the internal cache space. Step 26, write the addresses of the resyncTargetCnt field and resyncCurrentCnt field of the current CP in the host memory into the write CP offset address buffer unit. Step 27, detect the state of the write CP offset address buffer unit. Step 28, determine whether the write CP offset address buffer unit is empty, if yes, repeat steps 27-28, otherwise execute step 29. Step 29, write the resyncTargetCnt field and resyncCurrentCnt field of the current CP in the host memory to 0 according to the address of the resyncTargetCnt field and resyncCurrentCnt field of the current CP in the host memory. Step 30, detect the state of the AXI bus. Step 31, determine whether the writing is completed, if yes, execute step 32, otherwise repeat steps 30-31. Step 32, send the ENQ cached in the ENQ buffer unit in step 17 to the control command scheduling engine of the host, indicating that all CBs in the current CP have been synchronized.

[0082] Optionally, in the above steps, the data formats of various data involved are defined as follows: Figure 4 As shown, it includes: 1) DONE buffer unit: The DONE buffer includes a resynchronization DONE buffer unit and a missing DONE buffer unit. The DONE buffer unit is implemented with a 512x32b FIFO (First-In, First-Out), that is, a buffer that can store 512 32-bit wide data, which can meet the maximum burst DONE number of the system. The missing DONE buffer unit is implemented with a 16x32b FIFO, that is, a buffer that can store 16 32-bit wide data. Figure 4 A 32-bit wide data format is shown in FIG. 1 , wherein the definitions related to the solution of the present application include a resynchronization flag and a CB address. The index of the control page can be obtained from the CB address information carried by the DONE signal, such as Figure 4As shown, the bits of the CB address in the DONE signal are at 23-4, where the index CP_IDX of the control page is related to the size of the CP. If the CP size is 512b, CP_IDX is the CB address 21-9 bits; if the CP size is 1Kb, CP_IDX is the CB address 20-10 bits; if the CP size is 2Kb, CP_IDX is the CB address 20-11 bits. 2) Internal cache unit: The internal cache unit is implemented using 4096x17b RAM (Random Access Memory). In the UAA architecture, the maximum memory pool is 2M, with a maximum of 4096 CPs. Using 4096 RAMs can fully match all CPs. Figure 4 A 17-bit wide data format is shown in the figure, where the current number indicates the number of synchronous CBs received in the current CP, the target number indicates the total number of concurrent CBs that need to be received in the current CP, and the valid flag indicates that the current CP has received at least one CB, that is, the target number and the current number are in a valid state. 3) CP header information buffer unit: The CP header information buffer unit is implemented using a 32x64b FIFO. Figure 4 A 64-bit wide data format is illustrated in the figure, which includes the target number, CB address, ENQ, and head CP identifier. The head CP identifier is used to identify whether the CP where the current CB is located is the head CP. It should be noted that under the head CP, the ENQ content is the content that actually needs to be distributed. Under the non-head CP, the ENQ content under the head CP needs to be read. 4) ENQ buffer unit: The ENQ buffer unit is implemented with a 32x32b FIFO to store the control page identifier that needs to be distributed. 5) Offset address buffer unit: The offset address buffer unit includes the hit DONE offset address buffer unit and the write CP offset address buffer unit, which is implemented with a 32x15b FIFO to store bits 23-9 of the address where the current CB is located.

[0083] Optionally, in the above steps, both query and update operations need to access the internal cache unit. In order to prevent access conflicts, a mutually exclusive access state machine can be used for control to avoid access conflicts. The mutually exclusive access state machine consists of 9 states. The switching process between each state is as follows: Figure 7As shown, the definition and switching conditions of each state machine are as follows: 1) IDLE: Idle state. In this state, first check whether the CP header information buffer unit is empty. If not, enter the LOOKUP_CACHE state. If it is empty, check whether the resynchronization DONE buffer unit is empty. If not, enter the LOOKUP_CACHE state. If it is empty, return to the idle state. In this state, if the LOOKUP_CACHE state is entered due to the synchronization DONE buffer unit not being empty, a cb_check_hit_cycle signal is generated to indicate that the access to the CACHE (equivalent to the internal cache unit) is caused by the secondary query process. 2) LOOKUP_CACHE: Query the CACHE state. In this state, query the CACHE according to CP_IDX. If it hits, enter the CNT_CHECK state. If it is missing, determine whether the cb_check_hit_cycle is valid. If it is valid, enter the END state. If it is invalid, determine whether the current CP is the head CP. If it is the head CP, enter the CACHE_FIRST state. If it is not the head CP, enter the RD_TARGET_REQ state. 3) CNT_CHECK: Comparison state. In this state, compare whether resyncCurrentCnt+1 and resyncTargetCnt are equal. If they are not equal, enter the CACHE_OTHERS state, if they are equal, enter the CACHE_CLEAR state 4) RD_TARGET_REQ: Send AXI read request state. In this state, send a read request through AXI, read the resyncCurrentCnt and resyncTargetCnt fields of the CP in the memory, and enter the RD_TARGET_ING state. 5) RD_TARGET_ING: Read AXI state. In this state, wait for the AXI read operation to complete and return data. If an error occurs on the bus, return to the IDLE state directly. If the bus access is completed and correct, enter the CACHE_FIRST state, otherwise, wait in the RD_TARGET_ING state. 6) CACHE_FIRST: First refresh CACHE state. In this state, write data to the CACHE address corresponding to the CP_IDX, where the value of the valid identifier VLD is 1, resyncCurrentCnt=1, and resyncTargetCnt is the corresponding value in CP, and then enter the END state. 7) CACHE_OTHERS: Intermediate refresh CACHE state. In this state, write data to the CACHE address corresponding to the CP_IDX, where the values ​​of VLD and resyncTargetCnt remain unchanged, resyncCurrentCnt increases by 1, and then enter the END state.8) CACHE_CLEAR; Clear the CACHE state. In this state, write all zeros to the CACHE address corresponding to the CP_IDX, and then enter the END state. 9) END: End state.

[0084] Optionally, in the above embodiment, based on the resynchronization detection device of the control block and through a series of steps, efficient resynchronization detection and processing of concurrently executed control blocks are achieved, which effectively reduces the performance bottleneck caused by frequent memory access in traditional solutions.

[0085] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0086] In this embodiment, a resynchronization device for a control block is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made are omitted. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the system described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0087] Figure 3 is a structural block diagram of a resynchronization device of a control block according to an embodiment of the present application, such as Figure 3 As shown, the device includes a resynchronization execution signal buffer unit, and the device is used to: receive a target execution signal sent by a host based on a control request, wherein the control request corresponds to a target control page, the target control page includes multiple control blocks, each control block corresponds to a control command, and the target execution signal is a signal generated after the target control block in the target control page completes the control command; detect the resynchronization identifier of the target execution signal, and write the target execution signal into the resynchronization execution signal buffer unit of the resynchronization device of the control block when it is detected that the resynchronization identifier indicates that the target execution signal needs to be resynchronized; resynchronize the multiple execution signals in the resynchronization execution signal buffer unit to obtain synchronization completion results of the multiple control blocks, wherein the multiple control blocks belong to the same control page.

[0088] Through the above device, after receiving the target execution signal sent by the host, the resynchronization mark of the target execution signal can be detected. If it is detected that the resynchronization mark indicates that the target execution signal needs to be resynchronized, the target execution signal is written into the resynchronization execution signal buffer unit of the resynchronization device of the control block. By resynchronizing multiple execution signals in the resynchronization execution signal buffer unit, multiple control blocks in the same control page can be resynchronized. Therefore, the problem of low resynchronization efficiency of the control block in the related art can be solved.

[0089] In an exemplary embodiment, the resynchronization device of the control block also includes a one-query unit, a one-update unit, an internal cache unit, a first offset address buffer unit, a write unit, and a control page identifier buffer unit; the device is also used to: query the target number and the current number of the target control page from the internal cache unit through the one-query unit, wherein the target number represents the number of execution signals that need to be resynchronized in the target control page, and the current number represents the number of execution signals that have been resynchronized in the target control page; when it is determined that the one-query unit has queried the target number and the current number from the internal cache unit, the target number in the internal cache unit is updated through the one-update unit. The target quantity and the current quantity are updated; the first offset address is cached to the first offset address buffer unit through the primary update unit, wherein the first offset address represents the storage address of the target quantity and the current quantity in the memory space of the host; the target quantity and the current quantity in the memory space of the host are updated according to the first offset address through the write unit; when it is determined that the write unit has completed the update, an update completion notification is sent to the control page identifier buffer unit; when it is determined that the identifier of the target control page has been cached in the control page identifier buffer unit, the identifier of the target control page is sent to the control command scheduling engine of the host to obtain the synchronization completion result of the multiple control blocks.

[0090] In an exemplary embodiment, the device is also used to: obtain address information of the target control block from the target execution signal, wherein the address information is composed of multiple bits; read bit information of a preset position from the address information according to the size of the control page preset by the host to obtain the index of the target control page; and query the target quantity and the current quantity from the internal cache unit according to the index of the target control page.

[0091] In an exemplary embodiment, the device is also used to: determine whether the difference between the target quantity and the current quantity is equal to a first preset value; when it is determined that the difference between the target quantity and the current quantity is not equal to the first preset value, update the value of the current quantity in the internal cache unit to the sum of the value of the current quantity and the first preset value; when it is determined that the difference between the target quantity and the current quantity is equal to the first preset value, update the values ​​of the target quantity and the current quantity in the internal cache unit to a second preset value.

[0092] In an exemplary embodiment, the device is also used to: determine whether the difference between the target quantity and the current quantity is equal to a second preset value; when it is determined that the difference between the target quantity and the current quantity is equal to the second preset value, cache the first offset address to the first offset address buffer unit through the primary update unit.

[0093] In an exemplary embodiment, the resynchronization device of the control block also includes a second offset address buffer unit and a control page identifier acquisition unit, and the device is also used to: cache the second offset address to the second offset address buffer unit through the primary update unit, wherein the second offset address represents the storage address of the identifier of the target control page in the memory space of the host; obtain the second offset address from the second offset address buffer unit through the control page identifier acquisition unit, read the identifier of the target control page from the memory space of the host according to the second offset address, and cache the identifier of the target control page to the control page identifier buffer unit.

[0094] In an exemplary embodiment, the resynchronization device of the control block also includes a missing signal buffer unit, a primary missing processing unit, a control page header information buffer unit, a secondary query unit, and a secondary update unit, and the device is also used to: when it is determined that the primary query unit has not queried the target quantity and the current quantity from the internal cache unit, cache the target execution signal to the missing signal buffer unit; when it is determined that the target execution signal exists in the missing signal buffer unit, read the header information of the target control page from the memory space of the host through the primary missing processing unit, wherein the header information of the target control page includes the target quantity and the identifier of the target control page; cache the header information of the target control page to the control page header information buffer unit; and update the target control page through the secondary query unit. The target quantity and the current quantity are obtained by the secondary query unit; the target quantity and the current quantity in the internal cache unit are updated according to the target quantity and the current quantity obtained by the secondary query unit through the secondary update unit; the first offset address is cached to the first offset address buffer unit through the secondary update unit; the target quantity and the current quantity in the memory space of the host are updated according to the first offset address through the write unit; when it is determined that the write unit has completed the update, an update completion notification is sent to the control page identifier buffer unit; when it is determined that the identifier of the target control page has been cached in the control page identifier buffer unit, the identifier of the target control page is sent to the control command scheduling engine to obtain the synchronization completion result of the multiple control blocks.

[0095] In an exemplary embodiment, the apparatus is further configured to: query the target quantity and the current quantity from the internal cache unit through the secondary query unit.

[0096] In an exemplary embodiment, the device is also used to: when it is determined that the secondary query unit has not queried the target quantity and the current quantity from the internal cache unit, determine whether the target control page is a header control page, wherein the header control page represents the first control page in a chain of control pages, and the chain of control pages represents multiple interrelated control pages; when it is determined that the target control page is a header control page, obtain the target quantity from the control page header information buffer unit, and determine a third preset value as the value of the current quantity.

[0097] In an exemplary embodiment, the control block resynchronization device further includes a secondary miss processing unit, and the device is further configured to: when it is determined that the target control page is not a head control page, obtain the target number and the current number through the secondary miss processing unit.

[0098] In an exemplary embodiment, the device is also used to: search for a target header control page corresponding to the target control page from the memory space of the host, wherein the target header control page represents the first control page in the chain of control pages where the target control page is located; obtain the target quantity from the control page header information of the target header control page, and determine the third preset value as the value of the current quantity.

[0099] In an exemplary embodiment, the device is further used to: read the identifier of the target control page from the memory space of the host through the control page identifier acquisition unit, and cache the identifier of the target control page to the control page identifier buffer unit.

[0100] In an exemplary embodiment, the device is also used to: when it is determined that the secondary query unit has queried the target quantity and the current quantity from the internal cache unit, determine whether the difference between the target quantity and the current quantity is a fourth preset value; when it is determined that the difference between the target quantity and the current quantity is not equal to the fourth preset value, update the value of the current quantity in the internal cache unit to the sum of the value of the current quantity and the fourth preset value; when it is determined that the difference between the target quantity and the current quantity is equal to the fourth preset value, update the values ​​of the target quantity and the current quantity in the internal cache unit to a fifth preset value.

[0101] In an exemplary embodiment, the device is also used to: when it is determined that the secondary query unit does not query the target quantity and the current quantity from the internal cache unit, update the target quantity in the internal cache unit to the target quantity obtained by the secondary query unit, and update the current quantity in the internal cache unit to the current quantity obtained by the secondary query unit.

[0102] In an exemplary embodiment, the device is also used to: obtain the identifier of the target control page in the header information of the target control page from the control page header information buffer unit through the control page identifier acquisition unit, and cache the identifier of the target control page to the control page identifier buffer unit.

[0103] In an exemplary embodiment, the device is also used to: when it is determined that there are multiple requests to simultaneously access the memory space of the host, determine the access order of the multiple requests according to preset rules, wherein the preset rules are used to indicate the access priority of different types of requests.

[0104] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0105] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0106] Optionally, in this embodiment, the storage medium may be configured to store program codes for executing the following steps:

[0107] S1, receiving a target execution signal sent by a host based on a control request, wherein the control request corresponds to a target control page, the target control page includes multiple control blocks, each control block corresponds to a control command, and the target execution signal is a signal generated after the target control block in the target control page completes the control command;

[0108] S2, detecting a resynchronization flag of the target execution signal, and when detecting that the resynchronization flag indicates that the target execution signal needs to be resynchronized, writing the target execution signal into a resynchronization execution signal buffer unit of the resynchronization device of the control block;

[0109] S3, resynchronizing the multiple execution signals in the resynchronization execution signal buffer unit to obtain synchronization completion results of multiple control blocks, wherein the multiple control blocks belong to the same control page.

[0110] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0111] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0112] Optionally, in this embodiment, the processor may be configured to perform the following steps through a computer program:

[0113] S1, receiving a target execution signal sent by a host based on a control request, wherein the control request corresponds to a target control page, the target control page includes multiple control blocks, each control block corresponds to a control command, and the target execution signal is a signal generated after the target control block in the target control page completes the control command;

[0114] S2, detecting a resynchronization flag of the target execution signal, and when detecting that the resynchronization flag indicates that the target execution signal needs to be resynchronized, writing the target execution signal into a resynchronization execution signal buffer unit of the resynchronization device of the control block;

[0115] S3, resynchronizing the multiple execution signals in the resynchronization execution signal buffer unit to obtain synchronization completion results of multiple control blocks, wherein the multiple control blocks belong to the same control page.

[0116] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0117] Optionally, in this embodiment, the computer program may be configured to perform the following steps by means of the computer program:

[0118] S1, receiving a target execution signal sent by a host based on a control request, wherein the control request corresponds to a target control page, the target control page includes multiple control blocks, each control block corresponds to a control command, and the target execution signal is a signal generated after the target control block in the target control page completes the control command;

[0119] S2, detecting a resynchronization flag of the target execution signal, and when detecting that the resynchronization flag indicates that the target execution signal needs to be resynchronized, writing the target execution signal into a resynchronization execution signal buffer unit of the resynchronization device of the control block;

[0120] S3, resynchronizing the multiple execution signals in the resynchronization execution signal buffer unit to obtain synchronization completion results of multiple control blocks, wherein the multiple control blocks belong to the same control page.

[0121] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0122] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0123] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A control block resynchronization method, characterized in that: A resynchronization device applied to a control block, the resynchronization device of the control block comprising a resynchronization execution signal buffer unit, the method comprising: Receiving a target execution signal sent by a host based on a control request, wherein the control request corresponds to a target control page, the target control page includes a plurality of control blocks, each control block corresponds to a control command, and the target execution signal is a signal generated after the target control block in the target control page completes the control command; detecting a resynchronization flag of the target execution signal, and writing the target execution signal into a resynchronization execution signal buffer unit of a resynchronization device of the control block when detecting that the resynchronization flag indicates that the target execution signal needs to be resynchronized; Resynchronization processing is performed on multiple execution signals in the resynchronization execution signal buffer unit to obtain synchronization completion results of multiple control blocks, wherein the multiple control blocks belong to the same control page.

2. The method according to claim 1, characterized in that The resynchronization device of the control block further includes a primary query unit, a primary update unit, an internal cache unit, a first offset address buffer unit, a write unit, and a control page identifier buffer unit; Resynchronizing the multiple execution signals in the resynchronization execution signal buffer unit to obtain synchronization completion results of the multiple control blocks, including: querying the target number and the current number of the target control page from the internal cache unit through the primary query unit, wherein the target number indicates the number of execution signals that need to be resynchronized in the target control page, and the current number indicates the number of execution signals that have been resynchronized in the target control page; When it is determined that the primary query unit has queried the target quantity and the current quantity from the internal cache unit, updating the target quantity and the current quantity in the internal cache unit through the primary update unit; caching the first offset address to the first offset address buffer unit through the primary update unit, wherein the first offset address represents the storage addresses of the target quantity and the current quantity in the memory space of the host; updating the target quantity and the current quantity in the memory space of the host according to the first offset address by the writing unit; When it is determined that the writing unit has completed updating, sending an update completion notification to the control page identifier buffer unit; When it is determined that the identifier of the target control page has been cached in the control page identifier buffer unit, the identifier of the target control page is sent to the control command scheduling engine of the host to obtain synchronization completion results of the multiple control blocks.

3. The method according to claim 2, characterized in that The target execution signal includes address information of the target control block, and querying the target number and current number of the target control page from the internal cache unit through the primary query unit includes: Acquire address information of the target control block from the target execution signal, wherein the address information is composed of a plurality of bits; Reading bit information of a preset position from the address information according to a size of the control page preset by the host to obtain an index of the target control page; The target quantity and the current quantity are queried from the internal cache unit according to the index of the target control page.

4. The method according to claim 2, characterized in that: When it is determined that the primary query unit has queried the target quantity and the current quantity from the internal cache unit, updating the target quantity and the current quantity in the internal cache unit by the primary update unit includes: Determining whether a difference between the target quantity and the current quantity is equal to a first preset value; When it is determined that the difference between the target quantity and the current quantity is not equal to the first preset value, updating the value of the current quantity in the internal cache unit to the sum of the value of the current quantity and the first preset value; When it is determined that the difference between the target quantity and the current quantity is equal to the first preset value, the values ​​of the target quantity and the current quantity in the internal cache unit are both updated to a second preset value.

5. The method according to claim 2, characterized in that: The method further includes: caching the first offset address to the first offset address buffer unit by the primary update unit; Determining whether a difference between the target quantity and the current quantity is equal to a second preset value; When it is determined that the difference between the target quantity and the current quantity is equal to the second preset value, the first offset address is cached in the first offset address buffer unit through the primary update unit.

6. The method according to claim 2, characterized in that The control block resynchronization device further comprises a second offset address buffer unit, a control page identifier acquisition unit, In the case where it is determined that the primary query unit has queried the target quantity and the current quantity from the internal cache unit, the method further includes: caching the second offset address to the second offset address buffer unit through the primary update unit, wherein the second offset address represents a storage address of the identifier of the target control page in the memory space of the host; The second offset address is obtained from the second offset address buffer unit through the control page identifier acquisition unit, the identifier of the target control page is read from the memory space of the host according to the second offset address, and the identifier of the target control page is cached to the control page identifier buffer unit.

7. The method according to claim 2, characterized in that The resynchronization device of the control block further includes a missing signal buffer unit, a primary missing processing unit, a control page header information buffer unit, a secondary query unit, and a secondary update unit. The method further includes: When it is determined that the primary query unit has not queried the target quantity and the current quantity from the internal cache unit, cache the target execution signal to the missing signal buffer unit; In the case of determining that the target execution signal exists in the missing signal buffer unit, reading the header information of the target control page from the memory space of the host through the one-miss processing unit, wherein the header information of the target control page includes the target quantity and the identifier of the target control page; Cache the header information of the target control page into the control page header information buffer unit; Acquire the target quantity and the current quantity through the secondary query unit; updating the target quantity and the current quantity in the internal cache unit according to the target quantity and the current quantity acquired by the secondary query unit through the secondary update unit; caching the first offset address to the first offset address buffer unit through the secondary updating unit; updating the target quantity and the current quantity in the memory space of the host according to the first offset address by the writing unit; When it is determined that the writing unit has completed updating, sending an update completion notification to the control page identifier buffer unit; After determining that the identifier of the target control page has been cached in the control page identifier buffer unit, the identifier of the target control page is sent to the control command scheduling engine to obtain synchronization completion results of the multiple control blocks.

8. The method according to claim 7, characterized in that Acquiring the target quantity and the current quantity through the secondary query unit includes: The target quantity and the current quantity are queried from the internal cache unit through the secondary query unit.

9. The method according to claim 8, characterized in that The method further comprises: In the case that it is determined that the secondary query unit has not queried the target quantity and the current quantity from the internal cache unit, determining whether the target control page is a head control page, wherein the head control page represents a first control page in a chain of control pages, and the chain of control pages represents a plurality of mutually related control pages; In the case where it is determined that the target control page is a header control page, the target quantity is acquired from the control page header information buffer unit, and a third preset value is determined as the value of the current quantity.

10. The method according to claim 9, characterized in that The resynchronization device of the control block further comprises a secondary loss processing unit, After determining whether the target control page is a header control page, the method further includes: In the case where it is determined that the target control page is not a head control page, the target number and the current number are acquired by the secondary miss processing unit.

11. The method according to claim 10, characterized in that Acquiring the target quantity and the current quantity by the secondary missing processing unit includes: Searching for a target header control page corresponding to the target control page from the memory space of the host, wherein the target header control page represents the first control page in the chain of control pages where the target control page is located; The target quantity is obtained from the control page header information of the target header control page, and the third preset value is determined as the value of the current quantity.

12. The method according to claim 10, characterized in that In the case where it is determined that the target control page is not a header control page, after obtaining the target quantity and the current quantity through the secondary miss processing unit, the method further includes: The control page identifier acquisition unit reads the identifier of the target control page from the memory space of the host, and caches the identifier of the target control page in the control page identifier buffer unit.

13. The method according to claim 7, characterized in that Updating the target quantity and the current quantity in the internal cache unit according to the target quantity and the current quantity acquired by the secondary query unit by the secondary update unit includes: In the case where it is determined that the secondary query unit queries the target quantity and the current quantity from the internal cache unit, determining whether a difference between the target quantity and the current quantity is a fourth preset value; When it is determined that the difference between the target quantity and the current quantity is not equal to the fourth preset value, updating the value of the current quantity in the internal cache unit to the sum of the value of the current quantity and the fourth preset value; When it is determined that the difference between the target quantity and the current quantity is equal to the fourth preset value, the values ​​of the target quantity and the current quantity in the internal cache unit are both updated to a fifth preset value.

14. The method according to claim 13, characterized in that The method further comprises: When it is determined that the secondary query unit does not query the target quantity and the current quantity from the internal cache unit, the target quantity in the internal cache unit is updated to the target quantity obtained by the secondary query unit, and the current quantity in the internal cache unit is updated to the current quantity obtained by the secondary query unit.

15. The method according to claim 7, characterized in that After caching the header information of the target control page in the control page header information buffer unit, the method further includes: The control page identifier acquisition unit acquires the identifier of the target control page in the header information of the target control page from the control page header information buffer unit, and caches the identifier of the target control page in the control page identifier buffer unit.

16. The method according to claim 12, characterized in that The method further comprises: In the case where it is determined that there are multiple requests to access the memory space of the host at the same time, the access order of the multiple requests is determined according to a preset rule, wherein the preset rule is used to indicate the access priority of different types of requests.

17. A control block resynchronization device, characterized in that: The resynchronization device of the control block is used to execute the steps of the method described in any one of claims 1 to 16.

18. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 16 when executed by a processor.

19. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 16 are implemented.

20. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method described in any one of claims 1 to 16 are implemented.

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