Credit control verification assembly, system and method for DAMQ

By providing credit control verification components in DAMQ, including interface signal connection, data storage and sampling processing modules, the problem of non-universal DAMQ credit control methods in the prior art is solved, and automated read and write legality detection and error reporting are realized.

CN119623376AActive Publication Date: 2025-03-14SHENZHEN NANFEI MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202510163870.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-14
Publication Date
2025-03-14
Estimated Expiration
2045-02-14

AI Technical Summary

Technical Problem

The prior art is difficult to implement the general credit control method of DAMQ, which leads to verification personnel need to perform different processing according to different usage scenarios and repeatedly implement control operations.

Method used

It provides a credit control verification component of DAMQ, including an interface signal connection module, a data storage module and a sampling and processing module, which can automatically realize the read and write legality detection and error reporting of DAMQ.

Benefits of technology

The general credit control method of DAMQ is implemented. Just pass in the corresponding parameters, and the legitimacy of read and write can be automatically detected and errors can be reported, avoiding the need to repeatedly implement control operations.

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Abstract

The invention discloses a DAMQ credit control verification assembly, system and method, and belongs to the technical field of digital circuit verification methods, the DAMQ credit control verification assembly comprises an interface signal connection module, a data storage module and a sampling processing module; the credit control verification system of the DAMQ comprises a to-be-tested piece and a verification environment. The credit control verification method of the DAMQ comprises the steps of converting a signal of the DAMQ into a normalized signal, storing the normalized signal, configuration of the DAMQ and a real-time state, updating the stored signal and state in real time, and performing error judgment on the DAMQ based on the updated signal and state. According to the method and the device, the problems that the channel number, the available space and the distribution mode of the DAMQ in different use scenes are different, and verification personnel need to make different processing are solved, the universal credit control method of the DAMQ is realized, and the read-write legality detection and the error report of the DAMQ can be automatically realized only by introducing corresponding parameters.
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Description

Technical Field

[0001] The present invention relates to the field of digital circuit verification, and in particular to a credit control verification component of DAMQ. Background Art

[0002] DAMQ is mainly used in systems with multiple channels for data transmission that needs to be stored. After digital chip designers design and implement DAMQ, the storage module in the switch chip can be directly instantiated and used, and digital chip verifiers need to test the correctness of its implementation. The number of channels, available space, and allocation methods of DAMQ in different usage scenarios are different, and verifiers need to make different processing and repeatedly implement DAMQ control operations. Summary of the invention

[0003] The present invention aims to overcome the defects of the above-mentioned prior art and provides a DAMQ credit control verification component, system and method, which can implement a universal DAMQ credit control method. By simply passing in corresponding parameters, the read and write legitimacy detection and error reporting of DAMQ can be automatically implemented.

[0004] To achieve the above object, the technical solution of the present invention is: In a first aspect, the present application provides a DAMQ credit control verification component, including: An interface signal connection module is used to convert the DAMQ signal into a normalized signal; A data storage module, used for storing the normalized signal, the configuration and real-time status of the DAMQ; The sampling processing module is used to update the stored signals and states in real time, and to make error judgment on the DAMQ based on the updated signals and states.

[0005] Optionally, the credit control verification component of the DAMQ further includes: a busy detection module, used to determine whether the DAMQ can perform a write operation based on the signal and state updated by the sampling processing module.

[0006] Optionally, the credit control verification component of DAMQ further includes: a status reporting module, used to output and report the judgment result of the sampling processing module.

[0007] In a second aspect, the present application also provides a DAMQ credit control verification system, including: A device under test, wherein the device under test includes DAMQ; The credit control verification component of DAMQ as described in any one of the first aspects is connected to the device under test; The verification environment is connected with the credit control verification component of the DAMQ.

[0008] In a third aspect, the present application also provides a DAMQ credit control verification method, including: Convert DAMQ signals into normalized signals; Storing normalized signals, configuration and real-time status of the DAMQ; Real-time update of stored signals and status; An error determination is performed on the DAMQ based on the updated signal and state.

[0009] Optionally, performing error judgment on the DAMQ based on the updated signal and state includes: When it is detected that the write enable of a channel of the DAMQ is 1, it is determined whether the current channel occupies its independent space; if not, the data to be written is written into its independent space; if so, the data to be written is written into the shared space; if the current channel occupies its independent space and the shared space is occupied, it is determined that an error has occurred in the write enable; When it is detected that the read enable of a channel of the DAMQ is 1, it is determined whether the current channel occupies shared space. If so, the shared space is released; if the current channel does not occupy shared space, it is determined whether the current channel occupies its independent space. If so, the independent space is released; if the current channel does not occupy shared space and its independent space, it is determined that an error has occurred in the read enable here.

[0010] Optionally, after performing error judgment on the DAMQ based on the updated signal and state, the method further includes: judging whether the DAMQ can perform a write operation based on the updated signal and state of the sampling processing module.

[0011] Optionally, judging whether the DAMQ can perform a write operation based on the updated signal and state of the sampling processing module includes: Determine the write count of the DAMQ, and if the write count is 0, determine that the DAMQ can perform a write operation; If the shared space is configured as 0, the private space occupied by the current channel is equal to the private credit minus 1 and there is a write operation at the same time; or the private space occupied by the current channel is equal to the private credit and there is no read operation at the same time, it means that the current channel space is full, and it is determined that the current channel cannot be written; The current channel is considered not writable when any of the following conditions are met: the private space and shared space of the current channel are both full and there is no read enable; the private space of the current channel is full, and the number of written entries in the shared space plus the number of read enables is greater than or equal to the shared credit; the private space of the current channel is equal to the private credit minus 1, the shared space is full, and there is a write enable.

[0012] Optionally, the DAMQ credit control verification method further includes: outputting and reporting the result of the error judgment.

[0013] Optionally, the DAMQ credit control verification method is executed based on the DAMQ credit control verification system, and before converting the DAMQ signal into a normalized signal, it also includes: instantiating the DAMQ credit control verification component into the verification environment.

[0014] The credit control verification component of DAMQ, the credit control verification system of DAMQ and the credit control verification method of DAMQ of the present application have the following beneficial effects: through the interface signal connection module, it is used to convert the signal of DAMQ into a normalized signal; through the data storage module, it is used to store the normalized signal, the configuration and real-time status of the DAMQ; through the sampling and processing module, it is used to update the stored signal and status in real time, and make an error judgment on the DAMQ based on the updated signal and status. The present application can solve the problem that the verification personnel need to make different processing and repeatedly implement the control operation of DAMQ according to the different number of channels, available space and allocation methods of DAMQ in different usage scenarios, and realize the universal credit control method of DAMQ. It only needs to pass in the corresponding parameters to automatically implement the read and write legality detection and error reporting of DAMQ.

[0015] In order to make the above features and advantages of the invention more obvious and easy to understand, embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or related technologies, the drawings required for use in the embodiments or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 This is a module diagram of the credit control verification component of DAMQ provided in the first embodiment of the present application.

[0018] Figure 2 This is a module diagram of the DAMQ credit control verification system provided in the second embodiment of the present application.

[0019] Figure 3 This is a flowchart of the DAMQ credit control verification method provided in the third embodiment of the present application. DETAILED DESCRIPTION

[0020] In order to make the purpose and technical solution of the embodiment of the present invention clearer, the technical solution of the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings of the embodiment of the present invention. Obviously, the described embodiment is a part of the embodiment of the present invention, not all of the embodiments. Based on the described embodiment of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] In one embodiment, see Figure 1 The present application provides a credit control verification component of DAMQ, DAMQ stands for Dynamic Allocation Shared Multiple Queues, and the credit control verification component of DAMQ may include the following modules: an interface signal connection module 101, a data storage module 102, and a sampling processing module 103; wherein, The interface signal connection module 101 is used to convert the DAMQ signal into a normalized signal.

[0022] The data storage module 102 is used to store normalized signals, DAMQ configuration and real-time status.

[0023] The sampling processing module 103 is used to update the stored signals and states in real time, and perform error judgment on DAMQ based on the updated signals and states.

[0024] The credit control verification component of DAMQ of the present application converts the signal of DAMQ into a normalized signal through the interface signal connection module 101; stores the normalized signal, the configuration and real-time status of DAMQ through the data storage module 102; updates the stored signal and status in real time through the sampling processing module 103, and makes an error judgment on DAMQ based on the updated signal and status. The present application can solve the problem that the verification personnel need to make different processing and repeatedly implement the control operation of DAMQ according to the different number of channels, available space and allocation mode of DAMQ in different usage scenarios, and implement the universal credit control method of DAMQ. It only needs to pass in the corresponding parameters to automatically implement the read and write legality detection and error reporting of DAMQ.

[0025] As an example, the interface signal connection module 101 implements continuous assignment of the DAMQ signal to the internal signal of the DAMQ credit control verification component. The DAMQ signal has some interfaces, including read enable, read channel, write enable, write channel (there are other signals, which are not concerned here). By connecting the DAMQ signal to the DAMQ credit control verification component, the DAMQ state detection and control are realized. In the actual code implementation, the DAMQ path is changeable. Even the same function representing write enable may have different names. After assignment, the DAMQ credit control verification component obtains the DAMQ signal.

[0026] Specifically, the value of the write enable signal in DAMQ is assigned to the write enable signal of the io_if interface of the interface signal connection module 101, and subsequent modules can use the signal name of the interface io_if inside the credit control verification component of the DAMQ, without having to rewrite it with a different name for each different instantiation of each project.

[0027] As an example, the data storage module 102 is used to store normalized signals, DAMQ configuration and real-time status. The data storage module 102 receives the DAMQ signal and the configuration and real-time status of each channel after the interface signal connection module 101 assigns values. Each channel has an independent space configuration, and all channels have a shared space configuration. The status of each channel inside DAMQ includes the currently occupied independent space and the currently occupied shared space.

[0028] Among them, only the data of the channel can be written into the independent space, and the data of all channels can be written into the shared space.

[0029] Furthermore, after the interface signal connection module 101 is connected to the data storage module 102, DAMQ needs to be configured to allocate independent space and shared space for each channel as needed. For example, some chips support 8 25Gbps ports and 2 100Gbps ports. Depending on the form, the allocation method of DAMQ is also different. After the design of DAMQ is completed, the overall available space is determined. For example, in this scenario, it is assumed to be 200 spaces, which can meet the performance requirements. The DAMQ is configured as follows: the DAMQ in the former form is configured as 8 channels, each channel occupies 15 independent spaces, and all channels share 80 shared spaces; the latter form is configured as 2 channels, each channel occupies 50 independent spaces, and all channels share 100 shared spaces. The data here is only for example, and the actual allocation situation needs to be reasonably calculated according to the performance requirements.

[0030] As an example, the sampling processing module 103 is used to update the stored signals and states in real time, and make an error judgment on DAMQ based on the updated signals and states. Wherein, updating the stored signals and states in real time includes: reading the internal signals and states of the data storage module 102 for calculation and state conversion, and then storing the calculated results in the data storage module.

[0031] Among them, error judgment of DAMQ based on updated signals and states includes: when it is detected that the write enable of a channel of the DAMQ is 1, judging whether the current channel occupies its independent space; if not, writing the data to be written into the independent space of the channel; if it is full, writing the data to be written into the shared space; if the current channel occupies its independent space and the shared space is full, it is judged that an error has occurred in this write enable; when it is detected that the read enable of a channel of DAMQ is 1, judging whether the current channel occupies the shared space, and if so, releasing the shared space; if the current channel does not occupy the shared space, judging whether the current channel occupies the independent space of the channel, and if so, releasing the independent space; if the current channel does not occupy the shared space and the independent space of the current channel, it is judged that an error has occurred in this read enable.

[0032] Specifically, the module will run multiple copies in parallel to cope with the situation where multiple channels may read and write at the same time.

[0033] As another example, the credit control verification component of DAMQ may further include: a busy detection module 104, the busy detection module 104 is used to determine whether DAMQ can perform a write operation based on the signal and state updated by the sampling processing module 103. Since all channels can be occupied for the shared space, it is necessary to obtain the number of channels for reading and writing the shared space at the current moment.

[0034] Specifically, the busy detection module 104 first determines the write count of DAMQ. If the write count is 0, it is determined that the DAMQ has not been written, and returns 0 to indicate that the write operation can be performed.

[0035] If the shared space is configured as 0, the private space occupied by the current channel is equal to the private credit minus 1 and there is a write operation at the same time; or the private space occupied by the current channel is equal to the private credit and there is no read operation at the same time, it means that the current channel space is full, and the current channel is determined to be non-writable.

[0036] If the shared space is configured as non-zero, the current channel is considered not writable if any of the following conditions are met: the private space and shared space of the current channel are both full, and there is no read enable; the private space of the current channel is full, and the number of written entries in the shared space plus the number of read enable entries is greater than or equal to the shared credit; the private space of the current channel is equal to the private credit minus 1, the shared space is full, and there is a write enable. If the above conditions are not met, it returns not busy, indicating that the current channel can be written.

[0037] Among them, private credit is the maximum value of private space that a channel can occupy, and shared credit is the maximum value of shared space that all channels can occupy.

[0038] As an example, the total space and number of channels of DAMQ are fixed. Referring to the above example, DAMQ has 200 spaces and 8 channels, and the channel numbers are 0, 1, 2, 3, 4, 5, 6, and 7 respectively; the configurable part is the private space and shared space that each channel can occupy. If 100 private spaces are allocated to channels 0 and 4 respectively, and the shared space is configured as 0, the current channel occupies 99 private spaces and there is a write, it returns busy; the current channel occupies 100 private spaces and there is no read, it returns busy, indicating that the current channel space is full and it is determined that the current channel cannot be written.

[0039] If 80 private spaces and 40 shared spaces are configured for the channels 0 and 4 respectively, the private space of the channel 0 occupies 80 and the shared space occupies 40, and both the channel 0 and the channel 4 do not have read enable, then the signal returns busy; the private space of the channel 0 occupies 80 and the shared space occupies 39, and one of the channel 0 and the channel 4 has write enable, then the signal returns busy; the private space of the channel 0 occupies 80 and the shared space occupies 38, and both the channel 0 and the channel 4 have write enable, then the signal returns busy; the private space of the channel 0 occupies 79 and the shared space occupies 40 spaces of other channels, and the channel 0 has write enable, then the signal returns busy; if the above four conditions are not met, then the signal returns not busy.

[0040] Specifically, the busy detection module 104 can be called outside the credit control verification component of the DAMQ to output the writable state of a certain channel.

[0041] As another example, the credit control verification component of DAMQ may also include: a status reporting module 105, which is used to output and report the judgment result of the sampling processing module 103, which can be used to monitor the status of DAMQ, and directly output the content of the data storage module 102 after the external call of the credit control verification component of DAMQ.

[0042] In another embodiment, see Figure 2The present application also provides a DAMQ credit control verification system, the DAMQ credit control verification system may include: a device under test 206, such as Figure 1 The credit control verification component and verification environment 207 of DAMQ in its related embodiments; wherein, The DUT 206 may include DAMQ; The credit control verification component of the DAMQ is connected to the device under test 206 .

[0043] The verification environment 207 is connected to the credit control verification component of the DAMQ.

[0044] As an example, in the credit control verification system of DAMQ, the verification personnel can connect the output of the credit control verification component of DAMQ to a suitable location in the verification environment 207 as needed.

[0045] Specifically, where the status needs to be checked, the status reporting module 105 is called to report the content stored in the data storage module 102. Where data needs to be written, the busy detection module 104 is added to determine whether it can be written.

[0046] In another embodiment, see Figure 3 , the present application also provides a DAMQ credit control verification method, which may include the following steps: S301~S304.

[0047] S301: Convert the DAMQ signal into a normalized signal.

[0048] S302: Store the normalized signal, DAMQ configuration and real-time status.

[0049] S303: Update the stored signals and states in real time.

[0050] S304: Performing an error determination on DAMQ based on the updated signal and state.

[0051] As an example, the credit control verification method of DAMQ is based on Figure 1 or Figure 2 The method is executed by the DAMQ credit control verification system described in the embodiment, and before converting the DAMQ signal into a normalized signal, it also includes: instantiating the DAMQ credit control verification component into the verification environment.

[0052] Specifically, after instantiation, connection, and configuration are completed, the credit control verification component of the DAMQ can start working.

[0053] As an example, in step S304, error judgment of DAMQ based on the updated signal and status may include the following steps: when it is detected that the write enable of a channel of DAMQ is 1, it is determined whether the current channel occupies its independent space; if not, the data to be written is written into its independent space; if so, the data to be written is written into the shared space; if the current channel occupies its independent space and the shared space is occupied, it is determined that an error has occurred in the write enable; when it is detected that the read enable of a channel of DAMQ is 1, it is determined whether the current channel occupies the shared space, and if so, the shared space is released; if the current channel does not occupy the shared space, it is determined whether the current channel occupies its independent space, and if so, the independent space is released; if the current channel does not occupy the shared space and its independent space, it is determined that an error has occurred in the read enable here.

[0054] As an example, after performing an error judgment on DAMQ based on the updated signal and state, that is, after step S304 , the following step may also be included: judging whether the DAMQ can perform a write operation based on the updated signal and state of the sampling processing module 103 .

[0055] As an example, judging whether DAMQ can perform a write operation based on the signal and state updated by the sampling processing module includes: Determine the write count of DAMQ, and if the write count is 0, determine that the DAMQ can perform a write operation; If the shared space is configured as 0, the private space occupied by the current channel is equal to the private credit minus 1 and there is a write operation at the same time; or the private space occupied by the current channel is equal to the private credit and there is no read operation at the same time, it means that the current channel space is full, and it is determined that the current channel cannot be written; If the shared space is configured as non-zero, the current channel is considered not writable if any of the following conditions are met: the private space and shared space of the current channel are both full, and there is no read enable; the private space of the current channel is full, and the number of written entries in the shared space plus the number of read enable entries is greater than or equal to the shared credit; the private space of the current channel is equal to the private credit minus 1, the shared space is full, and there is a write enable. If the above conditions are not met, it returns not busy, indicating that the current channel can be written.

[0056] Among them, private credit is the maximum value of private space that a channel can occupy, and shared credit is the maximum value of shared space that all channels can occupy.

[0057] As an example, the DAMQ credit control verification method may further include the following steps: outputting and reporting the result of the error judgment.

[0058] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0059] Although the present application has been disclosed as above with the embodiments, it is not intended to limit the present application. Any person with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be determined by the scope of the attached patent application.

Claims

1. A credit control verification component of DAMQ, characterized in that: include: An interface signal connection module is used to convert the DAMQ signal into a normalized signal; A data storage module, used for storing the normalized signal, the configuration and real-time status of the DAMQ; The sampling processing module is used to update the stored signals and states in real time, and to make error judgment on the DAMQ based on the updated signals and states.

2. The credit control verification component of DAMQ as claimed in claim 1, characterized in that: Also includes: A busy detection module is used to determine whether the DAMQ can perform a write operation based on the signal and state updated by the sampling processing module.

3. The credit control verification component of DAMQ according to claim 1, characterized in that: Also includes: The status reporting module is used to output and report the judgment result of the sampling processing module.

4. A DAMQ credit control verification system, characterized in that: include: A device under test, wherein the device under test includes DAMQ; The credit control verification component of DAMQ according to any one of claims 1 to 3, connected to the device under test; The verification environment is connected with the credit control verification component of the DAMQ.

5. A DAMQ credit control verification method, characterized in that: include: Convert DAMQ signals into normalized signals; Storing normalized signals, configuration and real-time status of the DAMQ; Real-time update of stored signals and status; An error determination is performed on the DAMQ based on the updated signal and state.

6. The DAMQ credit control verification method as claimed in claim 5, characterized in that: The performing error judgment on the DAMQ based on the updated signal and state includes: When it is detected that the write enable of a channel of the DAMQ is 1, it is determined whether the current channel occupies its independent space; if not, the data to be written is written into its independent space; if so, the data to be written is written into the shared space; if the current channel occupies its independent space and the shared space is occupied, it is determined that an error has occurred in the write enable; When it is detected that the read enable of a channel of the DAMQ is 1, it is determined whether the current channel occupies shared space. If so, the shared space is released; if the current channel does not occupy shared space, it is determined whether the current channel occupies its independent space. If so, the independent space is released; if the current channel does not occupy shared space and its independent space, it is determined that an error has occurred in the read enable here.

7. The DAMQ credit control verification method as claimed in claim 5, characterized in that: After performing error judgment on the DAMQ based on the updated signal and state, the method further includes: judging whether the DAMQ can perform a write operation based on the updated signal and state of the sampling processing module.

8. The DAMQ credit control verification method according to claim 7, characterized in that: The determining whether the DAMQ can perform a write operation based on the updated signal and state of the sampling processing module includes: Determine the write count of the DAMQ, and if the write count is 0, determine that the DAMQ can perform a write operation; If the shared space is configured as 0, the private space occupied by the current channel is equal to the private credit minus 1 and there is a write operation at the same time; or the private space occupied by the current channel is equal to the private credit and there is no read operation at the same time, it means that the current channel space is full, and it is determined that the current channel cannot be written; If the shared space is configured as non-zero, the current channel is considered unwritable when any of the following conditions are met: the private space and shared space of the current channel are both full and there is no read enable; the private space of the current channel is full, and the number of written entries in the shared space plus the number of read enables is greater than or equal to the shared credit; the private space of the current channel is equal to the private credit minus 1, the shared space is full, and there is a write enable.

9. The DAMQ credit control verification method according to claim 5, characterized in that: Also includes: Output and report the results of the error judgment.

10. The DAMQ credit control verification method according to any one of claims 5 to 9, characterized in that: The DAMQ credit control verification method is executed based on the DAMQ credit control verification system as claimed in claim 4, and before converting the DAMQ signal into a normalized signal, it also includes: instantiating the DAMQ credit control verification component into the verification environment.

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