Display device and driving method thereof

Abstract

The invention provides a display device and a driving method thereof, the display device comprises a plurality of sub-pixels, a plurality of data lines and a plurality of first control circuits corresponding to the plurality of sub-pixels, and when an absolute value of a difference value of two gray-scale values of the sub-pixels in two adjacent frames is smaller than or equal to a first preset difference value, the first control circuits are connected with the sub-pixels. And the corresponding first control circuit is used for controlling the corresponding data line to be electrically disconnected from the sub-pixel in the rear of the two adjacent frames, so that the power consumption of the display panel in the display device is reduced, and meanwhile, the lower accuracy of the brightness of the display panel is avoided.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display device and a driving method thereof. Background Art

[0002] In a static picture environment, the previously stored data can be remapped to the screen through PSR (Panel Self-Refresh) technology to relieve the computing pressure of the GPU (Graphics Processing Unit), thereby achieving the purpose of reducing power consumption.

[0003] However, since data is still being updated inside the display panel in the PSR technology, the power consumption of the display panel itself is still relatively high. Summary of the invention

[0004] The object of the present invention is to provide a display device and a driving method thereof, so as to solve the problem that the power consumption of the display panel itself is still high under the existing static picture.

[0005] An embodiment of the present invention provides a display device, including:

[0006] Multiple sub-pixels;

[0007] A plurality of data lines, wherein the data lines are electrically connected to the corresponding plurality of sub-pixels;

[0008] A plurality of first control circuits corresponding to the plurality of sub-pixels, the first control circuits being used to control the electrical connection or electrical disconnection between the corresponding sub-pixels and the corresponding data lines;

[0009] When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to a first preset difference, the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames.

[0010] In some embodiments, when the two grayscale values ​​of the sub-pixel in two adjacent frames are equal, the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames.

[0011] In some embodiments, the control terminal and the input terminal of the first control circuit are electrically connected to the corresponding data line, and the output terminal of the first control circuit is electrically connected to the corresponding sub-pixel;

[0012] The first control circuit is used for controlling the corresponding data line to be electrically connected or electrically disconnected with the corresponding sub-pixel according to the data signal transmitted by the data line.

[0013] In some embodiments, the display device further comprises:

[0014] A plurality of gate lines, wherein the gate lines are electrically connected to the corresponding plurality of sub-pixels;

[0015] A plurality of pixel circuits corresponding to the plurality of sub-pixels, the pixel circuits at least comprising a driving transistor, the gate of the driving transistor being electrically connected to the corresponding gate line;

[0016] The first control circuit at least includes a first control transistor, a gate of the first control transistor is electrically connected to the corresponding data line, and the first control transistor and the driving transistor are arranged in series between the corresponding data line and the corresponding sub-pixel.

[0017] In some embodiments, the first control circuit further includes:

[0018] A first control unit, wherein the control end of the first control unit is electrically connected to the control end of the first control circuit, the first input end of the first control unit is electrically connected to the first voltage line, and the output end of the first control unit is electrically connected to the gate of the first control transistor and the second voltage line.

[0019] In some embodiments, the first voltage signal transmitted by the first voltage line is used to turn off the first control transistor, and the second voltage signal transmitted by the second voltage line is used to turn on the first control transistor.

[0020] In some embodiments, the first control unit comprises:

[0021] a second control transistor, wherein a gate of the second control transistor is electrically connected to the control terminal of the first control unit, and one of a source and a drain of the second control transistor is electrically connected to a third voltage line;

[0022] A third control transistor, the gate of the third control transistor, the other of the source and the drain of the second control transistor, and one of the source and the drain of the third control transistor are all electrically connected to the first voltage line, and the other of the source and the drain of the third control transistor is electrically connected to the gate of the first control transistor.

[0023] In some embodiments, the data signal includes a plurality of data voltages to be transmitted to a plurality of the sub-pixels, and the display device further includes:

[0024] A source driver electrically connected to the plurality of data lines;

[0025] Among them, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the source driver is used to control the data voltage corresponding to the sub-pixel in the latter of the two adjacent frames to be a first control voltage, and the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel according to the first control voltage.

[0026] In some embodiments, the source driver comprises:

[0027] A plurality of selection units corresponding to the plurality of data lines;

[0028] When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the selection unit is used to control the corresponding data line to be electrically connected to the grayscale line for transmitting the grayscale voltage corresponding to the grayscale value in the latter of the two adjacent frames;

[0029] When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is greater than the first preset difference, the selection unit is used to control the corresponding data line to be electrically connected to the first control line voltage line for transmitting the first control voltage in the latter of the two adjacent frames.

[0030] In some embodiments, the display device further comprises:

[0031] A plurality of gate lines, wherein the gate lines are electrically connected to the corresponding plurality of sub-pixels;

[0032] A gate driver, electrically connected to the plurality of gate lines;

[0033] A plurality of second control circuits corresponding to the plurality of gate lines, the second control circuits being used to control the electrical connection or electrical disconnection between the corresponding gate lines and the gate driver;

[0034] When the absolute value of the difference between the two grayscale values ​​of each sub-pixel electrically connected to the gate line in two adjacent frames is less than a second preset difference, the corresponding second control circuit is used to control the corresponding gate line to be electrically disconnected from the gate driver in the latter of the two adjacent frames.

[0035] In some embodiments, the display device further comprises:

[0036] A plurality of gate lines, wherein the gate lines are electrically connected to the corresponding plurality of sub-pixels;

[0037] A gate driver electrically connected to the plurality of gate lines;

[0038] When the absolute value of the difference between the two grayscale values ​​of each sub-pixel electrically connected to the gate line in two adjacent frames is less than a second preset difference, the gate driver is used to control the gate signal transmitted to the corresponding gate line in the latter of the two adjacent frames to not include the corresponding gate pulse.

[0039] An embodiment of the present invention further provides a method for driving a display device, comprising:

[0040] Controlling a plurality of data lines to output a plurality of data signals corresponding to a plurality of the sub-pixels;

[0041] Determine whether the absolute value of the difference between two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to a first preset difference;

[0042] When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the corresponding data line is controlled to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames by the first control circuit.

[0043] The present invention provides a display device and a driving method thereof. The display device includes a plurality of sub-pixels and a plurality of data lines, wherein the data lines are electrically connected to the corresponding plurality of sub-pixels. A plurality of first control circuits corresponding to the plurality of sub-pixels are provided, and when the absolute value of the difference between two grayscale values ​​of the sub-pixels in two adjacent frames is less than or equal to a first preset difference, the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames, thereby reducing the power consumption of the display panel in the display device while avoiding low accuracy of the brightness of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 This is a diagram of the architecture of a display device provided by an embodiment of the present invention.

[0045] Figure 2 and Figure 3 A circuit diagram of a pixel circuit and a first control circuit provided in an embodiment of the present invention.

[0046] Figure 4 A diagram of modules in a source driver provided in an embodiment of the present invention.

[0047] Figure 5 A schematic diagram of a signal flow of a display device provided by an embodiment of the present invention.

[0048] Figure 6 The present invention provides a flow chart of a method for driving a display device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0049] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0050] In the description of the present invention, the terms "first", "second", etc. are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise clearly and specifically defined, and "electrical connection" means that the two are connected through a conductor or semiconductor, and the "electrical connection" between the two can be achieved under external control or in any case, that is, a current path is formed, and the "electrical disconnection" between the two can also be achieved under external control.

[0051] In addition, it should be noted that the drawings only provide structures and steps that are closely related to the present invention, and omit some details that are not closely related to the invention. The purpose is to simplify the drawings and make the invention clear at a glance, rather than to indicate that the actual device is exactly the same as the attached drawings. Figure 1 The same is not a limitation of the actual device.

[0052] The present invention provides a display device, which may include but is not limited to the following embodiments and combinations of the following embodiments.

[0053] In some embodiments, Figure 1 As shown, the display device 100 includes: a plurality of sub-pixels P; a plurality of data lines 10, wherein the data lines 10 are electrically connected to the corresponding plurality of sub-pixels P; a plurality of first control circuits 20, corresponding to the plurality of sub-pixels P, wherein the first control circuits 20 are used to control the electrical connection or electrical disconnection of the corresponding sub-pixels P and the corresponding data lines 10; wherein, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel P in two adjacent frames is less than or equal to the first preset difference, the corresponding first control circuit 20 is used to control the electrical disconnection of the corresponding data line 10 and the sub-pixel P in the latter of the two adjacent frames.

[0054] The display device 100 is, but is not limited to, an organic self-luminous display device, an inorganic self-luminous direct display device, or a liquid crystal display device. Figure 1As shown, here, the arrangement of multiple sub-pixels P in an array is taken as an example. The display device 100 may also include multiple gate lines 30, multiple pixel circuits 40 corresponding to the multiple sub-pixels P, a source driver 501 electrically connected to the multiple data lines 10, and a gate driver 502 electrically connected to the multiple gate lines 30. Among them, the multiple gate lines 30, the multiple data lines 10, the multiple sub-pixels P and the multiple pixel circuits 40 may be located on a substrate (i.e., a display panel 60 included in the display device 100), and the gate driver 502 may be a gate driving circuit located on the substrate of the display device 100 or a chip independently provided with the substrate (the figure only takes the former case as an example). The figure only takes the display device 100 as a liquid crystal display device as an example, that is, the sub-pixel P may include a corresponding pixel electrode.

[0055] Specifically, each sub-pixel P is electrically connected to a corresponding pixel circuit 40, each gate line 30 is electrically connected to a plurality of pixel circuits 40 corresponding to a plurality of sub-pixels P located in a corresponding row, and outputs a corresponding gate signal gate thereto. Under normal circumstances, in each frame, the gate signal gate includes a gate pulse p for controlling the corresponding plurality of pixel circuits 40 to turn on, and a plurality of rows of pixel circuits 40 are turned on in sequence under the control of a plurality of gate pulses p in a plurality of gate signals gate. Each data line 10 is electrically connected to a plurality of pixel circuits 40 corresponding to a plurality of sub-pixels P located in a corresponding column, and outputs a corresponding data signal data thereto. A plurality of data signals data corresponding to a plurality of columns of sub-pixels P are set so that when each row of sub-pixels P is turned on, a plurality of corresponding valid data voltages are respectively transmitted to a plurality of sub-pixels P in a corresponding row through a plurality of data lines 10.

[0056] It can be understood that in this embodiment, by setting a plurality of first control circuits 20 corresponding to a plurality of sub-pixels P, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel P in two adjacent frames is less than or equal to the first preset difference, that is, when the grayscale value of the sub-pixel P changes slightly in the two adjacent frames, the corresponding first control circuit 20 controls the corresponding data line 10 to be electrically disconnected from the sub-pixel P in the latter of the two adjacent frames, that is, the sub-pixel P no longer obtains the corresponding valid data voltage in the latter of the two adjacent frames, so that the potential of the corresponding node of the corresponding pixel circuit 40 is maintained at the original potential and is no longer updated by the new valid data voltage, thereby avoiding the pixel circuit 40 from refreshing the valid data voltage again and generating corresponding power consumption, and the brightness value of the sub-pixel P changes slightly in the two adjacent frames, so directly maintaining the brightness of the previous frame as the brightness of the latter frame will not significantly reduce the accuracy of the brightness of the sub-pixel P in the latter frame, thereby reducing the power consumption of the display panel 60 in the display device 100 while avoiding the low accuracy of the brightness of the display panel 60.

[0057] The first preset difference value may be set according to the difference value between two grayscale values ​​corresponding to the brightness change of the sub-pixel P in the display panel in two adjacent frames that can be recognized by the human eye. For example, the first preset difference value may be 0, that is, when the two grayscale values ​​of the sub-pixel P in two adjacent frames do not change, or the first preset difference value may also be 1, 2, 3 or other smaller integers, that is, when the two grayscale values ​​of the sub-pixel P in two adjacent frames change slightly, the corresponding first control circuit 20 controls the corresponding data line 10 to be electrically disconnected from the sub-pixel P in the latter of the two adjacent frames.

[0058] Specifically, if the grayscale value of the sub-pixel P changes slightly in multiple consecutive frames, the first control circuit 20 can control the sub-pixel P to be electrically disconnected from the corresponding data line 10 from the second frame to the last frame, so as to maintain the brightness of the sub-pixel P basically consistent with the brightness in the first frame.

[0059] Specifically, for the data line 10, part of the valid data voltages corresponding to some of the sub-pixels P that are still electrically connected to the data line 10 among the multiple sub-pixels P in the corresponding column can be output in a timing sequence within one frame, while part of the valid data voltages corresponding to some of the sub-pixels P that are electrically disconnected from the data line 10 may not be output, for example, they may be replaced by invalid data voltages to be output, but of course they may still output corresponding valid data voltages.

[0060] In some embodiments, Figure 1 As shown, when the two grayscale values ​​of the sub-pixel P in two adjacent frames are equal, the corresponding first control circuit 20 is used to control the corresponding data line 10 to be electrically disconnected from the sub-pixel P in the latter of the two adjacent frames.

[0061] That is, in this embodiment, only when the grayscale value of the sub-pixel P does not change in two adjacent frames, the sub-pixel P is controlled to no longer obtain the corresponding valid data voltage in the latter of the two adjacent frames, so as to maintain the brightness of the previous frame. This brightness is also the same as the brightness required to be presented in the previous frame. Therefore, while reducing the power consumption of the display panel in the display device 100, the low accuracy of the brightness of the display panel can be further avoided.

[0062] In some embodiments, in combination Figures 1 to 3 As shown, the control terminal 011 and the input terminal 012 of the first control circuit 20 are electrically connected to the corresponding data line 10, and the output terminal 013 of the first control circuit 20 is electrically connected to the corresponding sub-pixel P; wherein, the first control circuit 20 is used to control the corresponding data line 10 to be electrically connected or disconnected with the corresponding sub-pixel P according to the data signal data transmitted by the data line 10.

[0063] Specifically, the data signal data includes multiple data voltages of multiple sub-pixels P to be transmitted to the corresponding column, and the display device 100 also includes: the above-mentioned source driver 501, electrically connected to the multiple data lines 10; wherein, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel P in two adjacent frames is less than or equal to the first preset difference, the source driver 501 is used to control the data voltage corresponding to the sub-pixel P in the latter of the two adjacent frames to be a first control voltage (referred to as an invalid data voltage), and the corresponding first control circuit 20 is used to control the corresponding data line 10 to be electrically disconnected from the sub-pixel P according to the first control voltage.

[0064] On the contrary, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel P in two adjacent frames is greater than the first preset difference, the source driver 501 is used to control the data voltage corresponding to the sub-pixel P in the latter of the two adjacent frames to be a valid data voltage, and the corresponding first control circuit 20 is used to control the corresponding data line 10 to be electrically connected to the sub-pixel P according to the valid data voltage.

[0065] Specifically, when the pixel circuit 40 of the row where the sub-pixel P is located in the latter frame is turned on, if the grayscale value of the sub-pixel P changes little between two adjacent frames, the data voltage of the data signal data at this time is an invalid data voltage, and the first control circuit 20 controls the sub-pixel P to be electrically disconnected from the data line 10 according to the invalid data voltage at this time, so the sub-pixel P maintains a state of being acted upon by the valid data voltage of the previous frame; if the grayscale value of the sub-pixel P changes greatly between two adjacent frames, the data voltage of the data signal data at this time is a valid data voltage, and the first control circuit 20 can control the sub-pixel P to be electrically connected to the data line 10 according to the valid data voltage at this time, so the sub-pixel P becomes a state of being acted upon by the valid data voltage of the latter frame.

[0066] It can be understood that in the present embodiment, the data signal data transmitted by the data line 10 is set to act on the first control circuit 20 to control the data line 10 to be electrically connected or electrically disconnected with the corresponding sub-pixel P, thereby realizing the multiplexing of the data signal data transmitted by the data line 10, avoiding the additional setting of a line to transmit a new signal to act on the control end of the first control circuit 20, and saving costs.

[0067] Of course, in other embodiments, the multiple data voltages included in each data signal data can all be valid data voltages, and an additional signal can be set to control the first control circuit 20. It is only necessary to realize that when the grayscale value of the sub-pixel P changes little between two adjacent frames, the additionally set signal can control the corresponding node of the corresponding pixel circuit 40 through the first control circuit 20 to maintain the potential at the original potential and no longer be updated by the new valid data voltage. Similarly, it can avoid the pixel circuit 40 refreshing the valid data voltage again and generating corresponding power consumption.

[0068] In some embodiments, in combination Figures 1 to 3 As shown, the display device 100 also includes: a plurality of the above-mentioned gate lines 30, the gate lines 30 are electrically connected to the corresponding plurality of sub-pixels P; a plurality of the above-mentioned pixel circuits 40, corresponding to the plurality of sub-pixels P, the pixel circuit 40 at least includes a driving transistor Td, the gate of the driving transistor Td is electrically connected to the corresponding gate line 30; wherein, the first control circuit 20 at least includes a first control transistor T1, the gate of the first control transistor T1 is electrically connected to the corresponding data line 10, and the first control transistor T1 and the driving transistor Td are arranged in series between the corresponding data line 10 and the corresponding sub-pixel P.

[0069] Taking the display panel 60 as a liquid crystal display as an example, the pixel circuit 40 may further include a storage capacitor C formed between the sub-pixel P and a common electrode (not shown), and the storage capacitor C may maintain the original voltage when the voltage of the sub-pixel P is not refreshed.

[0070] The gate of the first control transistor T1 may be directly or indirectly electrically connected to the corresponding data line 10. Figure 3 In the figure, only indirect electrical connection is used as an example, that is, the gate of the first control transistor T1 needs to be electrically connected to the data line 10 through other components. Of course, if the characteristics of the first control transistor T1 are reasonably set, it can also be directly electrically connected to the data line 10. At this time, the valid data voltage and the invalid data voltage in the data signal data can respectively control the first control transistor T1 to be turned on and off.

[0071] Among them, the driving transistor Td is controlled by the gate signal gate transmitted by the corresponding gate line 30. When the gate pulse p in the gate signal gate appears, the driving transistor Td is turned on. Furthermore, it is necessary to control the electrical connection or disconnection between the data line 10 and the corresponding sub-pixel P by turning on or off the first control transistor T1.

[0072] Therefore, in this embodiment, the first control transistor T1 and the driving transistor Td are arranged in series between the corresponding data line 10 and the corresponding sub-pixel P. On the basis that the gate signal gate transmitted by the gate line 30 controls the driving transistors Td of multiple sub-pixels P in a row to be turned on, the first control transistor T1 in the first control circuit 20 can further control each driving transistor Td to be directly electrically connected or electrically disconnected with the corresponding sub-pixel P, thereby controlling whether each sub-pixel P in the row is electrically connected to the corresponding data line 10.

[0073] It should be noted that in this embodiment, there is no limitation on which of the first control transistor T1 and the driving transistor Td is directly electrically connected to the data line 10 and which is directly electrically connected to the sub-pixel P. Figure 3 It is only shown that the first control transistor T1 is directly electrically connected to the sub-pixel P, and the driving transistor Td is directly electrically connected to the data line 10, but the electrical connection positions of the two can also be replaced.

[0074] In some embodiments, in combination Figures 1 to 3 As shown, the first control circuit 20 also includes: a first control unit 201, a control terminal 021 of the first control unit 201 is electrically connected to the control terminal 011 of the first control circuit 20 to obtain a data signal data, a first input terminal 0221 of the first control unit 201 is electrically connected to the first voltage line to obtain a first voltage signal VGL, and an output terminal 023 of the first control unit 201 is electrically connected to the gate of the first control transistor T1 and the second voltage line to obtain a second voltage signal VGH.

[0075] In combination with the above discussion, it can be known that the gate of the first control transistor T1 in this embodiment is indirectly electrically connected to the corresponding data line 10, specifically, it is electrically connected to the corresponding data line 10 through the first control unit 201. The first control unit 201 can determine the signal of the gate of the first control transistor T1 according to the data signal data, the first voltage signal VGL and the second voltage signal VGH, so as to control the first control transistor T1 to be turned on or off. For example, the first voltage signal VGL transmitted by the first voltage line is used to turn off the first control transistor T1, and the second voltage signal VGH transmitted by the second voltage line is used to turn on the first control transistor T1.

[0076] Specifically, Figure 3As shown, the first control unit 201 includes: a second control transistor T2, the gate of the second control transistor T2 is electrically connected to the control terminal 021 of the first control unit to obtain the data signal data, and one of the source and drain of the second control transistor T2 is electrically connected to the third voltage line to obtain the third voltage signal AVDD; a third control transistor T3, the gate of the third control transistor T3, the other of the source and drain of the second control transistor T2, and one of the source and drain of the third control transistor T3 are all electrically connected to the first voltage line to obtain the first voltage signal VGL, and the other of the source and drain of the third control transistor T3 is electrically connected to the gate of the first control transistor T1. The third voltage line is electrically connected to the second input terminal 0222 of the first control unit 201.

[0077] For example Figure 3 As shown, the source of the second control transistor T2 is loaded with the third voltage signal AVDD, the drain of the second control transistor T2 and the source and gate of the third control transistor T3 are loaded with the first voltage signal VGL, the drain of the third control transistor T3 is electrically connected to the gate of the first control transistor T1, the source of the driving transistor Td is electrically connected to the corresponding data line 10, the drain of the driving transistor Td is electrically connected to the source of the first control transistor T1, and the drain of the first control transistor T1 is electrically connected to the sub-pixel P.

[0078] Among them, the first voltage signal VGL, the second voltage signal VGH and the third voltage signal AVDD can all be constant voltage signals. In this embodiment, the amplitude relationship between the three and the types of multiple control transistors are not limited, but it should be understood that the above two aspects need to be set in association. Of course, one of the source and the drain of the third control transistor T3 (for example, the source) can also be electrically connected to a voltage line different from the first voltage line to obtain other voltage signals different from the first voltage signal VGL.

[0079] To facilitate the description of the working principle of the first control circuit 20, Figure 3 In the example, only the amplitudes of the third voltage signal AVDD and the second voltage signal VGH are greater than the amplitude of the first voltage signal VGL, and the amplitude relationship between the first two is not limited. The first control transistor T1, the second control transistor T2, and the third control transistor T3 can all be N-type transistors.

[0080] When the gate signal gate controls the plurality of driving transistors Td of the corresponding row to be turned on, if the grayscale value of at least one sub-pixel P in this row changes little or does not change relative to the previous frame, the corresponding data voltage is an invalid data voltage, and the amplitude of the invalid data voltage (for example, its amplitude is the same as the amplitude of the second voltage signal VGH) and the amplitude of the third voltage signal AVDD can control the second control transistor T2 to be turned on; therefore, the third voltage signal AVDD is transmitted to the gate of the third control transistor T3, so that the potential of the gate of the third control transistor T3 is pulled up from the potential close to the first voltage signal VGL to the potential close to the third voltage signal AVDD. D, and thus the third control transistor T3 is turned on; therefore, the first voltage signal VGL is transmitted to the gate of the first control transistor T1, so that the potential of the gate of the first control transistor T1 is pulled down from a potential close to the second voltage signal VGH to a potential close to the first voltage signal VGL, and thus the first control transistor T1 is turned off; even if multiple driving transistors Td in this row are all turned on at this time, the voltage loaded on at least one sub-pixel P corresponding to at least one first control transistor T1 in the cut-off state will not be refreshed by the current invalid data voltage, and thus the corresponding liquid crystal molecules maintain the angle deflected by the previous frame, maintaining the previous brightness.

[0081] When the gate signal gate controls the conduction of multiple driving transistors Td in the corresponding row, if the grayscale value of at least one sub-pixel P in this row changes greatly compared with the previous frame, its corresponding data voltage is a valid data voltage, and the amplitude of the valid data voltage and the amplitude of the third voltage signal AVDD can control the second control transistor T2 to be cut off; therefore, the potential of the gate of the third control transistor T3 is close to the potential of the first voltage signal VGL, and then the third control transistor T3 is cut off; therefore, the first voltage signal VGL cannot be transmitted to the gate of the first control transistor T1, and the potential of the gate of the first control transistor T1 is close to the potential of the second voltage signal VGH, and then the first control transistor T1 is turned on; therefore, the current valid data voltage is transmitted to the corresponding at least one sub-pixel P, so that the voltage loaded thereon is refreshed to the current valid data voltage, and then the corresponding liquid crystal molecules are deflected by a corresponding angle to present a corresponding brightness.

[0082] In some embodiments, in combination Figures 1 to 4As shown, the source driver 501 includes: a plurality of selection units 5011, corresponding to the plurality of data lines 10; wherein, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel P in two adjacent frames is less than or equal to the first preset difference, the selection unit 5011 is used to control the corresponding data line 10 in the latter one of the two adjacent frames to be electrically connected to the grayscale line 701 for transmitting the grayscale voltage corresponding to the grayscale value (i.e., the above-mentioned valid data voltage); when the absolute value of the difference between the two grayscale values ​​of the sub-pixel P in two adjacent frames is greater than the first preset difference, the selection unit 5011 is used to control the corresponding data line 10 in the latter one of the two adjacent frames to be electrically connected to the first control line voltage line 702 for transmitting the first control voltage (i.e., the above-mentioned invalid data voltage).

[0083] Specifically, Figure 4 As shown, the first input terminal of the selection unit 5011 is electrically connected to the grayscale line, the second input terminal of the selection unit 5011 is electrically connected to a control line voltage line, and the output terminal of the selection unit 5011 is electrically connected to the corresponding data line 10. Among them, the source driver 501 can also include a subtractor and a comparator. The subtractor can be used for the difference between the two grayscale values ​​of the same sub-pixel P in two adjacent frames or the difference between the two corresponding valid data voltages. The comparator can be used to output the corresponding result signal according to the size relationship between the aforementioned difference and the corresponding first preset difference or voltage preset difference. Further, the result signal can act on the selection unit 5011 to control the selection unit 5011 to control the data line 10 to be electrically connected to the grayscale line 701 or the first control line voltage line 702.

[0084] Therefore, in this embodiment, by setting multiple selection units 5011 in the source driver 501, the corresponding data line 10 can be controlled to select to output a valid data voltage or an invalid data voltage when outputting each data voltage according to the change of the grayscale value of the corresponding sub-pixel P relative to the previous frame, that is, the corresponding data voltage is selectively output for each row of sub-pixels P.

[0085] In some embodiments, in combination Figure 1 and Figure 5As shown, the display device 100 also includes: a plurality of the above-mentioned gate lines 30, the gate lines 30 are electrically connected to the corresponding plurality of the sub-pixels P; the above-mentioned gate driver 502 is electrically connected to the plurality of the gate lines 30; a plurality of second control circuits 80, corresponding to the plurality of the gate lines 30, the second control circuits 80 are used to control the corresponding gate lines 30 and the gate driver 502 to be electrically connected or electrically disconnected; wherein, when the absolute value of the difference between the two grayscale values ​​of each of the sub-pixels P electrically connected to the gate lines 30 in two adjacent frames is less than a second preset difference, the corresponding second control circuit 80 is used to control the corresponding gate line 30 to be electrically disconnected from the gate driver 502 in the latter of the two adjacent frames.

[0086] The second preset difference may also be set according to the difference between two grayscale values ​​corresponding to the brightness changes of the multiple sub-pixels P in the display panel in two adjacent frames that can be recognized by the human eye. The second preset difference may be the same as or different from the first preset difference.

[0087] Specifically, if the grayscale values ​​of multiple sub-pixels P in the same row change slightly between two adjacent frames, the second control circuit 80 can control the corresponding gate line 30 to be electrically disconnected from the gate driver 502 in the latter frame, that is, the gate line 30 cannot obtain the corresponding gate signal gate, causing the driving transistors Td of the row to be cut off. At this time, the multiple sub-pixels P in the row cannot obtain the corresponding data voltage (regardless of whether the data voltage is a valid data voltage or an invalid data voltage), so that the brightness of the multiple sub-pixels P in the row is maintained at its brightness in the previous frame, and the potentials of the corresponding nodes of the multiple pixel circuits 40 in the corresponding row are also maintained at the original potential and are no longer updated by the new valid data voltage, thereby avoiding the multiple pixel circuits 40 in the corresponding row from refreshing the valid data voltage again and generating corresponding power consumption.

[0088] Specifically, the display device 100 further includes a timing controller 503 electrically connected to the gate driver 502 and the source driver 501 (the source driver 501, the gate driver 502 and the timing controller 503 may be collectively referred to as the driver 50). The timing controller 503 may receive an image signal output by the transmitter 902 (which may include but is not limited to a graphics processor or a central processing unit), and parse the image signal in combination with a clock signal generated by itself to obtain a plurality of frame image signals corresponding to a plurality of frames. The timing controller 503 may also generate a timing control signal. The timing controller 503 may send a timing control signal to the gate driver 502, and the gate driver 502 may generate a plurality of gate signals gate according to the timing control signal; the timing controller 503 may send a timing control signal and a frame image signal to the source driver 501, and the source driver 501 may parse the frame image signal according to the timing control signal to generate a plurality of data signals data corresponding to a plurality of data lines 10.

[0089] like Figure 5 As shown, in the present invention, for a still picture (i.e., the absolute value of the difference between the two grayscale values ​​of the sub-pixels P of all rows in two adjacent frames is less than the second preset difference), then in the corresponding frame, the data transmission link between the transmitter 902 and the driver 50 is closed (the transmitter 902 does not output an image signal) to save power consumption on the system side, and the gate signal gate output by the gate driver 502 may include a gate pulse p in this frame to turn off all the driving transistors Td, thereby avoiding all the pixel circuits 40 from refreshing the valid data voltage again to save power consumption on the panel side. If the still picture lasts for a large number of frames, in order to reduce the risk of leakage, the gate driver 502 may scan multiple rows of sub-pixels P at a refresh rate lower than that of the dynamic picture.

[0090] For the sake of convenience in description, for the screen update, the display area of ​​the display panel 60 is divided into 9 areas of 3*3 distribution as an example:

[0091] If the screen of a partial area (for example, the area of ​​the first row and the second column) is updated, the transmitter 902 can only send the signal of the area that needs to be updated in the image signal (that is, the signal of the area of ​​the first row and the second column), and the corresponding multiple second control circuits 80 can control the gate driver 502 to be electrically connected with the partial gate lines 30 corresponding to the area that needs to be updated, so as to turn on the multiple driving transistors Td of the corresponding row, and only the multiple first control circuits 20 corresponding to the multiple columns of the area that needs to be updated control the first control transistors T1 of the multiple columns to be turned on, so that the multiple sub-pixels P of the corresponding multiple columns obtain the updated multiple valid data voltages, and the multiple first control circuits 20 of the multiple columns of other areas control the first control transistors T1 of the multiple columns to be turned off, so as to save the power consumption of the panel end by avoiding the pixel circuits 40 of the multiple columns of other areas from refreshing the data voltage again;

[0092] If the image of the entire area is updated, the transmitter 902 needs to send a complete image signal, and all the second control circuits 80 control the gate driver 502 to be electrically connected to all the gate lines 30 to turn on the multiple driving transistors Td of all rows row by row, and all the first control circuits 20 control all the first control transistors T1 to be turned on so that each sub-pixel P obtains the updated valid data voltage.

[0093] Among them, Figure 1 As shown, the second control circuit 80 may include a fourth control transistor T4, and the control end of the fourth control transistor T4 may be electrically connected to the timing controller 503 to obtain a corresponding second control signal. The second control signal may be generated by the timing controller 503 according to the image signal received by it. For example, each second control signal generated by the timing controller 503 when receiving a complete image signal may control each fourth control transistor T4 to be turned on. For another example, when the timing controller 503 receives an incomplete image signal, it may parse out the image update area corresponding to the incomplete image signal to generate multiple second control signals, and the multiple second control signals corresponding to the image update area may control the corresponding multiple fourth control transistors T4 to be turned on, while the multiple second control signals in other areas may control the corresponding multiple fourth control transistors T4 to be turned off.

[0094] Of course, different from Figure 1 In the embodiment shown, in other embodiments, it is also possible not to set the above-mentioned multiple second control circuits 80, but directly set the gate driver 502 to have the following function: when the absolute value of the difference between the two grayscale values ​​of each of the sub-pixels P electrically connected to the gate line 30 in two adjacent frames is less than the second preset difference, the gate driver 502 is used to control the gate signal gate transmitted to the corresponding gate line 30 in the latter of the two adjacent frames to not include the corresponding gate pulse p.

[0095] That is, the gate driver 502 can be used to control whether each of the multiple gate signals gate outputted by the gate driver 502 includes a corresponding gate pulse p, thereby controlling whether the corresponding row of driving transistors Td is turned on. Specifically, the stage transmission function in the gate driver 502 can be retained, but the multiple output functions corresponding to the multiple gate lines 30 in the gate driver 502 can be modified to output or not output the corresponding gate pulse p.

[0096] In order to better illustrate the above display device, the present invention also provides a driving method of the display device, such as Figure 6 As shown, the method may include but is not limited to the following steps and combinations of the following steps.

[0097] S1, controlling a plurality of data lines to output a plurality of data signals corresponding to a plurality of sub-pixels.

[0098] In combination with the above discussion, it can be known that each data line 10 is electrically connected to multiple pixel circuits 40 corresponding to multiple sub-pixels P located in the corresponding column to output corresponding data signals data thereto. The multiple data signals data corresponding to the multiple columns of sub-pixels P are set to be multiple valid data voltages of the multiple sub-pixels P in the corresponding row when each row of sub-pixels P is turned on.

[0099] S2, determining whether the absolute value of the difference between two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to a first preset difference.

[0100] In combination with the above discussion, it can be seen that when the absolute value of the difference between the two grayscale values ​​of the sub-pixel P in two adjacent frames is greater than the first preset difference, it means that the difference between the two grayscale values ​​of the sub-pixel P in the two adjacent frames is large. At this time, the corresponding first control circuit 20 controls the corresponding data line 10 to be electrically connected to the sub-pixel P in the latter of the two adjacent frames, so that the corresponding data voltage needs to be transmitted to the sub-pixel P in the latter frame.

[0101] When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, executing:

[0102] S3, controlling the corresponding data line to be electrically disconnected from the sub-pixel in the latter of two adjacent frames through the first control circuit.

[0103] In combination with the above discussion, it can be seen that when the absolute value of the difference between the two grayscale values ​​of the sub-pixel P in two adjacent frames is less than or equal to the first preset difference, it means that the difference between the two grayscale values ​​of the sub-pixel P in the two adjacent frames is small. At this time, the corresponding first control circuit 20 controls the corresponding data line 10 to be electrically disconnected from the sub-pixel P in the latter of the two adjacent frames, so that the sub-pixel P maintains the data voltage of the previous frame in the latter frame.

[0104] Specifically, in step S3, the transmitter 902 may only send the signal of the area that needs to be updated in the image signal (which may be the entire image signal or part of the image signal), and the timing controller 503 may control the driving transistor Td of each row to be turned on or off through the gate driver 502 or multiple second control circuits 80 according to the received entire image signal or part of the image signal, and the source driver 501 controls the first control transistor T1 of each column to be turned on or off through the first control circuit 20, thereby locking the area that needs to be updated, and only turning on multiple driving transistors Td and the first control transistor T1 in the area, so that only the pixel circuit 40 in the area refreshes the valid data voltage again, while the pixel circuits 40 in other areas avoid refreshing the valid data voltage, thereby reducing the power consumption of the display panel 60 while avoiding the low accuracy of the brightness of the display panel 60.

[0105] The structure of a display device and a driving method thereof provided by an embodiment of the present invention is introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present invention. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display device, characterized in that: include: Multiple sub-pixels; A plurality of data lines, wherein the data lines are electrically connected to the corresponding plurality of sub-pixels; A plurality of first control circuits corresponding to the plurality of sub-pixels, the first control circuits being used to control the electrical connection or electrical disconnection between the corresponding sub-pixels and the corresponding data lines; When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to a first preset difference, the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames.

2. The display device according to claim 1, wherein: When the two grayscale values ​​of the sub-pixel in two adjacent frames are equal, the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames.

3. The display device according to claim 1, wherein: The control end and the input end of the first control circuit are both electrically connected to the corresponding data line, and the output end of the first control circuit is electrically connected to the corresponding sub-pixel; The first control circuit is used for controlling the corresponding data line to be electrically connected or electrically disconnected with the corresponding sub-pixel according to the data signal transmitted by the data line.

4. The display device according to claim 3, characterized in that Also includes: A plurality of gate lines, wherein the gate lines are electrically connected to the corresponding plurality of sub-pixels; A plurality of pixel circuits corresponding to the plurality of sub-pixels, the pixel circuits at least comprising a driving transistor, the gate of the driving transistor being electrically connected to the corresponding gate line; The first control circuit at least includes a first control transistor, a gate of the first control transistor is electrically connected to the corresponding data line, and the first control transistor and the driving transistor are arranged in series between the corresponding data line and the corresponding sub-pixel.

5. The display device according to claim 4, characterized in that The first control circuit further includes: A first control unit, wherein the control end of the first control unit is electrically connected to the control end of the first control circuit, the first input end of the first control unit is electrically connected to the first voltage line, and the output end of the first control unit is electrically connected to the gate of the first control transistor and the second voltage line.

6. The display device according to claim 5, characterized in that The first voltage signal transmitted by the first voltage line is used to turn off the first control transistor, and the second voltage signal transmitted by the second voltage line is used to turn on the first control transistor.

7. The display device according to claim 5 or 6, characterized in that: The first control unit comprises: a second control transistor, wherein a gate of the second control transistor is electrically connected to the control terminal of the first control unit, and one of a source and a drain of the second control transistor is electrically connected to a third voltage line; A third control transistor, the gate of the third control transistor, the other of the source and the drain of the second control transistor, and one of the source and the drain of the third control transistor are all electrically connected to the first voltage line, and the other of the source and the drain of the third control transistor is electrically connected to the gate of the first control transistor.

8. The display device according to claim 3, wherein: The data signal includes a plurality of data voltages to be transmitted to the plurality of sub-pixels, and the display device further includes: A source driver electrically connected to the plurality of data lines; Among them, when the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the source driver is used to control the data voltage corresponding to the sub-pixel in the latter of the two adjacent frames to be a first control voltage, and the corresponding first control circuit is used to control the corresponding data line to be electrically disconnected from the sub-pixel according to the first control voltage.

9. The display device according to claim 8, wherein: The source driver comprises: A plurality of selection units corresponding to the plurality of data lines; When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the selection unit is used to control the corresponding data line to be electrically connected to the grayscale line for transmitting the grayscale voltage corresponding to the grayscale value in the latter of the two adjacent frames; When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is greater than the first preset difference, the selection unit is used to control the corresponding data line to be electrically connected to the first control line voltage line for transmitting the first control voltage in the latter of the two adjacent frames.

10. The display device according to any one of claims 1 to 6, 8 and 9, characterized in that: Also includes: A plurality of gate lines, wherein the gate lines are electrically connected to the corresponding plurality of sub-pixels; A gate driver, electrically connected to the plurality of gate lines; A plurality of second control circuits corresponding to the plurality of gate lines, the second control circuits being used to control the electrical connection or electrical disconnection between the corresponding gate lines and the gate driver; When the absolute value of the difference between the two grayscale values ​​of each sub-pixel electrically connected to the gate line in two adjacent frames is less than a second preset difference, the corresponding second control circuit is used to control the corresponding gate line to be electrically disconnected from the gate driver in the latter of the two adjacent frames.

11. The display device according to any one of claims 1 to 6, 8 and 9, characterized in that: Also includes: A plurality of gate lines, wherein the gate lines are electrically connected to the corresponding plurality of sub-pixels; A gate driver electrically connected to the plurality of gate lines; When the absolute value of the difference between the two grayscale values ​​of each sub-pixel electrically connected to the gate line in two adjacent frames is less than a second preset difference, the gate driver is used to control the gate signal transmitted to the corresponding gate line in the latter of the two adjacent frames to not include the corresponding gate pulse.

12. A method for driving a display device, characterized in that: include: Controlling a plurality of data lines to output a plurality of data signals corresponding to a plurality of the sub-pixels; Determine whether the absolute value of the difference between two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to a first preset difference; When the absolute value of the difference between the two grayscale values ​​of the sub-pixel in two adjacent frames is less than or equal to the first preset difference, the corresponding data line is controlled to be electrically disconnected from the sub-pixel in the latter of the two adjacent frames by the first control circuit.

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