A Reinforcement Packaging Process for Embedded Memory Chips

Abstract

The present invention discloses a reinforcement packaging process for an embedded storage chip, which relates to the field of chip packaging. A reinforcement packaging process for an embedded storage chip includes the following steps: S1: Chip pretreatment; S2: Application of a protective coating; S3: Encapsulation layer treatment; S4: Encapsulation test. The chip pretreatment in S1 further includes the following methods: plasma cleaning, ultraviolet irradiation, and chemical cleaning. The application of the protective coating in S2 further includes the following method: after the surface pretreatment of the chip is completed, a layer of protective material is evenly coated to form a preliminary protective coating, and the thickness of the protective coating is controlled within 100 - 300 nm. The present invention performs surface passivation treatment on the chip, and uses plasma-enhanced chemical vapor deposition technology to deposit a silicon nitride passivation layer on the chip surface to enhance the hardness and corrosion resistance of the chip surface, while reducing the charge accumulation on the chip surface and preventing damage to the chip caused by electrostatic discharge.

Description

Technical Field

[0001] The present invention belongs to the technical field of chip packaging, and particularly relates to a reinforcement packaging process for an embedded storage chip. Background Art

[0002] In modern electronic devices, embedded storage chips play a crucial role. They are not only the core components for data storage but also the key nodes for data processing and information transmission. With the rapid development of technology, the performance requirements for storage chips in electronic devices are getting higher and higher, the storage capacity is continuously expanding, and the read / write speed is constantly increasing.

[0003] While high-performance storage chips are miniaturized, due to their tiny size and complex usage environment, there is currently only a protective layer on the outside of the storage chip. This protective layer is relatively fragile, and the storage chip is easily affected by physical damage, chemical corrosion, and multiple factors such as rings, eroding the chip's protective layer and causing chip damage. Summary of the Invention

[0004] The purpose of the present invention is to solve the problems in the prior art, and a reinforcement packaging process for an embedded storage chip is proposed.

[0005] To solve the above technical problems, the basic concept of the technical solution adopted by the present invention is:

[0006] A reinforcement packaging process for an embedded storage chip further includes the following steps:

[0007] S1: Chip pretreatment includes: plasma cleaning, ultraviolet irradiation, and chemical cleaning in sequence, including ultrasonic cleaning in isopropyl alcohol and acetone cleaning solutions respectively;

[0008] S2: Applying a protective coating includes: after the chip surface pretreatment is completed, uniformly coating a protective material to form a preliminary protective coating; the protective material is a silicon nitride passivation layer, deposited by plasma-enhanced chemical vapor deposition technology, with a thickness of 100 - 200 nm;

[0009] S3: Encapsulation layer treatment, where the encapsulation material contains nano-modified epoxy resin, with nano-SiO2 accounting for 5 - 10 wt% and nano-Al2O3 accounting for 3 - 8 wt%; it further includes the following steps:

[0010] S301: Encapsulation material preparation: Select the encapsulation material and prepare the metal wires for chip interconnection;

[0011] S302: Chip Interconnection and Underfill: Mount the chip on the packaging substrate, achieve the interconnection between the chip and the substrate through thermocompression bonding technology, bond one end of the wire to the chip pin and the other end to the substrate pad, then inject the underfill material into the gap between the chip and the substrate through vacuum-assisted filling, and then cure the underfill material;

[0012] S303: Stacking of Encapsulation Layers;

[0013] S304: Encapsulation Curing, which also includes the following steps: S3041: Curing of the encapsulation layer; S3042: Molding and curing of the encapsulation shell; S3043: Sealing and protection treatment is required after curing.

[0014] S4: Encapsulation Testing.

[0015] Preferably, the thickness of the protective coating is controlled within 100 - 300 nm.

[0016] Preferably, the reaction temperature of the plasma-enhanced chemical vapor deposition is controlled within 300 - 400 °C, the reaction pressure is 100 - 300 mTorr, and the power is 100 - 500 W.

[0017] Preferably, for S303: Stacking of Encapsulation Layers: On the basis of the protective coating in S2, stack and coat the selected encapsulation materials on its outer wall to form a multi-layer composite protection structure.

[0018] Preferably, the detailed steps of S304 Encapsulation Curing are as follows:

[0019] S3041: Curing of the encapsulation layer: After the stacking of the encapsulation layer is completed, curing treatment is required to crosslink and cure the materials of each layer to form a hard protective shell;

[0020] S3042: Molding and curing of the encapsulation shell: Use injection molding technology to form an encapsulation shell around the cured encapsulation layer and perform post-curing treatment

[0021] S3043: Sealing and protection treatment is required after curing. Coat a silicone rubber sealing layer on the surface of the encapsulation shell and wind an electromagnetic shielding tape around the outside of the package.

[0022] Preferably, in S3043, the thickness of the silicone rubber sealing layer is 0.5 - 1 mm, and the drying temperature is 80 - 120 °C; the electromagnetic shielding tape is selected from copper foil tape or nickel foil tape, with a thickness of 0.05 - 0.1 mm and the winding number is 2 - 4 layers.

[0023] Preferably, the S4 Encapsulation Testing also includes the following steps:

[0024] S401: Detection of the encapsulation layer;

[0025] S402: Encapsulated chip detection.

[0026] Preferably, the test contents of the S401 encapsulation layer detection are as follows:

[0027] X-ray detection: Through X-ray fluoroscopy, check whether there are defects in the internal structure of the encapsulation layer;

[0028] Ultrasonic detection: Utilize the reflection characteristics of ultrasonic waves to detect the density and bonding strength of the encapsulation layer.

[0029] Preferably, the detection contents of the S402 encapsulated chip are as follows: Reliability test: Conduct reliability tests such as high-temperature aging test, low-temperature storage test, temperature cycle test, humidity test, vibration test, and shock test on the encapsulated chip;

[0030] Electrical performance test: Through electrical performance tests, verify whether the electrical performance of the encapsulated chip meets the standards.

[0031] After adopting the above technical solutions, the present invention has the following beneficial effects compared with the prior art: The present invention;

[0032] 1. The reinforcement encapsulation process of the embedded storage chip significantly improves the stability and durability of the storage chip through steps such as chip surface pretreatment, protective coating, encapsulation layer stacking, curing treatment, and quality inspection. This process is applicable to the encapsulation requirements of various storage chips, can effectively improve the chip's impact resistance, corrosion resistance, and thermal stability, and reduce the failure rate caused by environmental factors;

[0033] 2. The reinforcement encapsulation process of the embedded storage chip significantly improves the security of the product chip through triple protection of the preliminary protective layer, stacked encapsulation layers, and encapsulation housing. At the same time, surface passivation treatment is performed on the chip, and a silicon nitride passivation layer is deposited on the chip surface using plasma-enhanced chemical vapor deposition technology to enhance the hardness and corrosion resistance of the chip surface, while reducing the charge accumulation on the chip surface and preventing electrostatic discharge from damaging the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In the drawings:

[0035] Figure 1 is a schematic flow chart of a reinforcement encapsulation process of an embedded storage chip proposed by the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0036] The following further describes the present invention in detail with reference to the drawings and embodiments, so that those skilled in the art can implement it according to the description in the specification.

[0037] It should be understood that terms such as "having", "including", and "comprising" used herein do not exclude the presence or addition of one or more other elements or combinations thereof.

[0038] In the description of the present invention, the orientation or positional relationship indicated by terms such as "lateral", "longitudinal", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present invention.

[0039] Example 1: Refer to Figure 1 , a reinforcement encapsulation process for an embedded storage chip, further comprising the following steps:

[0040] S1: Chip pretreatment, chemically cleaning and ultrasonically cleaning the embedded storage chip;

[0041] Specifically: Plasma cleaning is adopted: Utilizing the highly reactive chemical properties of plasma to effectively remove surface organic pollutants and inorganic impurities;

[0042] Ultraviolet irradiation is adopted: By irradiating with high-energy ultraviolet rays, surface organic substances are decomposed to improve surface activity;

[0043] Chemical cleaning: Specific chemical cleaning agents are used to specifically remove different types of pollutants. Isopropyl alcohol and acetone are used as cleaning liquids for chemical cleaning. The ultrasonic cleaning frequency is 20 kHz - 50 kHz, and the cleaning time is 5 - 10 minutes;

[0044] Preferably: First, the chip is placed in an ultrasonic cleaning tank filled with isopropyl alcohol and cleaned at a frequency of 30 kHz for 8 minutes, then rinsed thoroughly with deionized water, then ultrasonically cleaned in acetone for 5 minutes, and finally dried with high-purity nitrogen;

[0045] S2: Applying a protective coating; After the surface pretreatment of the chip is completed, a protective material is evenly coated to form a preliminary protective coating, and the thickness of the protective coating is controlled within 100 - 300 nm;

[0046] Specifically: Common protective coatings:

[0047] Silicon nitride passivation layer: Deposit a silicon nitride passivation layer on the chip surface to effectively isolate air and moisture, thereby preventing metal oxidation and corrosion, extending the service life of metal components. The silicon nitride passivation layer is deposited using plasma-enhanced chemical vapor deposition technology, with a thickness of 100 - 200 nm. The reaction temperature of the PECVD process is controlled at 300 - 400 °C, the reaction pressure is 100 - 300 mTorr, and the power is 100 - 500 W;

[0048] Preferably: Deposit a 150-nm-thick Si3N4 passivation layer on the chip surface using plasma-enhanced chemical vapor deposition. The flow ratio of the reaction gases silane and ammonia is 1:3, the reaction temperature is 350 °C, the reaction pressure is 200 mTorr, and the power is 300 W;

[0049] Silicone: It has good elasticity and high-temperature resistance, and can effectively buffer external impacts;

[0050] Epoxy resin: It has excellent adhesion and chemical corrosion resistance, and can provide strong protection;

[0051] Other polymer materials: Such as polyimide, polystyrene, etc., which are selected according to specific requirements;

[0052] S3: Encapsulation layer treatment;

[0053] Including: S301: Encapsulation material preparation: Select encapsulation materials and prepare metal wires for chip interconnection;

[0054] The encapsulation materials include: Polymer materials: Such as different types of epoxy resins, polyimide, etc., which provide good insulation and mechanical strength;

[0055] Metal materials: Such as copper, aluminum, etc., which have good thermal conductivity and electromagnetic shielding effects;

[0056] Ceramic materials: Such as alumina, aluminum nitride, etc., which have excellent high-temperature resistance and chemical stability;

[0057] Specifically: The stacked encapsulation layer uses alumina and polyimide as the base materials of the encapsulation layer, and the metal wires for chip interconnection are selected as gold (Au) wires or palladium-silver (PdAg) alloy wires with a diameter of 20 - 50 μm;

[0058] Preferably, the metal wires for chip interconnection are selected as 30-μm-diameter Au wires as the chip interconnection materials;

[0059] S302: Chip Interconnection and Underfill: Mount the chip on the packaging substrate, achieve the interconnection between the chip and the substrate through thermocompression bonding technology, and use the method of vacuum-assisted potting for underfill and curing. The chip mounting accuracy is controlled within ±5μm; the thermocompression bonding temperature is 200 - 300°C, the pressure is 10 - 50g, and the time is 5 - 10 seconds; the curing temperature of the underfill material is 100 - 150°C, and the curing time is 1 - 2 hours;

[0060] Preferably, use a high-precision chip mounter to mount the chip on the packaging substrate, and the mounting accuracy reaches ±3μm;

[0061] Adopt thermocompression bonding technology for chip interconnection. The thermocompression bonding temperature is 250°C, the pressure is 30g, and the time is 8 seconds. Bond one end of the Au wire to the chip pin and the other end to the substrate pad;

[0062] Inject the underfill material into the gap between the chip and the substrate through vacuum-assisted potting, and then place the package in an oven at 120°C for curing for 1.5 hours;

[0063] S303: Stacking of Encapsulation Layers: On the basis of the protective coating, stack the encapsulation layers to form a multi-layer composite protection structure. The selection of each layer of encapsulation material needs to comprehensively consider its physical properties, chemical stability, and process compatibility;

[0064] During the stacking process, it is necessary to precisely control the thickness of each layer of material and the interfacial bonding strength between layers to ensure the stability and reliability of the overall structure;

[0065] S304: Encapsulation Curing Includes:

[0066] S3041: Encapsulation Layer Curing: After the stacking of the encapsulation layers is completed, curing treatment is required to crosslink and cure each layer of material to form a hard protective shell;

[0067] S3042: Encapsulation Shell Molding and Curing: Use injection molding technology to form an encapsulation shell around the cured encapsulation layer and perform post-curing treatment;

[0068] Specifically: Epoxy resin, add 5% - 10% by mass of nano-silica and 3% - 8% by mass of nano-aluminum oxide particles to the epoxy resin, and make them evenly dispersed through high-speed stirring and ultrasonic dispersion. The thickness of the encapsulation shell is 1 - 3mm, the injection pressure is 50 - 100MPa, the injection speed is 10 - 30mm / s, the injection temperature is 150 - 200°C, the post-curing temperature is 120 - 180°C, and the post-curing time is 2 - 4 hours;

[0069] Preferably: Epoxy resin is selected as the base material, and 8% by mass of nano-SiO2 and 5% by mass of nano-Al2O3 particles are added. It is stirred for 30 minutes at a rotation speed of 2000 rpm by a high-speed stirrer, and then dispersed for 20 minutes at a frequency of 40 kHz by an ultrasonic disperser to uniformly disperse the nano-particles in the epoxy resin. The modified epoxy resin is heated to 180 °C to make it liquid, and then an encapsulation shell with a thickness of 2 mm is formed around the chip and the substrate by injection molding. The injection pressure is 80 MPa, the injection speed is 20 mm / s. After injection molding, the encapsulated parts are post-cured at 150 °C for 3 hours;

[0070] S3043: After curing is completed, sealing and protection treatments are required. A silicone rubber sealing layer is coated on the surface of the encapsulation shell, and an electromagnetic shielding tape is wound around the outside of the encapsulated parts;

[0071] Specifically: The thickness of the silicone rubber sealing layer is 0.5 - 1 mm, and the drying temperature is 80 - 120 °C; The electromagnetic shielding tape is selected from copper foil tape or nickel foil tape, with a thickness of 0.05 - 0.1 mm and the number of winding layers is 2 - 4 layers;

[0072] Preferably: A layer of silicone rubber sealing layer with a thickness of 0.8 mm is sprayed on the surface of the encapsulation shell, and then dried at 100 °C for 1 hour to cure it;

[0073] Three layers of copper foil electromagnetic shielding tape with a thickness of 0.08 mm are wound around the outside of the encapsulated parts;

[0074] S4: Encapsulation testing: After the encapsulation process is completed, strict quality inspection is carried out on the encapsulated chip to ensure that the encapsulation effect meets the predetermined quality standards. The inspection contents are as follows:

[0075] S401: Encapsulation layer inspection, and the inspection method is as follows:

[0076] X-ray inspection: Through X-ray fluoroscopy, check whether there are defects in the internal structure of the encapsulation layer;

[0077] Ultrasonic inspection: Utilize the reflection characteristics of ultrasonic waves to detect the density and bonding strength of the encapsulation layer;

[0078] S402: Encapsulated chip inspection, and the inspection contents include:

[0079] Reliability testing: Conduct reliability tests such as high-temperature aging test, low-temperature storage test, temperature cycle test, humidity test, vibration test and shock test on the encapsulated chip;

[0080] Electrical performance testing: Through electrical performance testing, verify whether the electrical performance of the encapsulated chip meets the standards;

[0081] Through comprehensive encapsulation quality inspection, ensure that each encapsulated chip has excellent reliability and stability;

[0082] Specifically: Conduct various reliability tests on the encapsulated chips. The results of the high-temperature aging test show that after the chips continuously work at 125°C for 1000 hours, their performance does not significantly decline, and data reading and writing are normal; after the low-temperature storage test, the chips can start and work normally after being stored at -40°C for 500 hours, and there is no data loss; after 500 temperature cycle tests, the electrical performance and structural integrity of the chips remain good; after 500 hours of humidity test, there is no obvious sign of moisture absorption inside the chips; after vibration test and shock test, the pins of the chips are not broken, the electrical connection is normal, and the data storage and reading functions are not affected.

[0083] Working principle: First, put the chips into an ultrasonic cleaning tank filled with isopropyl alcohol, clean them at a frequency of 30 kHz for 8 minutes, then rinse them with deionized water, put them into acetone for ultrasonic cleaning for 5 minutes, and finally dry them with high-purity nitrogen. Deposit a 150-nm-thick Si3N4 passivation layer on the chip surface by plasma-enhanced chemical vapor deposition. The flow ratio of the reaction gases silane and ammonia is 1:3, the reaction temperature is 350°C, the reaction pressure is 200 mTorr, and the power is 300 W;

[0084] Select epoxy resin as the base material for the encapsulation shell, add 8% by mass of nano-SiO2 and 5% by mass of nano-Al2O3 particles, stir them with a high-speed stirrer at a speed of 2000 rpm for 30 minutes, and then disperse them with an ultrasonic disperser at a frequency of 40 kHz for 20 minutes to make the nano-particles evenly dispersed in the epoxy resin. The metal wire for chip interconnection selects Au wire with a diameter of 30 μm as the chip interconnection material. Use a high-precision chip mounter to mount the chips on the encapsulation substrate, with a mounting accuracy of ±3 μm. Adopt the thermocompression bonding technology for chip interconnection. The thermocompression bonding temperature is 250°C, the pressure is 30 g, and the time is 8 seconds. Bond one end of the Au wire to the chip pins and the other end to the substrate pads. Inject the underfill material into the gap between the chip and the substrate through vacuum-assisted potting, and then put the encapsulation into an oven at 120°C for curing for 1.5 hours;

[0085] Select alumina and polyimide as the base materials for the encapsulation layer. Melt and stack them on the outside of the Si3N4 passivation layer of the chip to form the encapsulation layer;

[0086] Heat the modified epoxy resin to 180 °C to make it liquid, and then form a packaging shell with a thickness of 2 mm around the chip and the substrate through injection molding. The injection pressure is 80 MPa, the injection speed is 20 mm / s. After injection molding, heat-treat the package at 150 °C and cure it for 3 hours to form a packaging protection shell; for double protection, after the packaging shell is cured, sealing and protection treatment is required. Spray a layer of silicone rubber sealing layer with a thickness of 0.8 mm on the surface of the packaging shell, and then dry it at 100 °C for 1 hour to cure it; wind 3 layers of copper foil electromagnetic shielding tape with a thickness of 0.08 mm outside the package. The packaging is completed. After the packaging is completed, packaging inspection is required;

[0087] First, through X-ray fluoroscopy, check whether there are defects in the internal structure of the packaging layer; then utilize the reflection characteristics of ultrasonic waves to detect the density and bonding strength of the packaging layer; then conduct reliability tests and electrical performance tests on the performance of the packaged chip.

[0088] Example 2: It is basically the same as Example 1, and further:

[0089] First, put the chip into an ultrasonic cleaning tank filled with isopropyl alcohol, clean it at a frequency of 30 kHz for 8 minutes, then rinse it clean with deionized water, then put it into acetone for ultrasonic cleaning for 5 minutes, and finally dry it with high-purity nitrogen. After the surface of the chip is cleaned, evenly coat a layer of silica gel to form a preliminary protective coating with a thickness controlled at 200 nm;

[0090] Select epoxy resin as the base material of the packaging shell, add 8% by mass of nano-SiO2 and 5% by mass of nano-Al2O3 particles, stir with a high-speed stirrer at a rotation speed of 2000 rpm for 30 minutes, and then disperse with an ultrasonic disperser at a frequency of 40 kHz for 20 minutes to make the nano-particles evenly dispersed in the epoxy resin. The metal wire for chip interconnection selects Au wire with a diameter of 30 μm as the chip interconnection material. Use a high-precision chip mounter to mount the chip on the packaging substrate with a mounting accuracy of ±3 μm. Adopt the thermocompression bonding technology for chip interconnection. The thermocompression bonding temperature is 250 °C, the pressure is 30 g, and the time is 8 seconds. Bond one end of the Au wire to the chip pin and the other end to the substrate pad. Inject the underfill material into the gap between the chip and the substrate through vacuum-assisted potting, and then put the package into an oven at 120 °C and cure it for 1.5 hours;

[0091] Select aluminum nitride and epoxy resin as the base materials of the packaging layer, melt the two and stack and coat them outside the preliminary protective coating of the chip to form the packaging layer;

[0092] Heat the modified epoxy resin to 180 °C to make it liquid, and then form a packaging shell with a thickness of 2 mm around the chip and the substrate through injection molding. The injection pressure is 80 MPa, the injection speed is 20 mm / s. After injection molding, heat-treat the package at 150 °C and cure it for 3 hours to form a packaging protection shell; for double protection, after the packaging shell is cured, sealing and protection treatment are required. Spray a layer of silicone rubber sealing layer with a thickness of 0.7 mm on the surface of the packaging shell, and then dry it at 100 °C for 0.8 hours to cure it; wind 3 layers of copper foil electromagnetic shielding tape with a thickness of 0.08 mm outside the package. The packaging is completed, and package inspection is required after the packaging is finished;

[0093] First, through X-ray fluoroscopy, check whether there are defects in the internal structure of the packaging layer; then, utilize the reflection characteristics of ultrasonic waves to detect the density and bonding strength of the packaging layer; then conduct reliability tests and electrical performance tests on the performance of the packaged chip.

[0094] Example 3: It is basically the same as Example 2, and further:

[0095] First, put the chip into an ultrasonic cleaning tank filled with isopropyl alcohol, clean it at a frequency of 30 kHz for 8 minutes, then rinse it clean with deionized water, then put it into acetone for ultrasonic cleaning for 5 minutes, and finally dry it with high-purity nitrogen. After the surface of the chip is cleaned, evenly coat a layer of silica gel to form a preliminary protective coating with a thickness controlled at 150 nm;

[0096] Select epoxy resin as the basic material for the packaging shell, add 8% by mass of nano-SiO2 and 5% by mass of nano-Al2O3 particles, stir them with a high-speed stirrer at a rotation speed of 2000 rpm for 30 minutes, and then disperse them with an ultrasonic disperser at a frequency of 40 kHz for 20 minutes to make the nano-particles evenly dispersed in the epoxy resin. The metal wire for chip interconnection selects Au wire with a diameter of 30 μm as the chip interconnection material. Use a high-precision chip mounter to mount the chip on the packaging substrate with a mounting accuracy of ±3 μm. Adopt the thermocompression bonding technology for chip interconnection. The thermocompression bonding temperature is 250 °C, the pressure is 30 g, and the time is 8 seconds. Bond one end of the Au wire to the chip pin and the other end to the substrate pad. Inject the underfill material into the gap between the chip and the substrate through vacuum-assisted potting, and then put the package into an oven at 150 °C and cure it for 1 hour;

[0097] Select aluminum nitride and epoxy resin as the basic materials for the packaging layer, melt the two and stack and coat them outside the preliminary protective coating of the chip to form the packaging layer;

[0098] Heat the modified epoxy resin to 180 °C to make it liquid, and then form a packaging shell with a thickness of 2 mm around the chip and the substrate through injection molding. The injection pressure is 80 MPa, and the injection speed is 20 mm / s. After injection molding, heat-treat the package at 150 °C and cure it for 3 hours to form a packaging protection shell; for double protection, after the packaging shell is cured, sealing and protection treatments are required. Spray a layer of silicone rubber sealing layer with a thickness of 1 mm on the surface of the packaging shell, and then dry it at 100 °C for 1.2 hours to cure it; wind 3 layers of copper foil electromagnetic shielding tape with a thickness of 0.05 mm outside the package, and the packaging is completed. After the packaging is completed, packaging inspection is required;

[0099] First, through X-ray fluoroscopy, check whether there are defects in the internal structure of the packaging layer; then, utilize the reflection characteristics of ultrasonic waves to detect the density and bonding strength of the packaging layer; then conduct reliability tests and electrical performance tests on the performance of the packaged chip.

[0100] The above embodiments only represent several implementation modes of the present invention. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several deformations and improvements can still be made. These are all equivalent modifications and evolutions based on the essence of the present invention to the above embodiments, and these all belong to the protection scope of the present invention.

Claims

1. A reinforcement packaging process for an embedded storage chip, characterized in that, It also includes the following steps: S1: Chip pretreatment includes: sequentially performing plasma cleaning, ultraviolet irradiation, and chemical cleaning, including ultrasonic cleaning in isopropyl alcohol and acetone cleaning solutions respectively; S2: Applying a protective coating includes: after the chip surface pretreatment is completed, uniformly coating a layer of protective material to form a preliminary protective coating; the protective material is a silicon nitride passivation layer, deposited by plasma enhanced chemical vapor deposition technology, with a thickness of 100 - 200 nm; S3: Encapsulation layer treatment, where the encapsulation material contains nano-modified epoxy resin, where nano-SiO2 accounts for 5 - 10 wt%, and nano-Al2O3 accounts for 3 - 8 wt%; it also includes the following steps: S301: Encapsulation material preparation: Select the encapsulation material and prepare the metal wires for chip interconnection; S302: Chip interconnection and underfill: Mount the chip on the encapsulation substrate, realize the interconnection between the chip and the substrate through thermocompression bonding technology, bond one end of the metal wire to the chip pin, and the other end to the substrate pad, then inject the underfill material into the gap between the chip and the substrate through vacuum-assisted filling, and then cure the underfill material; S303: Stacking of the encapsulation layer; S304: Encapsulation curing, which also includes the following steps: S3041: Curing of the encapsulation layer; S3042: Molding and curing of the encapsulation shell; S3043: Sealing and protection treatment is required after curing; S4: Encapsulation testing.

2. The reinforcement packaging process of an embedded storage chip according to claim 1, wherein, The thickness of the protective coating is controlled within 100 - 300 nm.

3. The reinforcement encapsulation process of an embedded storage chip according to claim 2, characterized in that, The reaction temperature of the plasma enhanced chemical vapor deposition is controlled within 300 - 400 °C, the reaction pressure is 100 - 300 mTorr, and the power is 100 - 500 W.

4. The reinforcement packaging process of an embedded storage chip according to claim 1, characterized in that, The S303: Stacking of the encapsulation layer: On the basis of the protective coating in S2, stack and coat the selected encapsulation material on its outer wall to form a multi-layer composite protection structure.

5. The reinforcement encapsulation process of an embedded storage chip according to claim 4, characterized in that, The detailed steps of the S304 encapsulation curing are as follows: S3041: Curing of the encapsulation layer: After the encapsulation layer stacking is completed, curing treatment is required to crosslink and cure each layer of material to form a hard protection shell; S3042: Molding and curing of the encapsulation shell: Use injection molding technology to form an encapsulation shell around the cured encapsulation layer and perform post-curing treatment S3043: Sealing and protection treatment is required after curing. Coat a silicone rubber sealing layer on the surface of the encapsulation shell and wind an electromagnetic shielding tape around the outside of the package.

6. The reinforcement encapsulation process of an embedded storage chip according to claim 5, characterized in that, In the S3043, the thickness of the silicone rubber sealing layer is 0.5 - 1 mm, and the drying temperature is 80 - 120 °C; the electromagnetic shielding tape is selected from copper foil tape or nickel foil tape, with a thickness of 0.05 - 0.1 mm, and the winding number of layers is 2 - 4 layers.

7. The reinforcement packaging process of an embedded storage chip according to claim 1, characterized in that, The S4 encapsulation testing also includes the following steps: S401: Detection of the encapsulation layer; S402: Detection of the encapsulated chip.

8. The reinforcement encapsulation process of an embedded storage chip according to claim 7, characterized in that, The test content of the S401 encapsulation layer detection is as follows: X-ray detection: Through X-ray fluoroscopy, check whether there are defects in the internal structure of the encapsulation layer; Ultrasonic detection: Utilize the reflection characteristics of ultrasonic waves to detect the density and bonding strength of the encapsulation layer.

9. The reinforcement packaging process of an embedded storage chip according to claim 8, characterized in that, The detection content of the encapsulated chip in S402 is as follows: Reliability test: Conduct high-temperature aging test, low-temperature storage test, temperature cycle test, humidity test, vibration test and shock test on the encapsulated chip; Electrical performance test: Verify whether the electrical performance of the encapsulated chip meets the standard through electrical performance tests.

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