Switch control circuit

Abstract

The invention provides a switch control circuit capable of preventing malfunction of a drive circuit caused by negative voltage noise. A switching control circuit according to the present invention controls switching of a first switching element on a power supply side and a second switching element on a ground side for driving a load, the switching control circuit comprising: a first level shift circuit including a first resistor and a first transistor; a driving circuit that drives the first switching element based on an output from the first level shift circuit; a first switch connected in parallel with the first resistor; and an ON / OFF control circuit that turns on the first switch when the low-potential-side electrode of the first switching element becomes negative voltage.

Description

Technical Field

[0001] The invention relates to a switch control circuit. Background Art

[0002] In a bridge circuit for power conversion, each switching element of an upper arm and a lower arm is operated under the control of a switching control circuit to perform power conversion (for example, Patent Document 1).

[0003] The switch control circuit includes a drive circuit for driving the switching elements of the upper arm and the lower arm; a control circuit for controlling the drive circuit; and a level shift circuit for transmitting a signal between the control circuit and the drive circuit. Prior art literature Patent Literature

[0004] Patent Document 1: Japanese Patent No. 4620437 Summary of the invention Technical problem to be solved by the invention

[0005] In the switching control circuit, the switching element of the lower arm operates with reference to the ground voltage, and the switching element of the upper arm operates with reference to the VS potential, and the VS potential changes in accordance with the on and off of the switching element of the lower arm.

[0006] Therefore, the level shift circuit level-shifts the input signal to the switching element of the upper arm with reference to the ground potential to a signal with reference to the VS potential, and outputs the signal to the drive circuit.

[0007] The level shift circuit includes, for example, a resistor connected to a floating power supply potential VB and an n-channel MOSFET provided between the resistor and ground. When the n-channel MOSFET is turned on, the potential of the connection node between the n-channel MOSFET and the resistor is a potential lower than the floating power supply potential VB by a certain voltage, and the certain voltage is determined by the product of the resistor and the on-current of the n-channel MOSFET. When the n-channel MOSFET is turned off, the potential of the connection node is the floating power supply potential VB. Thus, an input signal based on the ground potential is level-shifted to a signal based on the VS potential.

[0008] However, when the switching element of the upper arm switches from on to off, so-called negative voltage noise may be generated in which the VS potential of the node connecting the switching element of the upper arm and the switching element of the lower arm falls below the ground potential.

[0009] When negative voltage noise occurs, an undesired current may flow through the resistor of the level shift circuit, causing the voltage of the connection node to change. When this undesired current flows, the signal transmission between the control circuit and the drive circuit may fail, causing the drive circuit to malfunction.

[0010] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a switch control circuit capable of preventing malfunction of a drive circuit caused by negative voltage noise. Technical means for solving technical problems

[0011] An invention for achieving the above-mentioned purpose is a switch control circuit that controls the switching of a first switch element on the power supply side and a second switch element on the ground side for driving a load, and the switch control circuit includes: a first level shift circuit, which includes a first resistor and a first transistor; a drive circuit, which drives the first switch element based on the output from the first level shift circuit; a first switch, which is connected in parallel with the first resistor; and an on-off control circuit, which turns on the first switch when the low potential side electrode of the first switch element becomes a negative voltage. Effects of the Invention

[0012] According to the present invention, it is possible to provide a switch control circuit capable of preventing a malfunction of a drive circuit caused by negative voltage noise. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 1 is a circuit diagram for explaining an outline of a general switch control circuit 10 . Figure 2 2 is a circuit diagram for explaining the details of the switch control circuit 10 . Figure 3 It is a diagram for explaining a semiconductor device 1 in which a switch control circuit 10 is mounted. Figure 4 It is a diagram illustrating a part of a cross section of the semiconductor device 1 . Figure 5 It is a diagram illustrating a part of a cross section of the semiconductor device 1 . Figure 6 It is a diagram for explaining the current flowing inside the semiconductor device 1 . Figure 7 It is a diagram for explaining the current flowing inside the semiconductor device 1 . Figure 8 It is a diagram for explaining the current flowing inside the semiconductor device 1 . Fig. 9 It is a diagram for explaining the current flowing inside the semiconductor device 1 . Fig.10 1 is a diagram illustrating an undesirable current flowing through the switch control circuit 10 . Fig.11 is a timing chart of the HO potential from the drive circuit 14. Fig.12It is a timing chart of the drain voltage of the transistor 13t on the reset side. Fig.13 This is a timing diagram of the VB potential and the VS potential. Fig.14 This is a timing chart of the current flowing through the parasitic element (described later) and the resistor 13r. Fig.15 2 is a circuit diagram illustrating details of the switch control circuit 50 according to the embodiment. Fig.16 1 is a circuit diagram for explaining the details of the on / off control circuit 51 . Fig.17 1 is a diagram for explaining a semiconductor device 5 on which a switch control circuit 50 is mounted. Fig.18 It is a diagram illustrating a partial cross section of the semiconductor device 5 . Fig.19 It is a diagram illustrating a partial cross section of the semiconductor device 5 . Fig. 20 This is a timing diagram of the VB potential and the VS potential. Fig.21 It is a timing chart of the current flowing through the resistor 13r. Fig. 22 2 is a timing chart of the drain voltages of the transistors 12t and 13t on the set side and the reset side. Fig.23 is a timing diagram of the HO-VS voltage from the drive circuit 14 . Fig.24 It is the timing diagram of the GC-VS voltage from the on-off control circuit. DETAILED DESCRIPTION

[0014] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. The same reference numerals are given to the same or equivalent structural elements, components, etc. shown in the respective drawings, and repeated descriptions are appropriately omitted. According to the descriptions of this specification and the accompanying drawings, at least the following matters are clarified.

[0015] ==General switch control circuit 10== First, a general switch control circuit 10 will be described. Figure 1 1 is a circuit diagram for explaining the outline of the switch control circuit 10. The switch control circuit 10 is a circuit for controlling switching of a power supply side switch element (corresponding to a "first switch element") and a ground side switch element (corresponding to a "second switch element") for driving a load.

[0016] Figure 1 An example of connection between the switching control circuit 10 and IGBTs 21 and 22 which are switching elements constituting a bridge circuit for power conversion is shown.

[0017] like Figure 1 As shown, in this example, the IGBT 21 is used as a switching element on the power supply side, and the IGBT 21 is used as a switching element on the ground side.

[0018] Hereinafter, the IGBT 21 as a switching element on the power supply side may be referred to as “IGBT 21 of the upper arm.” Also, the IGBT 22 as a switching element on the ground side may be referred to as “IGBT 22 of the lower arm”.

[0019] The IGBTs 21 and 22 are connected in series to form a half bridge, and the freewheeling diodes 23 and 24 are connected in anti-parallel to the IGBTs 21 and 22, respectively.

[0020] A ground potential (GND potential) is applied to the emitter of the IGBT 22 of the lower arm, and a power supply potential (HV potential) is applied to the collector of the IGBT 21 of the upper arm.

[0021] Figure 1 The "VS" shown is an intermediate potential that varies from the HV potential to the GND potential. "VB" is a potential on the high potential side of the power supply 25 based on the VS potential. "COM" is a reference potential and is the GND potential. "VCC" is a potential on the high potential side of the power supply 26 based on the GND potential.

[0022] "HIN" and "LIN" are input signals from a microcomputer etc. to a control circuit 11 described later. "HO" is a high-side output signal output to the gate of the upper arm IGBT 21. "LO" is a low-side output signal output to the gate of the lower arm IGBT 22.

[0023] The switch control circuit 10 alternately turns on the IGBT 21 of the upper arm and the IGBT 22 of the lower arm, and thus alternately outputs a high potential or a low potential from the VS terminal, which is an output terminal of the switch control circuit 10 , thereby supplying AC power to the load.

[0024] In other words, when a high potential is output to the load, the switch control circuit 10 operates the IGBTs 21 and 22, so that the IGBT 21 of the upper arm is turned on and the IGBT 22 of the lower arm is turned off. In addition, when a low potential is output to the load, the switch control circuit 10 operates the IGBTs 21 and 22, so that the IGBT 21 of the upper arm is turned off and the IGBT 22 of the lower arm is turned on.

[0025] At this time, the switch control circuit 10 outputs a gate signal based on the GND potential to the gate of the IGBT 22 of the lower arm, and outputs a gate signal based on the VS potential to the gate of the IGBT 21 of the upper arm.

[0026] The VS potential varies according to the on / off of the upper arm IGBT 21 and the lower arm IGBT 22. Therefore, as will be described in detail later, the switch control circuit 10 needs to include a level shift circuit (described later).

[0027] <Details of Switch Control Circuit 10> Figure 2 1 is a circuit diagram for explaining the details of the switch control circuit 10. The switch control circuit 10 includes a control circuit 11, a level shift circuit 12 (equivalent to a "first level shift circuit"), a level shift circuit 13 (equivalent to a "second level shift circuit"), and a drive circuit 14.

[0028] The control circuit 11 controls the level shift circuits 12 and 13. The control circuit 11 outputs a set signal SET2 to the level shift circuit 12 when the input signal HIN changes from a low (L) level to a high (H) level.

[0029] In addition, when the input signal HIN changes from the H level to the L level, the control circuit 11 outputs the reset signal RESET1 to the level shift circuit 13 .

[0030] The level shift circuit 12 includes a resistor 12r (corresponding to a “first resistor”) and a transistor 12t (corresponding to a “first transistor”). The level shift circuit 12 outputs a set signal SET2 for switching the IGBT 21 of the upper arm from off to on.

[0031] In the following description, the level shift circuit 12 may be referred to as a “level shift circuit 12 on the set side”, the resistor 12r may be referred to as a “resistor 12r on the set side”, and the transistor 12t may be referred to as a “transistor 12t on the set side”.

[0032] In this example, transistor 12t is an n-channel MOS transistor. The gate of transistor 12t is connected to control circuit 11. The drain of transistor 12t is connected to one end of resistor 12r and drive circuit 104 (described later). Ground potential is applied to the source of transistor 12t by GND. The other end of resistor 12r is connected to the high potential side of power supply 25.

[0033] The level shift circuit 13 includes a resistor 13r (equivalent to a "second resistor") and a transistor 13t (equivalent to a "second transistor"). The level shift circuit 13 outputs a reset signal RESET 2 for switching the switch element 21 of the upper arm from on to off.

[0034] In the following description, the level shift circuit 13 may be referred to as “level shift circuit 13 on the reset side”, the resistor 13r may be referred to as “resistor 13r on the reset side”, and the transistor 13t may be referred to as “transistor 13t on the reset side”.

[0035] In this example, the transistor 13t is an n-channel MOS transistor. The gate of the transistor 13t is connected to the control circuit 11. The drain of the transistor 13t is connected to one end of the resistor 13r and the drive circuit 14. The GND potential is applied to the source of the transistor 13t. The other end of the resistor 13r is connected to the high potential side of the power supply 25.

[0036] The drive circuit 14 drives the switch element 21 based on the outputs from the level shift circuits 12 and 13. That is, the drive circuit 14 drives the IGBT 21 based on the set signal SET2 from the level shift circuit 12 and the reset signal RESET2 from the level shift circuit 13.

[0037] In addition, in this example, for convenience, only the drive circuit 14 for driving the switching element 21 of the upper arm is shown, and the description of the drive circuit for driving the switching element 22 of the lower arm is omitted.

[0038] <Operation of Switch Control Circuit 10> The switching operation of the switch control circuit 10 is described below. Hereinafter, the operation is described when the input signal HIN input to the control circuit 11 changes from a low (L) level to a high (H) level, and when the input signal HIN changes from an H level to an L level.

[0039] First, the operation when the input signal HIN input to the control circuit 11 changes from the L level to the H level will be described.

[0040] At this time, the control circuit 11 outputs a set signal SET1 to the transistor 12 t on the set side so that the transistor 12 t on the set side is turned on for a certain period of time.

[0041] The transistor 12 t on the set side converts the set signal SET1 from the control circuit 11 into a set signal SET2 based on the VS potential, and outputs it to the drive circuit 14 .

[0042] Specifically, the transistor 12t on the set side outputs a drain potential whose voltage is lower than the floating power supply potential VB by a certain voltage due to the current flowing through the resistor 12r to the drive circuit as the set signal SET2.

[0043] The drive circuit 14 switches the output HO of the drive circuit from the L level to the H level in response to the set signal SET2 from the transistor 12 t on the set side.

[0044] Next, the operation when the input signal HIN input to the control circuit 11 changes from the H level to the L level will be described.

[0045] At this time, the control circuit 11 outputs a reset signal RESET1 to the transistor 13 t on the reset side so that the transistor 13 t on the reset side is turned on for a certain period of time.

[0046] The transistor 13 t on the reset side converts the reset signal RESET1 from the control circuit 11 into a reset signal RESET2 based on the VS potential, and outputs the reset signal to the drive circuit 14 .

[0047] Specifically, the transistor 13 t on the reset side outputs a drain potential whose voltage is lower than the floating power supply potential VB by a certain voltage due to the current flowing through the resistor 13 r to the drive circuit 14 as the reset signal RESET2 .

[0048] The drive circuit 14 switches the output HO of the drive circuit 14 from the H level to the L level in response to the reset signal RESET2 from the transistor 12 t on the reset side.

[0049] <Plane structure> Figure 3 1 is a diagram for explaining a semiconductor device 1 equipped with a switch control circuit 10. The semiconductor device 1 includes a high-side region 101 (equivalent to a "high-side region"), a high voltage junction termination region (HVJT: High Voltage Junction Termination Region) 102, and a reference potential region 103 (equivalent to a "reference potential region") on a p-type semiconductor substrate 100. As the semiconductor substrate 100, for example, a silicon (Si) substrate is used.

[0050] The driving circuit 14 is formed in the high side region 101. In addition, a VB terminal 105, a VS terminal 106, and a HO terminal 107 are arranged in the high side region 101. The VB terminal 105 is a terminal for applying a VB potential. The VS terminal 106 is a terminal for outputting a VS potential. The HO terminal 107 is a terminal for applying an HO potential.

[0051] The high withstand voltage junction termination region 102 is provided around the high side region 101. In the high withstand voltage junction termination region 102, a part of the set side transistor 12t and the reset side transistor 13t are provided (details will be described later).

[0052] The reference potential region 103 is a region on the front surface of the semiconductor substrate 100 excluding the high side region 101 and the high withstand voltage junction termination region 102 . The reference potential region 103 is electrically separated from the high side region 101 by the high withstand voltage junction termination region 102 .

[0053] The control circuit 11 is formed in the reference potential region 103. A GND terminal 108, a HIN terminal 109, and a VCC terminal 110 are arranged in the reference potential region 103. The GND terminal 108 is a terminal to which a GND potential as a reference potential of the control circuit 11 is applied. The HIN terminal 109 is a terminal to which an input signal HIN input to the control circuit 11 is input. The VCC terminal is electrically connected to a power supply (not shown) of the control circuit 11, and is a terminal to which a VCC potential as a power supply potential of the control circuit 11 is applied.

[0054] In this embodiment, the switch control circuit 10 is mounted on a semiconductor substrate 100. However, the present invention is not limited thereto, and the semiconductor device 1 may be formed of two semiconductor chips on a substrate such as a DCB (Direct Bonded Copper) substrate, wherein the two semiconductor chips each have a structure corresponding to the high-side region 101 and a structure corresponding to the reference potential region 103, for example.

[0055] <Cross-sectional structure> Figure 4 The description includes Figure 3 FIG. 2 is a diagram of a cross section of the semiconductor device 1 at AA′ of the transistor 12 t on the set side. Figure 5 Is the description included Figure 3 FIG. 1 is a diagram showing a cross section of the semiconductor device 1 at DD′ of the high withstand voltage junction termination region 102 .

[0056] like Figure 4 and Figure 5 As shown, the semiconductor device 1 is provided with an n-type region 111 and an n-type region 112 on the front surface of a p-type semiconductor substrate 100. - Type region 112, p - type region 113 and p type region 114 .

[0057] exist Figure 3 In the top view of , the n-type region 111 corresponds to the high-side region 101 and is applied with the VB potential. In addition, the driving circuit 14 is formed in the n-type region 111. Figure 4 , an n-channel MOSFET 141 and a p-channel MOSFET 142 constituting the drive circuit 14 are shown in the n-type region 111. The source 141s of the n-channel MOSFET 141 is connected to the VS terminal 106 ( Figure 3 ).

[0058] The n-type region 111 is also provided with n + Type contact area 115. Connected to VB terminal 105 ( Figure 3 ) is arranged on the contact area 115.

[0059] exist Figure 3In the top view, n - The n-type region 112 is provided in the high withstand voltage junction termination region 102. The high withstand voltage junction termination region 102 is a region provided outside the n-type region 111, and in the present embodiment, is provided in a ring shape around the n-type region 111. - The n-type region 112 is a region with a lower impurity concentration than the n-type region 111 .

[0060] like Figure 4 As shown, n - The type region 112 includes a drift region 116 of the transistor 12t on the set side and an n + An n-type drain region 117 is formed. An n-type region 124 is provided around the drain region 117. A drain electrode 12d of the transistor 12t is provided on the drain region 117.

[0061] The transistor 12t on the set side has an n-type region 114 on the upper part thereof. + Type source region 119, n + Type source region 119 and p + The type contact regions 118 are arranged adjacent to each other.

[0062] The n-type region 123 is provided around the source region 119. + Type contact area 118 and n + A source electrode 12s is provided on the type source region 119 and is in contact with these regions.

[0063] The gate electrode 12g of the transistor 12t is provided between the source electrode 12s and the n - The reference potential is applied to the source electrode 12s. In addition, the set signal SET1 is input to the gate electrode 12g.

[0064] The resistor 12r on the set side is provided on the n-type region 111 via an insulating film (not shown). The resistor 12r is made of polysilicon or the like.

[0065] p - Type region 113 is set at n - The interior of the type region 112. In this embodiment, p － Type region 113 is set at n － The transistor 12t of the n-type region 112 and the n-type region 111 are connected to separate them.

[0066] p － The type region 113 has a through-n － The depth of the type region 112, and n － The transistor 12 t in the n-type region 112 is electrically isolated from the n-type region 111 .

[0067] The p-type region 120 and the p-type region 114 are arranged to be aligned with the n － In this embodiment, the p-type region 120 and the p-type region 114 are arranged in an annular manner. － around the type area 112.

[0068] A p-type region 114 having an impurity concentration higher than that of the p-type region 114 is provided on the upper portion of the p-type region 114. + type contact area 118. Due to p + The contact region 118 is electrically connected to the GND terminal. + The p-type contact region 115 is electrically connected to the VB terminal. Therefore, in normal operation, the potential of the VB terminal is higher. Therefore, the depletion layer mainly flows from the p-type region 120 and the p-type region 114 to the n-type region 116. － The pn junction between the type regions 112 extends to n － Type region 112, and stays at n － type region 112, thereby electrically separating the high-side region 101 and the reference potential region 103 in the lateral direction.

[0069] In the above description, only the transistor 12 t on the set side is mentioned, but the same is true for the transistor 13 t on the reset side.

[0070] <Malfunction Occurring in General Switch Control Circuit 10> A malfunction occurring in the switch control circuit 10 will be described. Figures 6 to 14 1 is a diagram for explaining a malfunction that occurs in the switch control circuit 10. Figures 6 to 9 This is a diagram for explaining current flowing inside the semiconductor device 1 on which the switch control circuit 10 is mounted. Fig.10 1 is a diagram illustrating an undesirable current flowing through the switch control circuit 10 .

[0071] in addition, Figures 10 to 13 1 and 2 are various timing diagrams of the switch control circuit 10 . Fig.10 is the HO potential from the drive circuit 14 to the upper arm IGBT 21 ( Figure 1 ), Fig.12 is the drain voltage of the transistors 12t and 13t on the set side and the reset side, Fig.13 are VB potential and VS potential, Fig.14 This is the current flowing through the parasitic element (described later) and the resistor 13r.

[0072] First, the parasitic elements formed inside the semiconductor device 1 will be described. Figures 6 to 9 As shown, parasitic diodes 150 and 151 , a parasitic resistor 152 , and a parasitic transistor 153 are formed inside the semiconductor device 1 .

[0073] The parasitic diode 150 is formed by the p-type semiconductor substrate 100 and the n － The parasitic diode 151 is formed by the p-type semiconductor substrate 100 and the n-type region 111 .

[0074] The parasitic resistor 152 is formed by the resistance of the p-type semiconductor substrate 100. In addition, the parasitic transistor 153 is formed between the n-type region 111, the p-type region of the semiconductor substrate 100, and the n-type region. － NPN transistor between the type regions 112. Fig.10 , an equivalent circuit of the semiconductor device 1 is shown together with these parasitic elements.

[0075] If the above parasitic elements exist, when negative voltage noise is generated, the switch control circuit 10 may malfunction. The malfunction will be described in detail below.

[0076] Negative voltage noise is a type of switching noise generated by switching of the IGBTs 21 and 22 .

[0077] Negative voltage noise is negative voltage noise generated when the VS potential drops due to the influence of the load or the inductance of the wiring when the IGBT 21 constituting the upper arm of the bridge circuit is turned off.

[0078] In the following example, the initial state is set to the state where the upper arm IGBT21 is turned on and the lower arm IGBT22 is turned off. Then, the following case is considered: from this state, the upper arm IGBT21 is switched off and the lower arm IGBT22 is switched on by the reset signal RESET1 from the control circuit 11.

[0079] Time t0 First, if Fig.12 As shown, starting from the initial state, at time t0, the reset signal RESET1 from the control circuit 11 turns on the transistor 13t on the reset side. Fig.12 As shown, due to the voltage drop caused by the resistor 13r on the reset side, the drain potential of the transistor 13t drops and becomes lower than the input threshold of the drive circuit 104.

[0080] Time t1 If the drain potential of the transistor 13t on the reset side drops below the input threshold of the drive circuit 14 at time t0, the drive circuit 14 turns off the IGBT 21 of the upper arm at time t1 after the signal delay time inside the drive circuit 14 has passed from time t0. At this time, the drive circuit 14 switches the HO-VS voltage input to the gate of the IGBT 21 to the L level ( Fig.10 ).

[0081] At this time, if negative voltage noise having an absolute value greater than the power supply voltage VBS (VB-VS) of the driving circuit 14 is generated, the VB potential becomes a negative potential ( Fig.13 period (A)).

[0082] Thus, at time t1 , the parasitic diodes 150 and 151 are in a state where a forward bias is applied and each of them is turned on.

[0083] From time t1 to time t2 ( Fig.12 Period (A) When the parasitic diodes 150 and 151 are turned on, holes and electrons are injected into the n-type region 111 and the p-type semiconductor substrate 100, respectively, and carriers (electrons and holes) are accumulated. The accumulation of carriers continues until the period of negative voltage noise (period (A)) ends.

[0084] Figure 6 The figure shows the current flowing through the semiconductor device 1 during the period (A). As shown in the figure, the forward current flows through the parasitic diodes 150 and 151.

[0085] Time t2 At time t2, if the negative voltage noise duration ( Fig.13 When the period (A) ends and the VB potential recovers from the negative voltage to, for example, above 0.6 V, the parasitic diodes 150 and 151 are in a state of being reverse biased.

[0086] When the parasitic diodes 150 and 151 are in a state where a reverse bias is applied, a so-called reverse recovery current flows.

[0087] Figure 7 1 shows the current flowing through the semiconductor device 1 at time t2. As shown in the figure, at time t2, the reverse recovery current flows through the parasitic resistor 152. When the reverse recovery current flows through the parasitic resistor 152, the substrate potential rises due to the voltage drop of the parasitic resistor 152, and the parasitic transistor 153 turns on.

[0088] From time t2 to time t3 (period (B)) Figure 8 The figure shows the current flowing through the semiconductor device 1 during the period (B). As shown in the figure, the reverse recovery current flows between the collector and the emitter of the parasitic transistor 153 and through the resistors 12r and 13r on the set side and the reset side.

[0089] Fig.14 The currents (reverse recovery current only) flowing through the parasitic diode 150, the parasitic transistor 153, and the resistor 12r on the set side are shown.

[0090] If the reverse recovery current starts to flow at time t2, the reverse recovery current flowing through the parasitic diode 150 and the parasitic transistor 153 gradually decays ( Fig.14 period (B)).

[0091] On the other hand, a reverse recovery current also starts to flow through the resistors 12r and 13r on the set side and the reset side. However, in the period (B), the reverse recovery current is smaller than the reverse recovery current flowing through the parasitic diode 150 and the parasitic transistor 153 .

[0092] From time t3 to time t4 (period (C)) From around time t3, the reverse recovery current flowing through the parasitic diode 150 and the parasitic transistor 153 further decays, and the reverse recovery current flowing through the resistors 12r and 13r on the set side and the reset side increases ( Fig.14 period (C)).

[0093] As a result, the drain voltages of the transistors 12t and 13t on the set and reset sides begin to drop ( Fig.12 period (C)).

[0094] The increase in the reverse recovery current flowing through the resistors 12 r and 13 r is caused by the parasitic transistor 153 changing from on to off, and the on resistance of the parasitic transistor 153 starts to increase compared with the resistors 12 r and 13 r.

[0095] Fig.10 The circuit diagram of FIG. 1 shows the path of the reverse recovery current during the period (C). The figure also shows parasitic diodes 150 and 151, parasitic resistor 152, and parasitic transistors.

[0096] Time t4 like Fig.12 As shown, if the drain voltage of the set and reset transistors 12t and 13t decreases, an undesirable situation may occur in which the drain voltage of both the set and reset transistors 12t and 13t becomes lower than the input threshold voltage of the drive circuit 14.

[0097] Then, both the set signal SET2 and the reset signal RESET2 are erroneously output to the drive circuit 14 .

[0098] In addition, the general drive circuit 14 maintains the output logic specification when the set signal SET2 and the reset signal RESET2 are input simultaneously. Therefore, when the drop amounts of the set signal SET2 and the reset signal RESET2 caused by the negative voltage noise are exactly the same, no malfunction occurs.

[0099] However, due to the variation in characteristics of each element, the amount of drop in drain voltage on the set side and the amount of drop in drain voltage on the reset side are not actually exactly the same value, but may differ.

[0100] In this example, if Fig.12 As shown, at time t4 , only the drain voltage of the transistor 12 t on the set side is lower than the input threshold voltage of the driver circuit 104 , and the set signal SET2 is erroneously output to the driver circuit 104 .

[0101] In this case, if Fig.11 As shown, at time t4, a malfunction occurs in which the drive circuit 14 erroneously turns on the IGBT 21 .

[0102] After time t4 At around time t4, the parasitic transistor 153 is turned off.

[0103] Fig. 9 The figure shows the current flowing through the semiconductor device 1 immediately after the parasitic transistor 153 is turned off. As shown in the figure, the reverse recovery current flowing through the parasitic transistor 153 disappears, and the reverse recovery current flowing through the resistors 12r and 13r on the set side and the reset side remains.

[0104] Immediately after the parasitic transistor 153 is turned off, the reverse recovery current flowing through the resistors 12r and 13r on the set side and the reset side exhibits a peak value ( Fig.14 Then, after time t4, the reverse recovery current flowing through the resistors 12r and 13r decays and disappears ( Fig.14 period (D)).

[0105] When the reverse recovery current further decreases, the drain voltage of transistors 12t and 13t gradually recovers ( Fig.12 period (D)).

[0106] The above describes malfunctions that occur in the general switch control circuit 10. As described above, when an unnecessary current flows through the set-side resistor 12r, in particular, a malfunction may occur in which the drive circuit 14 erroneously turns on the IGBT 21.

[0107] Furthermore, during the period from when the negative voltage noise is generated at time t1 to when the parasitic transistor 153 is turned off, signal transmission of the level shift circuits 12 and 13 cannot be performed normally.

[0108] Therefore, when the input signal of the switch control circuit 10 is switched from L level to H level during this period, the set signal SET2 is not output to the drive circuit 14, and an erroneous operation of not turning on the IGBT 21 occurs. The period during which signal transmission cannot be performed normally is about 10 μs at most.

[0109] The switch control circuit 50 of the embodiment to be described below can prevent the malfunction of the drive circuit caused by the negative voltage noise as described above.

[0110] ==Implementation Method== Fig.15 is a circuit diagram for explaining the details of the switch control circuit 50 of this embodiment. Figure 2 Compared with the general switch control circuit 10, the switch control circuit 50 is different in that it also includes an on-off control circuit 51, a switch 52 (equivalent to a "first switch") and a switch 53 (equivalent to a "second switch").

[0111] The following description will focus on differences from the general switch control circuit 10 , and description of common points will be omitted.

[0112] [Switch 52] As described above, when a reverse recovery current flows through the set-side resistor 12 r due to negative voltage noise, a malfunction may occur in which the drive circuit 14 erroneously turns on the IGBT 21 .

[0113] The switch 52 is provided to allow the reverse recovery current to bypass the switch 52 and prevent the reverse recovery current from flowing through the resistor 12r on the set side (described in detail later).

[0114] The switch 52 is connected in parallel to the resistor 12r on the set side. In the present embodiment, the switch 52 is a p-channel MOS transistor.

[0115] [Switch 53] The switch 53 has the same structure as the switch 52. The switch 53 is connected in parallel with the resistor 13r on the reset side. In the present embodiment, the switch 53 is a p-channel MOS transistor.

[0116] Furthermore, as described above, when a reverse recovery current flows through the set-side resistor 12 r due to negative voltage noise, a malfunction may occur in which the drive circuit 14 erroneously turns on the IGBT 21 .

[0117] That is, even if the reverse recovery current flows through the resistor 13r on the reset side, the above-mentioned malfunction will not occur. However, by providing the switch 53, the circuit structure of the switch control circuit 50 can be symmetrical on the set side and the reset side. Thus, the operation of the circuit can be stabilized.

[0118] [On / Off Control Circuit 51] The on / off control circuit 51 is provided to control the on / off of the switches 52 and 53 .

[0119] When the low potential side electrode of the switch element 21 becomes a negative voltage (when negative voltage noise occurs), the on / off control circuit 51 turns on the switch 52. In this embodiment, the on / off control circuit 51 also turns on the switch 53 when negative voltage noise occurs.

[0120] Fig.16 2 is a circuit diagram for explaining the details of the on / off control circuit 51. The on / off control circuit 51 includes a diode element 511 and a circuit 512.

[0121] When the low potential side electrode of the switching element 21 is at a negative voltage (when negative voltage noise is generated), a current flows through the diode element 511 .

[0122] In this embodiment, the diode element 511 is a diode-connected n-channel MOS transistor (equivalent to the “third transistor”). The gate electrode and drain electrode of the n-channel MOS transistor are grounded, and the source electrode is connected to the low potential side electrode of the switch element 21 via resistors R1 and R2 (described later).

[0123] The circuit 512 outputs a signal for turning on the switches 52 and 53 for a predetermined period based on the current flowing through the diode element 511. The circuit 512 is formed in the high-side region 101 (described later). Fig.17 )middle.

[0124] The circuit 512 of this embodiment includes resistors R1, R2, R3, a Schmitt trigger circuit 513, NOT circuits 514, 516, a diode element 515, and a capacitor C1. These operations will be described in detail in conjunction with the operation of the switch control circuit 50 described later.

[0125] <Plane structure> Fig.17 FIG. 1 is a diagram for explaining a semiconductor device 5 equipped with a switch control circuit 50. Compared with the semiconductor device 1 described above, the planar structure of the semiconductor device 5 is different in the arrangement of the high withstand voltage junction termination region 102. Fig.15 An enlarged view of a portion of the high withstand voltage junction termination region 102 is shown below.

[0126] and Figure 3 Compared with the case of the general semiconductor device 1 , in the high withstand voltage junction termination region 102 , the diode element 511 is further arranged in the high withstand voltage junction termination region 102 .

[0127] In addition, if Fig.15 As shown below, in the semiconductor device 5, the transistor 12t of the level shift circuit 12 on the set side is composed of two transistors having the same channel direction.

[0128] The diode element 511 of the on / off control circuit 51 is disposed between the two transistors 12t. As described above, the diode element 511 is a diode-connected transistor.

[0129] That is, the two transistors constituting the transistor 12 t and the transistor constituting the diode element 511 (ie, three transistors) are arranged in the high withstand voltage junction termination region 102 .

[0130] By configuring in this way, the characteristics of the transistors constituting the transistor 12t and the diode element 511 can be made the same, thereby stabilizing the circuit operation.

[0131] In addition, although this example shows that the transistor 12t is composed of two transistors, the present invention is not limited to this. That is, the transistor 12t may be composed of three or more transistors having the same channel direction.

[0132] On the other hand, the transistor constituting the diode element 511 may be constituted by a plurality of transistors having the same channel direction.

[0133] For example, the transistor 12t may be composed of three transistors, and the transistor constituting the diode element 511 may be composed of two transistors.

[0134] Furthermore, the three transistors constituting the transistor 12t and the two transistors constituting the diode element 511 may be alternately arranged in a direction perpendicular to the channel direction.

[0135] <Cross-sectional structure> Fig.18 It is shown that the Fig.17 FIG. 5 is a cross-sectional view of the semiconductor device 5 on BB′ including the transistor of the diode element 511. In addition, Fig.19 Is the description included Fig.17 p － FIG. 1 is a diagram showing a cross section of the semiconductor device 5 on CC′ including the type region 113 (also referred to as “slit region”).

[0136] In addition, including Fig.17 The cross section of the semiconductor device 5 on AA′ including the transistor 12t on the set side is Figure 4 Same as shown.

[0137] Fig.18 The cross-sectional structure on BB′ shown is similar to Figure 4 Compared with the cross-sectional structure shown in the figure, the difference is Figure 4 The transistor 12t is a diode element 511. Specifically, Figure 4 The source electrode 12s and the gate electrode 12g are Fig.18 are connected to each other to form anode 511a. Figure 4The drain electrode 12d is Fig.18 In the middle is cathode 511c.

[0138] Fig.19 The cross-sectional structure on C-C' shown in Figure 4 Compared with the cross-sectional structure shown in the figure, the difference is that p － The type region 113 extends over the separation region.

[0139] That is, p － Type area 113 along Fig.17 The CC' is set to be slit-shaped, through p － The area around 113 is － The pn junction of the type region 112 electrically separates the diode element 511 from the transistor 12t.

[0140] <Operation of Switch Control Circuit 50> The operation of the switch control circuit 50 of the present embodiment will be described using the above-described general switch control circuit 10 as a comparative example.

[0141] Figure 20 to Figure 24 It is a diagram for explaining the operation of the switch control circuit 50 . Figures 20 to 23 are various timing diagrams of the switch control circuit 50, Fig. 20 are VB potential and VS potential, Fig.21 is the current flowing through resistor 13r, Fig. 22 is the drain voltage of transistor 12t on the set side, Fig.23 is the HO-VS voltage from the drive circuit 14 . Fig.24 It is the GC-VS voltage from the on-off control circuit.

[0142] Hereinafter, the operation of the switch control circuit 50 will be described in time series. Figure 20 to Figure 24 The waveform of the comparative example shown is Figures 11 to 14 The waveform of the example is the same as that of Figure 20 to Figure 24 In the example, time t1, t2 and t3 are related to Figures 11 to 14 In the example of , the times t1, t2 and t3 are the same. Figure 21 to Figure 24 In the example, time t5 and time t6 are times after time t3.

[0143] Before time t1 In the state where no negative voltage noise is generated (before time t1), in this embodiment, the potential of the output terminal GC of the on / off control circuit 51 is GC-VS=15V(VB-VS). That is, the switches 52 and 53 ( Fig.15 ) is in the cut-off state.

[0144] From time t1 to time t2 (period (A)) In the present embodiment and the comparative example, when the low-side switch element 22 is turned on at time t1 and negative voltage noise is generated, the drain potentials of the set-side and reset-side transistors 12t and 13t rise ( Fig. 22 ).

[0145] In this embodiment, when the drain potential of the transistors 12t and 13t is higher than the VS potential by 30 V or more, for example, the on / off control circuit 51 ( Fig.16 ) when the output voltage of the voltage divider resistor composed of resistors R1 and R2 exceeds the threshold voltage (2V in this embodiment) of the Schmitt trigger circuit 513, and the potential of the output terminal GC is switched to GC-VS=0V.

[0146] At this time, the Schmitt trigger circuit 513 outputs an L level signal to the NOT circuit 514. Then, the NOT circuit 514 outputs an H level signal.

[0147] Then, the capacitor C1 is charged via the diode element 515. When the voltage of the capacitor C1 exceeds the threshold value of the NOT circuit 516, an H level signal is output to the NOT circuit 516, and the NOT circuit 516 outputs an L level signal.

[0148] Thus, switches 52, 53 ( Fig.15 ) is turned on. In addition, after the negative voltage noise period ends (after time t2), through circuit 512 ( Fig.16 ) also keeps switches 52 and 53 in the on state during a certain period of time (T1).

[0149] When the NOT gate circuit 516 of the circuit 542 starts to output an L level signal, the capacitor C1 starts to discharge through the resistor R3. Then, when the voltage of the capacitor C1 is lower than the threshold value of the NOT gate circuit 516, the NOT gate circuit 516 outputs an H level signal. As a result, the switches 52 and 53 ( Fig.15 ) ends.

[0150] The period from the end of the negative voltage noise to the switching of switches 52 and 53 ( Fig.15 ) is set to the specified time (T1).

[0151] From time t2 to t5 In the present embodiment, when the negative voltage noise period ends at time t2 and the VS potential rises, a reverse recovery current starts to flow through the parasitic diode 150 .

[0152] In the comparative example, the reverse recovery current flowing through the parasitic transistor 153 decays, and the reverse recovery current in the resistors 12r and 13r begins to increase (with Fig.14 same as (B)).

[0153] On the other hand, in this embodiment, the reverse recovery current flows through the switches 52 and 53 in the on state ( Fig.15 ). As a result, the reverse recovery current flowing through the resistors 12r and 13r is suppressed.

[0154] Therefore, in this embodiment, the current flowing through the resistors 12r and 13r is smaller than that in the comparative example, and the decrease in the drain voltage of the transistors 12t and 13t (from Fig. 22 from time t2 to time t5).

[0155] From time t5 to time t6 In the present embodiment, when a certain time (T1) has elapsed from the end of the negative voltage noise period (time t2), the switches 52 and 53 are turned off (time t5).

[0156] As described above, the time T1 is set in advance to be the time required for the accumulated carriers to be released. Therefore, when the switches 52 and 53 are turned off, the reverse recovery current is almost exhausted.

[0157] Therefore, according to the switch control circuit 50, it is possible to prevent malfunction caused by a drop in the drain voltage of the transistors 12t and 13t after the switches 52 and 53 are turned off ( Fig.23 ).

[0158] In the present embodiment, signal transmission cannot be performed during the period from when negative voltage noise is generated (time t1 ) to when switches 52 , 53 are turned off (time t5 ), and signal transmission can be performed after time t5 .

[0159] Time t6 In the comparative example, when the current flows through the resistors 12r and 13r ( Figure 2 ) when the reverse recovery current decays, the drain voltage of the transistor 12t on the set side rises and exceeds the input threshold value ( Fig. 22 time t6).

[0160] That is, in the comparative example, signal transmission cannot be performed during the period from when the negative voltage noise is generated at time t1 to time t6 , but signal transmission can be performed after time t6 .

[0161] Here, the period during which signal transmission cannot be performed in the present embodiment and the comparative example is summarized. As described above, the period during which signal transmission cannot be performed in the present embodiment is the period from time t1 to time t5. In addition, in the comparative example, the period during which signal transmission cannot be performed is the period from time t1 to time t6 (> t5).

[0162] That is, according to the present embodiment, the period during which signal transmission is impossible can be shortened compared to the comparative example.

[0163] The time from the generation of negative voltage noise to the disappearance of the reverse recovery current depends on the magnitude of the reverse recovery current and the impedance of the reverse recovery current supply path.

[0164] In this embodiment, during the period when the switches 52 and 53 are turned on, the impedance of the reverse recovery current supply path is reduced, so that a larger reverse recovery current flows than in the comparative example (from Fig.21 from time t2 to time t3).

[0165] Therefore, according to the present embodiment, the reverse recovery current disappears in a shorter time than in the comparative example. Therefore, in the present embodiment, the period during which signal transmission cannot be performed is shorter than in the comparative example ( Fig. 22 ).

[0166] According to the switch control circuit 50 of the present embodiment described above, it is possible to prevent malfunction of the drive circuit due to negative voltage noise.

[0167] ===Summary=== The switch control circuit 50 of the present embodiment described above is a switch control circuit that controls the switching of a first switch element on the power supply side and a second switch element on the ground side for driving a load, and the switch control circuit 50 includes: a first level shift circuit, which includes a first resistor and a first transistor; a drive circuit 14, which drives the first switch element based on the output from the first level shift circuit; a first switch, which is connected in parallel with the first resistor; and an on-off control circuit 51, which turns on the first switch when the low potential side electrode of the first switch element becomes a negative voltage.

[0168] According to this configuration, the reverse recovery current generated by the negative voltage noise flows through the first switch, and the reverse recovery current can be suppressed from flowing to the first resistor. Therefore, malfunction of the drive circuit caused by the negative voltage noise can be prevented.

[0169] In addition, the switch control circuit 50 further includes a second level shift circuit, which includes a second resistor and a second transistor, the first level shift circuit outputs a set signal for switching the first switch element from off to on, the second level shift circuit outputs a reset signal for switching the first switch element from on to off, and the drive circuit 14 drives the first switch element based on the set signal and the reset signal. According to this structure, the symmetry of the switch control circuit 50 becomes higher with respect to the set side and the reset side. As a result, the operation of the circuit becomes stable.

[0170] In addition, the switch control circuit further includes a second switch connected in parallel with the second resistor, and when the low potential side electrode becomes a negative voltage, the on-off control circuit turns on the second switch. According to this structure, the symmetry of the switch control circuit 50 becomes higher with respect to the set side and the reset side. As a result, the operation of the circuit becomes more stable.

[0171] In the switch control circuit 50, the first transistor and the second transistor are n-channel MOS transistors, and the first switch and the second switch are p-channel MOS transistors. According to this structure, the switch control circuit 50 can be manufactured simply.

[0172] The switch control circuit 50 further includes a control circuit 11 for controlling the first level shift circuit, the drive circuit 14 is formed in the high side region of the substrate, and the control circuit 11 is formed in the reference potential region, and the reference potential region is electrically separated from the high side region by a high withstand voltage junction terminal region provided around the high side region. According to this structure, interference between the drive circuit 14 and the control circuit 11 can be suppressed.

[0173] In the switch control circuit 50, the on / off control circuit 51 includes a diode element 515 that allows a current to flow when the low potential side electrode is at a negative voltage, and a circuit 512 that turns on the first switch for a predetermined period based on the current flowing through the diode element 515. According to this structure, by predetermining the period for turning on the first switch, the period during which signal transmission cannot be performed can be shortened as much as possible.

[0174] In the above switch control circuit, the diode element 515 is a diode-connected third transistor, the first transistor and the third transistor are composed of a plurality of transistors having the same channel direction, and the transistors constituting each of the first transistor and the third transistor are alternately arranged in a direction perpendicular to the channel direction. According to this structure, the characteristics of the first transistor and the third transistor are made the same, and the circuit operation can be stabilized.

[0175] In the above switch control circuit, a control circuit for controlling the first level shift circuit is further included, the drive circuit is formed in the high side region of the substrate, the control circuit is formed in the reference potential region, the reference potential region is electrically separated from the high side region by a high withstand voltage junction terminal region arranged around the high side region, and a plurality of transistors are formed in the high withstand voltage junction terminal region. According to this structure, interference between the drive circuit 14 and the control circuit 11 can be suppressed. Description of symbols

[0176] Semiconductor devices 1, 5 Switch control circuit 10 Control circuit 11 Level shift circuits 12, 13 Resistors 12r, 13r Transistors 12t, 13t Drain electrode 13d Source electrode 13s Driving circuit 14 n-channel MOSFET 141 p-channel MOSFET 142 IGBT 21, 22 Recirculation diodes 23, 24 Power supply 25, 26 Semiconductor substrate 100 High Side Area 101 High withstand voltage junction termination area 102 Reference potential region 103 VB terminal 105 VS terminal 106 HO terminal 107 GND terminal 108 HIN terminal 109 VCC terminal 110 N-type region 111 n － Type area 112 p － Type Area 113 P-type region 114 Contact area 115 Drift Zone 116 Drain region 117 Contact area 118 Source region 119 P-type region 120 Gate insulating film 122 Parasitic diodes 150, 151 Parasitic resistance 152 Parasitic transistor 153 Switch control circuit 50 On / off control circuit 51 Diode element 511 Circuit 512 Schmitt trigger circuit 513 NOT gate circuits 514, 516 Diode element 515 Switches 52, 53.

Claims

1. A switch control circuit controls the switching of a first switch element on a power supply side and a second switch element on a ground side for driving a load, wherein the switch control circuit is characterized in that it includes: A first level shift circuit, the first level shift circuit comprising a first resistor and a first transistor; a driving circuit that drives the first switching element based on an output from the first level shift circuit; a first switch connected in parallel with the first resistor; as well as An on / off control circuit turns on the first switch when the low potential side electrode of the first switch element becomes a negative voltage.

2. The switch control circuit according to claim 1, characterized in that: The second level shift circuit includes a second resistor and a second transistor. The first level shift circuit outputs a set signal for switching the first switch element from off to on, The second level shift circuit outputs a reset signal for switching the first switch element from on to off, The drive circuit drives the first switching element based on the set signal and the reset signal.

3. The switch control circuit according to claim 2, characterized in that: further comprising a second switch connected in parallel with the second resistor, When the low potential side electrode becomes a negative voltage, the on / off control circuit turns on the second switch.

4. The switch control circuit according to claim 3, characterized in that: The first transistor and the second transistor are n-channel MOS transistors, The first switch and the second switch are p-channel MOS transistors.

5. The switch control circuit according to claim 1, characterized in that: Also includes a control circuit for controlling the first level shift circuit, The driving circuit is formed in the high side region of the substrate, The control circuit is formed in a reference potential region which is electrically separated from the high-side region by a high withstand voltage junction termination region provided around the high-side region.

6. The switch control circuit according to claim 1, characterized in that: The on-off control circuit comprises: a diode element through which current flows when the low potential side electrode is at a negative voltage; and A signal output circuit outputs a signal for turning on the first switch over a predetermined period based on the current flowing through the diode element.

7. The switch control circuit according to claim 6, characterized in that: The diode element is a diode-connected third transistor, The first transistor and the third transistor are composed of a plurality of transistors having the same channel direction. Among the plurality of transistors, the transistors constituting each of the first transistor and the third transistor are alternately arranged in a direction perpendicular to the channel direction.

8. The switch control circuit according to claim 7, characterized in that: Also includes a control circuit for controlling the first level shift circuit, The driving circuit is formed in the high side region of the substrate, The control circuit is formed in a reference potential region, which is electrically separated from the high-side region by a high withstand voltage junction termination region provided around the high-side region. The plurality of transistors are formed in the high withstand voltage junction termination region.

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