Efficient TOPCon battery and preparation method thereof

Abstract

The invention provides an efficient TOPCon cell and a preparation method thereof, and relates to the technical field of solar cells, the cell comprises a substrate, a first surface of the substrate comprises a grid line area and a non-grid line area, the grid line area is provided with an ultrathin amorphous silicon layer, the ultrathin amorphous silicon layer is provided with a tunneling layer, the tunneling layer is provided with a first conductive type semiconductor area, and the first conductive type semiconductor area is provided with a second conductive type semiconductor area. The first conductive type semiconductor region is provided with a first passive film B. The first electrode passes through the first passive film B and is connected with the first conductive type semiconductor region. The non-grid line region is provided with a first passive film A and a first passive film B. The second surface of the substrate is provided with a second conductive type semiconductor region. The second conductive type semiconductor region is provided with a second passive film A and a second passive film B. The second passive film B is provided with a second electrode. According to the invention, the non-grid line area of the first surface is not provided with the first conductive type semiconductor area, so that the parasitic absorption loss of the first conductive type semiconductor area is reduced, and the photoelectric conversion efficiency of the cell is improved.

Description

Technical Field

[0001] The invention relates to the technical field of solar cells, and in particular to a high-efficiency TOPCon cell and a preparation method thereof. Background Art

[0002] With the continuous advancement of photovoltaic technology, the conversion efficiency of PERC cells is gradually approaching its theoretical limit. On the one hand, the back passivation effect of PERC cells is limited, and carrier recombination is still relatively serious; on the other hand, its structure and materials have difficulties in further improving light absorption and carrier transport. As a new generation of battery technology, TOPCon cells are gradually replacing PERC cells.

[0003] For example, a Chinese patent with the authorization announcement number CN220672591U discloses a double-sided TOPcon battery structure, which belongs to the field of TOPcon battery technology, including an N-type monocrystalline silicon wafer, the back of which is sequentially provided with a back tunneling oxide layer, a P-type doped polycrystalline silicon layer, a back passivation layer and a back metal electrode; the front of the N-type monocrystalline silicon wafer includes a metal area and a non-metal area, the metal area is sequentially provided with a front tunneling oxide layer, an N-type doped polycrystalline silicon layer, a front passivation layer and a front metal electrode, and the non-metal area is provided with a front passivation layer; the back metal electrode located on the back passes through the back passivation layer to form an ohmic contact with the P-type doped polycrystalline silicon layer; the front metal electrode located on the front passes through the front passivation layer to form an ohmic contact with the N-type doped polycrystalline silicon layer. The beneficial effects of the present application are: adopting a double-sided TOPcon battery structure and forming a local TOPcon structure in the front metal area, the conversion efficiency is improved compared with single-sided TOPcon batteries and batteries with a TOPcon structure on the front.

[0004] In conventional Topcon cells, the carrier transport process on the back side is:

[0005] a. Generation of photogenerated carriers: When sunlight shines on the TOPcon cell, the cell absorbs photon energy and generates electron-hole pairs in the n-type silicon substrate; in the absorption layer of the cell, the photogenerated electrons and holes are separated, and the electrons move toward the negative electrode (n-type region) of the cell, while the holes move toward the positive electrode (p-type region);

[0006] b. Entering the tunneling silicon oxide layer: The quantum tunneling effect allows electrons to pass through the barrier to the other side under the condition that the barrier height is greater than the particle energy;

[0007] c. Entering the phosphorus-doped poly layer: The electrons entering the doped polysilicon layer are transmitted in the lateral direction within the polysilicon layer. The doped atoms in the polysilicon layer provide a large number of free electrons, which move toward the electrode contact area of ​​the battery under the action of the electric field or due to the existence of the concentration gradient;

[0008] d. Collected by metal electrodes: When electrons are transferred to the metal electrode contact area on the back of the battery, the metal electrode collects these electrons to form a current, thus completing the carrier transfer process and realizing the conversion from light energy to electrical energy;

[0009] However, the doped poly layer will bring about the problem of parasitic absorption loss. Parasitic absorption loss refers to the phenomenon that during the operation of the battery, photons are not effectively absorbed and converted into electrical energy by the active area of ​​the battery (the area that generates photogenerated carriers and contributes to the battery output current), but are absorbed by other non-active area materials in the battery, resulting in energy loss. The parasitic absorption of light by the doped poly layer will reduce the number of photons reaching the active area of ​​the battery. Photogenerated carriers are the key factor in generating current. The reduction in their number will reduce the short-circuit current of the battery. Short-circuit current is one of the key parameters that determine the photoelectric conversion efficiency of solar cells. The reduction in short-circuit current will lead to a decrease in the photoelectric conversion efficiency of the battery. Summary of the invention

[0010] The present invention provides a high-efficiency TOPCon cell and a preparation method thereof, which are used to solve the technical problem that the parasitic absorption of light by the doped poly layer in the current TOPCon cell reduces the number of photons reaching the cell active area, thereby causing a decrease in the photoelectric conversion efficiency of the cell.

[0011] To solve the above technical problems, the present invention discloses a high-efficiency TOPCon battery, comprising: a substrate, wherein the first surface of the substrate comprises a gate line region and a non-gate line region, an ultra-thin amorphous silicon layer is arranged in the gate line region, a tunneling layer is arranged on the ultra-thin amorphous silicon layer, a first conductive type semiconductor region is arranged on the tunneling layer, a first passivation film B is arranged on the first conductive type semiconductor region, a first electrode passes through the first passivation film B and is connected to the first conductive type semiconductor region, a first passivation film A is arranged on the non-gate line region, a first passivation film B is arranged on the first passivation film A, a second conductive type semiconductor region is arranged on the second surface of the substrate, a second passivation film A is arranged on the second conductive type semiconductor region, a second passivation film B is arranged on the second passivation film A, a second electrode is arranged on the second passivation film B, and one end of the second electrode passes through the second passivation film B and the second passivation film A in sequence and is connected to the second conductive type semiconductor region.

[0012] Preferably, the width of the first conductive type semiconductor region is 1.2-1.8 times the width of the first electrode.

[0013] Preferably, the ultra-thin amorphous silicon layer has a thickness of 0.1-5 nm.

[0014] Preferably, the thickness of the first passivation film A and the second passivation film A is 0.1-6nm, the thickness of the first passivation film B and the second passivation film B is 40-100nm, the first passivation film A and the second passivation film A are aluminum oxide layers, the first passivation film B and the second passivation film B are single-layer films of silicon nitride film, hydrogenated silicon nitride film, silicon oxide film, silicon oxynitride film, magnesium fluoride MgF2, zinc sulfide ZnS, titanium dioxide TiO2 and cerium oxide CeO2, or a multilayer film structure composed of at least two layers of the above materials.

[0015] The present application also provides a method for preparing a high-efficiency TOPCon battery, which is used to prepare the above-mentioned high-efficiency TOPCon battery, comprising:

[0016] An ultra-thin amorphous silicon layer forming operation is performed to form an ultra-thin amorphous silicon layer in a gate line region on the first surface of the substrate;

[0017] a tunneling layer forming operation of forming a tunneling layer on the ultra-thin amorphous silicon layer;

[0018] A first conductive type semiconductor region forming operation is performed on the tunneling layer to form a first conductive type semiconductor region, wherein the first conductive type semiconductor region forming operation includes laser processing, wherein the laser processing includes any one of laser oxidation of the gate line region using a laser or modification of the non-gate line region using a laser, and further includes etching and cleaning the first surface of the substrate so that only the tunneling layer and the first conductive type semiconductor region are left in the gate line region to form a Poly finger structure;

[0019] A first passivation film A forming operation of forming a first passivation film A on a first surface of a substrate;

[0020] a first passivation film B forming operation of forming a first passivation film B on the first passivation film A;

[0021] A first electrode forming operation of forming a first electrode that passes through the first passivation film B, the first passivation film A and is connected to the first conductive type semiconductor region;

[0022] A second conductivity type semiconductor region forming operation of forming a second conductivity type semiconductor region on the second surface of the substrate;

[0023] a second passivation film A forming operation of forming a second passivation film A on the second conductive type semiconductor region;

[0024] a second passivation film B forming operation of forming a second passivation film B on the second passivation film A;

[0025] A second electrode forming operation of forming a second electrode that passes through the second passivation film B, the second passivation film A and is connected to the second conductive type semiconductor region.

[0026] Preferably, the operation of forming the first conductive type semiconductor region includes any one of the following methods: first preparing doped amorphous silicon and then annealing and crystallizing it into doped polysilicon; or first preparing undoped polysilicon and then doping it into doped polysilicon.

[0027] Preferably, the doping concentration of the first surface intrinsic amorphous silicon is 2E20cm -3 ~6E21cm -3 .

[0028] Preferably, the second conductive type semiconductor region is prepared by a diffusion process.

[0029] Preferably, the diffusion concentration of the intrinsic amorphous silicon on the second surface is 1E19cm -3 ~2E21cm -3 .

[0030] Preferably, the laser energy is 30-60W, and the laser spot size is 50-150um.

[0031] The technical solution of the present invention has the following advantages: The present invention provides a high-efficiency TOPCon cell and a preparation method thereof, which relates to the technical field of solar cells. The TOPCon cell comprises a substrate, a first surface of the substrate comprises a gate line region and a non-gate line region, an ultra-thin amorphous silicon layer is arranged in the gate line region, a tunneling layer is arranged on the ultra-thin amorphous silicon layer, a first conductive type semiconductor region is arranged on the tunneling layer, a first passivation film B is arranged on the first conductive type semiconductor region, a first electrode passes through the first passivation film B and is connected to the first conductive type semiconductor region, a first passivation film A is arranged on the non-gate line region, a first passivation film B is arranged on the first passivation film A, a second conductive type semiconductor region is arranged on the second surface of the substrate, a second passivation film A is arranged on the second conductive type semiconductor region, a second passivation film B is arranged on the second passivation film A, a second electrode is arranged on the second passivation film B, one end of the second electrode passes through the second passivation film B, the second passivation film A in sequence and is connected to the second conductive type semiconductor region. In the present invention, there is no first conductive type semiconductor region in the non-gate line region of the first surface, the parasitic absorption loss of the first conductive type semiconductor region is reduced, and the photoelectric conversion efficiency of the TOPCon cell is improved.

[0032] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the devices particularly pointed out in the written description and the drawings of the description.

[0033] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0035] Figure 1 This is a schematic diagram of the structure of a high-efficiency TOPCon battery of the present invention;

[0036] Figure 2 This is a schematic diagram of the structure of a cleaning device in a method for preparing a high-efficiency TOPCon battery according to the present invention;

[0037] Figure 3 This is a schematic diagram of the internal structure of a cleaning ring in a method for preparing a high-efficiency TOPCon battery according to the present invention;

[0038] Figure 4 For the present invention Figure 3 A magnified view of the structure at center;

[0039] Figure 5 A top view of a support plate in a method for preparing a high-efficiency TOPCon battery according to the present invention;

[0040] Figure 6 This is a bottom view of a cleaning ring in a method for preparing a high-efficiency TOPCon battery according to the present invention.

[0041] In the figure: 1, substrate; 2, ultra-thin amorphous silicon layer; 3, first passivation film A; 4, first passivation film B; 5, tunneling layer; 6, first conductive type semiconductor region; 7, first electrode; 8, second conductive type semiconductor region; 9, second passivation film A; 10, second passivation film B; 11, second electrode; 12, cleaning box; 13, conveyor belt; 14, liquid collecting box; 15, liquid inlet pipe; 16, joint; 17, delivery pipe; 18, driving motor; 19, first gear; 20, second gear; 21, cleaning ring; 22, liquid outlet hole; 23, connecting pipe; 24, support plate; 25, blocking block; 26, elastic baffle; 27, sealing ring; 28, fixing frame; 29, connecting column; 30, reset spring; 31, magnetic strip; 32, air collecting hood; 33, exhaust fan blade; 34, air collecting box; 35, air inlet pipe. DETAILED DESCRIPTION

[0042] The preferred embodiments of the present invention are described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present invention, and are not used to limit the present invention.

[0043] In addition, in the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes, and do not specifically refer to the order or sequence, nor are they used to limit the present invention. They are only used to distinguish components or operations described with the same technical terms, and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions and technical features between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0044] The embodiment of the present invention provides a high-efficiency TOPCon battery, such as Figure 1 As shown, it includes: a substrate 1, a first surface of the substrate 1 includes a gate line region and a non-gate line region, an ultra-thin amorphous silicon layer 2 is arranged in the gate line region, a tunneling layer 5 is arranged on the ultra-thin amorphous silicon layer 2, a first conductive type semiconductor region 6 is arranged on the tunneling layer 5, a first passivation film B4 is arranged on the first conductive type semiconductor region 6, a first electrode 7 passes through the first passivation film B4 and is connected to the first conductive type semiconductor region 6, a first passivation film A3 is arranged on the non-gate line region, a first passivation film B4 is arranged on the first passivation film A3, a second conductive type semiconductor region 8 is arranged on the second surface of the substrate 1, a second passivation film A9 is arranged on the second conductive type semiconductor region 8, a second passivation film B10 is arranged on the second passivation film A9, a second electrode 11 is arranged on the second passivation film B10, one end of the second electrode 11 passes through the second passivation film B10 and the second passivation film A9 in sequence and is connected to the second conductive type semiconductor region 8;

[0045] The width of the first conductive type semiconductor region 6 is 1.2-1.8 times the width of the first electrode 7;

[0046] The ultra-thin amorphous silicon layer 2 has a thickness of 0.1-5 nm;

[0047] The thickness of the first passivation film A3 and the second passivation film A9 is 0.1-6nm, the thickness of the first passivation film B4 and the second passivation film B10 is 40-100nm, the first passivation film A3 and the second passivation film A9 are aluminum oxide layers, the first passivation film B4 and the second passivation film B10 are single-layer films of silicon nitride film, hydrogen-containing silicon nitride film, silicon oxide film, silicon oxynitride film, magnesium fluoride MgF2, zinc sulfide ZnS, titanium dioxide TiO2 and cerium oxide CeO2, or a multilayer film structure composed of at least two layers of the above materials.

[0048] The working principle and beneficial effects of the above technical solution are as follows: the substrate 1 can be a silicon substrate 1, an ultra-thin amorphous silicon layer 2, a first passivation film A3, and a first passivation film B4 are sequentially arranged on the first surface of the substrate 1, the ultra-thin amorphous silicon layer 2 has a thickness of 0.1-5 nm, a plurality of openings are formed in the first passivation film A3 and the first passivation film B4, a tunneling layer 5 is arranged in the opening, the tunneling layer 5 is in contact with the ultra-thin amorphous silicon layer 2, a first conductive type semiconductor region 6 is arranged on the tunneling layer 5, a first electrode 7 is arranged on the first conductive type semiconductor region 6, wherein the width of the first conductive type semiconductor region 6 is 1.2-1.8 times the width of the first electrode 7, and the second conductive type semiconductor region 6 is sequentially arranged on the second surface of the substrate 1. The body region 8, the second passivation film A9, the second passivation film B10, the second electrode 11 is arranged on the second passivation film B10, one end of the second electrode 11 passes through the second passivation film B10 and the second passivation film A9 in sequence and contacts with the second conductive type semiconductor region 8, the thickness of the first passivation film A3 and the second passivation film A9 is 0.1-6nm, the thickness of the first passivation film B4 and the second passivation film B10 is 40-100nm; the first conductive type semiconductor region 6 is a doped poly layer, and in the present invention, the non-gate line area of ​​the first surface has no doped polysilicon layer, which reduces the parasitic absorption loss of the first conductive type semiconductor region 6 and improves the photoelectric conversion efficiency of the TOPCon battery.

[0049] The present application also provides a method for preparing a high-efficiency TOPCon battery, which is used to prepare the above-mentioned high-efficiency TOPCon battery, comprising:

[0050] An ultra-thin amorphous silicon layer 2 forming operation of forming an ultra-thin amorphous silicon layer 2 in a gate line region on a first surface of a substrate 1;

[0051] a tunneling layer 5 forming operation of forming a tunneling layer 5 on the ultra-thin amorphous silicon layer 2;

[0052] A first conductive type semiconductor region 6 forming operation is performed on the tunneling layer 5 to form a first conductive type semiconductor region 6, wherein the first conductive type semiconductor region 6 forming operation includes laser processing, wherein the laser processing includes any one of laser oxidation of the gate line region using a laser or modification of the non-gate line region using a laser, and further includes etching and cleaning the first surface of the substrate 1, so that only the tunneling layer 5 and the first conductive type semiconductor region 6 are left in the gate line region, thereby forming a Polyfinger structure;

[0053] A first passivation film A3 forming operation of forming a first passivation film A3 on a first surface of the substrate 1;

[0054] a first passivation film B4 forming operation of forming a first passivation film B4 on the first passivation film A3;

[0055] A first electrode 7 forming operation of forming a first electrode 7 that passes through the first passivation film B4 and the first passivation film A3 and is connected to the first conductive type semiconductor region 6;

[0056] A second conductive type semiconductor region 8 forming operation of forming a second conductive type semiconductor region 8 on the second surface of the substrate 1;

[0057] a second passivation film A9 forming operation of forming a second passivation film A9 on the second conductive type semiconductor region 8;

[0058] a second passivation film B10 forming operation of forming a second passivation film B10 on the second passivation film A9;

[0059] A second electrode 11 forming operation of forming the second electrode 11 that passes through the second passivation film B10 and the second passivation film A9 and is connected to the second conductive type semiconductor region 8;

[0060] The operation of forming the first conductive type semiconductor region 6 includes any one of the following methods: first preparing doped amorphous silicon, then annealing and crystallizing it into doped polysilicon, or first preparing non-doped polysilicon, then doping it into doped polysilicon.

[0061] The first surface intrinsic amorphous silicon is doped with a doping concentration of 2E20cm -3 ~6E21cm -3 , the doping element is any one of nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi);

[0062] The second conductive type semiconductor region 8 is prepared by a diffusion process;

[0063] The diffusion concentration of the second surface intrinsic amorphous silicon is 1E19cm -3 ~2E21cm -3 , the diffusion element is any one of boron (B), aluminum (Al), gallium (Ga), indium (In), and thallium (Tl);

[0064] The laser energy is 30-60W, and the laser spot size is 50-150um.

[0065] The working principle and beneficial effects of the above technical solution are as follows: when preparing a high-efficiency TOPCon cell, a substrate 1 is first prepared, and then an ultra-thin amorphous silicon layer 2, a tunneling layer 5, and a first conductive type semiconductor region 6 are sequentially prepared on the first surface of the substrate 1. The formation operation of the first conductive type semiconductor region 6 includes first preparing doped amorphous silicon, then annealing and crystallizing it into doped polycrystalline silicon, or first preparing non-doped polycrystalline silicon, and then doping it into doped polycrystalline silicon. The doping concentration of the intrinsic amorphous silicon on the first surface is 2E20cm -3 ~6E21cm -3, preferably 2E20cm -3 ~6E20cm -3 The doping element is any one of nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi), and then the first conductive type semiconductor region 6 is laser treated. The laser treatment includes laser oxidation of the gate line area or modification of the non-gate line area by laser. The modification of the non-gate line area by laser can make the doped poly layer loose and easier to be corroded. The laser energy is 30 to 60W, and the laser spot size is 50 to 150um. Then, the first surface of the substrate 1 is corroded. Cleaning is performed so that only the tunneling layer 5 and the first conductive type semiconductor region 6 are left in the gate line region to form a Polyfinger structure, and then a first passivation film A3 and a first passivation film B4 are prepared, and a first electrode 7 is prepared on the first conductive type semiconductor region 6; finally, a second conductive type semiconductor region 8, a second passivation film A9, a second passivation film B10, and a second electrode 11 are prepared on the second surface of the substrate 1. The second conductive type semiconductor region 8 is prepared by a diffusion process, and the diffusion concentration of boron diffusion in the intrinsic amorphous silicon on the second surface is 1E19cm -3 ~2E21cm -3 , preferably 1E19cm -3 ~2E20cm -3 , the diffusion element is any one of boron (B), aluminum (Al), gallium (Ga), indium (In), and thallium (Tl); in the present invention, by removing the doped poly layer and the tunneling layer 5 in the non-gate line area of ​​the first surface, the first surface non-gate line area is free of the first conductive type semiconductor region 6, thereby reducing the parasitic absorption loss of the first conductive type semiconductor region 6 and improving the photoelectric conversion efficiency of the TOPCon battery.

[0066] In one embodiment, Figure 2-Figure 6 As shown, the first surface is corroded and cleaned by a corrosive liquid. After the corrosion cleaning is completed, the substrate 1 is cleaned by a cleaning device to remove the residual corrosive liquid on the substrate 1. The cleaning device includes a cleaning box 12. A conveyor belt 13 is arranged in the cleaning box 12. Both ends of the conveyor belt 13 pass through the openings on the left and right sides of the cleaning box 12 respectively, extend to the outside of the cleaning box 12 and are driven by a first driving mechanism. A liquid collecting box 14 is arranged at the bottom of the cleaning box 12. The liquid collecting box 14 is located below the conveyor belt 13. A liquid inlet pipe 15 is rotatably arranged at the upper end of the cleaning box 12. The upper end of the liquid inlet pipe 15 is connected to the delivery pipe 17 through a joint 16. The lower end of the liquid inlet pipe 15 extends to the top of the conveyor belt 13 and is provided with a cleaning mechanism. A second driving mechanism is arranged on the cleaning box 12. The second driving mechanism is used to drive the liquid inlet pipe 15 to rotate.

[0067] The working principle and beneficial effects of the above technical solution are as follows: after the first surface is corroded and cleaned by the corrosive liquid, the corrosive liquid will remain on the first surface, making the adhesion and uniformity of the subsequent first passivation film A3 worse, thereby reducing the photoelectric conversion efficiency of the TOPCon cell. Therefore, it is necessary to use a cleaning device to clean the substrate 1 to remove the residual corrosive liquid on the substrate 1. Specifically, the substrate 1 after corrosion cleaning is placed on the conveyor belt 13, and the conveyor belt 13 drives the substrate 1 to move under the cleaning mechanism. The conveying pipe 17 conveys the cleaning liquid to the liquid inlet pipe 15 through the joint 16, and then the cleaning liquid is sprayed out through the cleaning mechanism. The cleaning liquid can clean the substrate 1, thereby removing the residual The remaining corrosive liquid and impurities flow into the liquid collecting box 14 with the cleaning liquid for collection, and the cleaning liquid is sprayed by the cleaning mechanism to clean the substrate 1, so that the surface of the substrate 1 will become cleaner, which provides a good foundation for the subsequent process and is conducive to the subsequent passivation process, thereby improving the battery performance and further improving the TOPCon battery efficiency. The second driving mechanism can drive the liquid inlet pipe 15 to rotate, thereby driving the cleaning mechanism to rotate, so that the cleaning liquid can be evenly sprinkled on the surface of the substrate 1, avoiding the occurrence of cleaning dead corners, improving the cleaning effect of the substrate 1, further removing impurities and residual corrosive liquid on the surface of the substrate 1, and improving the cleanliness of the surface of the substrate 1.

[0068] In one embodiment, Figure 2 As shown, the second driving mechanism includes a driving motor 18, a first gear 19 and a second gear 20. The driving motor 18 is arranged on the top of the cleaning box 12. The first gear 19 is arranged at the output end of the driving motor 18. The second gear 20 is arranged on the liquid inlet pipe 15. The first gear 19 is meshed with the second gear 20.

[0069] The working principle and beneficial effects of the above technical solution are as follows: starting the drive motor 18 can drive the first gear 19 to rotate, the rotation of the first gear 19 drives the second gear 20 to rotate, and the second gear 20 drives the liquid inlet pipe 15 to rotate at the top of the cleaning box 12, thereby driving the cleaning mechanism to rotate, so that the cleaning liquid is evenly sprinkled onto the surface of the substrate 1, thereby improving the cleaning effect.

[0070] In one embodiment, Figure 2 , Figure 3 As shown, the cleaning mechanism includes a cleaning ring 21, which is annular. A liquid inlet cavity is arranged inside the cleaning ring 21. A plurality of liquid outlet holes 22 are arranged on the bottom wall of the cleaning ring 21. The liquid outlet holes 22 are connected with the inside of the liquid inlet cavity. A plurality of connecting tubes 23 are arranged between the liquid inlet pipe 15 and the cleaning ring 21. One end of the connecting tube 23 is connected with the liquid inlet pipe 15, and the other end of the connecting tube 23 is connected with the inner wall of the cleaning ring 21.

[0071] The working principle and beneficial effects of the above technical solution are as follows: the cleaning liquid can flow into the connecting pipe 23 through the liquid inlet pipe 15, and then flow into the liquid inlet cavity of the cleaning ring 21 through the connecting pipe 23, and finally flow out from the liquid outlet hole 22 to spray onto the conveyor belt 13, thereby cleaning the substrate 1 passing through, removing impurities and residual corrosive liquid on the surface of the substrate 1, which is beneficial to the subsequent adhesion and uniformity of the first passivation film A3, thereby improving the photoelectric conversion efficiency of the TOPCon battery, and the rotation of the liquid inlet pipe 15 can drive the cleaning ring 21 to rotate through the connecting pipe 23, and when the cleaning ring 21 rotates, the liquid outlet hole 22 can rotate, so that the cleaning liquid sprayed from the liquid outlet hole 22 is evenly sprayed onto the surface of the substrate 1, avoiding continuous cleaning of a certain position of the substrate 1, improving the cleaning effect, achieving efficient cleaning of the substrate 1, and improving the cleaning efficiency, which is beneficial to the improvement of the TOPCon battery preparation efficiency.

[0072] In one embodiment, Figure 2 , Figure 3 As shown, a support plate 24 is provided at the bottom of the cleaning ring 21, and the support plate 24 is connected to the inner wall of the cleaning box 12 through a fixing plate. The support plate 24 is arc-shaped, and the upper surface of the support plate 24 is adapted to the bottom wall of the cleaning ring 21, and the upper surface of the support plate 24 is slidably connected to the bottom wall of the cleaning ring 21.

[0073] The working principle and beneficial effects of the above technical solution are as follows: in order to avoid repeated cleaning of the substrate 1 and waste of cleaning liquid, a support plate 24 is arranged at the bottom of the cleaning ring 21, and the support plate 24 is arc-shaped. The upper surface of the support plate 24 is adapted to the bottom wall of the cleaning ring 21. When the cleaning ring 21 rotates, the support plate 24 blocks the lower surface of the cleaning ring 21, so that the liquid outlet 22 at the blocked position of the cleaning ring 21 cannot spray out the cleaning liquid, while the unblocked liquid outlet 22 can spray out the cleaning liquid, thereby performing a single cleaning on the substrate 1, thereby reducing the use of the cleaning liquid while ensuring the cleaning effect, and saving the preparation cost.

[0074] In one embodiment, Figure 2-Figure 6As shown, a blocking mechanism is arranged in the cleaning ring 21, and the blocking mechanism corresponds to the liquid outlet hole 22 one by one. The blocking mechanism includes a blocking block 25, which is made of magnetic material. A through hole is arranged in the center of the blocking block 25, and a plurality of elastic baffles 26 are arranged at the lower position of the through hole. The elastic baffles 26 are used to block the through hole. A sealing groove is arranged on the outer side of the blocking block 25, and a sealing ring 27 is arranged in the sealing groove. A fixing frame 28 is arranged on the upper surface of the blocking block 25, and the lower end of the fixing frame 28 is connected to the upper surface of the blocking block 25. A sliding hole is arranged on the upper end of the fixing frame 28, and a connecting column 29 is slidably arranged in the sliding hole. The upper end of the connecting column 29 is connected to the top wall of the liquid inlet cavity, and the lower end of the connecting column 29 extends to the bottom of the sliding hole and is provided with a limit plate. A reset spring 30 is sleeved on the connecting column 29, and one end of the reset spring 30 is connected to the top wall of the liquid inlet cavity, and the other end of the reset spring 30 is connected to the upper end of the fixing frame 28. A magnetic strip 31 is arranged on the upper surface of the support plate 24, and the magnetic strip 31 is in an arc shape.

[0075] The working principle and beneficial effects of the above technical solution are as follows: the magnetic strip 31 is magnetic. When the block 25 rotates to the top of the magnetic strip 31, the block 25 is made of magnetic material. Preferably, the block 25 is made of metal iron. The block 25 can be attracted by the magnetic strip 31 and move into the liquid outlet 22. The block 25 drives the fixing frame 28 to slide downward along the connecting column 29. The reset spring 30 is stretched, and the block 25 can block the liquid outlet 22 to prevent the cleaning liquid from flowing out of the liquid outlet 22, thereby reducing the waste of the cleaning liquid. A sealing ring 27 is provided on the outside of the block 25 to improve the sealing performance of the block 25 and the sealing effect on the liquid outlet 22. The block 25 moves along the liquid outlet During the sliding movement of the inner wall of the hole 22, due to the residual cleaning liquid in the liquid outlet hole 22, the residual cleaning liquid can push the elastic baffle 26 upward, thereby flowing back into the liquid inlet cavity, and then the elastic baffle 26 returns to its original position under the action of elastic force, thereby sealing the through hole; when the block 25 rotates to the outside of the support plate 24 with the cleaning ring 21, the block 25 loses the attraction of the magnetic strip 31, and under the action of the reset spring 30, the block 25 returns to its original position, so that the liquid outlet hole 22 is opened, and the cleaning liquid in the liquid inlet cavity can be evenly sprayed onto the substrate 1 through the liquid outlet hole 22, while avoiding the waste of cleaning liquid, achieving efficient cleaning of the substrate 1, which is beneficial to the improvement of the efficiency of TOPCon battery preparation.

[0076] In one embodiment, Figure 2 As shown, an air collecting hood 32 is arranged outside the liquid inlet pipe 15, and the air collecting hood 32 is funnel-shaped. The diameter of the lower end of the air collecting hood 32 is larger than the diameter of the upper end of the air collecting hood 32. The outer wall of the lower end of the air collecting hood 32 is connected to the inner wall of the cleaning box 12, and an air collecting cavity is formed at the upper end of the air collecting hood 32. An exhaust fan blade 33 is arranged on the outer wall of the liquid inlet pipe 15, and the exhaust fan blade 33 is located in the air collecting cavity. An air collecting box 34 is arranged on the side wall of the cleaning box 12, and the absorption liquid is stored in the air collecting box 34. The air collecting box 34 is connected to the inside of the air collecting cavity through the air inlet pipe 35. The air inlet pipe 35 is in an inverted L shape, and one end of the air inlet pipe 35 is inserted into the absorption liquid.

[0077] The working principle and beneficial effects of the above technical scheme are as follows: when the liquid inlet pipe 15 rotates, it can drive the exhaust fan blades 33 to rotate. The rotation of the exhaust fan blades 33 can make the gas under the gas collecting hood 32 flow into the gas collecting cavity through the gas collecting hood 32, and then flow into the gas collecting box 34 through the air inlet pipe 35. Part of the gas can be absorbed by the absorption liquid, and the other part of the gas is stored in the gas collecting box 34. Through the above scheme, harmful gases generated during the cleaning process can be removed, and harmful gases can be prevented from flowing into the external working environment, thereby protecting the working environment and improving the safety of the staff.

[0078] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0079] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection, an electrical connection, or communication with each other; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0080] Although the embodiments of the present invention have been disclosed as above, they are not limited to the applications listed in the specification and the implementation methods. They can be fully applied to various fields suitable for the present invention. For those familiar with the art, additional modifications can be easily implemented. Therefore, without departing from the general concept defined by the claims and the scope of equivalents, the present invention is not limited to the specific details and the illustrations shown and described herein.

Claims

1. A high-efficiency TOPCon battery, characterized in that: include: A substrate (1), wherein a first surface of the substrate (1) comprises a gate line region and a non-gate line region, an ultra-thin amorphous silicon layer (2) is provided in the gate line region, a tunneling layer (5) is provided on the ultra-thin amorphous silicon layer (2), a first conductive type semiconductor region (6) is provided on the tunneling layer (5), a first passivation film B (4) is provided on the first conductive type semiconductor region (6), a first electrode (7) passes through the first passivation film B (4) and is connected to the first conductive type semiconductor region (6), a first passivation film A (3) is provided on the non-gate line region, and a first A first passivation film B (4) is arranged on the passivation film A (3), a second conductive type semiconductor region (8) is arranged on the second surface of the substrate (1), a second passivation film A (9) is arranged on the second conductive type semiconductor region (8), a second passivation film B (10) is arranged on the second passivation film A (9), a second electrode (11) is arranged on the second passivation film B (10), and one end of the second electrode (11) passes through the second passivation film B (10) and the second passivation film A (9) in sequence and is connected to the second conductive type semiconductor region (8).

2. A high-efficiency TOPCon battery according to claim 1, characterized in that: The width of the first conductive type semiconductor region (6) is 1.2-1.8 times the width of the first electrode (7).

3. A high-efficiency TOPCon battery according to claim 1, characterized in that: The thickness of the ultra-thin amorphous silicon layer (2) is 0.1-5 nm.

4. A high-efficiency TOPCon battery according to claim 1, characterized in that: The thickness of the first passivation film A (3) and the second passivation film A (9) is 0.1-6 nm, the thickness of the first passivation film B (4) and the second passivation film B (10) is 40-100 nm, the first passivation film A (3) and the second passivation film A (9) are aluminum oxide layers, the first passivation film B (4) and the second passivation film B (10) are single-layer films of silicon nitride film, hydrogenated silicon nitride film, silicon oxide film, silicon oxynitride film, magnesium fluoride MgF2, zinc sulfide ZnS, titanium dioxide TiO2 and cerium oxide CeO2, or a multilayer film structure composed of at least two layers of the above materials.

5. A method for preparing a high-efficiency TOPCon battery, for preparing a high-efficiency TOPCon battery as claimed in any one of claims 1 to 4, characterized in that: include: An ultra-thin amorphous silicon layer (2) is formed in a gate line region of a first surface of a substrate (1); A tunneling layer (5) forming operation of forming a tunneling layer (5) on the ultra-thin amorphous silicon layer (2); A first conductive type semiconductor region (6) forming operation is performed on the tunneling layer (5), wherein the first conductive type semiconductor region (6) is formed, and the first conductive type semiconductor region (6) forming operation includes laser processing, wherein the laser processing includes any one of laser oxidation of the gate line region or modification of the non-gate line region by laser, and also includes etching and cleaning the first surface of the substrate (1), so that only the tunneling layer (5) and the first conductive type semiconductor region (6) are left in the gate line region, thereby forming a Poly finger structure; a first passivation film A(3) forming operation of forming a first passivation film A(3) on a first surface of a substrate (1); A first passivation film B (4) forming operation of forming a first passivation film B (4) on the first passivation film A (3); A first electrode (7) forming operation of forming a first electrode (7) that passes through the first passivation film B (4) and the first passivation film A (3) and is connected to the first conductive type semiconductor region (6); A second conductive type semiconductor region (8) forming operation of forming a second conductive type semiconductor region (8) on the second surface of the substrate (1); a second passivation film A (9) forming operation of forming a second passivation film A (9) on the second conductivity type semiconductor region (8); a second passivation film B (10) forming operation of forming a second passivation film B (10) on the second passivation film A (9); A second electrode (11) forming operation is performed to form a second electrode (11) that passes through the second passivation film B (10) and the second passivation film A (9) and is connected to the second conductive type semiconductor region (8).

6. A method for preparing a high-efficiency TOPCon battery according to claim 5, characterized in that: The operation of forming the first conductive type semiconductor region (6) includes any one of the following methods: first preparing doped amorphous silicon and then annealing and crystallizing it into doped polysilicon, or first preparing non-doped polysilicon and then doping it into doped polysilicon.

7. A method for preparing a high-efficiency TOPCon battery according to claim 6, characterized in that: The first surface intrinsic amorphous silicon is doped with a doping concentration of 2E20cm -3 ~6E21cm -3 .

8. The method for preparing a high-efficiency TOPCon battery according to claim 5, characterized in that: The second conductive type semiconductor region (8) is prepared by a diffusion process.

9. A method for preparing a high-efficiency TOPCon battery according to claim 8, characterized in that: The diffusion concentration of the second surface intrinsic amorphous silicon is 1E19cm -3 ~2E21cm -3 .

10. The method for preparing a high-efficiency TOPCon battery according to claim 5, characterized in that: The laser energy is 30-60W, and the laser spot size is 50-150um.

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