Solar cell and manufacturing method thereof

Abstract

The invention relates to a solar cell and a manufacturing method thereof. The solar cell comprises a substrate, a first electrode and a second electrode, the front surface of the substrate comprises a first metallization region and a first non-metallization region, the first metallization region is provided with a first pyramid structure, the first non-metallization region is provided with a second pyramid structure, the spire of the first pyramid structure is higher than that of the second pyramid structure, and the first metallization region is provided with a first diffusion doping region; the back surface of the substrate comprises a second metallization region and a second non-metallization region, a tunneling layer and a semiconductor doping layer are sequentially laminated on one side, far away from the substrate, of the second metallization region, and the second non-metallization region is provided with a third pyramid structure; the first electrode is arranged in the first metallization region, and the first electrode is electrically connected with the first diffusion doping region; and the second electrode is arranged in the second metallization region and is electrically connected with the semiconductor doping layer. The short-circuit current output and the overall photoelectric conversion efficiency of the cell are improved, and the double-sided rate of the cell is improved.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a solar cell and a method for manufacturing the same. Background Art

[0002] Tunnel Oxide Passivated Contact (TOPCON) cells are the mainstream cells in the photovoltaic field. How to reduce the reflected light loss of TOPCON cells, improve the photoelectric conversion efficiency of TOPCON cells, and improve the power generation capacity of TOPCON cells are important topics in the research and development of TOPCON cells. Summary of the invention

[0003] Based on this, it is necessary to provide a solar cell and a method for manufacturing the same in order to solve the problem of reflected light loss of TOPCON cells in the prior art.

[0004] In order to achieve the above objectives, in a first aspect, the present application provides a solar cell, comprising:

[0005] A substrate, wherein the front side of the substrate comprises alternating first metallized regions and first non-metallized regions, the first metallized regions have a first pyramid structure, the first non-metallized regions have a second pyramid structure, the top of the first pyramid structure is higher than the top of the second pyramid structure from the back side of the substrate to the front side of the substrate, and the first metallized regions have a first diffuse doped region; the back side of the substrate comprises alternating second metallized regions and second non-metallized regions, a tunneling layer and a semiconductor doping layer are sequentially stacked on the side of the second metallized regions away from the substrate, and the second non-metallized regions have a third pyramid structure;

[0006] A first electrode is disposed in the first metallization region, and the first electrode is electrically connected to the first diffuse doping region;

[0007] The second electrode is arranged in the second metallization area, and the second electrode is electrically connected to the semiconductor doping layer.

[0008] Optionally, it also includes:

[0009] A front passivation layer, disposed on the front side of the substrate, the front passivation layer covers the first diffuse doping region of the first metallization region and the substrate of the first non-metallization region;

[0010] A back passivation layer is disposed on the back side of the substrate, and the back passivation layer covers the semiconductor doping layer in the second metallization area and the substrate in the second non-metallization area.

[0011] Optionally, a projection of the first metallized area on the substrate overlaps with a projection of the second non-metallized area on the substrate, and a projection of the first non-metallized area on the substrate overlaps with a projection of the second metallized area on the substrate.

[0012] Optionally, the width of the first metallized area is 80 μm-300 μm, the width of the first non-metallized area is 450 μm-900 μm, the width of the second metallized area is 80 μm-300 μm, and the width of the second non-metallized area is 450 μm-900 μm.

[0013] Optionally, a ratio of a width of the first metallized area to a width of the first non-metallized area is 1:1-9, and a ratio of a width of the first metallized area to a width of the second non-metallized area is 1:1-9.

[0014] Optionally, the size of the base of the first pyramid structure is greater than the size of the base of the second pyramid structure, and the height of the first pyramid structure is greater than the height of the second pyramid structure.

[0015] Optionally, the size of the base of the third pyramid structure is 0.5 μm-4 μm, and the height of the third pyramid structure is 0.5 μm-3 μm.

[0016] In a second aspect, the present disclosure provides a method for manufacturing a solar cell, comprising:

[0017] Providing a substrate, and texturing a front surface of the substrate to form a first pyramid structure;

[0018] forming an initial doping region on the front surface of the substrate;

[0019] Part of the initial doping region is removed at intervals, the area of ​​the initial doping region retained is used as a first metallized region, the area of ​​the initial doping region removed is used as a first non-metallized region, and the first non-metallized region is textured to form a second pyramid structure in the first non-metallized region, and the top of the first pyramid structure is higher than the top of the second pyramid structure in the direction from the back side of the substrate to the front side of the substrate;

[0020] Pushing the initial doped region to form a first diffused doped region in the first pyramid structure;

[0021] forming a tunneling layer, an intrinsic semiconductor layer and a second silicon glass layer in sequence on the back side of the substrate;

[0022] doping the intrinsic semiconductor layer to form a semiconductor doping layer;

[0023] removing portions of the tunneling layer, the semiconductor doping layer and the second silicon glass layer stacked on the back side of the substrate at intervals, wherein the regions where the tunneling layer, the semiconductor doping layer and the second silicon glass layer are retained serve as second metallization regions, and the regions where the tunneling layer, the semiconductor doping layer and the second silicon glass layer are removed serve as second non-metallization regions;

[0024] Texturing the second non-metallized area to form a third pyramid structure in the second non-metallized area;

[0025] removing the second silicon glass layer from the second metallization region;

[0026] Forming a front passivation layer covering the first diffusion doped region of the first metallization region and the substrate of the first non-metallization region, and forming a back passivation layer covering the semiconductor doped layer of the second metallization region and the substrate of the second non-metallization region;

[0027] forming a first electrode on the first metallization region, wherein the first electrode is electrically connected to the first diffuse doping region;

[0028] A second electrode is formed on the second metallization region, and the second electrode is electrically connected to the semiconductor doping layer.

[0029] Optionally, removing a portion of the initial doping region at intervals comprises: irradiating the initial doping region of the first non-metallized region with a laser, then texturing the first non-metallized region to remove the initial doping region of the first non-metallized region, and forming the second pyramid structure in the first non-metallized region;

[0030] The method comprises the following steps of: removing a portion of the tunneling layer, the semiconductor doping layer and the second silicon glass layer stacked on the back side of the substrate at intervals, comprising: laser irradiation of the tunneling layer, the semiconductor doping layer and the second silicon glass layer in the second non-metallized area, acid pickling to remove the second silicon glass layer in the second non-metallized area, and texturing the second non-metallized area to remove the tunneling layer and the semiconductor doping layer in the second non-metallized area.

[0031] Optionally, after the initial doping region is pushed, an oxide layer is formed on the surface of the first non-metallized region, and a first silicon glass layer is formed on a side of the first diffuse doping region away from the substrate;

[0032] The tunneling layer and the semiconductor doping layer of the second non-metallized region are removed while the oxide layer and the first silicon glass layer are removed.

[0033] The solar cell and its manufacturing method of the present application reduce the reflected light loss on the front side by arranging a first pyramid structure in the first metallized area on the front side and a second pyramid structure in the first non-metallized area, and making the first pyramid structure higher than the second pyramid structure. The reflected light loss on the back side is reduced by arranging a third pyramid structure in the second non-metallized area on the back side, thereby improving the short-circuit current output and the overall photoelectric conversion efficiency of the solar cell and improving the bifaciality of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 is a schematic structural diagram of a solar cell provided in an embodiment;

[0036] Figure 2 is a process flow chart of a method for manufacturing a solar cell provided in an embodiment;

[0037] Figure 3 is a schematic diagram of a substrate in one embodiment;

[0038] Figure 4 It is a schematic diagram of forming a first pyramid structure on the front side of the substrate by texturing the substrate in one embodiment;

[0039] Figure 5 is a schematic diagram of an embodiment after an initial doping region is formed in a first pyramid structure;

[0040] Figure 6 is a schematic diagram of an initial doping region of a first non-metallized region after laser irradiation in one embodiment;

[0041] Figure 7 is a schematic diagram of an embodiment after removing the initial doping region of the first non-metallized region and forming a second pyramid structure in the first non-metallized region;

[0042] Figure 8 A schematic diagram of an embodiment after an oxide layer and a first silicon glass layer are formed to protect the front surface of a substrate;

[0043] Fig. 9 is a schematic diagram of a back side of a substrate after polishing in one embodiment;

[0044] Fig.10is a schematic diagram of an embodiment after a tunneling layer, an intrinsic semiconductor layer and a second silicon glass layer are sequentially formed on the back side of a substrate;

[0045] Fig.11 is a schematic diagram of an embodiment after an intrinsic semiconductor layer is doped to form a semiconductor doping layer;

[0046] Fig.12 is a schematic diagram of the second silicon glass layer in the second non-metallized area after laser irradiation in one embodiment;

[0047] Fig.13 It is a schematic diagram of an embodiment in which the tunneling layer, the semiconductor doping layer and the second silicon glass layer of the second non-metallized area are removed and the second non-metallized area is textured to form a third pyramid structure;

[0048] Fig.14 FIG. 1 is a schematic diagram after forming a front passivation layer and a back passivation layer in one embodiment.

[0049] Description of reference numerals:

[0050] 20. substrate; 31. first pyramid structure; 32. second pyramid structure; 33. third pyramid structure; 41. first diffused doped region; 41a. initial doped region; 42. front passivation layer; 421. first front passivation layer; 422. second front passivation layer; 43. oxide layer; 44. first silicon glass layer; 50. first electrode; 61. tunneling layer; 62. semiconductor doping layer; 62a. intrinsic semiconductor layer; 63. second silicon glass layer; 64. back passivation layer; 641. first back passivation layer; 642. second back passivation layer; 70. second electrode; A1. first metallization region; B1. first non-metallization region; A2. second metallization region; B2. second non-metallization region. DETAILED DESCRIPTION

[0051] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0053] At present, the back of TOPCon cells is polished to reduce defects on the back of the cells and make the back smooth. However, the back polishing also causes some light to be reflected on the back of the cells, which cannot be captured by the cells and converted into electrical energy, exacerbating the loss of reflected light and weakening the short-circuit current output and overall photoelectric conversion efficiency of TOPCon cells. More importantly, the back polishing design limits the bifacial power generation capacity of the cells, making the performance of TOPCon cells under bifacial illumination conditions unsatisfactory, and the bifaciality of TOPCon cells is also restricted.

[0054] The bifaciality, or the ratio of the power generation efficiency of the back and front of the cell, is an important indicator for measuring the power generation performance of the cell under different lighting conditions, especially when the back is also illuminated. The increase in reflected light loss means that the back receives less light energy, thereby reducing the power generation efficiency of the back and further lowering the overall bifaciality of the cell.

[0055] In view of this, the present application provides a solar cell, which may be a TOPCon cell, such as Figure 1 As shown, the solar cell includes a substrate 20, a first electrode 50 and a second electrode 70; the substrate 20 may be a silicon substrate, and the substrate 20 may be doped with N-type conductive ions; the front side of the substrate 20 includes an alternating first metallized area A1 and a first non-metallized area B1, the first metallized area A1 has a first pyramid structure 31, the first non-metallized area B1 has a second pyramid structure 32, the top of the first pyramid structure 31 is higher than the top of the second pyramid structure 32 in the direction Y from the back side of the substrate 20 to the front side of the substrate 20, and the first metallized area A1 has a first diffuse doping area 41, wherein the direction Y is the thickness direction of the substrate 20. It can be understood that the substrate 20 has a plane XX, the plane XX is located inside the substrate 20 and the plane X is perpendicular to the direction Y, and along the direction Y, the plane XX is located between the front side and the back side of the substrate 20. The distance between the top of the first pyramid structure 31 and the plane XX is greater than the distance between the tops of the second pyramid structures 32. The back side of the substrate 20 includes alternating second metallized areas A2 and second non-metallized areas B2, a tunneling layer 61 and a semiconductor doping layer 62 are sequentially stacked on the side of the second metallized area A2 away from the substrate 20, and the second non-metallized area B2 has a third pyramid structure 33; the first electrode 50 is arranged in the first metallized area A1, and the first electrode 50 is electrically connected to the first diffuse doped area 41; the second electrode 70 is arranged in the second metallized area A2, and the second electrode 70 is electrically connected to the semiconductor doping layer 62.

[0056] The front side of the substrate 20 includes alternating first metallized areas A1 and first non-metallized areas B1, and the first pyramid structure 31 and the second pyramid structure 32 are respectively formed in the first metallized areas A1 and the first non-metallized areas B1, that is, the first metallized areas A1 and the first non-metallized areas B1 are both pyramid structures to reduce light reflection on the front side of the battery.

[0057] In the direction Y from the back side of the substrate 20 to the front side of the substrate 20, the top of the second pyramid structure 32 is lower than the top of the first pyramid structure 31, so that part of the light reflected by the second pyramid structure 32 is reflected to the first pyramid structure 31, absorbed by the first pyramid structure 31 and then converted into electrical energy, thereby improving the ability of the front side of the battery to capture light, reducing the loss of reflected light on the front side of the battery, converting more light energy into the battery, and improving the short-circuit current output of the solar cell and the overall photoelectric conversion efficiency.

[0058] Furthermore, in the direction Y from the back side of the substrate 20 to the front side of the substrate 20, the top of the second pyramid structure 32 can be lower than the base of the first pyramid structure 31. In this way, the light reflected from the second pyramid structure 32 to the first pyramid structure 31 can be increased, and the reflected light loss on the front side of the battery can be reduced.

[0059] The first pyramid structure 31 is formed with a first diffuse doping region 41, which may be a doping region of P-type conductive ions, and forms a PN junction with the substrate 20. The first electrode 50 is disposed on a side of the first metallization region A1 away from the substrate 20, and the first electrode 50 is electrically connected to the first diffuse doping region 41 to form a current path.

[0060] The back side of the substrate 20 includes alternating second metallized areas A2 and second non-metallized areas B2. The second non-metallized areas B2 have a third pyramid structure 33. The third pyramid structure 33 can reduce the reflected light loss of the second non-metallized areas B2. More light irradiated to the back side of the cell is converted into the cell, thereby improving the short-circuit current output of the solar cell and the overall photoelectric conversion efficiency, thereby improving the bifaciality of the solar cell.

[0061] For example, the size of the tower base of the third pyramid structure 33 is 0.5 μm-4 μm, and the tower height of the third pyramid structure 33 is 0.5 μm-3 μm. For example, the size of the tower base of the third pyramid structure 33 can be 0.5 μm, 0.8 μm, 1 μm, 1.5 μm, 1.8 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm or 4 μm; the tower height of the third pyramid structure 33 can be 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm or 3 μm.

[0062] A tunneling layer 61 and a semiconductor doping layer 62 are stacked on the side of the second metallization area A2 away from the substrate 20. The semiconductor doping layer 62 may be an intrinsic semiconductor layer 62a with N-type conductive doping. For example, the semiconductor doping layer 62 may be an n-poly layer. The second electrode 70 is electrically connected to the semiconductor doping layer 62 to form a current path.

[0063] The solar cell of this embodiment reduces the reflected light loss on the front side by arranging the first pyramid structure 31 in the first metallized area A1 on the front side, and the second pyramid structure 32 in the first non-metallized area B1, and making the first pyramid structure 31 higher than the second pyramid structure 32. The reflected light loss on the back side is reduced by arranging the third pyramid structure 33 in the second non-metallized area B2 on the back side, thereby improving the short-circuit current output and the overall photoelectric conversion efficiency of the solar cell, and improving the bifaciality of the solar cell.

[0064] In some embodiments, Figure 1 As shown, the surface layer of the first non-metallized area B1 is the substrate 20, and there is no first diffuse doping area 41. That is, the front side of the battery only has the first diffuse doping area 41 formed in the first metallized area A1, and the PN junction only exists in the first metallized area A1, which helps to reduce the minority carrier life loss of the battery caused by Auger recombination and improve the photoelectric conversion efficiency of the battery.

[0065] Auger recombination is a non-radiative recombination process and the reverse process of "impact ionization". In solar cells, when the majority carrier and the minority carrier recombine, the majority carrier or the minority carrier will transfer energy or momentum to another minority carrier or majority carrier through collision, causing the majority carrier or the minority carrier to undergo transition.

[0066] In some embodiments, Figure 1 As shown, the solar cell further includes a front passivation layer 42, which is disposed on the front side of the substrate 20. The front passivation layer 42 covers the first diffuse doping region 41 of the first metallization region A1 and the substrate 20 of the first non-metallization region B1. The front passivation layer 42 is used to protect the front side of the solar cell, reduce surface recombination losses, and improve the photoelectric conversion efficiency and stability of the solar cell.

[0067] Front passivation layer 42 may include at least one of an aluminum oxide layer, a silicon oxide layer, and a silicon nitride layer, or may include a stacked plurality of layers.

[0068] For example, the front passivation layer 42 may include a first front passivation layer 421 and a second front passivation layer 422 sequentially stacked on the front of the substrate 20, the first front passivation layer 421 is an aluminum oxide layer, and the second front passivation layer 422 is a silicon nitride layer. The aluminum oxide layer can effectively prevent the erosion of the battery interior by impurities and moisture in the external environment. At the same time, aluminum oxide can also reduce the number of dangling bonds on the surface of the substrate 20, thereby reducing the surface recombination rate and improving the open circuit voltage and short circuit current of the battery. The aluminum oxide layer also has good light transmittance and reduces the light transmission loss on the front. The silicon nitride layer has good light transmittance and anti-reflection ability, which can reduce the light transmission loss and refraction light loss on the front of the battery. The silicon nitride layer also has good insulation performance and corrosion resistance, which can further reduce the recombination loss on the surface of the substrate 20, so that more light irradiated to the front of the substrate 20 can be absorbed by the solar cell and converted into electrical energy.

[0069] like Figure 1 As shown, the solar cell further includes a back passivation layer 64, which is disposed on the back side of the substrate 20, and covers the semiconductor doping layer 62 of the second metallization area A2 and the substrate 20 of the second non-metallization area B2.

[0070] That is, in this embodiment, the bottom of the second metallized area A2 is sequentially stacked with a tunneling layer 61, a semiconductor doping layer 62 and a back passivation layer 64, and the bottom of the second non-metallized area B2 is only provided with a back passivation layer 64. In this way, the electrical performance of the second non-metallized area B2 can be ensured to be stable, and unnecessary current leakage or interference can be avoided.

[0071] The back passivation layer 64 may include at least one of an aluminum oxide layer, a silicon oxide layer, and a silicon nitride layer, or the back passivation layer 64 may include a stacked plurality of layers.

[0072] For example, the back passivation layer 64 includes a first back passivation layer 641 and a second back passivation layer 642 sequentially stacked on the back side of the substrate 20 , the first back passivation layer 641 is an aluminum oxide layer, and the second back passivation layer 642 is a silicon nitride layer.

[0073] In some embodiments, Figure 1 As shown, there is an overlapping area between the projection of the first metallized area A1 on the substrate 20 and the projection of the second non-metallized area B2 on the substrate 20, and there is an overlapping area between the projection of the first non-metallized area B1 on the substrate 20 and the projection of the second metallized area A2 on the substrate 20.

[0074] In this way, the charge recombination loss caused by the metallized electrode can be reduced. At the same time, the first non-metallized area B1 and the second non-metallized area B2 can absorb light more effectively and convert it into current, while the first metallized area A1 and the second metallized area A2 help to collect these currents, reduce losses, and optimize the light absorption performance of the solar cell.

[0075] In some embodiments, Figure 1 As shown, the projection formed by the first metallized area A1 on the substrate 20 falls within the range of the projection formed by the second non-metallized area B2 on the substrate 20; the projection formed by the second metallized area A2 on the substrate 20 falls within the range of the projection formed by the first non-metallized area B1 on the substrate 20. In this way, the recombination loss can be reduced, the charge collection can be optimized, and the light absorption performance and reliability of the solar cell can be improved.

[0076] In some embodiments, the projection of the first metallized area A1 on the substrate 20 overlaps with the projection of the second non-metallized area B2 on the substrate 20 , and the projection of the first non-metallized area B1 on the substrate 20 overlaps with the projection of the second metallized area A2 on the substrate 20 .

[0077] In some embodiments, Figure 1 As shown, the width of the first metallized area A1 is 80μm-300μm. By way of example, the width of the first metallized area A1 may be 80μm, 100μm, 120μm, 150μm, 200μm, 220μm, 250μm, 280μm or 300μm; the width of the first non-metallized area B1 is 450μm-900μm. By way of example, the width of the first non-metallized area B1 may be 450μm, 480μm, 500μm, 550μm, 600μm, 650μm, 700μm, 750μm, 800μm, 850μm or 900μm.

[0078] The width of the second metallized area A2 is 80μm-300μm. For example, the width of the second metallized area A2 can be 80μm, 100μm, 120μm, 150μm, 200μm, 220μm, 250μm, 280μm or 300μm; the width of the second non-metallized area B2 is 450μm-900μm. For example, the width of the second non-metallized area B2 can be 450μm, 480μm, 500μm, 550μm, 600μm, 650μm, 700μm, 750μm, 800μm, 850μm or 900μm.

[0079] It should be noted that although the width ranges of the first metallized area A1 and the second metallized area A2 are the same, the widths of the first metallized area A1 and the second metallized area A2 may be different; similarly, the widths of the first non-metallized area B1 and the second non-metallized area B2 may be different.

[0080] In some embodiments, the ratio of the width of the first metallized area A1 to the width of the first non-metallized area B1 is 1: 1-9. For example, the ratio of the width of the first metallized area A1 to the width of the first non-metallized area B1 can be 1: 1, 1: 2, 1: 3, 1: 4, 1: 5, 1: 6, 1: 7, 1: 8 or 1: 9; the ratio of the width of the first metallized area A1 to the width of the second non-metallized area B2 is 1: 1-9. For example, the ratio of the width of the first metallized area A1 to the width of the second non-metallized area B2 can be 1: 1, 1: 2, 1: 3, 1: 4, 1: 5, 1: 6, 1: 7, 1: 8 or 1: 9.

[0081] The size of the base of the first pyramid structure 31 is greater than the size of the base of the second pyramid structure 32 , and the height of the first pyramid structure 31 is greater than the height of the second pyramid structure 32 .

[0082] The size of the base of the first pyramid structure 31 is 0.5 μm-4 μm, and the height of the first pyramid structure 31 is 0.5 μm-3 μm.

[0083] The size of the base of the second pyramid structure 32 is 0.5 μm-4 μm, and the height of the second pyramid structure 32 is 0.5 μm-3 μm.

[0084] In one example, the first pyramid structure 31 has a base of 0.6 μm and a height of 3 μm, and the second pyramid structure 32 has a base of 0.5 μm and a height of 2 μm; in another example, the first pyramid structure 31 has a base of 4 μm and a height of 2.5 μm, and the second pyramid structure 32 has a base of 3 μm and a height of 1.5 μm; in yet another example, the first pyramid structure 31 has a base of 1.5 μm and a height of 1.5 μm, and the second pyramid structure 32 has a base of 0.5 μm and a height of 0.5 μm.

[0085] According to an exemplary embodiment, this embodiment provides a method for manufacturing a solar cell, such as Figure 2 As shown, the method for manufacturing a solar cell comprises the following steps:

[0086] Step S101: providing a substrate, and texturing the front surface of the substrate to form a first pyramid structure.

[0087] like Figure 3As shown, the substrate 20 can be a substrate made of semiconductor materials such as a silicon substrate, a germanium silicon substrate or a germanium substrate. The substrate 20 can be an N-type substrate or a P-type substrate. The front and back sides of the substrate 20 are both relatively flat surfaces.

[0088] The substrate 20 provided in this embodiment is a silicon substrate 20 , and the substrate 20 is doped with N-type conductive ions, that is, the substrate 20 is an N-type substrate.

[0089] like Figure 4 As shown, the substrate 20 is textured to remove the damaged layer on the surface of the substrate 20, and a first pyramid structure 31 is formed on the front surface of the substrate 20. In this embodiment, the first pyramid structure 31 is formed on the back surface of the substrate 20 at the same time.

[0090] For example, the size of the base of the first pyramid structure 31 is 0.5 μm-4 μm, and the height of the first pyramid structure 31 is 0.5 μm-3 μm.

[0091] Step S102: forming an initial doping region on the front surface of the substrate.

[0092] like Figure 5 As shown, the substrate 20 is placed in a diffusion furnace, and a boron source gas, such as BBr3, H3BO3, etc., is introduced into the diffusion furnace. The diffusion furnace is heated to decompose the boron source gas and release boron atoms. The boron atoms diffuse into the substrate 20 to form an initial doping region 41a in the first pyramid structure 31. The initial doping region 41a is enriched with boron ions of P-type conductivity.

[0093] Step S103: remove part of the initial doping area at intervals, and use the retained area of ​​the initial doping area as the first metallization area, and the area where the initial doping area 41a is removed as the first non-metallization area, and texturize the first non-metallization area to form a second pyramid structure in the first non-metallization area. From the back side of the substrate to the front side of the substrate, the top of the first pyramid structure is higher than the top of the second pyramid structure.

[0094] In this embodiment, the interval removal of part of the initial doping region 41a includes: laser irradiation of the initial doping region 41a of the first non-metallized region B1, and then texturing the first non-metallized region B1 to remove the initial doping region 41a of the first non-metallized region B1, and at the same time forming a second pyramid structure 32 in the first non-metallized region B1.

[0095] like Figure 6 As shown, laser is used to irradiate the initial doping region 41a on the front side to define a spaced first non-metallized region B1 on the front side. The high energy effect of the laser causes the material of the initial doping region 41a of the first non-metallized region B1 to loosen.

[0096] Then, if Figure 7As shown, the first non-metallized area B1 is textured, the substrate 20 is placed in a texturing solution, the initial doping area 41a of the first non-metallized area B1 is removed, and a second pyramid structure 32 is formed on the surface of the first non-metallized area B1.

[0097] For example, the size of the base of the second pyramid structure 32 is 0.5 μm-4 μm, and the height of the second pyramid structure 32 is 0.5 μm-3 μm.

[0098] Since the initial doping region 41a of the first non-metallized region B1 is removed, the top of the second pyramid structure 32 is lower than the top of the first pyramid structure 31, and the surface layer of the second pyramid structure 32 is a silicon substrate. This helps to reduce the minority carrier lifetime loss of the battery caused by Auger recombination and improve the photoelectric conversion efficiency of the battery.

[0099] Step S104: Pushing the initial doped region to form a first diffused doped region in the first pyramid structure.

[0100] Reference Figure 8 The substrate 20 can be placed in a high-temperature quartz tube furnace and heated to a preset temperature (eg, 800° C. to 1200° C.) to allow the boron ions in the initial diffusion region 40 a to further diffuse into the inner side of the substrate 20 to form a first diffusion doping region 41 .

[0101] Step S105: forming a tunneling layer, an intrinsic semiconductor layer and a second silicon glass layer in sequence on the back side of the substrate.

[0102] like Fig. 9 As shown, first, the back side of the substrate 20 is polished to expose the surface of the substrate 20 and polish the back side of the substrate 20 into a flat surface.

[0103] Then, if Fig.10 As shown, the tunneling layer 61 , the intrinsic semiconductor layer 62 a and the second silicon glass layer 63 may be sequentially deposited on the side of the tunneling layer 61 away from the substrate 20 by using an atomic layer deposition process (ALD) or a chemical vapor deposition process (CVD).

[0104] The thickness of the tunneling layer 61 is controlled to be 1 nm-2 nm. Specifically, the tunneling layer 61 is a silicon oxide layer. The material of the intrinsic semiconductor layer 62a includes polycrystalline silicon; the thickness of the intrinsic semiconductor layer 62a is 100 nm-300 nm.

[0105] In this embodiment, the second silicon glass layer 63 is a phosphosilicate glass layer.

[0106] Step S106: doping the intrinsic semiconductor layer to form a semiconductor doping layer.

[0107] like Fig.11 As shown, the intrinsic semiconductor layer 62 a may be subjected to high temperature annealing to diffuse phosphorus ions in the second silicon glass layer 63 into the intrinsic semiconductor layer 62 a to form a semiconductor doping layer 62 .

[0108] Step S107: remove part of the tunneling layer, the semiconductor doping layer and the second silicon glass layer stacked on the back side of the substrate at intervals, and use the retained area of ​​the tunneling layer, the semiconductor doping layer and the second silicon glass layer as the second metallization area, and the area where the tunneling layer, the semiconductor doping layer and the second silicon glass layer are removed as the second non-metallization area.

[0109] like Fig.12 , Fig.13 As shown, part of the tunneling layer 61, the semiconductor doping layer 62 and the second silicon glass layer 63 stacked on the back side of the substrate 20 are removed at intervals, including: laser irradiation of the tunneling layer 61, the semiconductor doping layer 62 and the second silicon glass layer 63 of the second non-metallized area B2, pickling to remove the second silicon glass layer 63 of the second non-metallized area B2, and the process of texturing the second non-metallized area B2 to remove the tunneling layer 61 and the semiconductor doping layer 62 of the second non-metallized area B2.

[0110] The second silicon glass layer 63 on the back side is irradiated with laser, and the material of the second silicon glass layer 63 irradiated with laser is loosened, and a spaced second non-metallized area B2 is defined on the back side. Then, the back side of the substrate 20 is cleaned with acid solution to remove the second silicon glass layer 63 of the second non-metallized area B2, exposing the semiconductor doping layer 62 of the second non-metallized area B2.

[0111] Step S108: texturing the second non-metallized area to form a third pyramid structure in the second non-metallized area.

[0112] like Fig.13 As shown, the substrate 20 is placed in a texturing solution, the semiconductor doping layer 62 and the tunneling layer 61 of the second non-metallized area B2 are removed, and a third pyramid structure 33 is formed on the surface of the first non-metallized area B1. The third pyramid structure 33 can reduce the reflected light loss of the second non-metallized area B2, and more light irradiated to the back of the cell is converted into the cell, thereby improving the short-circuit current output of the solar cell and the overall photoelectric conversion efficiency, and improving the bifaciality of the solar cell.

[0113] For example, the size of the base of the third pyramid structure 33 is 0.5 μm-4 μm, and the height of the third pyramid structure 33 is 0.5 μm-3 μm.

[0114] Step S109: removing the second silicon glass layer in the second metallization region.

[0115] like Fig.13As shown, in this embodiment, the second silicon glass layer 63 of the second metallization area A2 is removed by etching during the texturing process of the second non-metallization area B2.

[0116] In other embodiments, the second silicon glass layer 63 of the second metallization region A2 may be retained, which is not limited in the present solution.

[0117] Step S110: forming a front passivation layer covering the first diffusion doped region of the first metallization region and the base of the first non-metallization region, and forming a back passivation layer covering the semiconductor doped layer of the second metallization region and the base of the second non-metallization region.

[0118] like Fig.14 As shown, ALD or CVD deposition can be used to form the front passivation layer 42 and the back passivation layer 64, and the front passivation layer 42 and the back passivation layer 64 can be one or more of aluminum oxide, silicon nitride, silicon oxynitride, etc. Among them, the front passivation layer 42 and the back passivation layer 64 can be formed in the same process.

[0119] Step S111: forming a first electrode on the first metallization region, wherein the first electrode is electrically connected to the first diffusion doping region.

[0120] Reference Figure 1 Conductive paste is printed on the front passivation layer 42 of the first metallization area A1 by screen printing, and the first electrode 50 is formed after drying. Then, the first electrode 50 is irradiated with laser to electrically connect the first electrode 50 to the first diffusion doping area 41 of the first metallization area A1.

[0121] Step S112: forming a second electrode on the second metallization region, wherein the second electrode is electrically connected to the semiconductor doping layer.

[0122] Reference Figure 1 A conductive paste is printed on the back passivation layer 64 of the second metallization area A2 by screen printing, and the second electrode 70 is formed after drying. Then, the second electrode 70 is irradiated with a laser to electrically connect the second electrode 70 to the semiconductor doping layer 62 of the second metallization area A2.

[0123] In some embodiments, Figure 8 As shown, after the initial doping region 41a is pushed, an oxide layer 53 is formed on the surface of the first non-metallized region B1, and a first silicon glass layer 54 is formed on the side of the first diffuse doping region 41 away from the substrate 20. Specifically, the substrate 20 can be thermally oxidized to form an oxide layer 53 on the surface of the first non-metallized region B1, and a first silicon glass layer 54 is formed on the side of the first diffuse doping region 41 away from the substrate 20. In this embodiment, the first silicon glass layer 54 is a borosilicate glass layer. The oxide layer 53 and the first silicon glass layer 54 are used to protect the front side of the substrate 20 to prevent the front side of the substrate 20 from being damaged by processing the back side of the substrate 20.

[0124] In this embodiment, while removing the tunneling layer 61 and the semiconductor doping layer 62 of the second non-metallized area B2 , the oxide layer 53 and the first silicon glass layer 54 are removed.

[0125] The method for manufacturing the solar cell of the present embodiment performs a pre-boron diffusion on the front side of the substrate 20 to form an initial diffusion area 40a, then uses laser to irradiate the initial diffusion area 40a to define a first metallization area A1 and a first non-metallization area B1, and removes the initial diffusion area 40a of the first non-metallization area B1 by texturing, so that after the boron diffusion again, only the first diffuse doping area 41 is formed in the first metallization area A1, which can reduce the minority carrier lifetime loss caused by Auger recombination and improve the photoelectric conversion efficiency of the battery; the present embodiment uses the front side of the protective substrate 20 of the oxide layer 53, performs phosphorus diffusion treatment on the back side of the battery to form a semiconductor doping layer 62, and then uses laser and texturing treatment on the back side of the substrate 20 to remove the semiconductor doping layer 62 of the second non-metallization area B2, and retain the semiconductor doping layer 62 of the second metallization area A2, which can improve the double-sidedness of the battery and reduce parasitic light absorption.

[0126] The method for manufacturing the solar cell of the present embodiment forms a first diffused doping region 41 in the first metallization region A1 and forms a semiconductor doping layer 62 in the second metallization region A2, so that the process window is larger and more controllable, and the process difficulty and cost are reduced; through step-by-step preparation, the front and back metallization regions can be optimized respectively, thereby improving the overall performance of the battery.

[0127] The method for manufacturing the solar cell of the present embodiment not only reduces the parasitic light absorption phenomenon, but also improves the bifaciality of the cell through the design of double-sided velvet, so that the cell can maintain a high photoelectric conversion efficiency under different lighting conditions.

[0128] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0129] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A solar cell, characterized in that: include: A substrate, wherein the front side of the substrate comprises alternating first metallized regions and first non-metallized regions, the first metallized regions have a first pyramid structure, the first non-metallized regions have a second pyramid structure, the top of the first pyramid structure is higher than the top of the second pyramid structure from the back side of the substrate to the front side of the substrate, and the first metallized regions have a first diffuse doped region; the back side of the substrate comprises alternating second metallized regions and second non-metallized regions, a tunneling layer and a semiconductor doping layer are sequentially stacked on the side of the second metallized regions away from the substrate, and the second non-metallized regions have a third pyramid structure; A first electrode is disposed in the first metallization region, and the first electrode is electrically connected to the first diffuse doping region; The second electrode is disposed in the second metallization region, and the second electrode is electrically connected to the semiconductor doping layer.

2. The solar cell according to claim 1, characterized in that Also includes: A front passivation layer, disposed on the front side of the substrate, the front passivation layer covers the first diffuse doping region of the first metallization region and the substrate of the first non-metallization region; A back passivation layer is disposed on the back side of the substrate, and the back passivation layer covers the semiconductor doping layer in the second metallization area and the substrate in the second non-metallization area.

3. The solar cell according to claim 1 or 2, characterized in that: The projection of the first metallized area on the substrate overlaps with the projection of the second non-metallized area on the substrate, and the projection of the first non-metallized area on the substrate overlaps with the projection of the second metallized area on the substrate.

4. The solar cell according to claim 3, characterized in that: The width of the first metallized area is 80 μm-300 μm, the width of the first non-metallized area is 450 μm-900 μm, the width of the second metallized area is 80 μm-300 μm, and the width of the second non-metallized area is 450 μm-900 μm.

5. The solar cell according to claim 4, characterized in that: The ratio of the width of the first metallized area to the width of the first non-metallized area is 1:1-9, and the ratio of the width of the first metallized area to the width of the second non-metallized area is 1:1-9.

6. The solar cell according to claim 1, characterized in that The size of the tower base of the first pyramid structure is greater than that of the tower base of the second pyramid structure, and the tower height of the first pyramid structure is greater than that of the second pyramid structure.

7. The solar cell according to claim 1, characterized in that The size of the base of the third pyramid structure is 0.5 μm-4 μm, and the height of the third pyramid structure is 0.5 μm-3 μm.

8. A method for manufacturing a solar cell, characterized in that: include: Providing a substrate, and texturing a front surface of the substrate to form a first pyramid structure; forming an initial doping region on the front surface of the substrate; Part of the initial doping region is removed at intervals, the area of ​​the initial doping region retained is used as a first metallized region, the area of ​​the initial doping region removed is used as a first non-metallized region, and the first non-metallized region is textured to form a second pyramid structure in the first non-metallized region, and the top of the first pyramid structure is higher than the top of the second pyramid structure in the direction from the back side of the substrate to the front side of the substrate; Pushing the initial doped region to form a first diffused doped region in the first pyramid structure; forming a tunneling layer, an intrinsic semiconductor layer and a second silicon glass layer in sequence on the back side of the substrate; doping the intrinsic semiconductor layer to form a semiconductor doping layer; removing portions of the tunneling layer, the semiconductor doping layer and the second silicon glass layer stacked on the back side of the substrate at intervals, wherein the regions where the tunneling layer, the semiconductor doping layer and the second silicon glass layer are retained serve as second metallization regions, and the regions where the tunneling layer, the semiconductor doping layer and the second silicon glass layer are removed serve as second non-metallization regions; Texturing the second non-metallized area to form a third pyramid structure in the second non-metallized area; removing the second silicon glass layer from the second metallization region; Forming a front passivation layer covering the first diffusion doped region of the first metallization region and the substrate of the first non-metallization region, and forming a back passivation layer covering the semiconductor doped layer of the second metallization region and the substrate of the second non-metallization region; forming a first electrode on the first metallization region, wherein the first electrode is electrically connected to the first diffuse doping region; A second electrode is formed on the second metallization region, and the second electrode is electrically connected to the semiconductor doping layer.

9. The method for manufacturing a solar cell according to claim 8, characterized in that: Removing a portion of the initial doping region at intervals, comprising: irradiating the initial doping region of the first non-metallized region with a laser, then texturing the first non-metallized region to remove the initial doping region of the first non-metallized region, and forming the second pyramid structure in the first non-metallized region; The method comprises the following steps of: removing a portion of the tunneling layer, the semiconductor doping layer and the second silicon glass layer stacked on the back side of the substrate at intervals, comprising: laser irradiation of the tunneling layer, the semiconductor doping layer and the second silicon glass layer in the second non-metallized area, acid pickling to remove the second silicon glass layer in the second non-metallized area, and texturing the second non-metallized area to remove the tunneling layer and the semiconductor doping layer in the second non-metallized area.

10. The method for manufacturing a solar cell according to claim 9, characterized in that: After the initial doping region is pushed, an oxide layer is formed on the surface of the first non-metallized region, and a first silicon glass layer is formed on a side of the first diffuse doping region away from the substrate; The tunneling layer and the semiconductor doping layer of the second non-metallized region are removed while the oxide layer and the first silicon glass layer are removed.

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