High-voltage Micro-LED chip and preparation method thereof

Abstract

The invention discloses a high-voltage Micro-LED chip and a preparation method thereof, and the preparation method comprises the steps: providing a substrate, and forming an epitaxial structure on the substrate; performing MESA processing on the epitaxial structure; forming a first etching groove; forming a second etching groove; forming a protection layer to expose the first semiconductor layer and the second semiconductor layer; forming a first electrode structure, a second electrode structure and a bridging electrode structure; forming a reflection passivation layer, and exposing a part of the first electrode structure and the second electrode structure; forming a first bonding pad and a second bonding pad above the first electrode structure and the second electrode structure respectively; providing a substrate, and bonding the light-emitting unit with the substrate; and stripping the substrate, thinning the chip, and stripping the substrate to obtain the high-voltage Micro-LED chip. By implementing the manufacturing method, the high-voltage Micro-LED chip with high structural strength and good lighting effect can be manufactured.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a high-voltage Micro-LED chip and a preparation method thereof. Background Art

[0002] Micron-sized LED (Micro-LED) chips have excellent properties such as nanosecond high-speed response performance, stable characteristics of inorganic materials, high light efficiency, high reliability, high color purity, high contrast, and transparency. They have great application prospects in display, visible light communication, and biomedicine.

[0003] In order to improve the luminous performance of the chip, a large chip is divided into multiple small light-emitting units during the chip preparation process, and then the light-emitting units are connected in series through electrodes to achieve a low-current, high-voltage, high-power LED. However, the substrate needs to be peeled off during the production of Micro-LED chips. After the substrate is peeled off, it is difficult to ensure the structural strength of the chip. Using multiple Micro-LED chips in series will increase the amount of chip repair and other problems. Therefore, it is difficult to prepare high-voltage Micro-LED chips, and the light efficiency of Micro-LED chips cannot be effectively improved. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a high-voltage Micro-LED chip and a preparation method thereof, wherein the obtained high-voltage Micro-LED chip has high structural strength and high luminous efficiency.

[0005] In order to solve the above problems, the present invention discloses a method for preparing a high-voltage Micro-LED chip, comprising the following steps:

[0006] Providing a substrate, forming an epitaxial structure on the substrate, the epitaxial structure comprising a first semiconductor layer, an MQW layer, and a second semiconductor layer sequentially stacked on the substrate;

[0007] Performing a patterning process on the epitaxial structure to form a MESA step exposing the first semiconductor layer;

[0008] forming a first etching groove; the bottom of the first etching groove at least exposes the substrate, and the first etching groove separates the epitaxial structure into a plurality of separate light-emitting units;

[0009] forming a second etching groove; a preset distance is formed between the bottom of the second etching groove and the substrate, and the second etching groove separates the epitaxial structure in each light-emitting unit into a plurality of separate light-emitting structures;

[0010] Forming a protective layer on the upper surface of the light-emitting unit, and patterning the protective layer to expose the first semiconductor layer and the second semiconductor layer;

[0011] forming a first electrode structure, a second electrode structure and a bridging electrode structure on the exposed first semiconductor layer and the second semiconductor layer;

[0012] forming a reflective passivation layer on the upper surface of the protective layer and the electrode structure, and performing patterning on the reflective passivation layer to expose a portion of the first electrode structure and the second electrode structure;

[0013] forming a first pad and a second pad over the first electrode structure and the second electrode structure, respectively;

[0014] providing a substrate, and bonding the epitaxial structure to the substrate;

[0015] The substrate is peeled off and the chip is thinned to the second etching groove, and the base plate is peeled off to obtain the high-voltage Micro-LED chip.

[0016] As an improvement of the above technical solution, the preset distance between the bottom of the second etching groove and the substrate is H1,

[0017] As an improvement of the above technical solution, the bottom width of the second etching groove is L, the thickness of the epitaxial structure is H2, and L / H2=0.08-0.25.

[0018] As an improvement of the above technical solution, when L / H2=0.08-0.12, ALD deposition is used to form the Al2O3 protective layer.

[0019] As an improvement of the above technical solution, when L / H2=0.12-0.25, the protective layer is formed by the following method:

[0020] The SiO2 protective layer is deposited by PECVD with a deposition thickness of 0.6 (L-0.12H2) to 0.9 (L-0.12H2), and then the Al2O3 protective layer is deposited by ALD with a deposition thickness of (0.06 to 0.09) H2.

[0021] As an improvement of the above technical solution, the

[0022] The thickness of the MESA step is H3,

[0023] As an improvement of the above technical solution, the chip is thinned to a thickness of

[0024] As an improvement of the above technical solution, a preset angle θ is formed between the sidewall of the second etching groove and the substrate, where θ=78° to 85°.

[0025] As an improvement of the above technical solution, the material of the reflective passivation layer is Si3N4, SiO2, SiON x , Al2O3, AlGaAs or one or more thereof.

[0026] Correspondingly, the present invention also discloses a high-voltage Micro-LED chip, which is prepared by the above-mentioned method for preparing the high-voltage Micro LED chip.

[0027] The implementation of the present invention has the following beneficial effects:

[0028] 1. The present invention forms a protective layer on the surface of each chip unit. The protective layer can not only protect the chip to prevent water vapor and the like from penetrating into the light-emitting structure to affect the chip performance, but also connect multiple chips peeled from the substrate into a chip unit. In addition, the provision of the protective layer can also ensure the deposition quality of the bridge electrode structure and ensure the electrical characteristics and reliability of the high-voltage LED.

[0029] 2. The second etching groove formed in the present invention has a preset distance from the substrate. After the chip electrodes in the same chip unit are interconnected, the substrate is peeled off and the chip is thinned to the bottom of the second etching groove. The chip will not break when the substrate is peeled off. The high-voltage Micro-LED chip finally obtained can not only meet the micro-size requirements, but also ensure the structural strength, and the luminous efficiency of the high-voltage Micro-LED chip is effectively improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a schematic diagram of the structure of the high-voltage Micro-LED chip provided by the present invention;

[0031] Figure 2 This is a schematic diagram of the dimensions of the high-voltage Micro-LED chip provided by the present invention during the preparation process;

[0032] Figure 3 is a schematic diagram of the structure of the chip after step S8 of the present invention;

[0033] Figure 4 It is a schematic diagram of the structure of the chip after step S9 of the present invention. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is described in further detail below.

[0035] See also Figure 1 to Figure 4 The present invention provides a method for preparing a high-voltage Micro-LED chip, comprising the following steps:

[0036] S1. providing a substrate, and forming an epitaxial structure on the substrate, wherein the epitaxial structure comprises a first semiconductor layer, a MQW layer, and a second semiconductor layer sequentially stacked on the substrate;

[0037] Specifically, the substrate 11 may be a sapphire substrate, a Si substrate or a SiC substrate, but is not limited thereto. The epitaxial structure 12 includes but is not limited to a first semiconductor layer, an MQW layer and a second semiconductor layer sequentially stacked on the substrate 11, wherein the first semiconductor layer may be an N-type GaN layer, an N-type AlGaN layer, or an N-type GaAs layer, but is not limited thereto; the MQW layer may be an InGaN / GaN layer, an InGaN / AlGaN layer or an AlGaN / AlGaN layer, but is not limited thereto; the second semiconductor layer may be a P-type GaN layer, a P-type AlGaN layer, or a P-type GaAs layer, but is not limited thereto.

[0038] In one embodiment, the thickness of the epitaxial structure 12 is H2. For example or But it is not limited to this.

[0039] S2, performing patterning on the epitaxial structure to form a MESA step exposing the first semiconductor layer;

[0040] Specifically, in one embodiment, the thickness of the MESA step is H3, For example or But it is not limited to this.

[0041] S3, forming a first etching groove; the bottom of the first etching groove at least exposes the substrate, and the first etching groove separates the epitaxial structure into a plurality of separate light-emitting units;

[0042] It is understandable that the isolation process of the high-voltage LED chip separates the epitaxial structure of a single chip into multiple mutually insulated light-emitting units. Specifically, the first etched groove 21 can be formed by photolithography, dry etching, laser etching, etc. The first etched groove 21 is etched until the substrate 11 is exposed, thereby forming mutually isolated light-emitting units. In a preferred embodiment, the etching depth of the first etched groove is the thickness of the epitaxial structure, that is, the first etched groove is etched to expose the substrate.

[0043] In a preferred embodiment, the sidewall of the first etched groove can form a preset angle with the substrate to facilitate the covering of the sidewall of the epitaxial structure by structures such as a protective layer, which is beneficial to the smooth progress of subsequent processes and the improvement of the optoelectronic properties of the device.

[0044] S4, forming a second etching groove; a preset distance is formed between the bottom of the second etching groove and the substrate, and the second etching groove separates the epitaxial structure in each light-emitting unit into a plurality of separate light-emitting structures;

[0045] It is understandable that each individual light-emitting unit contains multiple light-emitting structures, and different light-emitting structures are isolated from each other by the second etching groove 22. The number of light-emitting structures in each light-emitting unit is determined by the number of series connection, which is the number of light-emitting structures in each light-emitting unit. The number of series connection is generally determined according to the operating voltage. Specifically, the second etching groove 22 can be formed by photolithography, dry etching, laser etching, etc. Different from the conventional second etching groove etching to expose the substrate, the second etching groove of the present invention has a preset distance from the substrate. Accordingly, in the subsequent process of stripping the substrate, the partial epitaxial structures of the multiple light-emitting structures in each light-emitting unit are interconnected, which can avoid the connection breakage of the multiple light-emitting structures caused by excessive stress when the substrate is stripped, thereby ensuring the structural strength of the obtained high-voltage Micro-LED chip.

[0046] In one embodiment, the preset distance between the bottom of the second etching groove 22 and the substrate 11 is H1. For example, or But not limited to this. During the process of peeling off the substrate, the structural strength of the light-emitting unit is low and may break; Subsequent thinning of the chip to the second etching groove will cause the overall thickness of the epitaxial structure to be too small, making it difficult to ensure the light efficiency.

[0047] In one embodiment, the bottom width of the second etched groove is L, the thickness of the epitaxial structure is H2, L / H2=0.08-0.25, exemplarily 0.09, 0.12, 0.15, 0.2 or 0.22, but not limited thereto. If the bottom width of the second etched groove is too small, it is difficult to achieve good isolation of adjacent light-emitting structures, and heat dissipation will also be affected; if the bottom width of the second etched groove is too large, the light-emitting area of ​​a single light-emitting structure will be reduced.

[0048] In a preferred embodiment, the sidewall of the second etched groove has a preset angle θ with the substrate, θ=78°-85°, exemplarily 79°, 80°, 82°, 83° or 84°, but not limited thereto. If the preset angle is too small, the protective layer is difficult to be well deposited on the sidewall of the epitaxial structure, and may fall off during subsequent use.

[0049] S5, forming a protective layer on the upper surface of each light-emitting unit, and performing patterning on the protective layer to expose the first semiconductor layer and the second semiconductor layer;

[0050] The protective layer can not only protect the chip and prevent water vapor and the like from penetrating into the light-emitting structure and affecting the chip performance, but also connect multiple chips peeled from the substrate into a light-emitting unit, thereby ensuring the connection strength of the light-emitting structure in the light-emitting unit. In addition, conventional bridging electrode structures are generally manufactured by directly crawling over the second etching groove, but since the electrode metal covers very little on both sides of the three-dimensional structure, the electrode metal layer on the side wall of the second etching groove is often thinner than the metal in other places, affecting the electrical characteristics and reliability of the high-voltage LED. The present invention first fills the second etching groove with a protective layer material, and then performs a patterning process on the protective layer to expose the first semiconductor layer and the second semiconductor layer, thereby facilitating the subsequent deposition of the bridging electrode structure.

[0051] It is understandable that the quality of the protective layer has a great influence on the light efficiency of the light-emitting unit, especially the deposition quality of the bridge electrode structure. In particular, when there is a preset angle between the sidewall of the second etched groove and the substrate, the inclined sidewall will increase the sidewall damage of the Micro-LED, resulting in a decrease in the light-emitting efficiency. The protective layer is deposited to reduce the damage to the sidewall and improve the light-emitting efficiency.

[0052] In one embodiment, when L / H2=0.08-0.12, ALD deposition is used to form the protective layer 13, specifically, the protective layer is an Al2O3 protective layer. The bottom width of the second etching groove is small, and ALD can be used to deposit a high-quality protective layer in the second etching groove.

[0053] In one embodiment, when L / H2=0.12-0.25, the protective layer 13 is formed by the following method:

[0054] First, PECVD is used for deposition, and the deposition thickness is 0.6 (L-0.12H2) to 0.9 (L-0.12H2), and examples are 0.65 (L-0.12H2), 0.7 (L-0.12H2), 0.75 (L-0.12H2), 0.8 (L-0.12H2) or 0.85 (L-0.12H2), but not limited to these; then ALD is used for deposition, and the deposition thickness is (0.06 to 0.09) H2, and examples are 0.065H2, 0.07H2, 0.075H2, 0.08H2 or 0.085H2, but not limited to these. The bottom width of the second etching groove is relatively large, so PECVD is used for deposition first. However, during the PECVD deposition process, the protective layer has poor adsorption to the side walls of the etching groove. In particular, the deposition of the protective layer in the second etching groove is prone to produce voids, which affects the light extraction of the LED. Therefore, ALD deposition is performed after PECVD deposition to fill the voids and obtain a high-quality protective layer 13. In addition, the setting of the protective layer can also reflect the light emitted from the side wall, thereby improving the light efficiency.

[0055] In a preferred embodiment, when L / H2=0.12-0.25, the protective layer 13 is formed by the following method: first, a SiO2 protective layer is deposited by PECVD, and then an Al2O3 protective layer is deposited by ALD. Specifically, the HF Power of PECVD is 50W-180W, the SiH4 flow rate is 40sccm-370sccm, the N2O flow rate is 500sccm-2480sccm, the N2 flow rate is 100sccm-2000sccm, and the pressure is 25Pa-120Pa; the deposition process of ALD is: at 180°C-270°C, TMAl is purged for 5s with a flow rate of 1sccm-24sccm, and then vacuumed, followed by O3 purging for 5s with a flow rate of 1sccm-24sccm, and then vacuumed. This is one cycle, and the total number of cycles is 10*0.09H*1.3 (the thickness of one ALD cycle is about The total deposition thickness is at least 1.3 times the gap).

[0056] In a preferred embodiment, the upper surface of the protective layer 13 is subjected to CMP treatment to make the upper surface flat, so as to facilitate high-quality deposition of subsequent electrode structures.

[0057] S6, forming a first electrode structure, a second electrode structure and a bridging electrode structure on the exposed first semiconductor layer and the second semiconductor layer;

[0058] It can be understood that each light-emitting unit includes multiple light-emitting structures, and the multiple light-emitting structures are connected in series through a bridging electrode structure, that is, the second semiconductor layer of the previous light-emitting structure and the first semiconductor layer of the next light-emitting structure are interconnected through the bridging electrode structure 142, the first semiconductor layer of the light-emitting structure located at the front of the same light-emitting unit is connected to the first electrode structure 141, and the second semiconductor layer of the light-emitting structure located at the back of the same light-emitting unit is connected to the second electrode structure 143, thereby forming a light-emitting unit.

[0059] Specifically, the first electrode structure, the second electrode structure and the bridge electrode structure may be formed by PVD, evaporation, etc. The material compositions of the first electrode structure, the second electrode structure and the bridge electrode structure may be the same or different, and the first electrode structure, the second electrode structure and the bridge electrode structure may be formed simultaneously or in steps.

[0060] S7, forming a reflective passivation layer on the upper surface of the protective layer and the electrode structure, and performing patterning on the reflective passivation layer to expose a portion of the first electrode structure and the second electrode structure;

[0061] Specifically, a reflective passivation layer is formed on the upper surfaces of the protective layer, the first electrode structure, the second electrode structure and the bridging electrode structure. The reflective passivation layer 15 can protect the light emitting unit.

[0062] Optionally, the material of the reflective passivation layer 15 is Si3N4, SiO2, SiON x , Al2O3, AlGaAs or one or more thereof.

[0063] S8, forming a first pad and a second pad on the first electrode structure and the second electrode structure respectively;

[0064] Specifically, in order to lead out the electrode, a first pad 161 is formed on the first electrode structure 141, and a second pad 162 is formed on the second electrode structure 143. The first pad and the second pad may have the same or different material compositions, and may be formed simultaneously or in stages.

[0065] S9, providing a substrate, and bonding the light-emitting unit to the substrate;

[0066] In one embodiment, a layer of temporary bonding material 17 is coated on the substrate 18, and the substrate 18 and the light-emitting unit are temporarily bonded by the temporary bonding material 17. Optionally, the material of the substrate 18 can be a transparent material such as sapphire, glass, quartz, etc., and the temporary bonding material 17 can be one or more of Ti, Ni, Pt, TiW, Au, Sn, Ni, Pb, Cu, which can be selected according to actual conditions and is not specifically limited here.

[0067] S10, peeling off the substrate, and thinning the chip to the second etching groove, peeling off the substrate, and obtaining the high-voltage Micro-LED chip.

[0068] Specifically, since there is a preset distance between the second etching groove and the substrate, during the process of stripping the substrate, parts of the first semiconductor layers of the multiple light-emitting structures in each light-emitting unit are connected to each other, which can avoid the connection breakage of the multiple light-emitting structures caused by excessive stress during substrate stripping, thereby ensuring the structural strength of the obtained high-voltage Micro-LED chip. The substrate and the temporary bonding material are removed to obtain the high-voltage Micro-LED chip.

[0069] In one embodiment, the chip has a reduced thickness of For example or But it is not limited thereto. It is understandable that the chip thinning thickness is greater than or equal to the preset distance between the bottom of the second etching groove and the substrate. Specifically, the chip can be thinned by CMP treatment.

[0070] Correspondingly, the present invention also discloses a high-voltage Micro-LED chip, which is prepared by the above-mentioned method for preparing the high-voltage Micro LED chip.

[0071] The present invention will be further described below with specific embodiments:

[0072] Example 1

[0073] This embodiment provides a method for preparing a high-voltage Micro-LED chip, comprising the following steps:

[0074] S1. providing a substrate, and forming an epitaxial structure on the substrate, wherein the epitaxial structure comprises a first semiconductor layer, a MQW layer, and a second semiconductor layer sequentially stacked on the substrate;

[0075] S2, performing patterning on the epitaxial structure to form a MESA step exposing the first semiconductor layer;

[0076] S3, forming a first etching groove; the etching depth of the first etching groove is the thickness of the epitaxial structure, and the first etching groove separates the epitaxial structure into a plurality of separate light-emitting units;

[0077] S4, forming a second etching groove; the distance between the bottom of the second etching groove and the substrate is The bottom width of the second etched groove is The second etching groove separates the epitaxial structure in each light-emitting unit into a plurality of separate light-emitting structures;

[0078] S5, forming an Al2O3 protective layer on the upper surface of the light emitting unit by using ALD, and performing patterning on the Al2O3 protective layer to expose the first semiconductor layer and the second semiconductor layer;

[0079] S6, forming a first electrode structure, a second electrode structure and a bridging electrode structure on the exposed first semiconductor layer and the second semiconductor layer;

[0080] S7, forming a Si3N4 reflective passivation layer on the upper surface of the protective layer and the electrode structure, and performing patterning on the Si3N4 reflective passivation layer to expose a portion of the first electrode structure and the second electrode structure;

[0081] S8, forming a first pad and a second pad on the first electrode structure and the second electrode structure respectively;

[0082] S9, providing a substrate, and bonding the epitaxial structure to the substrate;

[0083] S10, peel off the substrate and thin the chip to a thickness of After peeling off the substrate, you can get the high-voltage Micro-LED chip.

[0084] Example 2

[0085] This embodiment provides a method for preparing a high-voltage Micro-LED chip, comprising the following steps:

[0086] S1. providing a substrate, and forming an epitaxial structure on the substrate, wherein the epitaxial structure comprises a first semiconductor layer, a MQW layer, and a second semiconductor layer sequentially stacked on the substrate;

[0087] S2, performing patterning on the epitaxial structure to form a MESA step exposing the first semiconductor layer;

[0088] S3, forming a first etching groove; the etching depth of the first etching groove is the thickness of the epitaxial structure, and the first etching groove separates the epitaxial structure into a plurality of separate light-emitting units;

[0089] S4, forming a second etching groove; the distance between the bottom of the second etching groove and the substrate is The bottom width of the second etched groove is The second etching groove separates the epitaxial structure in each light-emitting unit into a plurality of separate light-emitting structures;

[0090] S5, first use PECVD to deposit a SiO2 protective layer with a deposition thickness of Then, the Al2O3 protective layer is deposited by ALD with a thickness of and performing patterning on the protective layer to expose the first semiconductor layer and the second semiconductor layer;

[0091] S6, forming a first electrode structure, a second electrode structure and a bridging electrode structure on the exposed first semiconductor layer and the second semiconductor layer;

[0092] S7, forming a Si3N4 reflective passivation layer on the upper surface of the protective layer and the electrode structure, and performing patterning on the Si3N4 reflective passivation layer to expose a portion of the first electrode structure and the second electrode structure;

[0093] S8, forming a first pad and a second pad on the first electrode structure and the second electrode structure respectively;

[0094] S9, providing a substrate, and bonding the epitaxial structure to the substrate;

[0095] S10, peel off the substrate and thin the chip to a thickness of After peeling off the substrate, you can get the high-voltage Micro-LED chip.

[0096] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A method for preparing a high-voltage Micro-LED chip, characterized in that: The following steps are involved: Providing a substrate, forming an epitaxial structure on the substrate, wherein the epitaxial structure comprises a first semiconductor layer, an MQW layer, and a second semiconductor layer sequentially stacked on the substrate; Performing a patterning process on the epitaxial structure to form a MESA step exposing the first semiconductor layer; forming a first etching groove; the bottom of the first etching groove at least exposes the substrate, and the first etching groove separates the epitaxial structure into a plurality of separate light-emitting units; forming a second etched groove; There is a preset distance between the bottom of the second etching groove and the substrate, and the second etching groove separates the epitaxial structure in each light-emitting unit into a plurality of separate light-emitting structures; Forming a protective layer on the upper surface of the light-emitting unit, and patterning the protective layer to expose the first semiconductor layer and the second semiconductor layer; forming a first electrode structure, a second electrode structure and a bridging electrode structure on the exposed first semiconductor layer and the second semiconductor layer; forming a reflective passivation layer on the upper surface of the protective layer and the electrode structure, and performing patterning on the reflective passivation layer to expose a portion of the first electrode structure and the second electrode structure; forming a first pad and a second pad over the first electrode structure and the second electrode structure, respectively; providing a substrate, and bonding the epitaxial structure to the substrate; The substrate is peeled off and the chip is thinned to the second etching groove, and the base plate is peeled off to obtain the high-voltage Micro-LED chip.

2. The method for preparing a high-voltage Micro-LED chip according to claim 1, wherein: The preset distance between the bottom of the second etching groove and the substrate is H1, 3. The method for preparing a high-voltage Micro-LED chip according to claim 1, wherein: The bottom width of the second etching groove is L, the thickness of the epitaxial structure is H2, and L / H2=0.08-0.

25.

4. The method for preparing a high-voltage Micro-LED chip according to claim 3, characterized in that: When L / H2=0.08-0.12, ALD deposition is used to form the Al2O3 protective layer.

5. The method for preparing a high-voltage Micro-LED chip according to claim 3, characterized in that: When L / H2=0.12-0.25, the protective layer is formed by the following method: The SiO2 protective layer is deposited by PECVD with a deposition thickness of 0.6 (L-0.12H2) to 0.9 (L-0.12H2), and then the Al2O3 protective layer is deposited by ALD with a deposition thickness of (0.06 to 0.09) H2.

6. The method for preparing a high-voltage Micro-LED chip according to claim 1, wherein: Said The thickness of the MESA step is H3, 7. The method for preparing a high-voltage Micro-LED chip according to claim 1, wherein: The chip is thinned to a thickness of 8. The method for preparing a high-voltage Micro-LED chip according to claim 1, wherein: A preset angle θ is formed between the sidewall of the second etching groove and the substrate, where θ=78°-85°.

9. The method for preparing a high-voltage Micro-LED chip according to claim 1, wherein: The material of the reflective passivation layer is Si3N4, SiO2, SiON x , Al2O3, AlGaAs or one or more thereof.

10. A high voltage Micro-LED chip, characterized in that: The high-voltage Micro-LED chip is prepared by the method for preparing a high-voltage Micro-LED chip according to any one of claims 1 to 9.

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