Piezoelectric laminate and piezoelectric element
By forming the upper electrode layer on the perovskite oxide piezoelectric film and scanning the applied voltage, the current-voltage curve characteristics are optimized, and the existing piezoelectric films are solved in terms of voltage withstand voltage and reliability, and higher voltage withstand voltage and reliability are achieved.
Patent Information
- Application Number
- CN202411190695.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-09-14
- Filing Date
- 2024-08-28
- Publication Date
- 2025-03-14
AI Technical Summary
The existing piezoelectric films have shortcomings in voltage withstand voltage and reliability, and it is difficult to meet the needs of high voltage withstand voltage and high reliability.
By forming an upper electrode layer on the perovskite-type oxide piezoelectric film and scanning the voltage when the voltage is applied, the peak number when the voltage rises in the current-voltage curve is different from that when the peak number is falling, and the half-peak width and peak ratio are optimized to improve voltage withstand voltage and reliability.
It achieves higher voltage withstandability and reliability than before, and by optimizing the current-voltage curve characteristics, the performance of the piezoelectric laminate and piezoelectric components is significantly improved.
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Figure CN119630263A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a piezoelectric laminate and a piezoelectric element. Background Art
[0002] As materials with excellent piezoelectric properties and ferroelectricity, perovskite oxides such as lead zirconate titanate (Pb(Zr, Ti)O3, hereinafter referred to as PZT) are known. Piezoelectric bodies composed of perovskite oxides are used as piezoelectric films in piezoelectric elements having a lower electrode, a piezoelectric film, and an upper electrode on a substrate. The piezoelectric element is used in various devices such as memory, inkjet head (actuator), micromirror device, angular velocity sensor, gyro sensor, ultrasonic element (PMUT: Piezoelectric Micromachined Ultrasonic Transducer) and vibration power generation device.
[0003] Patent documents 1 and 2 disclose that a piezoelectric film having high orientation and good piezoelectric performance can be realized by adding Nb (niobium) to the B position in a PZT-based perovskite oxide. Patent document 3 discloses that the piezoelectric performance of a piezoelectric film produced using a sol-gel method can be improved by adding Mn (manganese) in addition to Nb.
[0004] Patent Document 1: Japanese Patent Application Publication No. 2009-71295
[0005] Patent Document 2: Japanese Patent Application Publication No. 2014-60330
[0006] Patent Document 3: International Publication No. 2015 / 146607
[0007] From the viewpoint of device operation and reliability, piezoelectric films with higher withstand voltage and higher reliability are desired, and research and development of piezoelectric films with improved withstand voltage and reliability by controlling surface roughness in addition to composition is underway. Summary of the invention
[0008] The technology of the present invention has been accomplished in view of the above circumstances, and an object of the present invention is to provide a piezoelectric laminate and a piezoelectric element having a higher withstand voltage and reliability than conventional ones.
[0009] The piezoelectric laminate of the present invention comprises a lower electrode layer and a piezoelectric film mainly composed of a perovskite-type oxide in this order on a substrate, wherein:
[0010] When an upper electrode layer is formed on the piezoelectric film and the voltage applied between the upper electrode layer and the lower electrode layer is scanned and the lower electrode layer is grounded, the upper electrode layer is used as a driving electrode, and the voltage applied to the piezoelectric film is gradually increased from 0 V toward the positive side and then gradually decreased from the positive side through 0 V to the negative side, in the current-voltage curve representing the current change relative to the voltage change, the number of peaks when the voltage rises is different from the number of peaks when the voltage decreases.
[0011] Preferably, when the half-peak width when the voltage rises in the current-voltage curve is set to Wu and the half-peak width when the voltage drops is set to Wd, Wu≥1.5×Wd.
[0012] Preferably, when the number of peaks when the voltage rises is set to NA and the number of peaks when the voltage drops is set to NB, NA>NB.
[0013] It is preferable that the number of peaks NA when the voltage rises is larger than the number of peaks NB when the voltage falls by 1.
[0014] It is preferred that the number of peaks NA when the voltage rises is 3, and the number of peaks NB when the voltage drops is 2.
[0015] The preferred perovskite oxide is Pb a {(Zr x Ti 1-x ) 1-y M y}O3,
[0016] M is a metal element selected from the group consisting of V, Nb, Ta, Sb, Mo and W,
[0017] Satisfies 0<x<1, 0<y<1, 0.9≤a≤1.2.
[0018] Preferably, M is Nb, satisfying 0.08≤y≤0.15.
[0019] The piezoelectric film preferably has an average grain size obtained by weighted average of the area ratio of the grain sizes in the grain size distribution obtained by electron backscatter diffraction method exceeding 0.25 μm, more preferably 0.3 μm or more, and preferably 0.4 μm or less.
[0020] It is preferable that a seed layer lattice-matched to the perovskite type oxide is provided between the lower electrode layer and the piezoelectric film.
[0021] It is preferable that the lattice constant of the seed crystal layer when regarded as a pseudo-cubic crystal is 0.39 nm to 0.405 nm.
[0022] It is preferred that the seed layer contains SrRuO 3 or BaRuO 3 as a main component.
[0023] The piezoelectric element of the present invention includes the piezoelectric stack of the present invention and an upper electrode layer provided on the piezoelectric film of the piezoelectric stack.
[0024] Effects of the Invention
[0025] According to the technology of the present invention, it is possible to provide a piezoelectric laminate and a piezoelectric element having a higher withstand voltage and reliability than before. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 It is a schematic cross-sectional view showing the layer structure of the piezoelectric stack and the piezoelectric element according to the first embodiment.
[0027] Figure 2 It is a schematic diagram of an IV curve showing current-voltage (IV) characteristics of the piezoelectric element according to the embodiment.
[0028] Figure 3 It is a schematic cross-sectional view showing the layer structure of the piezoelectric stack and the piezoelectric element according to the second embodiment.
[0029] Figure 4 The IV curve of Example 3 is shown.
[0030] Figure 5 The IV curve of Comparative Example 1 is shown.
[0031] Figure 6 This is an example of an image pattern of crystal grains on the surface of a piezoelectric film obtained by the EBSD method.
[0032] Explanation of symbols
[0033] 1, 2-piezoelectric element, 5, 5A-piezoelectric stack, 10-substrate, 12-lower electrode layer, 13-seed layer, 15-piezoelectric film, 18-upper electrode layer. DETAILED DESCRIPTION
[0034] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, in the following drawings, for easy visual recognition, the layer thickness of each layer and their ratios are appropriately changed and depicted, which may not necessarily reflect the actual layer thickness and ratio. In this specification, the numerical range represented by "~" refers to the range including the numerical values recorded before and after "~" as the lower limit and upper limit. In the numerical range recorded in stages in the present invention, the upper limit or lower limit recorded in a certain numerical range can be replaced by the upper limit or lower limit of other numerical ranges recorded in stages. Moreover, in the numerical range recorded in the present invention, the upper limit or lower limit recorded in a certain numerical range can be replaced by the value shown in the embodiment.
[0035] Figure 11 is a schematic cross-sectional view showing the layer structure of a piezoelectric stack 5 and a piezoelectric element 1 including the piezoelectric stack 5 according to one embodiment. Figure 1 As shown in the figure, the piezoelectric element 1 includes a piezoelectric stack 5 and an upper electrode layer 18. The piezoelectric stack 5 includes a substrate 10, and a lower electrode layer 12 and a piezoelectric film 15 mainly composed of a perovskite-type oxide stacked in sequence on the substrate 10. Here, "lower" and "upper" do not refer to up and down in the vertical direction, but the electrode arranged on the side of the substrate 10 with the piezoelectric film 15 interposed therebetween is called the lower electrode layer 12, and the electrode arranged on the side opposite to the substrate 10 with respect to the piezoelectric film 15 is called the upper electrode layer 18.
[0036] The substrate 10 is not particularly limited, and examples thereof include substrates such as silicon, glass, stainless steel, yttrium-stabilized zirconia, aluminum oxide, sapphire, and silicon carbide. As the substrate 10, a laminated substrate such as a silicon substrate with a thermal oxide film formed on the surface of a silicon substrate with a SiO2 oxide film can be used. In addition, as the substrate 10, a resin substrate such as PET (polyethyleneterephthalate), PEN (polyethylene naphthalate), and polyimide can be used.
[0037] The lower electrode layer 12 is paired with the upper electrode layer 18 and is an electrode for applying voltage to the piezoelectric film 15. There is no particular limitation on the main component of the lower electrode layer 12, and examples thereof include metals or metal oxides such as Au (gold), Pt (platinum), Ir (iridium), Ru (ruthenium), Ti (titanium), Mo (molybdenum), Ta (tantalum) and Al (aluminum), and combinations thereof. In addition, ITO (Indium Tin Oxide: indium tin oxide) and the like can also be used. The lower electrode layer 12 can be a single layer or a stacked structure consisting of multiple layers. When the lower electrode layer 12 is a stacked structure, it is also preferably set to a structure having a bonding layer such as Ti, TiW or ZrO2 on the substrate 10 side in addition to the conductive layer composed of the above-mentioned materials.
[0038] The thickness of the lower electrode layer 12 is not particularly limited, but is preferably about 50 nm to 300 nm in general, and more preferably 100 nm to 300 nm.
[0039] The upper electrode layer 18 is paired with the lower electrode layer 12 and is an electrode for applying voltage to the piezoelectric film 15. The main component of the upper electrode layer 18 is not particularly limited, and examples thereof include metals such as Au, Pt, Ir, Ru, Ti, Mo, Ta and Al, or metal oxides thereof, and combinations thereof. In addition, ITO (Indium Tin Oxide), LaNiO3 and SrRuO3, etc., can be used. The upper electrode layer 18 can be a single layer or a stacked structure consisting of multiple layers. In addition, from the viewpoint of further suppressing the diffusion of oxygen from the piezoelectric film 15, at least the region of the upper electrode layer 18 that is in contact with the piezoelectric film 15 is preferably an oxide electrode.
[0040] The thickness of the upper electrode layer 18 is not particularly limited, but is preferably about 50 nm to 300 nm, and more preferably 100 nm to 300 nm.
[0041] Figure 2 1 is a schematic diagram of a current-voltage (IV) curve obtained by grounding the lower electrode layer 12, using the upper electrode layer 18 as a driving electrode, and applying a scanning voltage to the piezoelectric film 15. Figure 2 As shown, in the IV curve of the piezoelectric film 15, the number of current peaks (hereinafter referred to as the peak number) is different when the voltage rises and when the voltage drops. The scanning of the applied voltage is performed as follows: after the potential applied to the upper electrode layer 18 is increased from 0V to the positive side, it is decreased from the positive side to the negative side via 0V. In the IV curve, the positive voltage is represented when a positive potential is applied to the upper electrode layer 18, and the negative voltage is represented when a negative potential is applied to the upper electrode layer 18. In addition, as an example, the IV curve is obtained as follows: the voltage applied to the upper electrode layer 18 is changed through 0V=>+40V=>-40V=>0V=> with a 10Hz triangular wave, and the change in the current value at this time is measured. When the amount of one cycle of the triangular wave that changes through 0V=>+40V=>-40V=>0V is set as one cycle, the data of the first cycle may become unstable, but a stable curve with roughly the same behavior can be obtained after about the second cycle. When counting the number of peaks, a stable IV curve is used. For example, use the data from the 3rd cycle, etc.
[0042] In the IV curve of the piezoelectric film 15 , when the half-peak width when the voltage rises is set as Wu and the half-peak width when the voltage drops is set as Wd, Wu≧1.5×Wd.
[0043] In the IV curve, when the number of peaks when the voltage rises is set to NA and the number of peaks when the voltage drops is set to NB, NA>NB is preferably satisfied. Figure 2In the example shown, three peaks Pu1, Pu2, and Pu3 are generated when the voltage rises, and two peaks Pd1 and Pd2 are generated when the voltage drops. That is, the number of peaks NA is 3 when the voltage rises, and the number of peaks NB is 2 when the voltage drops.
[0044] In addition, if Figure 2 As shown in FIG. 1 , the half-peak width Wu is the half-width when the entirety including the three peaks Pu1, Pu2, and Pu3 is regarded as one peak Pu, and the half-peak width Wd is the half-width when the entirety including the two peaks Pd1 and Pd2 is regarded as one peak Pd. Thus, when the half-peak width Wu when the voltage rises or the half-peak width Wd when the voltage falls in the IV curve includes multiple peaks, respectively, it is defined as the half-width of one wide peak including the multiple peaks.
[0045] In addition, the number of peaks contained in one broad peak is calculated as follows. The acquired IV curve is smoothed to remove noise, and in the smoothed IV curve, for example, the number of points where the derivative function f1'(x) becomes 0 when the curve when the voltage rises is represented by the function f1(x) is taken as the number of peaks when the voltage rises. Similarly, the derivative function f2(x) when the curve when the voltage drops is represented by the function f1(x) is taken as the number of peaks when the voltage rises. 2’ The number of points where (x) becomes 0 is taken as the number of peaks when the voltage drops. Alternatively, a normal distribution or a log-normal distribution may be assumed to perform peak fitting / peak separation on the smoothed IV curve. The number of peaks can be determined using commercially available data analysis software (OriginPro, etc.).
[0046] According to Japanese Patent Application Publication No. 2010-16011, the inflection point in the polarization-electric field (PE) hysteresis loop indicates that a 180° polarization reversal or phase change has occurred. In addition, it is believed that the inflection point of the PE hysteresis loop corresponds to the current peak in the IV curve, so the current peak indicates that a 180° polarization reversal or phase change has occurred. Usually, the number of peaks when the voltage rises and when it falls is the same.
[0047] As shown in the piezoelectric film 15 in the present embodiment, a piezoelectric film having different peak numbers when the voltage rises and when it falls is obtained by reverse sputtering the film-forming surface before film formation and then forming the film. The piezoelectric film 15 obtained in this way has strong adhesion. The strong adhesion of the piezoelectric film 15 indicates that the stress is large. It is speculated that in the piezoelectric film 15 with large stress, a transition phase accompanied by substrate stress relaxation is formed during the phase change generated when the voltage rises, and the generation of this transition phase is formed as a peak in the IV curve. On the other hand, when the voltage drops, the stress is released as the phase change occurs, so it is believed that no peak will be generated. In this way, it is speculated that in the case of NA=NB+1, where the number of peaks when the voltage rises is 1 greater than the number of peaks when the voltage drops, the peak that becomes the difference is associated with the substrate stress.
[0048] For example, Figure 2As shown, the three peaks when the voltage rises are assumed to be caused by the phase change from the tetragonal a-axis orientation to the c-axis orientation, the 180° polarization reversal and the above-mentioned transformation phase caused by the substrate stress, and the two peaks when the voltage decreases are assumed to be caused by the phase change from the tetragonal c-axis orientation to the a-axis orientation and the 180° polarization reversal.
[0049] In addition, when a phase transition from tetragonal to rhombohedral occurs with a voltage change, the peak number ratio Figure 2 In addition, basically one phase transition produces one peak, but sometimes two or more peaks overlap and appear to be essentially one peak. However, as mentioned above, the number of places where the derivative function of the curve becomes 0 is regarded as the number of peaks.
[0050] As described above, the piezoelectric film 15 of the present invention is mainly composed of perovskite oxide. Here, "mainly composed of perovskite oxide" means that the perovskite oxide accounts for more than 80 mol% of the piezoelectric film. The piezoelectric film 15 is preferably composed of 100 mol% perovskite oxide (but contains inevitable impurities).
[0051] As the perovskite type oxide, lead zirconate titanate (PZT: lead zirconate titanate)-based oxide containing Pb (lead), Zr (zirconium), Ti (titanium), and O (oxygen) is preferred.
[0052] Particularly preferred are compounds represented by the following general formula (1) containing an additive M at the B site of PZT.
[0053] Pb a {(Zr x Ti 1-x ) 1-y M y}O3(1)
[0054] Here, M is preferably one or more elements selected from V (vanadium), Nb (niobium), Ta (tantalum), Sb (antimony), Mo (molybdenum) and W (tungsten). Here, preferably 0<x<1, 0<y<1, 0.9≤a≤1.2, more preferably 0.08≤y≤0.15. In general formula (1), Pb: {(Zr x Ti 1-x ) 1-y M y The ratio of}:O is based on 1:1:3, but it can also deviate within the range that can obtain a perovskite structure.
[0055] M may be only a single element such as V or Nb, or a combination of two or more elements such as a mixture of V and Nb or a mixture of V, Nb and Ta. When M is these elements, it can be combined with Pb, an A-site element, to achieve a very high piezoelectric constant.
[0056] Furthermore, when the piezoelectric film 15 is formed as a sputtered film formed by a vapor phase growth method such as sputtering, a piezoelectric film having a very high piezoelectric constant can be obtained.
[0057] In addition, it is believed that in PZT-based perovskite oxides, piezoelectric properties are shown at the morphotropic phase boundary (MPB) and its vicinity. The MPB composition is near Zr:Ti (molar ratio) = 52:48, and in the above general formula, it is preferably the MPB composition or its vicinity. "MPB or its vicinity" is the region where a phase change occurs when an electric field is applied to the piezoelectric film. Specifically, Zr:Ti (molar ratio) is preferably in the range of 45:55 to 55:45, that is, in the range of x = 0.45 to 0.55.
[0058] The film thickness of the piezoelectric film 15 is preferably not less than 0.2 μm and not more than 5 μm, and more preferably not less than 1 μm.
[0059] In the piezoelectric film 15 , the average grain size obtained by weighted average of the area ratio of the grain sizes in the grain size distribution obtained by the electron beam backscattered diffraction (EBSD) method is preferably 0.3 μm or more.
[0060] Thus, the piezoelectric laminate 5 of the present embodiment has a lower electrode layer 12 and a piezoelectric film 15 mainly composed of a perovskite-type oxide on a substrate 10 in sequence, and an upper electrode layer 18 is formed on the piezoelectric film 15. When the voltage applied between the upper electrode layer 18 and the lower electrode layer 12 is scanned and the lower electrode layer 12 is grounded, the upper electrode layer 18 is used as a driving electrode, and the applied voltage applied to the piezoelectric film 15 is gradually increased from 0V to the positive side, and then gradually decreased from the positive side through 0V to the negative side, in the IV curve representing the current change relative to the voltage change, the number of peaks when the voltage rises is different from the number of peaks when the voltage falls. The inventors found that the piezoelectric film 15 in which the number of current peaks in the IV curve is different when the voltage rises and falls, shows high withstand voltage and reliability compared with the piezoelectric film in which the number of peaks is the same when the voltage rises and falls (refer to the embodiment described later). As described above, it is believed that the stress between the substrate 10 and the piezoelectric film 15 is higher than before, and high withstand voltage and reliability can be obtained.
[0061] The piezoelectric laminate 5 and the piezoelectric element 1 may include other layers such as an adhesion layer and a seed layer in addition to the lower electrode layer 12 and the piezoelectric film 15 .
[0062] "Second embodiment"
[0063] Figure 3 FIG. 2 is a schematic cross-sectional view of a piezoelectric element 2 according to the second embodiment. Figure 1The piezoelectric element 1 of the first embodiment shown has the same components denoted by the same reference numerals. The piezoelectric element 2 includes a substrate 10 and a piezoelectric laminate 5A. The piezoelectric laminate 5A differs from the piezoelectric laminate 5 in that a seed layer 13 is provided between the lower electrode layer 12 and the piezoelectric film 15.
[0064] The seed layer 13 is lattice-matched with the perovskite oxide which is the main component of the piezoelectric film 15. The seed layer 13 can improve the crystallinity of the piezoelectric film 15 formed on the upper layer. The piezoelectric film 15 formed on the seed layer 13 may also be an epitaxial film grown epitaxially.
[0065] The lattice constant of the seed layer 13 when regarded as a pseudo-cubic crystal is preferably 0.39 nm to 0.405 nm. When the lattice constant is within this range, it is lattice-matched with the perovskite oxide of PZT doped with Nb, so when the piezoelectric film 15 formed on the upper layer is PZT doped with Nb, its crystallinity can be improved. The lattice constant of each layer can be measured by XRD (X-Ray Diffraction) analysis.
[0066] The seed layer 13 preferably has electrical conductivity. Electrical conductivity refers to a resistivity that allows the layer to function as an electrode. Here, the resistivity at 20° C. is 10 -5 When the conductivity is Ω·m or less, it is considered to have conductivity. As long as the seed layer 13 has conductivity, it can function as an electrode for applying a driving voltage to the piezoelectric film 15 together with the lower electrode layer 12 .
[0067] As the main component of the seed layer 13, SrRuO3, BaRuO3, and PbTiO3 can be cited. These have a lattice constant of 0.39 nm to 0.405 nm when regarded as a pseudo-cubic crystal. As the main component of the seed layer 13, SrRuO3 or BaRuO3 having conductivity is particularly preferred.
[0068] The piezoelectric stack 5A and the piezoelectric element 2 are different from the piezoelectric stack 5 and the piezoelectric element 1 in that a seed layer 13 is provided between the lower electrode layer 12 and the piezoelectric film 15, but the other structures are the same as those of the piezoelectric stack 5 and the piezoelectric element 1, and the same effects can be obtained. Furthermore, the piezoelectric stack 5A and the piezoelectric element 2 can obtain an effect of further improving the piezoelectric constant by providing the seed layer 13, compared with the case where the seed layer 13 is not provided.
[0069] The piezoelectric elements 1 and 2 or the piezoelectric laminates 5 and 5A according to the above-described embodiments can be suitably used in ultrasonic devices, mirror devices, sensors, memories, and the like.
[0070] Example
[0071] The following describes specific examples and comparative examples of the piezoelectric element of the present invention. First, the method for making the piezoelectric element of each example is described. A sputtering device is used in the film formation of each layer. In the description of the production method, reference is made to Figure 1 The piezoelectric element 1 will be described with reference to the symbols of the layers shown.
[0072] (Production Method)
[0073] As the substrate 10 , a silicon substrate with a thermal oxide film was used.
[0074] A substrate with an electrode layer was prepared in which a 20 nm thick adhesion layer made of Ti, a 150 nm thick lower electrode layer 12 made of Pt, and a 20 nm thick seed layer 13 made of SrRuO 3 were sequentially stacked on a thermal oxide film of a substrate 10 .
[0075] <Piezoelectric film>
[0076] On the seed layer 13, a PZT film doped with Nb was formed as a piezoelectric film 15 under the following sputtering conditions. A PZT target doped with Nb was used in the film formation. A target material was used in which the Pb composition ratio was set to 1.3, the Zr / Ti molar ratio was the MPB composition (Zr / Ti=52 / 48), i.e., x=0.52, and the Nb composition ratio y=0.12. In addition, for each embodiment, a pretreatment under the conditions shown in Table 1 was implemented immediately before the piezoelectric film 15 was formed. For example, in the case of Embodiment 1, the substrate bias voltage was set to -40V, and the input power was set to 0.5kW. In addition, the pretreatment time was 3 minutes. The conditions other than the substrate bias voltage and input power shown in Table 1 were set to the same conditions as the sputtering conditions of the piezoelectric film. In Comparative Example 1, no pretreatment was performed, and in Comparative Example 2, the substrate bias voltage during pretreatment was set to the same voltage as during film formation.
[0077] -Sputtering conditions of piezoelectric film-
[0078] Distance between target and substrate: 100mm
[0079] Target input power: 3kW
[0080] Vacuum degree (film forming pressure): 0.5Pa
[0081] Atmosphere: Ar / O2 mixture (O2 volume fraction 2.5%)
[0082] Substrate setting temperature: 550℃
[0083] Substrate bias voltage: +40V
[0084] <Upper electrode layer>
[0085] An ITO layer having a thickness of 100 nm was formed as an upper electrode layer 18 on the piezoelectric film 15 of the above-mentioned laminated substrate by sputtering.
[0086] <Evaluation electrode pattern formation>
[0087] Before forming the upper electrode layer 18, a resist pattern was formed by photolithography, the upper electrode layer 18 was formed on the resist pattern, and an upper electrode pattern for evaluation was formed by lift-off.
[0088] Through the above steps, laminated bodies of Comparative Examples and Examples were produced.
[0089] [Table 1]
[0090]
[0091] (Preparation of samples for evaluation)
[0092] -Evaluation Sample 1-
[0093] A strip-shaped portion of 2 mm×25 mm was cut out from the laminate to prepare a cantilever as a sample 1 for evaluation.
[0094] -Evaluation Sample 2-
[0095] A 25 mm×25 mm portion having an upper electrode layer 18 patterned into a circle with a diameter of 400 μm at the center of the surface of the piezoelectric film 15 was cut out from the laminate as a sample 2 for evaluation.
[0096] <Measurement of current-voltage characteristics>
[0097] For the piezoelectric elements of each embodiment and comparative example, IV curves were measured using evaluation sample 2. The ferroelectric characteristic evaluation system FEC10 manufactured by TOYO Corporation was used in the measurement. For the piezoelectric elements of each embodiment and comparative example, the lower electrode layer 12 was grounded, and the potential applied to the upper electrode layer 18 was changed from 0V=>+40V=>-40V=>0V=> at a frequency of 10 Hz, and the IV curve at this time was obtained. In addition, in the measurement of the IV curve, the change from 0V=>+40V=>-40V=>0V was regarded as one cycle, and the coercive field value was determined based on the data of the third cycle. As described above, in the measurement of the IV curve, the first cycle is unstable, but a stable IV curve with roughly the same behavior can be obtained after about the second cycle. Here, for the sake of caution, the data of the third cycle is used. A portion of the obtained IV curve is shown in Figure 4 and Figure 5 . Figure 4 The IV curve of Example 3 is shown. Figure 5 The IV curve of Comparative Example 1 is shown.
[0098] like Figure 4 As shown in FIG. 1 , in the IV curve of Example 3, three peaks are generated when the voltage rises, and two peaks are generated when the voltage drops. Figure 5 As shown, in the IV curve of Comparative Example 1, there is only one peak both when the voltage rises and when it falls. Table 2 shows the number of peaks NA when the voltage rises and the number of peaks NB when the voltage falls for each embodiment and comparative example.
[0099] <Measurement of piezoelectric constant>
[0100] The piezoelectric constant d was measured using a cantilever according to the method described in I. Kanno et al. Sensor and Actuator A 107 (2003) 68., using a sine wave applied voltage of -10 V ± 10 V, that is, a sine wave applied voltage with an amplitude of 10 V for a bias voltage of -10 V. 31 [pm / V]. Table 2 shows the measurement results.
[0101] The piezoelectric constant was evaluated according to the following criteria, and the evaluation results are shown in Table 2.
[0102] A: 200pm / V or more
[0103] B: 170pm / V or more and less than 200pm / V
[0104] C: less than 170pm / V
[0105] <Evaluation of withstand voltage>
[0106] The withstand voltage (insulation breakdown voltage) of each embodiment and comparative example was measured. Using the evaluation sample 2, the lower electrode layer 12 was grounded, a negative voltage was applied to the upper electrode layer 18 at a rate of change of -1V / sec, and the voltage at which a current of 1mA or more flowed was regarded as the withstand voltage. For each example, 10 samples were prepared, and a total of 10 measurements were performed, and the average value (absolute value) was shown in Table 2 as the withstand voltage [V].
[0107] The withstand voltage was evaluated according to the following criteria, and the evaluation results are shown in Table 2.
[0108] A: 100V or above
[0109] B: 60V or more and less than 100V
[0110] C: less than 60V
[0111] <Evaluation of driving stability (reliability)>
[0112] As an evaluation of the driving stability of each embodiment and comparative example, a time-dependent dielectric breakdown (TDDB) test was performed. Using evaluation sample 2, the lower electrode layer 12 was grounded in an environment of 120°C, a voltage of -40V was applied to the upper electrode layer 18, and the time (hr) from the start of voltage application until dielectric breakdown occurred was measured. The measurement results are shown in Table 2. In addition, the TDDB test was performed for 2000 hours, and when dielectric breakdown did not occur within 2000 hours, it was recorded as 2000 in Table 2.
[0113] The reliability was evaluated according to the following criteria, and the evaluation results are shown in Table 2.
[0114] A: More than 1000 hours
[0115] B: 700 hr or more and less than 1000 hr
[0116] C: less than 700hr
[0117] <Method for measuring crystal particle size>
[0118] The surface of the piezoelectric film after formation, i.e., the surface of the piezoelectric film before the upper electrode was formed, was measured by EBSD. As the measuring apparatus, a SEM (Scanning Electron Microscope): JSM-7001F manufactured by JEOL Ltd. and an EBSD OIM manufactured by TSL were used. The image pattern of the crystal grains on the surface of the piezoelectric film obtained by the EBSD method is shown in FIG. Figure 6 . In Figure 6 The crystal grains are determined in the image pattern shown, and the smallest circumscribed circle is respectively obtained, and the diameter of the circumscribed circle is obtained as the crystal grain size. Then, the average grain size obtained by weighted average of the area ratio of the crystal grain size is calculated. The average grain size of each embodiment and comparative example is shown in Table 2.
[0119] In addition, for each of the examples and comparative examples, the lowest evaluation results in each of the evaluations of the piezoelectric constant, the withstand voltage, and the reliability are respectively described in Table 2 as a comprehensive evaluation.
[0120] [Table 2]
[0121]
[0122] The piezoelectric constants are equal in Comparative Examples 1 and 2 and Examples 1 to 5, but in Examples 1 to 5, in which a pretreatment is performed before the piezoelectric film is formed to reverse the substrate bias voltage and the positive and negative during film formation, the withstand voltage and reliability are greatly improved compared with Comparative Examples 1 and 2. In the element that obtains such high withstand voltage and reliability, the number of peaks NA when the voltage of the IV curve rises is 1 greater than the number of peaks NB when the voltage falls, and the half-peak width Wu when the voltage rises is more than 1.2 times the half-peak width Wd when the voltage falls. When the ratio of the half-peak width Wu / Wd is 1.5 or more, higher withstand voltage and reliability can be obtained.
[0123] All documents, patent applications, and technical standards described in this specification are incorporated herein by reference to the same extent as if each individual document, patent application, or technical standard was specifically and individually described as being incorporated by reference.
[0124] The following additional notes are further disclosed regarding the above-mentioned embodiment.
[0125] <Note 1>
[0126] A piezoelectric laminate comprises a lower electrode layer and a piezoelectric film mainly composed of a perovskite-type oxide in this order on a substrate, wherein:
[0127] When an upper electrode layer is formed on the piezoelectric film and the voltage applied between the upper electrode layer and the lower electrode layer is scanned and the lower electrode layer is grounded, the upper electrode layer is used as a driving electrode, and the voltage applied to the piezoelectric film is gradually increased from 0 V toward the positive side, and then dropped toward the negative side after passing through 0 V. In the current-voltage curve representing the current change relative to the voltage change, the number of peaks when the voltage rises is different from the number of peaks when the voltage drops.
[0128] <Note 2>
[0129] The piezoelectric stack according to Supplementary Note 1, wherein
[0130] When the half-peak width when the voltage rises in the current-voltage curve is set to Wu and the half-peak width when the voltage drops is set to Wd, Wu≥1.5×Wd.
[0131] <Note 3>
[0132] The piezoelectric laminate according to Supplement 1 or Supplement 2, wherein:
[0133] When the number of peaks when the voltage rises is set to NA and the number of peaks when the voltage drops is set to NB, NA>NB.
[0134] <Note 4>
[0135] The piezoelectric stack according to Supplementary Note 3, wherein
[0136] The peak number NA when the voltage rises is greater than the peak number NB when the voltage drops by 1.
[0137] <Note 5>
[0138] The piezoelectric stack according to Supplementary Note 3, wherein
[0139] The peak number NA is 3 when the voltage rises, and the peak number NB is 2 when the voltage drops.
[0140] <Note 6>
[0141] The piezoelectric stack according to any one of Supplementary Notes 1 to 5, wherein
[0142] The perovskite oxide is Pb a {(Zr x Ti 1-x ) 1-y M y}O3,
[0143] M is a metal element selected from the group consisting of V, Nb, Ta, Sb, Mo and W,
[0144] Satisfies 0<x<1, 0<y<1, 0.9≤a≤1.2.
[0145] <Note 7>
[0146] The piezoelectric stack according to Supplementary Note 6, wherein
[0147] The M is Nb, satisfying 0.08≤y≤0.15.
[0148] <Note 8>
[0149] The piezoelectric stack according to any one of Supplementary Notes 1 to 7, wherein
[0150] The piezoelectric film has an average grain size of 0.3 μm or more, which is a weighted average of the area ratio of the grain sizes in a grain size distribution obtained by electron backscatter diffraction.
[0151] <Note 9>
[0152] The piezoelectric stack according to any one of Supplementary Notes 1 to 8, comprising a seed layer lattice-matched to the perovskite-type oxide between the lower electrode layer and the piezoelectric film.
[0153] <Note 10>
[0154] The piezoelectric stack according to Supplementary Note 9, wherein
[0155] The lattice constant of the seed layer when regarded as a pseudo-cubic crystal is 0.39 nm to 0.405 nm.
[0156] <Note 11>
[0157] The piezoelectric stack according to Supplementary Note 9 or Supplementary Note 10, wherein
[0158] The seed layer contains SrRuO3 or BaRuO3 as a main component.
[0159] <Note 12>
[0160] A piezoelectric element comprising:
[0161] The piezoelectric stack according to any one of Supplementary Notes 1 to 11; and
[0162] An upper electrode layer is provided on the piezoelectric film of the piezoelectric stack.
Claims
1. A piezoelectric laminate comprising a lower electrode layer and a piezoelectric film mainly composed of a perovskite-type oxide in this order on a substrate, wherein: When an upper electrode layer is formed on the piezoelectric film and the voltage applied between the upper electrode layer and the lower electrode layer is scanned, the lower electrode layer is grounded, and the upper electrode layer is used as a driving electrode. After the applied voltage to the piezoelectric film gradually increases from 0V to the positive side, and then gradually decreases from the positive side through 0V to the negative side, in the current-voltage curve representing the current change relative to the voltage change, the number of peaks when the voltage rises is different from the number of peaks when the voltage decreases.
2. The piezoelectric stack according to claim 1, wherein When the half-peak width when the voltage rises in the current-voltage curve is Wu and the half-peak width when the voltage drops is Wd, Wu≥1.5×Wd.
3. The piezoelectric stack according to claim 1 or 2, wherein: When the number of peaks when the voltage rises is NA and the number of peaks when the voltage drops is NB, NA>NB.
4. The piezoelectric stack according to claim 3, wherein: The peak number NA when the voltage rises is greater than the peak number NB when the voltage drops by 1.
5. The piezoelectric stack according to claim 3, wherein: The peak number NA is 3 when the voltage rises, and the peak number NB is 2 when the voltage drops.
6. The piezoelectric laminate according to claim 1 or 2, wherein: The perovskite oxide is Pb a {(Zr x Ti 1-x ) 1-y M y }O3, M is a metal element selected from the group consisting of V, Nb, Ta, Sb, Mo and W, Satisfies 0<x<1, 0<y<1, 0.9≤a≤1.
2.
7. The piezoelectric stack according to claim 6, wherein: The M is Nb, satisfying 0.08≤y≤0.
15.
8. The piezoelectric stack according to claim 1 or 2, wherein: The piezoelectric film has an average grain size of 0.3 μm or more, which is a weighted average of the area ratio of the grain sizes in a grain size distribution obtained by electron backscatter diffraction.
9. The piezoelectric stack according to claim 1 or 2, wherein: A seed layer lattice-matched to the perovskite type oxide is provided between the lower electrode layer and the piezoelectric film.
10. The piezoelectric stack according to claim 9, wherein: The lattice constant of the seed layer when regarded as a pseudo-cubic crystal is 0.39 nm to 0.405 nm.
11. The piezoelectric stack according to claim 9, wherein: The seed layer contains SrRuO3 or BaRuO3 as a main component.
12. A piezoelectric element comprising: The piezoelectric stack according to any one of claims 1 to 11; and An upper electrode layer is provided on the piezoelectric film of the piezoelectric stack.
Citation Information
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