Methods, apparatus, electronic devices, and storage media for monitoring thyristor-level components in converter valves

Abstract

This application provides a method, apparatus, electronic device, and storage medium for monitoring thyristor-level components in a converter valve, relating to the field of online monitoring technology for converter valves. The method includes: acquiring the voltage across each thyristor stage; determining the peak voltage across each thyristor stage within a set period; calculating the ratio of the peak voltage across each thyristor stage to the average of the peak voltages across N thyristor stages in the converter valve; and determining the performance of the thyristor-level components based on the calculated ratio of the peak voltages across each thyristor stage. By acquiring the voltage across each thyristor stage in the converter valve in real time, periodically calculating the peak voltage, and comparing it with the average of the peak voltages across all thyristor stages in the converter valve, the performance of the thyristor-level components is determined.

Description

Technical Field

[0001] This application relates to the field of online monitoring technology for converter valves, and more specifically, to a method, apparatus, electronic device, and storage medium for monitoring thyristor-level components in converter valves. Background Technology

[0002] The converter valve is a core component of high-voltage direct current (HVDC) transmission technology, and its reliable operation is crucial for the safe operation of the system. The core functional component of the converter valve is the thyristor. Each thyristor is equipped with voltage equalization, damping, triggering control, and protection, forming a thyristor stage. A thyristor stage mainly includes thyristors, damping capacitors, damping resistors, voltage equalization resistors, and thyristor triggering units. These components, subjected to long-term stress from voltage, current, and temperature, may experience aging and abnormal parameter changes.

[0003] Based on operational experience with high-pressure converter valves, the following common abnormalities occur in the thyristor-level components of converter valves that have been in operation for a long time:

[0004] (1) Increased leakage current in thyristors;

[0005] (2) The value of the damping capacitor decreases;

[0006] (3) The resistance of the equalizing resistor increases.

[0007] The aforementioned anomalies, occurring when parameters exceed the permissible operating range of components, can affect the reliable operation of the converter valve. However, the current monitoring system for the converter valve cannot report these anomalies. Therefore, it is necessary to properly monitor the status of thyristor-level components to prevent problems from occurring.

[0008] Currently, converter valves undergo routine maintenance, including spot checks on thyristor-level functionality, typically one-third of the time annually. Functional testing cannot replicate the comprehensive stress on the thyristor level during converter valve operation, and the test results often fail to accurately reflect the actual state of the thyristor-level components. Furthermore, functional testing is offline, making it impossible to promptly detect anomalies in thyristor-level components and thus hinder the implementation of appropriate measures to prevent the escalation of defects.

[0009] The paper "Online Monitoring Technology of Thyristor Level in HVDC Transmission Converter Valve" proposes to calculate the parameters of damping resistance, damping capacitance, and static voltage equalization resistance by adding multiple voltage and current measuring points; Patent CN201610607211.0, "An Online Monitoring Method for Dynamic Parameters of HVDC Thyristor Level DC Voltage Equalization Resistor," proposes to insert a current acquisition node in series in the DC voltage equalization circuit to realize real-time acquisition of the current flowing through the DC voltage equalization resistor in this branch; by arranging a voltage acquisition node on the positive terminal side of the thyristor in the DC voltage equalization circuit, the voltage of the DC voltage equalization resistor is obtained and transmitted locally to the trigger board for calculation; Patent CN201610603359.7, "An Online Monitoring Technology of HVDC Thyristor Level Damping Resistor..." A method for online monitoring of dynamic parameters of damping circuits proposes setting voltage and current sampling points in the damping branch and calculating the damping resistance value based on voltage and current. Patent CN201610607197.4 describes a method for monitoring the state of damping capacitors in high-voltage direct current transmission lines. This method proposes determining the continuous differential equation for solving the damping capacitance value, discretizing the continuous differential equation, and calculating the damping capacitance value based on the discretized capacitor voltage and current sampling values. Patent CN201510736471.3 describes a method for online monitoring of dynamic parameters of HVDC thyristor-level damping circuits. This method proposes using the detection of the time constant RC value of the damping circuit for online monitoring of damping circuit faults. Based on the switching characteristics of the thyristors in the damping circuit, circuit topology equivalence analysis and reduction are performed, and an equivalent circuit with the same characteristics is designed. Then, based on the characteristic change parameters, an input response equation set is formed, and the dynamic parameters to be monitored are reduced to equivalent variables, thereby calculating the feasible solution of RC in real time.

[0010] The aforementioned papers and patents calculate the parameters of damping resistance, damping capacitance, and static equalizing resistance by adding voltage and current measuring points in different branches, thereby forming an online monitoring method and system. However, the capacitance and resistance monitoring method mentioned in the aforementioned papers and patents requires the addition of multiple sensors, the calculation method is complex, and the implementation is difficult. Current routine maintenance testing work cannot accurately and timely reflect the status of thyristor-level components. The online monitoring method is complex and cannot realize the online monitoring and performance evaluation functions of thyristors. Summary of the Invention

[0011] To address at least one of the aforementioned problems, this application proposes a method, apparatus, electronic device, and storage medium for monitoring thyristor-level components in a converter valve.

[0012] According to a first aspect of this application, at least one embodiment of this application provides a method for monitoring thyristor-level components in a converter valve, the converter valve comprising N thyristor stages, where N is an integer greater than or equal to 1, each thyristor stage comprising one or more thyristor-level components, the thyristor-level components comprising a thyristor, a voltage equalization resistor, and a damping capacitor, the method comprising: acquiring the voltage across each thyristor stage; determining the peak voltage across each thyristor stage within a set period; calculating the ratio of the peak voltage across each thyristor stage to the average of the peak voltages across the N thyristor stages in the converter valve; and determining the performance of the thyristor-level components in the thyristor stages based on the calculated peak voltage ratio for each thyristor stage.

[0013] For example, in some embodiments of this application, determining the peak voltage across each thyristor stage within a set period includes:

[0014] The voltage sampling values ​​across each thyristor stage are statistically analyzed at each moment within the set period; the peak voltage across each thyristor stage within the set period is determined according to the following formula:

[0015] Upi = Max(Ui) (T) 、Ui (T-1) 、Ui (T-2) …Ui (T-m) )

[0016] Uni=Min(Ui (T) 、Ui (T-1) 、Ui (T-2) …Ui (T-m) )

[0017] Where Upi is the positive peak value of the voltage across the i-th thyristor stage within the set period, and Uni is the negative peak value of the voltage across the i-th thyristor stage within the set period. The set period includes m+1 time points, where m is an integer greater than or equal to 1, and Uni... (T) Let Ui be the voltage sampled value across the i-th thyristor stage at time T. (T-m) Let be the sampled value of the voltage across the i-th thyristor stage at time Tm, where i ranges from 1 to N.

[0018] For example, in some embodiments of this application, calculating the ratio of the peak voltage across each thyristor stage to the average peak voltage across N thyristor stages in the converter valve includes: calculating the ratio of the peak voltage across each thyristor stage to the average peak voltage across N thyristor stages in the converter valve according to the following formula:

[0019] Kpi=Upi×N / (Up1+Up2+…+UpN)

[0020] Kni=Uni×N / (Un1+Un2+…+UnN)

[0021] Wherein, Kpi is the ratio of the peak value of the positive voltage across the i-th thyristor stage to the average value of the peak values ​​of the positive voltage across the N thyristor stages in the converter valve, and Kni is the ratio of the peak value of the negative voltage across the i-th thyristor stage to the average value of the peak values ​​of the negative voltage across the N thyristor stages in the converter valve.

[0022] For example, in some embodiments of this application, determining the performance of thyristor-level components in a thyristor level based on the calculated peak voltage ratio of each thyristor level includes: determining that the thyristor of the i-th thyristor level is abnormal when Kpi ​​of the i-th thyristor level is greater than a preset first threshold and Kni is less than a preset second threshold.

[0023] For example, in some embodiments of this application, determining the performance of the thyristor stage components in the thyristor stage based on the calculated peak voltage ratio of each thyristor stage includes: determining that the damping capacitance of the i-th thyristor stage is abnormal when Kpi ​​of the i-th thyristor stage is greater than a preset third threshold and Kni is greater than a preset fourth threshold.

[0024] For example, in some embodiments of this application, determining the performance of thyristor-level components in a thyristor level based on the calculated peak voltage ratio of each thyristor level includes: determining that the voltage equalization resistance of the i-th thyristor level is abnormal when Kpi ​​of the i-th thyristor level is less than a preset fifth threshold and Kni is less than a preset sixth threshold.

[0025] According to a second aspect of this application, at least one embodiment of this application provides an apparatus for monitoring thyristor-level components in a converter valve, for performing the method as described in any one of the first aspects, the apparatus comprising: N thyristor-level voltage sensors connected corresponding to the N thyristor stages, each for acquiring the voltage across the N thyristor stages; an intelligent monitoring device connected to the N thyristor-level voltage sensors, for determining the peak voltage across each thyristor stage within a first period; further for calculating the ratio of the peak voltage across each thyristor stage to the average of the peak voltages across the N thyristor stages in the converter valve; and for determining the performance of the thyristor-level components in the thyristor stages based on the calculated peak voltage ratio of each thyristor stage.

[0026] For example, in some embodiments of this application, the intelligent monitoring device is further configured to: count the voltage sampling values ​​across each thyristor stage at each moment during the first period; and determine the voltage peak value across each thyristor stage during the first period according to the following formula:

[0027] Upi = Max(Ui) (T) 、Ui (T-1) 、Ui (T-2) …Ui (T-m) )

[0028] Uni=Min(Ui (T) 、Ui (T-1) 、Ui (T-2) …Ui (T-m) )

[0029] Where Upi is the positive peak value of the voltage across the i-th thyristor stage during the first cycle, and Uni is the negative peak value of the voltage across the i-th thyristor stage during the first cycle. (T) Let Ui be the sampled voltage value across the i-th thyristor stage at time T. (T-m) Let be the sampled value of the voltage across the i-th thyristor stage at time Tm, where i ranges from 1 to N.

[0030] According to a third aspect of this application, at least one embodiment of this application provides an electronic device, comprising: one or more processors; a memory for storing one or more programs; and, when the one or more programs are executed by the one or more processors, causing the one or more processors to perform the method as described in any one aspect of the first application.

[0031] According to a fourth aspect of this application, at least one embodiment of this application provides a computer-readable storage medium having a computer program stored thereon that, when executed by a processor, implements the method as described in any one of the first aspects.

[0032] This application provides a method and apparatus for monitoring thyristor-level components in a converter valve. By real-time acquisition of the voltage across each thyristor stage in the converter valve, periodically calculating the voltage peak value, and comparing it with the average of the voltage peak values ​​across all thyristor stages in the converter valve, the performance of the thyristor-level components is determined. Compared with the current performance evaluation method for routine maintenance functional testing of thyristor stages, the performance evaluation is more accurate and timely. Furthermore, based on the above method, targeted maintenance strategies for the converter valve can be formulated, achieving lean maintenance of the converter valve and preventing the expansion and escalation of abnormal defects.

[0033] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0034] The above and other objects, features, and advantages of this application will become more apparent from the detailed description of exemplary embodiments with reference to the accompanying drawings. The drawings described below are merely some embodiments of this application and are not intended to limit the scope of this application.

[0035] Figure 1 A flowchart illustrating an exemplary embodiment of a method for monitoring thyristor-level components in a converter valve is shown.

[0036] Figure 2 A schematic diagram of a converter valve thyristor stage is shown in an exemplary embodiment;

[0037] Figure 3 A schematic diagram showing the peak voltage across a thyristor stage in an exemplary embodiment is provided.

[0038] Figure 4 A schematic diagram of an apparatus for monitoring thyristor-level components in a converter valve, illustrating an exemplary embodiment, is shown.

[0039] Figure 5 This diagram illustrates the structure of an electronic device provided in this application. Detailed Implementation

[0040] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this application will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.

[0041] The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a full understanding of embodiments of this disclosure. However, those skilled in the art will recognize that the technical solutions of this disclosure can be practiced without one or more of these specific details, or other methods, components, materials, devices, etc. In these cases, well-known structures, methods, devices, implementations, materials, or operations will not be shown or described in detail.

[0042] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0043] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0044] Those skilled in the art will understand that the accompanying drawings are merely schematic diagrams of exemplary embodiments, and the modules or processes in the drawings are not necessarily essential for implementing this application, and therefore cannot be used to limit the scope of protection of this application.

[0045] Figure 1 A flowchart illustrating an exemplary embodiment of a method for monitoring thyristor-level components in a converter valve is provided.

[0046] According to the example embodiment, the thyristor stage is the basic building block of the converter valve. The converter valve includes N thyristor stages, where N is an integer greater than or equal to 1. A schematic diagram of the converter valve is shown below. Figure 2 As shown. Each thyristor stage includes a thyristor, a damping capacitor C, a damping resistor Rc, and a voltage equalization resistor Rd. Figure 2 The converter valve shown consists of N thyristor stages connected in series.

[0047] like Figure 1 As shown, the method for monitoring thyristor-level components in a converter valve includes steps S10-S40, whereby the thyristor-level components include a thyristor, an equalizing resistor, and a damping capacitor.

[0048] In step S10: the voltage across each thyristor stage is acquired.

[0049] According to the example embodiment, the voltage across the thyristor stage is... Figure 2 The voltage across the thyristor is acquired in real time, specifically the voltage Ui across the Ti (i = 1 - N) thyristor. The sampling rate can be set to 10 kHz.

[0050] In step S20: the peak voltage of the voltage across each thyristor stage is determined within a set period.

[0051] According to the example embodiment, determining the peak voltage across each thyristor stage within a set period includes:

[0052] S201, counts the voltage sampled value across each thyristor stage at each moment within a set period.

[0053] S202, the peak voltage across each thyristor stage within the set period is determined according to the following formula:

[0054] Upi = Max(Ui) (T) 、Ui (T-1) 、Ui (T-2) …Ui (T-m) )

[0055] Uni=Min(Ui (T) 、Ui (T-1) 、Ui (T-2) …Ui (T-m) )

[0056] Wherein, the voltage peak value includes positive and negative peak values, Upi is the positive peak value of the voltage across the i-th thyristor stage within the set period, and Uni is the negative peak value of the voltage across the i-th thyristor stage within the set period, Ui (T) Let Ui be the sampled voltage value across the i-th thyristor stage at time T. (T-m) Let be the sampled voltage value across the i-th thyristor stage at time Tm, where i ranges from 1 to N. There are m+1 voltage samples within the set period, where m is an integer greater than or equal to 1. A typical set period is 20ms. Max() is the maximum value of all data within the parentheses, and Min() is the minimum value of all data within the parentheses. The value of i ranges from 0 to N.

[0057] Figure 3 A schematic diagram of the peak voltage across a thyristor stage is shown in an exemplary embodiment.

[0058] According to the example embodiment, the horizontal axis represents time, and the vertical axis represents the voltage Ui across the i-th thyristor stage. One period is 20ms. Following the method described above, Upi = Ui (T-2) Uni = Ui (T-13) .

[0059] In step S30: Calculate the ratio of the peak voltage across each thyristor stage to the average peak voltage across the N thyristor stages in the converter valve.

[0060] According to the example embodiment, the ratio of the peak voltage across each thyristor stage to the average peak voltage across the N thyristor stages in the converter valve includes:

[0061] Kpi=Upi×N / (Up1+Up2+…+UpN)

[0062] Kni=Uni×N / (Un1+Un2+…+UnN)

[0063] Where Kpi is the ratio of the peak forward voltage across the i-th thyristor stage to the average of the peak forward voltages across the N thyristor stages in the converter valve, and Kni is the ratio of the peak negative voltage across the i-th thyristor stage to the average of the peak negative voltages across the N thyristor stages in the converter valve. N is the number of thyristor stages in the converter valve, and the value of i ranges from 1 to N.

[0064] In step S40: Based on the calculated peak voltage ratio of each thyristor stage, the performance of the thyristor stage components in the thyristor stage is determined.

[0065] According to the example embodiment, if Kpi of the i-th thyristor stage is greater than a preset first threshold and Kni is less than a preset second threshold, a thyristor anomaly is determined in the i-th thyristor stage. The typical value of the first threshold is 1.1, and the typical value of the second threshold is 1.0.

[0066] According to the example embodiment, if Kpi of the i-th thyristor stage is greater than a preset third threshold and Kni is greater than a preset fourth threshold, the damping capacitance of the i-th thyristor stage is determined to be abnormal. The typical value of the third threshold is 1.1, and the typical value of the fourth threshold is 1.1.

[0067] According to the example embodiment, if Kpi of the i-th thyristor stage is less than a preset fifth threshold and Kni is less than a preset sixth threshold, the voltage equalization resistance of the i-th thyristor stage is determined to be abnormal. The typical value of the fifth threshold is 0.9, and the typical value of the sixth threshold is 0.9.

[0068] According to the example embodiment, when Kpi ​​and Kni of the i-th thyristor stage are not within the above three ranges, it is determined that all components of the i-th thyristor stage are normal.

[0069] The value of i above ranges from 1 to N.

[0070] Figure 4 A schematic diagram of an exemplary embodiment of an apparatus for monitoring thyristor-level components in a converter valve is shown.

[0071] According to the example embodiment, a single converter valve has N thyristor stages, and each thyristor stage is equipped with a thyristor stage voltage sensor, which is used to monitor the voltage across the thyristor stage in real time.

[0072] Each single converter valve is equipped with an intelligent monitoring device connected to N thyristor-level voltage sensors. This device receives voltage data of the thyristor level from the thyristor-level voltage sensors, determines the peak voltage across each thyristor level during the first cycle, calculates the ratio of the peak voltage across each thyristor level to the average of the peak voltages across the N thyristor levels in the converter valve, and determines the performance of the thyristor-level components based on the calculated peak voltage ratio of each thyristor level.

[0073] The device for real-time monitoring of thyristor-level components is used to execute the method for real-time monitoring of thyristor-level components as described above, and therefore will not be repeated here.

[0074] This application provides a method and apparatus for monitoring thyristor-level components in a converter valve. By real-time acquisition of the voltage across each thyristor stage in the converter valve, periodically calculating the voltage peak value, and comparing it with the average of the voltage peak values ​​across all thyristor stages in the converter valve, the performance of the thyristor-level components is determined. Compared with the current performance evaluation method for routine maintenance functional testing of thyristor stages, the performance evaluation is more accurate and timely. Furthermore, based on the above method, targeted maintenance strategies for the converter valve can be formulated, achieving lean maintenance of the converter valve and preventing the expansion and escalation of abnormal defects.

[0075] Figure 5 This diagram illustrates the structure of an electronic device provided in this application.

[0076] See Figure 5 , Figure 5 An electronic device is provided, including a processor and a memory. The memory stores computer instructions, which, when executed by the processor, cause the processor to perform the computer instructions to achieve the following: Figure 1 The method and its detailed scheme are shown.

[0077] It should be understood that the above-described device embodiments are merely illustrative, and the device disclosed in this application can also be implemented in other ways. For example, the division of units / modules in the above embodiments is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units, modules, or components may be combined, or integrated into another system, or some features may be ignored or not executed.

[0078] Furthermore, unless otherwise specified, the functional units / modules in the various embodiments of this application can be integrated into one unit / module, or each unit / module can exist physically separately, or two or more units / modules can be integrated together. The integrated units / modules described above can be implemented in hardware or as software program modules.

[0079] When integrated units / modules are implemented in hardware, the hardware can be digital circuits, analog circuits, etc. The physical implementation of the hardware structure includes, but is not limited to, transistors, memristors, etc. Unless otherwise specified, the processor or chip can be any suitable hardware processor, such as a CPU, GPU, FPGA, DSP, and ASIC, etc. Unless otherwise specified, on-chip cache, off-chip memory, and storage can be any suitable magnetic or magneto-optical storage medium, such as Resistive Random Access Memory (RRAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Enhanced Dynamic Random Access Memory (EDRAM), High-Bandwidth Memory (HBM), Hybrid Memory Cube (HMC), etc.

[0080] If the integrated unit / module is implemented as a software program module and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments disclosed herein. The aforementioned memory includes various media capable of storing program code, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.

[0081] This application also provides a non-transitory computer storage medium storing a computer program, which, when executed by multiple processors, causes the processors to perform actions such as... Figure 1 The method and its detailed scheme are shown.

[0082] It should be clearly understood that this application describes how specific examples are formed and used, but this application is not limited to any details of these examples. Rather, based on the teachings of the disclosure of this application, these principles can be applied to many other embodiments.

[0083] Furthermore, it should be noted that the above figures are merely illustrative representations of the processes included in the method according to exemplary embodiments of this application, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Additionally, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0084] Exemplary embodiments of this application have been specifically shown and described above. It should be understood that this application is not limited to the detailed structures, arrangements, or implementation methods described herein; rather, this application is intended to cover various modifications and equivalent arrangements contained within the spirit and scope of the appended claims.

Claims

1. A method for monitoring thyristor-level components in a converter valve, characterized in that, The converter valve includes N thyristor stages, where N is an integer greater than or equal to 1. Each thyristor stage includes one or more thyristor stage components, including thyristors, voltage equalizing resistors, and damping capacitors. The method includes: Collect the voltage across each of the thyristor stages; Determining the peak voltage across each thyristor stage within a set period includes: The voltage sample values ​​across each thyristor stage are statistically analyzed at each moment within the set period. The peak voltage across each thyristor stage within the set period is determined by the following formula: Upi = Max (Ui (T) , Ui (T-1) , Ui (T-2) …Ui (T-m) ) Uni=Min(Ui (T) 、Ui (T-1) 、Ui (T-2) …Ui (T-m) ) Where Upi is the positive peak value of the voltage across the i-th thyristor stage within the set period, and Uni is the negative peak value of the voltage across the i-th thyristor stage within the set period. The set period includes m+1 time points, where m is an integer greater than or equal to 1, and Uni... (T) Let Ui be the voltage sampled value across the i-th thyristor stage at time T. (T-m) Let be the sampled value of the voltage across the i-th thyristor stage at time Tm, where i ranges from 1 to N; Calculate the ratio of the peak voltage across each thyristor stage to the average peak voltage across the N thyristor stages in the converter valve, including: The ratio of the peak voltage across each thyristor stage to the average peak voltage across the N thyristor stages in the converter valve is calculated using the following formula: Kpi=Upi×N / (Up1+Up2+…+UpN) Kni=Uni×N / (Un1+Un2+…+UnN) Based on the calculated peak voltage ratio of each thyristor stage, the performance of the thyristor stage components in the thyristor stage is determined, including: If Kpi of the i-th thyristor stage is greater than a preset first threshold and Kni is less than a preset second threshold, the thyristor of the i-th thyristor stage is determined to be abnormal. If Kpi of the i-th thyristor stage is greater than a preset third threshold and Kni is greater than a preset fourth threshold, the damping capacitance of the i-th thyristor stage is determined to be abnormal. If Kpi of the i-th thyristor stage is less than a preset fifth threshold and Kni is less than a preset sixth threshold, the voltage equalization resistance of the i-th thyristor stage is determined to be abnormal. Wherein, Kpi is the ratio of the peak value of the positive voltage across the i-th thyristor stage to the average value of the peak values ​​of the positive voltage across the N thyristor stages in the converter valve, and Kni is the ratio of the peak value of the negative voltage across the i-th thyristor stage to the average value of the peak values ​​of the negative voltage across the N thyristor stages in the converter valve.

2. A device for monitoring thyristor-level components in a converter valve, characterized in that, The apparatus for performing the method as claimed in claim 1 includes: N thyristor-level voltage sensors are connected to N thyristor stages respectively, and are used to collect the voltage across the N thyristor stages. An intelligent monitoring device, connected to N thyristor-stage voltage sensors, is used to determine the peak voltage across each thyristor stage during a first cycle; it is also used to calculate the ratio of the peak voltage across each thyristor stage to the average of the peak voltages across the N thyristor stages in the converter valve; and it is used to determine the performance of the thyristor-stage components in the thyristor stages based on the calculated peak voltage ratio of each thyristor stage.

3. The apparatus as described in claim 2, characterized in that, The intelligent monitoring device is also used for: Statistically analyze the voltage sample values ​​across each thyristor stage at each moment during the first period; and The peak voltage across each thyristor stage during the first cycle is determined by the following formula: Upi = Max (Ui (T) , Ui (T-1) , Ui (T-2) …Ui (T-m) ) Uni=Min(Ui (T) 、Ui (T-1) 、Ui (T-2) …Ui (T-m) ) Where Upi is the positive peak value of the voltage across the i-th thyristor stage during the first cycle, and Uni is the negative peak value of the voltage across the i-th thyristor stage during the first cycle. (T) Let Ui be the voltage sampled value across the i-th thyristor stage at time T. (T-m) Let be the sampled value of the voltage across the i-th thyristor stage at time Tm, where i ranges from 1 to N.

4. An electronic device, characterized in that, include: One or more processors; Memory, used to store one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors perform the method as described in claim 1.

5. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the method as described in claim 1.

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