Low noise amplifier and radio frequency chip

Abstract

The invention relates to the technical field of wireless communication, and provides a low noise amplifier and a radio frequency chip, the low noise amplifier comprises a band-pass filter, a first input matching circuit, a second input matching circuit, a first amplification circuit, a second amplification circuit and a third amplification circuit; the band-pass filter, the first input matching circuit, the first amplifying circuit and the third amplifying circuit are electrically connected in sequence; the second input matching circuit, the second amplifying circuit and the third amplifying circuit are electrically connected in sequence; the output end of the first amplifying circuit is connected with the output end of the second amplifying circuit; the input end of the band-pass filter serves as the first signal input end of the low-noise amplifier and is used for being connected with an external logic control circuit. The external logic control circuit is used for switching signal output of the first signal input end or the second signal input end; the low noise amplifier further comprises a first bias circuit, a second bias circuit and a third bias circuit. The low-noise amplifier provided by the invention is better in noise performance and better in gain.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to a low noise amplifier and a radio frequency chip. Background Art

[0002] In communication technology, amplifiers are widely used to amplify and enhance signals. In many applications, such as wireless communication, optical communication, radar, and audio amplification, the performance of the amplifier is critical to the overall performance of the system. In scenarios where the ambient noise and nearby spurious signal interference are small enough, providing a path through the filter to the low-noise amplifier can avoid the gain and noise degradation caused by the filter.

[0003] The existing low noise amplifier structure includes a signal input terminal, a filter, a power amplifier and a signal output terminal, which are electrically connected in sequence. In this way, in addition to the low noise amplifier itself, a bandpass filter can be added to the input terminal to suppress the influence of out-of-band spurious signals on the in-band. This system has been widely used in practice.

[0004] However, this traditional low-noise amplification will inevitably introduce insertion loss caused by the filter, further affecting the noise and gain of the low-noise amplifier, reducing the sensitivity of the receiver at the back end of the low-noise amplifier. In some environments where the spurious signals are relatively clean, the existence of the filter is unnecessary, resulting in the unnecessary introduction of the insertion loss of the filter. Summary of the invention

[0005] In view of the above shortcomings of the prior art, the present invention provides a low noise amplifier to solve the problem of large insertion loss of the prior low noise amplifier.

[0006] In order to solve the above technical problems, the present invention adopts the following technical solutions: In a first aspect, an embodiment of the present invention provides a low noise amplifier, including a bandpass filter, a first input matching circuit, a second input matching circuit, a first amplifying circuit, a second amplifying circuit, and a third amplifying circuit; The bandpass filter, the first input matching circuit, the first amplifier circuit and the third amplifier circuit are electrically connected in sequence; the second input matching circuit, the second amplifier circuit and the third amplifier circuit are electrically connected in sequence; the output end of the first amplifier circuit is connected to the output end of the second amplifier circuit; the input end of the bandpass filter serves as the first signal input end of the low-noise amplifier, which is used to connect to an external logic control circuit; the input end of the second input matching circuit serves as the second signal input end of the low-noise amplifier, which is used to connect to the external logic control circuit; the external logic control circuit is used to switch the signal output of the first signal input end or the second signal input end; The low noise amplifier further comprises a first bias circuit, a second bias circuit and a third bias circuit, wherein the first bias circuit, the second bias circuit and the third bias circuit are respectively used to provide bias voltages for the first amplifying circuit, the second amplifying circuit and the third amplifying circuit.

[0007] Preferably, the first amplifier circuit includes a first MOS transistor, a second MOS transistor, a first inductor and a first resistor; The gate of the first MOS tube serves as the input end of the first amplifier circuit, the source of the first MOS tube is connected in series with the first inductor and then grounded, the drain of the first MOS tube is connected to the source of the second MOS tube, the drain of the second MOS tube serves as the output end of the first amplifier circuit, the gate of the second MOS tube is connected to the first end of the first resistor, and the second end of the first resistor is used to connect to a first external start-up voltage.

[0008] Preferably, the first input matching circuit includes a second inductor and a first capacitor; the first end of the second inductor serves as the input end of the first input matching circuit and is connected to the output end of the bandpass filter, the second end of the second inductor is connected to the first end of the first capacitor, and the second end of the first capacitor serves as the output end of the first input matching circuit and is connected to the gate of the first MOS tube.

[0009] Preferably, the first bias circuit includes a first voltage source and a second resistor; the first voltage source is connected to a first end of the second resistor and provides power for the second resistor, and the second end of the second resistor is connected to the gate of the first MOS tube.

[0010] Preferably, the second amplifying circuit includes a third MOS tube, a fourth MOS tube, a third inductor and a third resistor; The gate of the third MOS tube serves as the input end of the second amplifier circuit, the source of the third MOS tube is connected in series with the third inductor and then grounded, the drain of the third MOS tube is connected to the source of the fourth MOS tube, the drain of the fourth MOS tube serves as the output end of the second amplifier circuit, the gate of the fourth MOS tube is connected to the first end of the third resistor, and the second end of the third resistor is used to connect to the second external start-up voltage.

[0011] Preferably, the second input matching circuit includes a fourth inductor and a second capacitor; the first end of the fourth inductor serves as the input end of the second input matching circuit, the second end of the fourth inductor is connected to the first end of the second capacitor, and the second end of the second capacitor serves as the output end of the second input matching circuit and is connected to the gate of the third MOS tube.

[0012] Preferably, the second bias circuit includes a second voltage source and a fourth resistor; the second voltage source is connected to the first end of the fourth resistor and provides power for the fourth resistor, and the second end of the fourth resistor is connected to the gate of the third MOS tube.

[0013] Preferably, the third amplifier circuit includes a fifth MOS tube and a fifth resistor; the source of the fifth MOS tube serves as the input end of the third amplifier circuit, the gate of the fifth MOS tube is connected to the first end of the fifth resistor, and the second end of the fifth resistor is used to connect to an external start-up voltage; the drain of the fifth MOS tube serves as the output end of the third amplifier circuit.

[0014] Preferably, the low-noise amplifier also includes an output matching circuit; the output matching circuit includes a fifth inductor and a third capacitor; the first end of the fifth inductor is connected to the first end of the third capacitor and together serve as the input end of the output matching circuit connected to the output end of the third amplification circuit, the second end of the fifth inductor is used to connect to a power supply, and the second end of the third capacitor serves as the output end of the output matching circuit and is used for the signal output of the low-noise amplifier.

[0015] In a second aspect, an embodiment of the present invention provides a radio frequency chip, comprising the low noise amplifier as described above.

[0016] Compared with the related art, in the embodiment of the present invention, the first signal input terminal is electrically connected to the bandpass filter, the first input matching circuit, the first amplifier circuit and the third amplifier circuit in sequence; the second signal input terminal is electrically connected to the first input matching circuit, the second amplifier circuit and the third amplifier circuit in sequence; the output terminal of the first amplifier circuit is connected to the output terminal of the second amplifier circuit; the first signal input terminal and the second signal input terminal are also used to connect to the external logic control circuit, and the external logic control circuit is used to switch the signal output of the first signal input terminal or the second signal input terminal; the first bias circuit, the second bias circuit and the third bias circuit are respectively used to provide bias voltages for the first amplifier circuit, the second amplifier circuit and the third amplifier circuit; in the presence of stray signals, the signal is controlled by the external switch, input through the first signal input terminal, passes through the bandpass filter, and is input into the first amplifier circuit; and in the receiving environment where the stray signals are relatively pure, the signal is controlled by the external switch, input through the second signal input terminal, skips the filter and directly inputs the second amplifier circuit, and the signal is directly amplified. At this time, the signal does not pass through the filter, which will reduce the insertion loss of one filter compared to the other port; thereby, the noise performance of the low noise amplifier is better and the gain is better. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings: Figure 1 A circuit diagram of a low noise amplifier provided in an embodiment of the present invention.

[0018] Among them, 100, low noise amplifier, 1, first signal input terminal, 2, second signal input terminal, 3, band pass filter, 4, first input matching circuit, 5, second input matching circuit, 6, first amplifying circuit, 7, second amplifying circuit, 8, third amplifying circuit, 9, output matching circuit, 10, signal output terminal, 11, first bias circuit, 111, first voltage source, 12, second bias circuit, 121, second voltage source, 13, third bias circuit. DETAILED DESCRIPTION

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.

[0020] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0021] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] Embodiment 1 See also Figure 1As shown, an embodiment of the present invention provides a low noise amplifier 100, including a bandpass filter 3, a first input matching circuit 4, a second input matching circuit 5, a first amplifying circuit 6, a second amplifying circuit 7 and a third amplifying circuit 8.

[0023] The bandpass filter 3, the first input matching circuit 4, the first amplifier circuit 6 and the third amplifier circuit 8 are electrically connected in sequence; the second input matching circuit 5, the second amplifier circuit 7 and the third amplifier circuit 8 are electrically connected in sequence; the output end of the first amplifier circuit 6 is connected to the output end of the second amplifier circuit 7; the bandpass filter 3 serves as the first signal input end 1 (LNAin1) of the low noise amplifier 100, which is used to connect to an external logic control circuit. The input end of the second input matching circuit 5 serves as the second signal input end 2 (LNAin2) of the low noise amplifier 100, which is used to connect to the external logic control circuit. The external logic control circuit is used to switch the signal output of the first signal input end 1 or the second signal input end 2. The output end of the third amplifier circuit 8 serves as the signal output end 10 (LNAout) of the low noise amplifier 100. In this way, in the presence of spurious signals, the signal is controlled by an external switch, input through the first signal input terminal 1, passed through the bandpass filter 3, and input into the first amplifier circuit 6; while in a receiving environment where the spurious signal is relatively pure, the signal is controlled by an external switch, input through the second signal input terminal 2, bypassing the filter and directly input into the second amplifier circuit 7, and the signal is directly amplified. At this time, the signal does not pass through the bandpass filter 3, which will reduce the insertion loss of one filter compared to another port; thereby making the noise performance of the low noise amplifier 100 better and the gain better.

[0024] The low noise amplifier 100 further includes a first bias circuit 11, a second bias circuit 12 and a third bias circuit 13. The first bias circuit 11, the second bias circuit 12 and the third bias circuit 13 are respectively used to provide bias voltages for the first amplifier circuit 6, the second amplifier circuit 7 and the third amplifier circuit 8. The bias voltages are used to provide appropriate start-up voltages for the first amplifier circuit 6, the second amplifier circuit 7 and the third amplifier circuit 8.

[0025] In this embodiment, the first amplifier circuit 6 includes a first MOS transistor M1 , a second MOS transistor M2 , a first inductor L1 , and a first resistor R1 .

[0026] The gate of the first MOS transistor M1 serves as the input end of the first amplifier circuit 6, the source of the first MOS transistor M1 is connected in series with the first inductor L1 and then grounded, the drain of the first MOS transistor M1 is connected to the source of the second MOS transistor M2, the drain of the second MOS transistor M2 serves as the output end of the first amplifier circuit 6, the gate of the second MOS transistor M2 is connected to the first end of the first resistor R1, and the second end of the first resistor R1 is used to connect to the first external start-up voltage SW1.

[0027] In this embodiment, the first input matching circuit 4 includes a second inductor L2 and a first capacitor C1; the first end of the second inductor L2 serves as the input end of the first input matching circuit 4 and is connected to the output end of the bandpass filter 3, the second end of the second inductor L2 is connected to the first end of the first capacitor C1, and the second end of the first capacitor C1 serves as the output end of the first input matching circuit 4 and is connected to the gate of the first MOS tube M1. In an environment with stray signals, the signal is input through the first signal input end 1, passes through the bandpass filter 3, suppresses the out-of-band stray signals, is matched through the second inductor L2, and is isolated through the first capacitor C1, and enters the gate of the first MOS tube M1. At this time, the gate of the first MOS tube M1 is given an appropriate start-up voltage through the first bias circuit 11. At the same time, the first external start-up voltage SW1 and the third bias circuit 13 are respectively used to provide appropriate start-up voltages to the second MOS tube M2 and the third amplifier circuit 8, so that the first MOS tube M1 and the third amplifier circuit 8 form a common source and common gate structure, and the amplified signal is output to the signal output end 10 after passing through the third amplifier circuit 8.

[0028] In this embodiment, the first bias circuit 11 includes a first voltage source 111 and a second resistor R2; the first voltage source 111 is connected to a first end of the second resistor R2 and provides power to the second resistor R2, and a second end of the second resistor R2 is connected to the gate of the first MOS transistor M1. The first voltage source 111 is used to provide a bias voltage for the first MOS transistor M1. The first voltage source 111 passes the start-up voltage and performs voltage division through the second resistor R2, thereby outputting a stable start-up voltage to the gate of the first MOS transistor M1, providing an appropriate start-up voltage for the first MOS transistor M1.

[0029] In this embodiment, the second amplifier circuit 7 includes a third MOS transistor M3, a fourth MOS transistor M4, a third inductor L3 and a third resistor R3.

[0030] The gate of the third MOS tube M3 serves as the input end of the second amplifier circuit 7, the source of the third MOS tube M3 is connected in series with the third inductor L3 and then grounded, the drain of the third MOS tube M3 is connected to the source of the fourth MOS tube M4, the drain of the fourth MOS tube M4 serves as the output end of the second amplifier circuit 7, the gate of the fourth MOS tube M4 is connected to the first end of the third resistor R3, and the second end of the third resistor R3 is used to connect the second external start-up voltage SW2.

[0031] In this embodiment, the second input matching circuit 5 includes a fourth inductor L4 and a second capacitor C2; the first end of the fourth inductor L4 serves as the input end of the second input matching circuit 5, the second end of the fourth inductor L4 is connected to the first end of the second capacitor C2, and the second end of the second capacitor C2 serves as the output end of the second input matching circuit 5 and is connected to the gate of the third MOS tube M3. In an environment where the stray signal is relatively clean, the signal is input through the second signal input end 2, matched through the fourth inductor L4, and DC isolation is achieved through the second capacitor C2, and then enters the gate of the third MOS tube M3. At this time, the gate of the third MOS tube M3 is given an appropriate start-up voltage through the second bias circuit 12. At the same time, the first external start-up voltage SW1 and the third bias circuit 13 are respectively used to provide appropriate start-up voltages to the third MOS tube M3 and the third amplifier circuit 8, so that the third MOS tube M3 and the third amplifier circuit 8 form a common source and common gate structure, and the amplified signal is output to the signal output end 10 after passing through the third amplifier circuit 8. In this way, it is possible to control the two channels with or without filters through an external logic control circuit, and freely select the amplified channel of the second signal input terminal 2, and the noise coefficient of the input channel of the first signal input terminal 1 will be significantly better than that of the first signal input terminal 1. At the same time, in complex environments, there is still the channel of the first signal input terminal 1 with a filter to choose from.

[0032] In this embodiment, the second bias circuit 12 includes a second voltage source 121 and a fourth resistor R4; the second voltage source 121 is connected to the first end of the fourth resistor R4 and provides power for the fourth resistor R4, and the second end of the fourth resistor R4 is connected to the gate of the third MOS tube M3. The second voltage source 121 is used to provide a bias voltage for the third MOS tube M3. The second voltage source 121 passes the start-up voltage and performs voltage division through the fourth resistor R4, thereby outputting a stable start-up voltage to the gate of the third MOS tube M3, providing an appropriate start-up voltage for the third MOS tube M3.

[0033] In this embodiment, the third amplifier circuit 8 includes a fifth MOS tube M5 and a fifth resistor R5; the source of the fifth MOS tube M5 serves as the input end of the third amplifier circuit 8, the gate of the fifth MOS tube M5 is connected to the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is used to connect to an external start-up voltage; the drain of the fifth MOS tube M5 serves as the output end of the third amplifier circuit 8.

[0034] Specifically, in an environment with stray signals, the signal is input through the first signal input terminal 1, passes through the bandpass filter 3, suppresses the out-of-band stray signals, is matched through the second inductor L2, and is DC-isolated through the first capacitor C1, and enters the gate of the first MOS tube M1. At this time, the gate of the first MOS tube M1 is given an appropriate start-up voltage through the first bias circuit 11. At the same time, the first external start-up voltage SW1 and the third bias circuit 13 are respectively used to provide appropriate start-up voltages to the second MOS tube M2 and the fifth MOS tube M5, so that the first MOS tube M1 and the fifth MOS tube M5 form a common source and common gate structure, and the amplified signal is output to the signal output terminal 10 after passing through the fifth MOS tube M5.

[0035] Specifically, in an environment where the stray signal is relatively clean, the signal is input through the second signal input terminal 2, matched through the fourth inductor L4, and DC isolation is implemented through the second capacitor C2, and then enters the gate of the third MOS tube M3. At this time, an appropriate start-up voltage is provided to the gate of the third MOS tube M3 through the second bias circuit 12. At the same time, appropriate start-up voltages are provided to the third MOS tube M3 and the fifth MOS tube M5 through the first external start-up voltage SW1 and the third bias circuit 13, respectively, so that the third MOS tube M3 and the fifth MOS tube M5 form a common source and common gate structure, and the amplified signal is output to the signal output terminal 10 after passing through the fifth MOS tube M5.

[0036] In this embodiment, the low noise amplifier 100 further includes an output matching circuit 9; the output matching circuit 9 includes a fifth inductor L5 and a third capacitor C3; the first end of the fifth inductor L5 is connected to the first end of the third capacitor C3 and is connected to the output end of the third amplifier circuit 8 as an input end of the output matching circuit 9, the second end of the fifth inductor L5 is used to connect to the power supply VDD, and the second end of the third capacitor C3 is used as the output end of the output matching circuit 9 and is used for the signal output of the low noise amplifier 100. Optionally, the second end of the third capacitor C3 is used as the signal output end 10 (LNAout) of the low noise amplifier 100.

[0037] Embodiment 2 The embodiment of the present invention provides a radio frequency chip, including the low noise amplifier 100 as described above. The technical effect produced by the radio frequency chip of this embodiment is the same as that of the first embodiment, and will not be described here.

[0038] It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the present invention rather than to limit the scope of the present invention. Those skilled in the art should understand that any modification or equivalent substitution of the present invention without departing from the spirit and scope of the present invention should be included within the scope of the present invention. In addition, unless otherwise indicated by the context, words appearing in the singular include the plural form, and vice versa. In addition, unless otherwise specified, all or part of any embodiment may be used in combination with all or part of any other embodiment.

Claims

1. A low noise amplifier, characterized in that: It includes a bandpass filter, a first input matching circuit, a second input matching circuit, a first amplifying circuit, a second amplifying circuit and a third amplifying circuit; The bandpass filter, the first input matching circuit, the first amplifier circuit and the third amplifier circuit are electrically connected in sequence; the second input matching circuit, the second amplifier circuit and the third amplifier circuit are electrically connected in sequence; the output end of the first amplifier circuit is connected to the output end of the second amplifier circuit; the input end of the bandpass filter serves as the first signal input end of the low-noise amplifier, which is used to connect to an external logic control circuit; the input end of the second input matching circuit serves as the second signal input end of the low-noise amplifier, which is used to connect to the external logic control circuit; the external logic control circuit is used to switch the signal output of the first signal input end or the second signal input end; The low noise amplifier further comprises a first bias circuit, a second bias circuit and a third bias circuit, wherein the first bias circuit, the second bias circuit and the third bias circuit are respectively used to provide bias voltages for the first amplifying circuit, the second amplifying circuit and the third amplifying circuit.

2. The low noise amplifier according to claim 1, characterized in that: The first amplifier circuit includes a first MOS tube, a second MOS tube, a first inductor and a first resistor; The gate of the first MOS tube serves as the input end of the first amplifier circuit, the source of the first MOS tube is connected in series with the first inductor and then grounded, the drain of the first MOS tube is connected to the source of the second MOS tube, the drain of the second MOS tube serves as the output end of the first amplifier circuit, the gate of the second MOS tube is connected to the first end of the first resistor, and the second end of the first resistor is used to connect to a first external start-up voltage.

3. The low noise amplifier according to claim 2, characterized in that: The first input matching circuit includes a second inductor and a first capacitor; the first end of the second inductor serves as the input end of the first input matching circuit and is connected to the output end of the bandpass filter, the second end of the second inductor is connected to the first end of the first capacitor, and the second end of the first capacitor serves as the output end of the first input matching circuit and is connected to the gate of the first MOS tube.

4. The low noise amplifier according to claim 2, characterized in that: The first bias circuit includes a first voltage source and a second resistor; the first voltage source is connected to a first end of the second resistor and provides power for the second resistor, and a second end of the second resistor is connected to a gate of the first MOS tube.

5. The low noise amplifier according to claim 1, characterized in that: The second amplifier circuit includes a third MOS tube, a fourth MOS tube, a third inductor and a third resistor; The gate of the third MOS tube serves as the input end of the second amplifier circuit, the source of the third MOS tube is connected in series with the third inductor and then grounded, the drain of the third MOS tube is connected to the source of the fourth MOS tube, the drain of the fourth MOS tube serves as the output end of the second amplifier circuit, the gate of the fourth MOS tube is connected to the first end of the third resistor, and the second end of the third resistor is used to connect to the second external start-up voltage.

6. The low noise amplifier according to claim 5, characterized in that: The second input matching circuit includes a fourth inductor and a second capacitor; the first end of the fourth inductor serves as the input end of the second input matching circuit, the second end of the fourth inductor is connected to the first end of the second capacitor, and the second end of the second capacitor serves as the output end of the second input matching circuit and is connected to the gate of the third MOS tube.

7. The low noise amplifier according to claim 5, characterized in that: The second bias circuit includes a second voltage source and a fourth resistor; the second voltage source is connected to a first end of the fourth resistor and provides power for the fourth resistor, and a second end of the fourth resistor is connected to a gate of the third MOS tube.

8. The low noise amplifier according to claim 1, characterized in that: The third amplifier circuit includes a fifth MOS tube and a fifth resistor; the source of the fifth MOS tube serves as the input end of the third amplifier circuit, the gate of the fifth MOS tube is connected to the first end of the fifth resistor, and the second end of the fifth resistor is used to connect to an external start-up voltage; the drain of the fifth MOS tube serves as the output end of the third amplifier circuit.

9. The low noise amplifier according to claim 8, characterized in that: The low-noise amplifier also includes an output matching circuit; the output matching circuit includes a fifth inductor and a third capacitor; the first end of the fifth inductor is connected to the first end of the third capacitor and together serves as an input end of the output matching circuit connected to the output end of the third amplifying circuit, the second end of the fifth inductor is used to connect to a power supply, and the second end of the third capacitor serves as an output end of the output matching circuit and is used for signal output of the low-noise amplifier.

10. A radio frequency chip, characterized in that: Comprising a low noise amplifier as described in any one of claims 1-9.

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