Zero-IF Signal Correction Method, Device, Electronic Device and Storage Medium

Abstract

Embodiments of the present invention relate to the field of wireless communication technologies, and disclose a zero-IF signal correction method, apparatus, electronic device, and storage medium. In the present invention, by decoding a segment of a WiFi signal after automatic gain control is locked in the baseband, a signal quality index of the WiFi signal is obtained; when the signal quality index of the WiFi signal is higher than a preset threshold, the segment of the WiFi signal is stored and an input reference signal is obtained by using the segment of the WiFi signal; and zero-IF correction is performed by using the input reference signal. Compared with the closed-loop correction method, the present invention does not require a hardware loop; compared with the blind correction method, the present invention can achieve the effect of closed-loop correction by using the segment of the WiFi signal to obtain an input reference signal.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technologies, and particularly to a zero intermediate frequency signal correction method, apparatus, electronic device, and storage medium. Background Art

[0002] Currently, the reception of WiFi signals generally adopts a zero intermediate frequency reception structure. Zero Intermediate Frequency (ZIF) has the advantages of simple structure and low cost, but there are problems such as DC offset, local oscillator leakage, and flicker noise.

[0003] There are two traditional zero intermediate frequency correction schemes: 1) a closed-loop correction loop, which can obtain input and output signals for modeling and calculation to obtain correction coefficients; 2) blind correction.

[0004] The advantage of the correction method of the closed-loop correction loop is accurate modeling, but a hardware loop is required; the blind correction method does not require a hardware loop, but there are problems of instability of multiple taps and requires a long-time stable signal. Therefore, how to achieve zero intermediate frequency signal correction without a hardware loop and ensure stability is still a technical blank in this field. Summary of the Invention

[0005] The purpose of the embodiments of the present invention is to provide a zero intermediate frequency signal correction method, apparatus, electronic device, and storage medium, so as to achieve zero intermediate frequency signal correction without a hardware loop and ensure stability.

[0006] To solve the above technical problems, an embodiment of the present invention provides a zero intermediate frequency signal correction method, including: decoding a segment of the WiFi signal after automatic gain control locking by the baseband to obtain a signal quality index of the WiFi signal; storing and using the segment of the WiFi signal to obtain an input reference signal when the signal quality index of the WiFi signal is higher than a preset threshold; and performing zero intermediate frequency correction using the input reference signal.

[0007] An embodiment of the present invention further provides a zero intermediate frequency signal correction apparatus, including: a baseband decoding module, configured to decode a segment of the WiFi signal after automatic gain control locking by the baseband to obtain a signal quality index of the WiFi signal;

[0008] a data screening module, configured to store and use the segment of the WiFi signal to obtain an input reference signal when the signal quality index of the WiFi signal is higher than a preset threshold; and a signal correction module, configured to perform zero intermediate frequency correction using the input reference signal.

[0009] Embodiments of the present invention also provide an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the above-described zero-IF signal correction method.

[0010] Embodiments of the present invention also provide a computer-readable storage medium storing a computer program, which implements the above-described zero-IF signal correction method when executed by a processor.

[0011] In embodiments of the present invention, by decoding a segment of a WiFi signal after automatic gain control is locked in the baseband, a signal quality index of the WiFi signal is obtained; when the signal quality index of the WiFi signal is higher than a preset threshold, the segment of the WiFi signal is stored and used to obtain an input reference signal; the input reference signal is used for zero-IF correction. Compared with the closed-loop correction method, the present invention does not require a hardware loop; compared with the blind correction method, the present invention can achieve the effect of closed-loop correction by using the segment of the WiFi signal to obtain the input reference signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] One or more embodiments are illustrated by way of example in the accompanying drawings, which illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements, unless otherwise stated, and the drawings in the figures do not constitute a scale limitation.

[0013] Figure 1 is a flowchart of a zero-IF signal correction method according to an embodiment of the present invention;

[0014] Figure 2 is a schematic structural diagram of a zero-IF signal correction device according to another embodiment of the present invention;

[0015] Figure 3 is a schematic structural diagram of an electronic device according to another embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0016] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will elaborate on the various embodiments of the present invention with reference to the accompanying drawings. However, those of ordinary skill in the art can understand that in various embodiments of the present invention, many technical details are provided to help readers better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the present application can still be implemented. The following division of each embodiment is for convenience of description and should not constitute any limitation on the specific implementation of the present invention. Each embodiment can be combined and cross-referenced with each other without conflict.

[0017] An embodiment of the present invention relates to a zero-IF signal correction method, which can be applied to a zero-IF signal receiver. In this embodiment, by decoding a segment of the WiFi signal after the automatic gain control is locked in the baseband, the signal quality index of the WiFi signal is obtained; when the signal quality index of the WiFi signal is higher than a preset threshold, the segment of the WiFi signal is stored and used to obtain an input reference signal; the input reference signal is used for zero-IF correction. Compared with the closed-loop correction method, the present invention does not require a hardware loop; compared with the blind correction method, the present invention can achieve the effect of closed-loop correction by using the segment of the WiFi signal to obtain the input reference signal. And because the correction is performed using the characteristics of the service signal itself, real-time online distortion correction can be performed without interrupting and interfering with the transmission of the service signal. The implementation details of the zero-IF signal correction method of this embodiment will be specifically described below. The following content is only the implementation details provided for easy understanding and is not necessary for implementing this solution.

[0018] As Figure 1 shown, in step 101, the zero-IF signal receiver obtains the signal quality index of the WiFi signal by decoding a segment of the WiFi signal after the automatic gain control is locked in the baseband.

[0019] Among them, the baseband refers to the inherent frequency band (frequency bandwidth) of the original electrical signal emitted by the information source (also called the transmitting end) without modulation (spectrum shifting and transformation), and is fully called the basic frequency band.

[0020] Automatic Gain Control (AGC) plays a crucial role in WiFi communication. AGC is a closed-loop control system that automatically adjusts the amplification of the signal according to the size of the input signal to ensure that the amplitude of the output signal is as large as possible but does not exceed the maximum allowable value of the Analog to Digital Converter (ADC). The purpose of this is to maximize the dynamic range of the signal, reduce the influence of the inherent noise of the system itself, and thus improve the output signal-to-noise ratio.

[0021] The WiFi protocol stipulates that the AGC locking time is less than 5.6 microseconds. However, considering the influence of the signal and interference plus noise, in one example, in a scenario with a high signal-to-interference-plus-noise ratio, the locking duration of the automatic gain control is between 3 microseconds and 4 microseconds.

[0022] Different from communication systems such as Long Term Evolution (LTE) technology or New Radio (NR), there is a relatively long period of allowed access signals (i.e., Legacy signals) before the service signal in WiFi signals. Legacy signals are also a type of WiFi signal, and the L-SIG (Legacy Signalfield) field is included in these fragments of WiFi signals. Among them, L-SIG is a part of the 802.11ac physical layer frame structure, mainly used to transmit MCS (Modulation and Coding Scheme), Length (data length), and parity bits. In the case of a 20MHz (megahertz) bandwidth, the MCS field in L-SIG is fixed at a rate of 6Mbps (megabits per second).

[0023] The generation process of the L-SIG field includes the following steps: 1. Generate the bit information of the SIG field: Fill in the information of the MCS and Length fields. 2. BCC (Binary Convolutional Code) encoding: Perform 1 / 2 encoding on the bit information. 3. Interleaving processing: Perform interleaving processing on the encoded data. The design of L-SIG is to ensure that WiFi devices can be compatible with older versions of the WiFi standard. In this way, new WiFi devices can smoothly access the network without changing the existing network settings, ensuring the stability and compatibility of the network.

[0024] In an example, the fragment of the WiFi signal contains the L-SIG field. In fact, after AGC locking, a segment of the signal is stored, and the storage amount can be adjusted according to the situation. In addition to the L-SIG field, the signal from the locked point to the SIG (Signal) field can be stored. Among them, the SIG field is a field in the communication protocol used to transmit control information and data.

[0025] In an example, decoding the fragment of the WiFi signal after automatic gain control locking can be specifically: when the baseband is locked by AGC, the zero-IF signal receiver performs equalization and decodes the SIG field, and after the SIG field is decoded, the above-mentioned stored signal quality indicators will be output.

[0026] Among them, equalization in communication refers to the equalization of the channel characteristics, that is, the equalizer at the receiving end generates characteristics opposite to the channel to cancel the inter-symbol interference caused by the time-varying multipath propagation characteristics of the channel. In other words, the frequency and time selectivity of the channel are eliminated through the equalizer.

[0027] In one example, the signal quality indicator includes the Signal to Interference plus Noise Ratio (SINR).

[0028] In step 102, when the signal quality indicator of the WiFi signal is higher than a preset threshold, the zero-IF signal receiver stores and uses the segment of the WiFi signal to obtain the input reference signal;

[0029] If the signal quality indicator is less than a certain threshold (the threshold here can be configured), it proves that the signal quality of the above storage is poor, and the above storage signal is not suitable for algorithm calibration.

[0030] If the signal quality indicator is greater than a certain threshold (the threshold here can be configured), it proves that the signal quality of the above storage is good, and the above storage signal is suitable for algorithm calibration.

[0031] In step 103, the zero-IF signal receiver performs zero-IF calibration using the input reference signal. For example:

[0032] Use the baseband storage to correlate the Legacy local sequence for synchronization with the stored sequence. After time-frequency offset calibration, perform zero-IF algorithm calibration calculation. Assume that the signal received at the air interface is called A, and the baseband local storage signal is called B (Legacy local sequence), then A and B can perform correlation calculation to align the time delay, and make up the remaining time offset and frequency offset between A and B, so that the zero-IF RF signal receiver can perform calibration calculation.

[0033] In one example, performing zero-IF calibration using the input reference signal can be: after performing time-frequency offset calibration on the input reference signal, implement zero-IF calibration through the zero-IF calibration algorithm.

[0034] Among them, time-frequency offset calibration refers to calibrating the time-frequency signal to ensure its accuracy and reliability. Time-frequency offset calibration is mainly applied to fields such as communication, navigation, and finance. The technologies and methods involved include temperature compensation, digital calibration, adaptive calibration algorithms, crystal oscillator selection, and software compensation, etc.

[0035] The IQ imbalance problem in the zero-IF receiver is mainly caused by the imbalance between the in-phase component (I) and the quadrature component (Q). In the zero-IF receiver, I and Q represent the in-phase component and the quadrature component respectively. Ideally, I(t)= cos(ωt) and Q(t) = sin(ωt), but in actual applications, due to the characteristics of RF components, environmental factors, etc., there will be amplitude and phase deviations between I and Q, resulting in IQ imbalance.

[0036] In the ZIF architecture, a DC compensation system is used to compensate for the DC offset in the receiver. The system includes a calibrator that periodically performs a calibration procedure. It samples the output signal for each gain bit level of the baseband amplifier by the successive approximation method and uses this data to calculate the gain, DC offset, and DC differential value, thereby determining the conversion value. Gain control: The gain control logic device and the DC control logic device work together to adjust the gain through a gain converter. The calibrator programs the gain converter with the values determined during the calibration procedure to ensure the stability and accuracy of the system.

[0037] This embodiment does not require a hardware loop; compared with the blind correction method, the present invention can achieve the effect of closed-loop correction by using the input reference signal. From the perspective of digital correction, compared with the one-time correction during power-on or factory tooling, the correction performance will deteriorate with environmental changes. This embodiment can perform real-time online correction through the characteristics of digital correction.

[0038] In this embodiment, by decoding a segment of the WiFi signal after automatic gain control locking in the baseband, the signal quality index of the WiFi signal is obtained; when the signal quality index of the WiFi signal is higher than a preset threshold, the segment of the WiFi signal is stored and used to obtain the input reference signal; the input reference signal is used for zero-IF correction. Compared with the closed-loop correction method, the present invention does not require a hardware loop; compared with the blind correction method, the present invention can achieve the effect of closed-loop correction by using the segment of the WiFi signal to obtain the input reference signal.

[0039] The step division of the above method is only for clear description. When implemented, it can be combined into one step or some steps can be split into multiple steps. As long as the same logical relationship is included, it is within the protection scope of this application; adding insignificant modifications to the algorithm or process or introducing insignificant designs, but not changing the core design of its algorithm and process are all within the protection scope of this application.

[0040] Another embodiment of the present invention relates to a zero-IF signal correction device, as Figure 2 shown, including:

[0041] A baseband decoding module 401 for obtaining the signal quality index of the WiFi signal by decoding a segment of the WiFi signal after automatic gain control locking in the baseband; a data screening module 402 for storing and using the segment of the WiFi signal to obtain the input reference signal when the signal quality index of the WiFi signal is higher than a preset threshold; a signal correction module 403 for performing zero-IF correction using the input reference signal.

[0042] In an example, the segment of the WiFi signal contains an L-SIG field.

[0043] In one example, the signal quality metric of the WiFi signal includes the signal-to-interference-plus-noise ratio.

[0044] In one example, zero-IF correction using an input reference signal can be as follows: after performing time-frequency offset correction on the input reference signal, zero-IF correction is achieved through a zero-IF correction algorithm.

[0045] In one example, the lock duration of the automatic gain control is between 3 microseconds and 4 microseconds.

[0046] It is not difficult to find that this embodiment is a device embodiment corresponding to the above method embodiment, and this embodiment can be implemented in cooperation with the above method embodiment. The relevant technical details mentioned in the above method embodiment are still valid in this embodiment. To avoid repetition, they will not be elaborated here. Correspondingly, the relevant technical details mentioned in this embodiment can also be applied to the above method embodiment.

[0047] It is worth mentioning that each module involved in this embodiment is a logic module. In practical applications, a logic unit can be a physical unit, a part of a physical unit, or a combination of multiple physical units. In addition, to highlight the innovative part of the present invention, units not closely related to solving the technical problems proposed by the present invention are not introduced in this embodiment, but this does not mean that there are no other units in this embodiment.

[0048] Another embodiment of the present invention relates to an electronic device, as Figure 3 shown, including at least one processor 501; and a memory 502 communicatively connected to the at least one processor; wherein, the memory 502 stores instructions executable by the at least one processor 501, and the instructions are executed by the at least one processor 501 to enable the at least one processor 501 to execute the zero-IF signal correction method as described above.

[0049] Among them, the memory 502 and the processor 501 are connected by a bus. The bus can include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors 501 and the memory 502 together. The bus can also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art. Therefore, they will not be further described herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be an element or multiple elements, such as multiple receivers and transmitters, providing units for communicating with various other devices on the transmission medium. The data processed by the processor 501 is transmitted on the wireless medium through the antenna. Further, the antenna also receives data and transmits the data to the processor 501.

[0050] The processor 501 is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interfaces, voltage regulation, power management, and other control functions. The memory 502 can be used to store the data used by the processor 501 when executing operations.

[0051] Another embodiment of the present invention relates to a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the method embodiments described above are implemented.

[0052] That is, those skilled in the art can understand that all or part of the steps in implementing the methods of the above embodiments can be completed by instructing relevant hardware through a program. The program is stored in a storage medium, including several instructions for causing a device (which can be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the methods described in various embodiments of the present application. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs that can store program codes.

[0053] Those of ordinary skill in the art can understand that the above embodiments are specific embodiments for implementing the present invention, and in practical applications, various changes can be made in form and details without departing from the spirit and scope of the present invention.

Claims

1. A zero intermediate frequency signal correction method, characterized in that: include: Obtaining a signal quality indicator of the WiFi signal by decoding a segment of the WiFi signal after the baseband is locked by automatic gain control; When the signal quality index of the WiFi signal is higher than a preset threshold, storing and using the fragments of the WiFi signal to obtain an input reference signal; The input reference signal is used to perform zero intermediate frequency correction.

2. The zero intermediate frequency signal correction method according to claim 1, characterized in that: The segment of the WiFi signal includes an L-SIG field.

3. The zero intermediate frequency signal correction method according to claim 1, characterized in that: The signal quality indicator of the WiFi signal includes a signal to interference plus noise ratio.

4. The zero intermediate frequency signal correction method according to claim 1, characterized in that: The method of performing zero intermediate frequency correction using the input reference signal comprises: After the input reference signal is corrected for time-frequency offset, zero intermediate frequency correction is implemented through a zero intermediate frequency correction algorithm.

5. The zero intermediate frequency signal correction method according to claim 1, characterized in that: The locking time of the automatic gain control is between 3 microseconds and 4 microseconds.

6. A zero intermediate frequency signal correction device, characterized in that: include: A baseband decoding module, configured to obtain a signal quality indicator of the WiFi signal by decoding a segment of the WiFi signal after the baseband is locked by automatic gain control; A data screening module, configured to store and use a segment of the WiFi signal to obtain an input reference signal when a signal quality indicator of the WiFi signal is higher than a preset threshold; The signal correction module is used to perform zero intermediate frequency correction using the input reference signal.

7. An electronic device, characterized in that: include: at least one processor; as well as, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the zero intermediate frequency signal correction method according to any one of claims 1 to 5.

8. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the zero intermediate frequency signal correction method according to any one of claims 1 to 5 is implemented.

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