Semiconductor device and method for manufacturing semiconductor device

Abstract

A semiconductor device including a micro transistor and a method of manufacturing the same are provided. The semiconductor device includes first to third insulating layers, a transistor including a semiconductor layer, first to fourth conductive layers, and fourth to sixth insulating layers. The first conductive layer, the first insulating layer, the third conductive layer, the fifth insulating layer, the second insulating layer, the third insulating layer and the second conductive layer are sequentially overlapped. The first to third insulating layers, the second and third conductive layers having openings to the first conductive layer. The first insulating layer has a protruding portion within the opening, and the fourth insulating layer is in contact with a top surface of the first insulating layer, a side surface of the fifth insulating layer, and a side surface of the second insulating layer. A fifth insulating layer of an oxide of the third conductive layer is in contact with a top surface and a side surface of the third conductive layer. The semiconductor layer is in contact with the top surfaces of the first and second conductive layers and the side surface of the fourth insulating layer. The sixth insulating layer is in contact with a top surface of the semiconductor layer. The fourth conductive layer is in contact with the sixth insulating layer in a manner of overlapping with the opening.

Description

Technical Field

[0001] One embodiment of the present invention relates to a transistor, a semiconductor device, a display device, a display module, and an electronic device. One embodiment of the present invention relates to a method for manufacturing a transistor, a method for manufacturing a semiconductor device, and a method for manufacturing a display device.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. Examples of the technical field of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, lighting devices, input devices (e.g., touch sensors), input-output devices (e.g., touch panels), electronic devices in which they are installed, their driving methods, or their manufacturing methods. Background Art

[0003] Semiconductor devices including transistors are widely used in display devices and electronic devices, and semiconductor devices are required to be highly integrated and high-speed. For example, when a semiconductor device is used in a high-definition display device, a highly integrated semiconductor device is required. As one of the methods for increasing the integration of transistors, research and development of micro transistors has been carried out.

[0004] In recent years, there has been a high demand for display devices that can be used for virtual reality (VR), augmented reality (AR), alternative reality (SR), or mixed reality (MR). VR, AR, SR, and MR are collectively referred to as XR (Extended Reality). In order to improve the sense of reality and immersion, display devices for XR are required to have high clarity and high color reproducibility. In addition, as the above-mentioned display device, for example, a liquid crystal display device, a light-emitting device including a light-emitting device (also called a light-emitting element) such as an organic EL (Electro Luminescence: electroluminescence) device or a light-emitting diode (LED: Light Emitting Diode) can be cited.

[0005] Patent Document 1 discloses a display device for VR using an organic EL device (also referred to as an organic EL element).

[0006] [Patent Document 1] International Publication No. 2018 / 087625 Summary of the invention

[0007] In order to achieve further high integration of semiconductor devices, it is necessary to achieve further miniaturization of the transistors included in the semiconductor devices. In addition, when the semiconductor device is used in display devices, electronic devices, etc., it is necessary to achieve further speed-up of the semiconductor device. Therefore, one of the purposes of one embodiment of the present invention is to provide a semiconductor device including micro transistors and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a small semiconductor device and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a semiconductor device including transistors with large on-state current and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a semiconductor device with good electrical characteristics and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a semiconductor device with high reliability and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a method for manufacturing a semiconductor device with high productivity. In addition, one of the purposes of one embodiment of the present invention is to provide a novel semiconductor device and a method for manufacturing the same.

[0008] Note that the description of these objectives does not prevent the existence of other objectives. One embodiment of the present invention does not need to achieve all of the above objectives. Objectives other than the above objectives can be extracted from the description of the specification, drawings, and claims.

[0009] One embodiment of the present invention is a semiconductor device including a transistor, a first insulating layer, a second insulating layer and a third insulating layer, wherein the transistor includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fourth insulating layer, a fifth insulating layer and a sixth insulating layer, the first conductive layer, the first insulating layer, the third conductive layer, the fifth insulating layer, the second insulating layer, the third insulating layer and the second conductive layer are stacked in sequence, the first insulating layer, the third conductive layer, the second insulating layer, the third insulating layer and the second conductive layer all include an opening reaching the first conductive layer, and the first insulating layer includes a side surface of the third conductive layer, a side surface of the second insulating layer, the first insulating layer, and the second conductive layer in the opening. the side surfaces of the three insulating layers and the protruding portions of the side surfaces of the second conductive layer, the fifth insulating layer is arranged in contact with the top surface and the side surfaces of the third conductive layer, the fourth insulating layer is arranged in the opening in contact with the top surface of the first insulating layer, the side surfaces of the fifth insulating layer and the side surfaces of the second conductive layer, the semiconductor layer is arranged in contact with the top surface of the first conductive layer in the opening, the side surfaces of the fourth insulating layer in the opening and the top surface of the second conductive layer, the sixth insulating layer is arranged in contact with the top surface of the semiconductor layer, the fourth conductive layer is arranged on the sixth insulating layer in overlapping with the opening when viewed from a plane, the third conductive layer contains a first element, and the fifth insulating layer contains an oxide of the first element.

[0010] In the above, preferably, the semiconductor layer contains a metal oxide, the metal oxide contains two or three selected from indium, element M and zinc, the element M contains one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, cobalt and magnesium, and the fourth insulating layer contains silicon oxide or silicon oxynitride.

[0011] In the above, preferably, the third conductive layer includes aluminum, and the fifth insulating layer includes aluminum oxide.

[0012] In the above, preferably, the first insulating layer and the third insulating layer each include silicon nitride, silicon nitride oxide, hafnium oxide, or aluminum oxide, and the second insulating layer includes silicon oxide or silicon oxynitride.

[0013] One embodiment of the present invention is a semiconductor device including a transistor, a first insulating layer, a second insulating layer and a third insulating layer, wherein the transistor includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a fourth insulating layer, a fifth insulating layer and a sixth insulating layer, the first conductive layer, the first insulating layer, the second conductive layer, the fifth insulating layer, the second insulating layer and the third insulating layer are sequentially stacked, the first insulating layer, the second conductive layer, the second insulating layer and the third insulating layer all include an opening reaching the first conductive layer, and the first insulating layer includes a side surface of the second conductive layer, a side surface of the second insulating layer and the third insulating layer in the opening. The fifth insulating layer is arranged in a manner to be in contact with the top surface and the side surface of the second conductive layer, the fourth insulating layer is arranged in the opening in a manner to be in contact with the top surface of the first conductive layer, the side surface of the fifth insulating layer and the side surface of the second insulating layer, the semiconductor layer is arranged in a manner to be in contact with the top surface of the first conductive layer in the opening, the side surface of the fourth insulating layer in the opening and the top surface of the third insulating layer, the sixth insulating layer is arranged in a manner to be in contact with the top surface of the semiconductor layer, the third conductive layer is arranged on the sixth insulating layer in a manner to overlap with the opening when viewed from a plane, the second conductive layer contains the first element, and the fifth insulating layer contains an oxide of the first element.

[0014] In the above, preferably, the semiconductor layer contains a metal oxide, the metal oxide contains two or three selected from indium, element M and zinc, the element M contains one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, cobalt and magnesium, and the fourth insulating layer contains silicon oxide or silicon oxynitride.

[0015] In the above, preferably, the second conductive layer includes aluminum, and the fifth insulating layer includes aluminum oxide.

[0016] In the above, preferably, the first insulating layer and the third insulating layer each include silicon nitride, silicon nitride oxide, hafnium oxide, or aluminum oxide, and the second insulating layer includes silicon oxide or silicon oxynitride.

[0017] In addition, one embodiment of the present invention is a method for manufacturing a semiconductor device, comprising the steps of forming a first conductive layer, forming a first insulating film on the first conductive layer, forming a second conductive layer on the first insulating film in a manner having a region overlapping with the first conductive layer, forming the first insulating layer on the top surface and side surfaces of the second conductive layer by oxidizing the surface of the second conductive layer, forming a second insulating film, a third insulating film, and a third conductive layer on the first insulating film and on the first insulating layer in sequence, forming a fourth conductive layer, a second insulating layer, a third insulating layer, a fourth insulating layer, and a fifth conductive layer while removing a portion of each of the third conductive layer, the third insulating film, the second insulating film, the first insulating layer, and the second conductive layer to form a first opening, and oxidizing the side surfaces of the fifth conductive layer exposed in the first openings to form a fourth insulating layer on the side surfaces of the fifth conductive layer so as to overlap with the top surface of the fourth conductive layer and the side surfaces of the fourth conductive layer in each of the first openings. A fourth insulating film is formed in a manner that the fourth insulating layer contacts the side surface, the side surface of the second insulating layer, the side surface of the third insulating layer, the side surface of the fourth insulating layer and the top surface of the first insulating film; while a portion of the fourth insulating film and a portion of the first insulating film are removed to form a second opening reaching the first conductive layer, a fifth insulating layer having a protrusion in the second opening and a sixth insulating layer in contact with the side surface of the fourth conductive layer, the side surface of the second insulating layer, the side surface of the third insulating layer, the side surface of the fourth insulating layer and the top surface of the protrusion are formed; a semiconductor layer is formed in a manner that the top surface of the fourth conductive layer, the side surface of the sixth insulating layer in the second opening and the top surface of the first conductive layer are contacted; a seventh insulating layer is formed in a manner that the top surface and side surfaces of the semiconductor layer, the top surface of the fourth conductive layer and the top surface of the second insulating layer are contacted; and when viewed from a plane, a sixth conductive layer having an area overlapping with the semiconductor layer and the sixth insulating layer is formed on the seventh insulating layer.

[0018] In the above, it is preferable that a portion of the first insulating film is removed when the first opening is formed, and the eighth insulating layer having the recessed portion is formed in a region overlapping the first opening.

[0019] According to one embodiment of the present invention, a semiconductor device including a micro transistor and a method for manufacturing the same can be provided. In addition, according to one embodiment of the present invention, a small semiconductor device and a method for manufacturing the same can be provided. In addition, according to one embodiment of the present invention, a semiconductor device including a transistor with a large on-state current and a method for manufacturing the same can be provided. In addition, according to one embodiment of the present invention, a semiconductor device with good electrical characteristics and a method for manufacturing the same can be provided. In addition, according to one embodiment of the present invention, a semiconductor device with high reliability and a method for manufacturing the same can be provided. In addition, according to one embodiment of the present invention, a method for manufacturing a semiconductor device with high productivity can be provided. In addition, according to one embodiment of the present invention, a novel semiconductor device and a method for manufacturing the same can be provided.

[0020] Note that the description of these effects does not prevent the existence of other effects. One embodiment of the present invention does not necessarily have all of the above effects. Effects other than the above effects can be extracted from the description of the specification, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1A is a plan view showing an example of a semiconductor device, Figure 1B is a cross-sectional view showing an example of a semiconductor device;

[0022] Figure 2 is a cross-sectional view showing an example of a semiconductor device;

[0023] FIG. 3A to FIG. 3D is a cross-sectional view showing an example of a semiconductor device;

[0024] Figure 4A and Figure 4B is a cross-sectional view showing an example of a semiconductor device;

[0025] Figure 5A and Figure 5B is a cross-sectional view showing an example of a semiconductor device;

[0026] Fig. 6A and Figure 6B is a cross-sectional view showing an example of a semiconductor device;

[0027] FIG. 7A to FIG. 7D is a cross-sectional view showing an example of a method for manufacturing a semiconductor device;

[0028] FIG. 8A to FIG. 8C is a cross-sectional view showing an example of a method for manufacturing a semiconductor device;

[0029] 9A to 9D is a cross-sectional view showing an example of a method for manufacturing a semiconductor device;

[0030] FIG. 10A to FIG. 10C is a cross-sectional view showing an example of a method for manufacturing a semiconductor device;

[0031] Fig.11 is a perspective view showing an example of a display device;

[0032] Fig.12 is a cross-sectional view showing an example of a display device;

[0033] Fig.13 is a cross-sectional view showing an example of a display device;

[0034] Fig.14 is a cross-sectional view showing an example of a display device;

[0035] Fig.15 is a cross-sectional view showing an example of a display device;

[0036] Fig.16 is a cross-sectional view showing an example of a display device;

[0037] Fig.17A and Fig. 17B is a diagram showing a structural example of a display device;

[0038] Fig.18 is a diagram showing a structural example of a display device;

[0039] Fig.19 is a diagram showing a structural example of a display device;

[0040] Fig. 20 is a diagram showing a structural example of a display device;

[0041] Fig.21 is a block diagram of a display device;

[0042] FIG. 22A to FIG. 22D is a circuit diagram of a pixel circuit;

[0043] FIG. 23A to FIG. 23D is a circuit diagram of a pixel circuit;

[0044] Fig.24A and Fig. 24B is a circuit diagram of a pixel circuit;

[0045] FIG. 25A to FIG. 25D is a diagram showing an example of an electronic device;

[0046] FIG. 26A to FIG. 26F is a diagram showing an example of an electronic device;

[0047] FIG. 27A to FIG. 27G is a diagram showing an example of an electronic device. DETAILED DESCRIPTION

[0048] The embodiments are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and a person skilled in the art can easily understand that the method and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the embodiments shown below.

[0049] Note that in the invention structure described below, the same symbols are used to show the same parts or parts with the same function in different drawings, and repeated description is omitted. In addition, when showing parts with the same function, the same hatching is sometimes used without special additional symbols.

[0050] For ease of understanding, the position, size, range, etc. of each component shown in the drawings may not represent its actual position, size, range, etc. Therefore, the disclosed invention is not limited to the position, size, range, etc. disclosed in the drawings.

[0051] In addition, depending on the situation or state, the "film" and the "layer" may be interchanged. For example, the "conductive layer" may be replaced with the "conductive film". Also, the "insulating film" may be replaced with the "insulating layer".

[0052] A transistor is a type of semiconductor element and can realize a function of amplifying current or voltage, controlling a switch operation of conduction or non-conduction, etc. The transistor in this specification etc. includes an IGFET (Insulated Gate Field Effect Transistor) and a thin film transistor (TFT: Thin Film Transistor).

[0053] In the case of using transistors with different polarities or when the current direction of the circuit operation changes, the functions of "source" and "drain" are sometimes interchanged. Therefore, in this specification, "source" and "drain" may be interchanged. Note that the source and drain of a transistor may be appropriately referred to as source terminal and drain terminal or source electrode and drain electrode, etc., depending on the situation.

[0054] "Gate" and "back gate" can be interchanged. Therefore, in this specification, "gate" and "back gate" can be interchanged. Note that the gate and back gate of the transistor can be appropriately replaced by gate electrode and back gate electrode, etc., depending on the situation.

[0055] In addition, in this specification and the like, "connection" includes "electrical connection".

[0056] "A and B are electrically connected" includes the following situations: when A and B are not connected through an insulator (A and B are connected through a conductor or semiconductor, A and B are in contact), there is a timing of electric signal transfer or potential interaction between A and B when the circuit is operating. In other words, when the circuit is operating, although there is a timing of no electric signal transfer or potential interaction between A and B, as long as there is a timing of electric signal transfer or potential interaction between A and B, it can be said that "A and B are electrically connected".

[0057] “Electrically connected” includes the following cases: connection without going through a circuit element (eg, transistor, but excluding wiring) (direct connection) and connection through one or more circuit elements (indirect connection).

[0058] “A and B are electrically connected” includes, for example, the following situations: A and B are not connected via a circuit element; A and B are connected via the source and drain of one or more transistors, etc. Note that this is based on the premise that there is a timing of the exchange of electrical signals or the interaction of potentials between A and B.

[0059] The case where it cannot be said that “A and B are electrically connected” because A and B are connected through an insulator refers to, for example, the case where a dielectric of a capacitor, a gate insulating film of a transistor, etc. is interposed between A and B.

[0060] Since A and B are not connected through an insulator, there is no timing for the transfer of electrical signals or interaction of potentials, and therefore it cannot be said that "A and B are electrically connected". For example, the following situations refer to the following situations: a potential V is supplied from a power supply or a signal source on the path from A to B (note, this does not include the case where the potential V is supplied through a circuit element); when A and C are connected through the source and drain of transistor TrP and B and C are connected through the source and drain of transistor TrQ, there is no timing for both transistor TrP and transistor TrQ to be turned on at the same time.

[0061] In this specification, etc., a structure in which at least the light-emitting layers are manufactured separately in light-emitting devices with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. Since the SBS structure can optimize the materials and structures for each light-emitting device, the freedom of choice of materials and structures is increased, and it is easy to achieve improved brightness and reliability.

[0062] In this specification, holes or electrons are sometimes referred to as "carriers". Specifically, a hole injection layer or an electron injection layer, a hole transport layer or an electron transport layer, and a hole blocking layer or an electron blocking layer are sometimes referred to as a "carrier injection layer", a "carrier transport layer", and a "carrier blocking layer", respectively. Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier blocking layer are sometimes not clearly distinguished based on cross-sectional shapes or characteristics. In addition, sometimes a layer has the functions of two or three of a carrier injection layer, a carrier transport layer, and a carrier blocking layer.

[0063] In this specification, etc., a light-emitting device includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer. Here, as layers included in the EL layer (also referred to as functional layers), there can be cited a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer), and a carrier blocking layer (hole blocking layer and electron blocking layer).

[0064] In this specification and the like, a light-receiving device (also referred to as a light-receiving element) includes at least an active layer serving as a photoelectric conversion layer between a pair of electrodes.

[0065] Note that in this specification, etc., a tapered shape refers to a shape in which at least a portion of the side surface of a component is inclined relative to a substrate surface or a formed surface. For example, it refers to a shape having a region where the angle (also referred to as a taper angle) formed by the inclined side surface and the substrate surface or the formed surface is less than 90 degrees. Here, the side surface, substrate surface, and formed surface of a component do not necessarily have to be completely flat, and may be a nearly planar shape with a slight curvature or a nearly planar shape with fine concave-convex shapes.

[0066] In this specification and the like, disconnection refers to a phenomenon in which a layer, a film, or an electrode is separated due to the shape of a formed surface (for example, a step, etc.).

[0067] In this specification, etc., "the top surface shapes are substantially consistent" means that at least a portion of the edge of each layer in the stack overlaps. For example, this includes the case where the upper layer and the lower layer are processed by using the same mask pattern or a mask pattern that is partially identical. However, strictly speaking, sometimes the outlines do not overlap and the upper layer is located inside the lower layer or the upper layer is located outside the lower layer. In this case, it can also be said that "the top surface shapes are substantially consistent."

[0068] In addition, in this specification, etc., the top surface shape of a component refers to the outline shape of the component when viewed in a plane. In addition, the plane view refers to the situation when viewed from the normal direction of the surface on which the component is formed or the surface of the support body (such as a substrate) on which the component is formed.

[0069] In addition, in this specification, "substantially the same height" refers to a structure in which the height from a reference surface (e.g., a flat surface such as a substrate surface) is substantially the same when viewed from a cross section. For example, the height of a processed surface that has been subjected to a flattening treatment (typically a chemical mechanical polishing (CMP) treatment) is substantially the same. However, even if a flattening treatment is performed, there may be a case where the height is not strictly consistent due to the material of the film, but this case is also regarded as "substantially the same height" in this specification.

[0070] Implementation Method 1

[0071] In this embodiment, a transistor which is one embodiment of the present invention and a method for manufacturing the transistor are described.

[0072] One embodiment of the present invention is a semiconductor device including a transistor, a first insulating layer, a second insulating layer, and a third insulating layer.

[0073] The above transistor is a vertical transistor, in which the source electrode and the drain electrode are arranged in an overlapping manner with different heights relative to the substrate surface, and the drain current flows in the height direction (vertical direction). Therefore, compared with a planar transistor in which the source electrode and the drain electrode are arranged on the same plane, miniaturization of the transistor and reduction of the occupied area can be achieved. By having the above structure of the transistor, miniaturization and high integration of semiconductor devices can be achieved.

[0074] In addition, the transistor includes a first gate electrode and a second gate electrode (also called a back gate electrode) arranged in a manner that sandwiches a semiconductor layer used as a channel formation region. Specifically, when viewed from a plane, the first gate electrode is arranged in a manner surrounded by the semiconductor layer, and the second gate electrode is arranged in a manner that surrounds the semiconductor layer. Thus, a gate electric field can be applied to carriers in the channel formation region from both sides of the semiconductor layer. Therefore, compared with a transistor having only one gate electrode, a large on-state current can be achieved. In addition, a small off-state current can be achieved. In addition, the threshold voltage can be drifted to the normally closed side. In addition, the saturation characteristics of the current flowing when operating in the saturation region can be improved (that is, the drain current hardly changes with respect to an increase in the drain voltage.)

[0075] When viewed from the substrate side, a first insulating layer, a second insulating layer and a third insulating layer are sequentially provided, and the first insulating layer, the second insulating layer and the third insulating layer have regions overlapping with the source electrode, the drain electrode and the second gate electrode of the transistor.

[0076] Specifically, in this region, a first insulating layer is disposed on one of a source electrode and a drain electrode of the transistor. A second gate electrode of the transistor is disposed on the first insulating layer. A second insulating layer is disposed on the second gate electrode of the transistor. A third insulating layer is disposed on the second insulating layer. The other of the source electrode and the drain electrode of the transistor is disposed on the third insulating layer.

[0077] The second insulating layer contains oxygen and is formed using a material that releases oxygen by heat treatment or the like. On the other hand, both the first insulating layer and the third insulating layer are formed using a material that has a barrier property to gases such as oxygen and hydrogen. Therefore, it is possible to suppress the oxygen contained in the second insulating layer from diffusing through the first insulating layer to the lower side of the second insulating layer (on the substrate side). In addition, it is possible to suppress the oxygen contained in the second insulating layer from diffusing through the third insulating layer to the upper side of the second insulating layer.

[0078] The second gate electrode of the transistor includes an insulating layer (fourth insulating layer) formed of an oxide of an element contained in the second gate electrode along its top surface and side surfaces. The fourth insulating layer, like the first insulating layer and the third insulating layer, has barrier properties to gases such as oxygen and hydrogen. The fourth insulating layer is formed by, for example, subjecting the surface of the conductive layer to be the second gate electrode to plasma treatment in an atmosphere containing oxygen, and oxidizing a portion of the conductive layer. Thus, for example, an insulating layer having the same function as the first insulating layer and the third insulating layer can be formed without using a deposition method such as a plasma CVD method and a sputtering method, thereby reducing the number of times the above deposition method is used. As described above, a second insulating layer is provided on the second gate electrode of the transistor. Therefore, it is possible to suppress the oxygen contained in the second insulating layer from diffusing into the second gate electrode through the fourth insulating layer.

[0079] The first insulating layer, the second gate electrode, the second insulating layer, the third insulating layer, and the other of the source electrode and the drain electrode of the transistor have an opening that reaches one of the source electrode and the drain electrode in a region overlapping with one of the source electrode and the drain electrode. In addition, the first insulating layer preferably has a portion protruding from a side surface of the second gate electrode, a side surface of the second insulating layer, a side surface of the third insulating layer, and a side surface of the other of the source electrode and the drain electrode in the opening.

[0080] The gate insulating layer of the transistor (also referred to as a back gate insulating layer because it corresponds to the first gate insulating layer or the second gate electrode) is provided in contact with the top surface of the first insulating layer in each of the openings (the top surface of the protruding portion), the side surface of the second gate electrode of the transistor, the side surface of the second insulating layer, the side surface of the third insulating layer, and the side surface of the other of the source electrode and the drain electrode of the transistor. Like the second insulating layer, the first gate insulating layer of the transistor is formed of a material containing oxygen and releasing oxygen by heat treatment.

[0081] In addition, a semiconductor layer having a channel formation region of the transistor is provided in a manner in contact with the top surface of one of the source electrode and the drain electrode of the transistor in the opening, the side surface of the first insulating layer in the opening, the side surface of the first gate insulating layer of the transistor in the opening, and the top surface of the other of the source electrode and the drain electrode of the transistor. As described above, in a transistor of one embodiment of the present invention, the first gate insulating layer is formed using a material that releases oxygen. Thus, for example, when a metal oxide is used as a material for the semiconductor layer, the oxygen contained in the second insulating layer and the oxygen contained in the first gate insulating layer can be supplied to the metal oxide through the first gate insulating layer, thereby repairing oxygen vacancies in the metal oxide. Therefore, the electrical characteristics and reliability of the transistor can be improved.

[0082] In addition, as described above, within the opening, the first insulating layer has a protruding portion, and the first gate insulating layer of the transistor is provided in contact with the top surface of the portion. That is, the first gate insulating layer of the transistor is provided on one of the source electrode and the drain electrode of the transistor via the first insulating layer. Thus, the oxygen released from the first gate insulating layer is blocked by the first insulating layer, thereby suppressing diffusion to one of the source electrode and the drain electrode. Therefore, for example, even if a low-resistance conductive material such as a metal is used as one of the source electrode and the drain electrode, the material can be suppressed from being oxidized by the above-mentioned oxygen and becoming highly resistant. Thus, the electrical characteristics and reliability of the transistor can be further improved.

[0083] Hereinafter, a specific structural example of a transistor according to one embodiment of the present invention will be described with reference to the drawings.

[0084] <Structural Example 1>

[0085] Figure 1A A plan view (also called a top view) of transistor 100 is shown. Figure 1B Shown along Figure 1A The cross-sectional view along the dotted line A1-A2 shown in FIG. Figure 2 Shown along Figure 1A The cross-sectional view is shown along the dashed line B1-B2. Note that Figure 1A A portion of the components of the transistor 100 (such as an insulating layer) is omitted in the figure. Figure 1A Similarly, some of the components are omitted.

[0086] The transistor 100 is provided on the substrate 102. The transistor 100 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 114, an insulating layer 116, an insulating layer 110s, a conductive layer 112a, and a conductive layer 112b. The conductive layer 104 is used as a first gate electrode. The conductive layer 114 is used as a second gate electrode (also referred to as a back gate electrode). A portion of the insulating layer 106 is used as a first gate insulating layer. The insulating layer 110s is used as a second gate insulating layer (also referred to as a back gate insulating layer). A portion of the insulating layer 116 can be used as a second gate insulating layer. The conductive layer 112a is used as one of the source electrode and the drain electrode. The conductive layer 112b is used as the other of the source electrode and the drain electrode. In the semiconductor layer 108, the entire region where the gate insulating layer overlaps the gate electrode between the source electrode and the drain electrode is used as a channel formation region. In addition, in the semiconductor layer 108, the region in contact with the source electrode is used as a source region, and the region in contact with the drain electrode is used as a drain region.

[0087] Next, the detailed structure of the transistor 100 will be described.

[0088] A conductive layer 112a is provided over the substrate 102. An insulating layer 110a is provided over the conductive layer 112a and the substrate 102. A conductive layer 114 is provided over the insulating layer 110a. An insulating layer 116 is provided over the conductive layer 114. An insulating layer 110b is provided over the insulating layer 110a and the insulating layer 116. An insulating layer 110c is provided over the insulating layer 110b. A conductive layer 112b is provided over the insulating layer 110c. Note that the insulating layer 110a, the insulating layer 110b, and the insulating layer 110c may be collectively referred to as an insulating layer 110.

[0089] The conductive layer 112a, the conductive layer 114, the insulating layer 116, the insulating layer 110, and the conductive layer 112b have a region where they overlap with each other. In this region, the conductive layer 114 is provided so as to be sandwiched between the conductive layer 112a and the conductive layer 112b. In addition, in this region, the conductive layer 112a overlaps with the conductive layer 114 via the insulating layer 110a, and the conductive layer 112b overlaps with the conductive layer 114 via the insulating layer 116, the insulating layer 110b, and the insulating layer 110c. The insulating layer 116 is provided so as to be in contact with the side surface and the top surface of the conductive layer 114.

[0090] The insulating layer 110a, the conductive layer 114, the insulating layer 110b, the insulating layer 110c, and the conductive layer 112b all have an opening 143 that reaches the conductive layer 112a. The opening 143 is provided in a region overlapping the conductive layer 112a, the conductive layer 114, and the conductive layer 112b.

[0091] In the opening 143, the insulating layer 110a is provided in a manner having a protruding portion. Figure 1B and Figure 2 ), the side surface of the insulating layer 110a on the side of the opening 143 is arranged to be located closer to the inside of the opening 143 than the side surfaces of the conductive layer 114, the insulating layer 116, the insulating layer 110b, the insulating layer 110c, and the conductive layer 112b on the side of the opening 143. In other words, the opening 143 has a structure in which the openings provided in the conductive layer 114, the insulating layer 110b, the insulating layer 110c, and the conductive layer 112b are combined with an opening having an opening diameter smaller than that of the opening and provided in the insulating layer 110a.

[0092] In each opening 143, an insulating layer 110s is provided in contact with the top surface of the insulating layer 110a (the top surface of the protruding portion), the side surface of the insulating layer 116, the side surface of the insulating layer 110b, the side surface of the insulating layer 110c, and the side surface of the conductive layer 112b. The insulating layer 110s has a shape with a curved upper end. The insulating layer 110s is sometimes referred to as a side wall, a side wall insulating layer, or a side wall protective layer.

[0093] Notice, Figure 1B and Figure 2 The thickness of the region of the insulating layer 110a overlapping with the opening 143 is shown to be thinner than the thickness of the region of the insulating layer 110a not overlapping with the opening 143, but the present invention is not limited thereto. In addition, the thickness of the region of the insulating layer 110a overlapping with the opening 143 and the thickness of the region of the insulating layer 110a not overlapping with the opening 143 may be the same.

[0094] The semiconductor layer 108 is provided in contact with the top surface of the conductive layer 112a in the opening 143, the side surface of the insulating layer 110a in the opening 143, the side surface of the insulating layer 110s in the opening 143, the bent portion of the insulating layer 110s, and the top surface of the conductive layer 112b.

[0095] The semiconductor layer 108 has a region in the opening 143 that faces the side surface of the conductive layer 114 via the insulating layer 110s and the insulating layer 116. This region is used as a channel formation region (also referred to as a back channel formation region). The region of the insulating layer 110s and the insulating layer 116 that faces the side surface of the conductive layer 114 in the opening 143 is used as a second gate insulating layer.

[0096] Here, the insulating layer 110b and the insulating layer 110s are preferably insulating layers containing oxygen. In addition, the insulating layer is preferably an insulating layer that releases oxygen by heating. Thus, for example, when a metal oxide is used as the semiconductor layer 108, the oxygen contained in the insulating layer 110s can be supplied to the metal oxide. Alternatively, the oxygen contained in the insulating layer 110b can be supplied to the metal oxide through the insulating layer 110s. Thus, since the oxygen vacancies in the metal oxide are repaired, the electrical characteristics and reliability of the transistor 100 can be improved. That is, in the transistor 100, while the insulating layer 110s has the function of a second gate insulating layer, it has the function of supplying oxygen to the semiconductor layer 108 (mainly the channel formation region).

[0097] On the other hand, the insulating layer 110a and the insulating layer 110c are preferably insulating layers having barrier properties against gases such as oxygen and hydrogen. This can prevent oxygen contained in the insulating layer 110b from being released to the outside through the insulating layer 110a or the insulating layer 110c.

[0098] As described above, the insulating layer 110a has a protruding portion in the opening 143, and the conductive layer 112a is not in direct contact with the insulating layer 110s due to the protruding portion. Therefore, the following undesirable phenomena can be suppressed: oxygen released from the insulating layer 110s diffuses to the conductive layer 112a side, and the conductive layer 112a is oxidized and has a high resistance, for example, the on-state current of the transistor does not increase (that is, in the drain current (Id)-drain voltage (Vg) characteristics, Id is not easy to increase relative to the increase of Vg).

[0099] As described above, the insulating layer 116 is provided in contact with the side and top surfaces of the conductive layer 114. The insulating layer 116 is preferably an insulating layer composed of an oxide of an element contained in the conductive layer 114. In addition, the material of the conductive layer 114 is preferably an easily oxidized conductive material. Thus, for example, by subjecting the surface of the conductive layer 114 to plasma treatment in an oxygen atmosphere, the insulating layer 116 in contact with the side and top surfaces of the conductive layer 114 can be formed. Note that the insulating layer 116 is preferably an insulating layer having barrier properties to gases such as oxygen and hydrogen, as is the case with the insulating layer 110a and the insulating layer 110c. Therefore, it is possible to suppress the diffusion of oxygen released from the insulating layer 110s and the insulating layer 110b through the insulating layer 116 to the conductive layer 114 side. Furthermore, by having the above-mentioned structure, an insulating layer having the same function as the insulating layer 110a and the insulating layer 110c can be formed without using a deposition method such as a plasma CVD method or a sputtering method, thereby sometimes reducing the number of times the above-mentioned deposition method is applied, and productivity can be improved.

[0100] The insulating layer 106 is disposed on the semiconductor layer 108. The insulating layer 106 includes a region in contact with the top surface and side surfaces of the semiconductor layer 108, the top surface and side surfaces of the conductive layer 112b, and the top surface of the insulating layer 110c.

[0101] The conductive layer 104 is provided on the insulating layer 106. When viewed from a planar perspective, the conductive layer 104 is provided so as to have a region overlapping the opening 143. The conductive layer 104 includes a region facing the semiconductor layer 108 via the insulating layer 106. In addition, the conductive layer 104 has a region facing the side surface of the conductive layer 114 via the insulating layer 106, the semiconductor layer 108, the insulating layer 110s, and the insulating layer 116 in the opening 143.

[0102] In the opening 143 , one surface of the semiconductor layer 108 has a region facing the conductive layer 104 via the insulating layer 106 , and the other surface of the semiconductor layer 108 has a region facing the conductive layer 114 via the insulating layer 110 s and the insulating layer 116 .

[0103] In the transistor 100, the source electrode and the drain electrode have different heights relative to the surface of the substrate 102 on which they are formed, and the drain current flows in a direction perpendicular to or substantially perpendicular to the surface of the substrate 102. It can also be said that in the transistor 100, the drain current flows in the vertical direction or substantially in the vertical direction. Therefore, the transistor of one embodiment of the present invention can be said to be a vertical transistor, a vertical channel transistor, or a VFET (Vertical Field Effect Transistor).

[0104] Since the transistor 100 can overlap the source electrode and the drain electrode, compared with a so-called planar transistor in which the source electrode and the drain electrode are arranged in a planar shape, the transistor 100 can achieve miniaturization of the transistor and significantly reduce the area occupied by the transistor in the substrate surface.

[0105] In addition, an insulating layer 195 is provided to cover the conductive layer 112a, the semiconductor layer 108, the conductive layer 112b, the insulating layer 106, the conductive layer 104, and the like included in the transistor 100. The insulating layer 195 functions as a protective layer of the transistor 100.

[0106] One of the conductive layer 104 and the conductive layer 114 can be used as a gate electrode (first gate electrode) and the other can be used as a back gate electrode (second gate electrode). The conductive layer 104 and the conductive layer 114 are preferably configured in a manner that sandwiches the channel formation region of the semiconductor layer 108. Thus, since a voltage can be applied to the channel formation region from both sides of the region, the effect of the gate voltage on the carriers in the region can be enhanced. Therefore, the on-state current of the transistor 100 can be increased. In addition, the off-state current can be reduced. In addition, the threshold voltage can be drifted to the normally closed side.

[0107] By supplying a potential that turns the transistor into an on-state to the back gate electrode (second gate electrode), the field effect mobility of the transistor can be improved. In addition, by changing the potential of the back gate electrode, the threshold voltage of the transistor can be changed. The potential of the back gate electrode can have the same potential as the gate electrode (first gate electrode). Alternatively, the potential of the back gate electrode can also be a ground potential or an arbitrary potential. In addition, the potential of the back gate electrode can have the same potential as the potential of the source electrode or the drain electrode. Thus, since the potential of the region on the opposite side of the back gate electrode of the semiconductor layer can be fixed, the unevenness of the electrical characteristics of the transistor can be suppressed.

[0108] When the same potential as the gate electrode is supplied to the back gate electrode, the back gate electrode and the gate electrode are connected and turned on. When the same potential as the source electrode or the drain electrode is supplied to the back gate electrode, the back gate electrode and the source electrode or the drain electrode are connected and turned on. By having a structure in which the gate electrode or the back gate electrode is connected to the source electrode, for example, the reliability of the transistor can be improved.

[0109] Note that when the potential of the back gate electrode is a ground potential or an arbitrary potential, a common wiring connected to the back gate electrodes of a plurality of transistors may be provided and the potential may be supplied to the common wiring.

[0110] The transistor has a structure including a back gate electrode, and thus, variations in electrical characteristics among a plurality of transistors may be reduced. For example, variations in threshold voltage among transistors may be reduced.

[0111] The top surface of the opening 143 may be, for example, circular or elliptical. In addition, the top surface of the opening 143 may also be a polygon such as a triangle, a quadrangle (including a rectangle, a rhombus, a square), a pentagon, or a shape in which the corners of these polygons are rounded. Figure 1A As shown, the top surface of the opening 143 is preferably circular. Since the top surface of the opening 143 is circular, the processing accuracy when forming the opening 143 can be improved, thereby forming a fine opening 143. Note that in this specification, the circle is not limited to a perfect circle.

[0112] Next, the channel length and channel width of the transistor 100 will be described.

[0113] In the semiconductor layer 108, the area in contact with the conductive layer 112a is used as one of the source region and the drain region, the area in contact with the conductive layer 112b is used as the other of the source region and the drain region, and the area between the source region and the drain region is used as a channel formation region.

[0114] The channel length of transistor 100 is the distance between the source region and the drain region. Figure 1B and Figure 2 The dotted double arrow in FIG. 1 represents the channel length L100 of the transistor 100 . Figure 1B and Figure 2 The side surface and the curved portion of the insulating layer 110 s between the top surface of the conductive layer 112 a and the top surface of the conductive layer 112 b and the distance along the side surface of the insulating layer 110 a are shown as the channel length L100 of the transistor 100 .

[0115] Note that the total thickness T110 (in the range of 100 to 1000) of the thickness of the insulating layer 110a, the thickness of the conductive layer 114, the thickness of the insulating layer 116, the thickness of the insulating layer 110b, and the thickness of the insulating layer 110c in the region sandwiched between the top surface of the conductive layer 112a and the bottom surface of the conductive layer 112b may be used as the channel length L100 of the transistor 100. Figure 1B and Figure 2 In the figure, the thickness T110 is indicated by a double-dash arrow. Alternatively, the sum of the thickness T110 and the thickness of the conductive layer 112 b may be used as the channel length L100 of the transistor 100. Alternatively, the height of the insulating layer 110 s (the distance between the upper end and the lower end of the insulating layer 110 s in a direction perpendicular to the substrate surface) may be used as the channel length L100 of the transistor 100.

[0116] Here, the channel length L100 of the transistor 100 is determined by the thickness of the insulating layer 110a, the thickness of the conductive layer 114, the thickness of the insulating layer 116, the thickness of the insulating layer 110b, the thickness of the insulating layer 110c, the thickness of the conductive layer 112b, the angle θ110 formed by the formed surface of the insulating layer 110s (here, the side surface of the insulating layer 110a, the side surface of the insulating layer 116, the side surface of the insulating layer 110b, the side surface of the insulating layer 110c, and the side surface of the conductive layer 112b) and the formed surface of the insulating layer 110a (here, the top surface of the conductive layer 112a), etc., and is not affected by the performance of the exposure device used when manufacturing the transistor. Therefore, for example, the channel length L100 can be set to a value smaller than the limiting resolution of the exposure device, and a micro transistor can be realized.

[0117] The thickness of the channel length L100 may be, for example, 5 nm or more and less than 3 μm, 7 nm or more and less than 2.5 μm, 10 nm or more and less than 2 μm, 10 nm or more and less than 1.5 μm, 10 nm or more and less than 1.2 μm, 10 nm or more and less than 1 μm, 10 nm or more and less than 500 nm, 10 nm or more and less than 300 nm, 10 nm or more and less than 200 nm, 10 nm or more and less than 100 nm, 10 nm or more and less than 50 nm, 10 nm or more and less than 30 nm, or 10 nm or more and less than 20 nm. For example, the channel length L100 may be set to be 100 nm or more and less than 1 μm.

[0118] The thickness T110 can be, for example, greater than 5 nm and less than 3 μm, greater than 7 nm and less than 2.5 μm, greater than 10 nm and less than 2 μm, greater than 10 nm and less than 1.5 μm, greater than 10 nm and less than 1.2 μm, greater than 10 nm and less than 1 μm, greater than 10 nm and less than 500 nm, greater than 10 nm and less than 300 nm, greater than 10 nm and less than 200 nm, greater than 10 nm and less than 100 nm, greater than 10 nm and less than 50 nm, greater than 10 nm and less than 30 nm, or greater than 10 nm and less than 20 nm.

[0119] The angle θ110 may be, for example, greater than 30 degrees and less than 90 degrees, greater than 35 degrees and less than 85 degrees, greater than 40 degrees and less than 80 degrees, greater than 45 degrees and less than 80 degrees, greater than 50 degrees and less than 80 degrees, greater than 55 degrees and less than 80 degrees, greater than 60 degrees and less than 80 degrees, greater than 65 degrees and less than 80 degrees, or greater than 70 degrees and less than 80 degrees. Note that the angle θ110 may be set to 90 degrees. The smaller the angle θ110 is, the more coverage of the layers (insulating layer 110s, semiconductor layer 108, etc.) formed along the sidewalls of the opening 143 can be improved, so it is preferred. On the other hand, the closer the angle θ110 is to 90 degrees, the smaller the area occupied relative to the substrate surface of the transistor can be.

[0120] Figure 3A yes Figure 1B An enlarged view of area 161 is shown. Figure 3A The height of the upper end of the insulating layer 110s is consistent or substantially consistent with the height of the top surface of the conductive layer 112b ( Figure 1B In this structure, no step is formed between the upper end of the insulating layer 110s and the side surface of the conductive layer 112b. Therefore, compared with the structure having such a step, the coverage of the semiconductor layer 108 provided in contact with the side surface of the insulating layer 110s and the top surface of the conductive layer 112b can be improved.

[0121] In the transistor 100, the height of the upper end of the insulating layer 110s is not limited to Figure 1B The top surface of the conductive layer 112b shown in the figure has a uniform or substantially uniform height. FIG. 3B to FIG. 3D Shown with Figure 3A An example of a structure in which the height of the upper end portion of the insulating layer 110s is different.

[0122] Figure 3B It is shown that the height of the upper end portion of the insulating layer 110s is lower than the height of the top surface of the conductive layer 112b and higher than the height of the top surface of the insulating layer 110c located below the conductive layer 112b. Figure 3BThe side surface of the conductive layer 112b is shown to have a region in contact with the semiconductor layer 108. When the semiconductor layer 108 is in contact with the side surface of the conductive layer 112b, the contact area between the semiconductor layer 108 and the conductive layer 112b increases, and the contact resistance between the two can be reduced in some cases.

[0123] also, Figure 3C It is shown that the height of the upper end portion of the insulating layer 110s is lower than the height of the top surface of the insulating layer 110c. Figure 3C The side surface of the conductive layer 112b has a region in contact with the semiconductor layer 108, and the side surface of the insulating layer 110c has a region in contact with the semiconductor layer 108. In this structure, since the semiconductor layer 108 is in contact with the side surface of the conductive layer 112b as a whole, Figure 3B In contrast, the contact resistance between the semiconductor layer 108 and the conductive layer 112 b may be lower.

[0124] also, Figure 3D It is shown that the height of the upper end portion of the insulating layer 110s is lower than the height of the top surface of the insulating layer 110b. Figure 3D The side surface of the conductive layer 112b has a region in contact with the semiconductor layer 108, the side surface of the insulating layer 110c has a region in contact with the semiconductor layer 108, and the side surface of the insulating layer 110b has a region in contact with the semiconductor layer 108. In this structure, the same structure as in the above-mentioned structure can be obtained. Figure 3C The same effect can be obtained in .

[0125] In the etching when forming the insulating layer 110s, by setting the etching time to be increased, the height of the insulating layer 110s (the distance between the upper end and the lower end of the insulating layer 110s in the direction perpendicular to the substrate surface) can sometimes be reduced. When the etching time is increased, the height of the upper end of the insulating layer 110s is sometimes lower than the height of the top surface of the conductive layer 112b. The height of the upper end of the insulating layer 110s is preferably at least higher than the height of the top surface of the conductive layer 114. That is, in the opening 143, it is preferred that the insulating layer 110s is entirely opposite to the side surface of the conductive layer 114 via the insulating layer 116. As described above, the insulating layer 110s is an insulating layer used as the second gate insulating layer (back gate insulating layer) of the transistor 100. Therefore, by having the insulating layer 110s have a region entirely opposite to the side surface of the conductive layer 114, the region of the semiconductor layer 108 that is entirely opposite to the conductive layer 114 via the insulating layer 110s in the opening 143 can be used as a channel formation region (back channel formation region).

[0126] By shortening the channel length L100, the on-state current of the transistor 100 can be increased. By using the transistor 100, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, when a transistor of one embodiment of the present invention is applied to a semiconductor device, the miniaturization of the semiconductor device can be achieved.

[0127] In addition, for example, by applying a transistor of one embodiment of the present invention to a display device, the frame of the display device can be reduced. For example, when a transistor of one embodiment of the present invention is applied to a large display device or a high-definition display device, even if the number of wirings increases, the signal delay in each wiring can be reduced, and display unevenness can be suppressed.

[0128] The channel width of transistor 100 is ( Figure 1A ) is the length of the source region or the drain region when the semiconductor layer 108 is in contact with the conductive layer 112a or the length of the region in contact with the conductive layer 112b when viewed from a plane. Alternatively, when viewed from a plane, the circumference of the side surface of the insulating layer 110s is sometimes used as the channel width of the transistor 100. Alternatively, when viewed from a plane, the circumference of the region in contact with the conductive layer 112b is sometimes used as the channel width of the transistor 100.

[0129] Here, the channel width of the transistor 100 is described as the perimeter of the region where the insulating layer 110s and the conductive layer 112b are in contact with each other when viewed from a plane. Figure 1A , Figure 1B and Figure 2 In FIG. 1 , a solid double arrow indicates a channel width W100 of the transistor 100. The channel width W100 can also be referred to as the perimeter of the opening 143 when viewed from a plane.

[0130] The channel width W100 is determined by the top surface shape of the opening 143 and the like. Figure 1A , Figure 1B and Figure 2 The width D143 of the opening 143 is indicated by a double-dotted double arrow. The width D143 refers to the short side of the smallest rectangle circumscribing the opening 143 when viewed from a plane. When the opening 143 is formed by photolithography, the width D143 of the opening 143 is greater than the limiting resolution of the exposure device. The width D143 is, for example, greater than 0.20 μm and less than 5.0 μm. Note that when the top surface of the opening 143 is circular, the width D143 is equivalent to the diameter of the opening 143, and the channel width W100 can be calculated as "D143×π".

[0131] [Semiconductor layer 108]

[0132] There is no particular limitation on the semiconductor material that can be used for the semiconductor layer 108. For example, a single-material semiconductor or a compound semiconductor can be used. As a single-material semiconductor, for example, silicon or germanium can be used. As a compound semiconductor, for example, gallium arsenide and silicon germanium can be mentioned. As a compound semiconductor, an organic substance having semiconductor characteristics or a metal oxide having semiconductor characteristics (also referred to as an oxide semiconductor) can be used. Note that these semiconductor materials may also contain impurities that serve as dopants (for example, when silicon is used as a semiconductor material, typically, elements such as phosphorus and boron can be mentioned).

[0133] There is no particular limitation on the crystallinity of the semiconductor material used for the semiconductor layer 108, and an amorphous semiconductor or a crystalline semiconductor (a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or a semiconductor having a crystalline region in part thereof) can be used. The use of a crystalline semiconductor is preferred because degradation of transistor characteristics can be suppressed.

[0134] Silicon can be used for the semiconductor layer 108. Examples of silicon include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polycrystalline silicon (LTPS: Low Temperature Poly Silicon).

[0135] A transistor using amorphous silicon as the semiconductor layer 108 can be formed on a large glass substrate and can be manufactured at low cost. A transistor using polycrystalline silicon as the semiconductor layer 108 has high field effect mobility and can operate at high speed. In addition, a transistor using microcrystalline silicon as the semiconductor layer 108 has higher field effect mobility than a transistor using amorphous silicon and can operate at high speed.

[0136] The semiconductor layer 108 preferably includes a metal oxide (oxide semiconductor). Examples of metal oxides that can be used for the semiconductor layer 108 include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably includes at least indium (In) or zinc (Zn). In addition, the metal oxide preferably includes one or more selected from indium, element M, and zinc. Note that element M is one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, cobalt, and magnesium. In particular, element M is preferably one or more selected from aluminum, gallium, yttrium, and tin. Element M is preferably gallium.

[0137] The semiconductor layer 108 may be made of, for example, indium oxide, indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO or IAGZO), etc. Alternatively, indium tin oxide containing silicon may be used.

[0138] The metal oxide can be formed by sputtering or atomic layer deposition (ALD) as appropriate. Note that when the metal oxide is formed by sputtering, the atomic number ratio of the target material is sometimes different from the atomic number ratio of the metal oxide. In particular, the atomic number ratio of zinc in the metal oxide is sometimes smaller than the atomic number ratio of zinc in the target material. Specifically, the atomic number ratio of zinc is sometimes about 40% or more and 90% or less of the atomic number ratio of zinc in the target material.

[0139] As a specific example of forming the semiconductor layer 108 by the ALD method, a deposition method such as a thermal ALD method or a PEALD (Plasma Enhanced ALD) method can be cited. The thermal ALD method has extremely high step coverage, so it is preferred. In addition, the PEALD method not only has high step coverage but also can perform low-temperature deposition, so it is preferred.

[0140] The composition of the metal oxide included in the semiconductor layer 108 has a great influence on the electrical characteristics and reliability of the transistor 100 .

[0141] For example, by increasing the indium content in the metal oxide, a transistor with a large on-state current can be realized. In addition, for example, by using a metal oxide that does not contain gallium or has a low gallium content in the semiconductor layer 108, a transistor with high reliability for forward bias application can be realized. In addition, for example, by using a metal oxide with a low content of element M as the semiconductor layer 108, a transistor with high reliability for forward bias application can be realized. In addition, for example, by increasing the content of element M in the metal oxide, a transistor with high reliability for light can be realized.

[0142] The composition of the metal oxide included in the semiconductor layer 108 will be described later.

[0143] As the semiconductor layer 108, a crystalline metal oxide layer is preferably used. For example, a metal oxide layer having a CAAC (C-Axis Aligned Crystal) structure, a polycrystalline structure (poly-crystal) structure, a microcrystalline (nc: nano-crystal) structure, etc. can be used. By using a crystalline metal oxide layer for the semiconductor layer 108, the defect state density in the semiconductor layer 108 can be reduced, thereby realizing a transistor with high reliability. Note that the CAAC structure is a crystal structure in which a plurality of microcrystals (typically, a plurality of microcrystals of IGZO) have a c-axis orientation and are connected on the ab plane in a manner in which the plurality of microcrystals are not oriented. Compared with a polycrystalline structure, the CAAC structure does not clearly confirm the grain boundary, so a transistor with high reliability can be realized.

[0144] The higher the crystallinity of the metal oxide layer used for the semiconductor layer 108, the lower the defect state density in the semiconductor layer 108. On the other hand, by using a metal oxide layer with low crystallinity, a transistor capable of passing a large current can be realized.

[0145] The semiconductor layer 108 may also have a stacked structure of two or more metal oxide layers with different crystallinity. For example, a stacked structure may have a first metal oxide layer and a second metal oxide layer disposed on the first metal oxide layer, and the second metal oxide layer may include a region whose crystallinity is higher than that of the first metal oxide layer. Alternatively, the second metal oxide layer may have a region whose crystallinity is lower than that of the first metal oxide layer. The compositions of the two or more metal oxide layers included in the semiconductor layer 108 may also be the same or substantially the same as each other. When a stacked structure of metal oxide layers of the same composition is adopted, for example, the same sputtering target can be used to form it, thereby reducing the manufacturing cost. For example, by using the same sputtering target to make the flow ratio of the oxygen gas relative to the overall deposition gas used in the deposition (hereinafter also referred to as the oxygen flow ratio) different, a stacked structure of two or more metal oxide layers with different crystallinity can be formed. Note that the compositions of the two or more metal oxide layers included in the semiconductor layer 108 may also be different from each other.

[0146] The thickness of the semiconductor layer 108 (relative to the thickness of the formed surface) is preferably greater than 3 nm and less than 100 nm, more preferably greater than 5 nm and less than 100 nm, more preferably greater than 10 nm and less than 100 nm, more preferably greater than 10 nm and less than 70 nm, more preferably greater than 15 nm and less than 70 nm, more preferably greater than 15 nm and less than 50 nm, more preferably greater than 20 nm and less than 50 nm, more preferably greater than 20 nm and less than 40 nm, more preferably greater than 25 nm and less than 40 nm.

[0147] Here, oxygen vacancies that may be formed in the semiconductor layer 108 are described.

[0148] When an oxide semiconductor is used as the semiconductor layer 108, hydrogen in the oxide semiconductor reacts with oxygen bonded to a metal atom to form water, thereby forming an oxygen vacancy (V) in the oxide semiconductor. O :Oxygen Vacancy) Furthermore, sometimes hydrogen enters the defect in the oxygen vacancy (hereinafter referred to as V O H) is used as a donor to generate electrons as carriers. In addition, sometimes electrons as carriers are generated because part of the hydrogen is bonded to the oxygen bonded to the metal atom. Therefore, transistors using oxide semiconductors containing more hydrogen tend to have normally-on characteristics. In addition, because the hydrogen in the oxide semiconductor is easily moved due to heat, electric field, etc., when the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be reduced.

[0149] V O H can be used as a donor of oxide semiconductors. However, it is difficult to quantitatively evaluate this defect. Therefore, in oxide semiconductors, sometimes the evaluation is not based on the donor concentration but on the carrier concentration. Therefore, in this specification, etc., sometimes as a parameter of the oxide semiconductor, instead of the donor concentration, the carrier concentration in a state where no electric field is applied is used. That is to say, the "carrier concentration" recorded in this specification, etc. can sometimes be referred to as the "donor concentration".

[0150] Therefore, when an oxide semiconductor is used as the semiconductor layer 108, it is preferable to minimize the V O H to make it high purity intrinsic or substantially high purity intrinsic. In order to obtain this V O In order to prepare an oxide semiconductor in which H is sufficiently reduced, it is important to: remove impurities such as water and hydrogen in the oxide semiconductor (sometimes referred to as dehydration or dehydrogenation treatment); and supply oxygen to the oxide semiconductor to repair oxygen vacancies (V O ). By setting V O Oxide semiconductors with sufficiently reduced defects such as H can be used in the channel formation region of a transistor to impart stable electrical characteristics. Note that oxygen is sometimes supplied to an oxide semiconductor to repair oxygen vacancies (V O ) is recorded as oxidation treatment.

[0151] When an oxide semiconductor is used as the semiconductor layer 108, the carrier concentration of the oxide semiconductor in a region serving as a channel formation region is preferably 1×10 18 cm -3 Below, more preferably below 1×10 17 cm -3 , and more preferably less than 1×1016 cm -3 , more preferably less than 1×10 13 cm -3 , and more preferably less than 1×10 12 cm -3 The lower limit of the carrier concentration of the oxide semiconductor in the region used as the channel formation region is not particularly limited, and can be set to 1×10 -9 cm -3 .

[0152] Compared with transistors using amorphous silicon, transistors using oxide semiconductors (hereinafter referred to as OS transistors) have very high field effect mobility. In addition, the leakage current between the source and the drain in the off state of the OS transistor (hereinafter also referred to as the off-state current) is extremely low, and the charge stored in the capacitor connected in series with the transistor can be maintained for a long time. In addition, by using OS transistors in semiconductor devices, the power consumption of the semiconductor device can be reduced.

[0153] OS transistors can be used in display devices. When increasing the luminous brightness of a light-emitting device included in a pixel circuit of a display device, it is necessary to increase the amount of current flowing through the light-emitting device. To this end, it is necessary to increase the source-drain voltage of a driving transistor included in the pixel circuit. Because the source-drain withstand voltage of an OS transistor is higher than that of a transistor using silicon (hereinafter referred to as a Si transistor), a high voltage can be applied between the source and drain of the OS transistor. Thus, by using an OS transistor as a driving transistor in a pixel circuit, the amount of current flowing through the light-emitting device can be increased to increase the luminous brightness of the light-emitting device.

[0154] When the transistor operates in the saturation region, the OS transistor can make the change in the source-drain current for the change in the gate-source voltage smaller than the Si transistor. Therefore, by using the OS transistor as the driving transistor included in the pixel circuit, the current flowing through the source-drain can be determined in detail according to the change in the gate-source voltage, so the amount of current flowing through the light-emitting device can be densely controlled. As a result, the number of grayscales of the pixel circuit can be increased.

[0155] Regarding the saturation characteristics of the current flowing when the transistor operates in the saturation region, compared with the Si transistor, the OS transistor can make a stable current (saturation current) flow even if the source-drain voltage is gradually increased. Therefore, by using the OS transistor as a driving transistor, even if, for example, the current-voltage characteristics of the light-emitting device are uneven, a stable current can flow through the light-emitting device. That is, when the OS transistor operates in the saturation region, even if the source-drain voltage is increased, the source-drain current is almost unchanged, so the light-emitting brightness of the light-emitting device can be stabilized.

[0156] As described above, by using an OS transistor as a driving transistor included in a pixel circuit, “suppression of black blur”, “increase in light emission brightness”, “multi-grayscale”, “suppression of unevenness in light emitting devices”, etc. can be achieved.

[0157] OS transistors have little change in electrical characteristics due to exposure to radiation, that is, they have high tolerance to radiation, so they can be appropriately used in environments where radiation may be incident. OS transistors can also be said to have high reliability with respect to radiation. For example, OS transistors can be appropriately used in pixel circuits of flat-panel detectors for X-rays. In addition, OS transistors can be appropriately used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, neutron rays, and proton radiation).

[0158] [Insulation layer]

[0159] In the transistor of one embodiment of the present invention and a semiconductor device, a display device, and the like using the transistor of one embodiment of the present invention, an inorganic insulating material or an organic insulating material can be used as the insulating layer (the insulating layer 110, the insulating layer 106, the insulating layer 110s, the insulating layer 116, and the insulating layer 195). Alternatively, a stacked structure of an inorganic insulating material and an organic insulating material can be used as the insulating layer.

[0160] As the inorganic insulating material, one or more of oxide, oxynitride, oxynitride, and nitride can be used.

[0161] Note that in this specification and the like, oxynitride refers to a material containing more oxygen than nitrogen in its composition. Nitride oxide refers to a material containing more nitrogen than oxygen in its composition. For example, silicon oxynitride refers to a material containing more oxygen than nitrogen in its composition, and silicon nitride oxide refers to a material containing more nitrogen than oxygen in its composition.

[0162] For example, the oxygen and nitrogen contents can be analyzed using analytical methods such as secondary ion mass spectrometry (SIMS) or X-ray photoelectron spectroscopy (XPS). When the content of the target element is high (for example, 0.5 atomic% or more or 1 atomic%), it is preferred to use XPS for analysis. On the other hand, when the content of the target element is low (for example, less than 0.5 atomic% or less than 1 atomic%), it is preferred to use SIMS for analysis. When comparing the element contents, it is more preferred to use a composite analysis using both SIMS and XPS analysis techniques.

[0163] In addition, the evaluation of the film density of the insulating layer, etc. can be performed, for example, using Rutherford Backscattering Spectrometry (RBS) or X-ray Reflection Measurement (XRR). In addition, sometimes the difference in film density can be evaluated using a cross-sectional transmission electron microscope (TEM) image. In TEM observation, when the film density is high, the transmission electron (TE) image is dark (dark), and when the film density is low, the transmission electron (TE) image is light (bright). Note that even if the insulating layer uses the same material, when the film density is different, these boundaries can sometimes be observed in the cross-sectional TEM image as a difference in contrast.

[0164] For example, the nitrogen content of the insulating layer can be confirmed by energy dispersive X-ray spectroscopy (EDX). For example, when silicon nitride, silicon oxynitride, etc. are used as the insulating layer, the nitrogen content can be evaluated by using the ratio of the peak height of nitrogen relative to the peak height of silicon. Note that in EDX, the peak of an element refers to the point where the count of the element takes a maximum value in the spectrum in which the horizontal axis represents the energy of the characteristic X-ray and the vertical axis represents the count (detection value) of the characteristic X-ray. Alternatively, the difference in nitrogen content can be confirmed by using the count at the energy of the characteristic X-ray inherent to the element as a ratio of the count of nitrogen relative to the count of silicon. For example, the count at 1.739 keV (Si-Kα) can be used for silicon, and the count at 0.392 keV (N-Kα) can be used for nitrogen.

[0165] The hydrogen concentration of the insulating layer can be evaluated by, for example, SIMS.

[0166] When hydrogen diffuses into the semiconductor layer 108, it reacts with oxygen atoms included in the oxide semiconductor to generate water, and oxygen vacancies (V) are sometimes formed in the semiconductor layer 108. O ). Furthermore, V is formed in the semiconductor layer 108 O H, the carrier concentration in the semiconductor layer 108 may be increased. By using a barrier film that suppresses the diffusion of hydrogen as an insulating layer in contact with the semiconductor layer 108 or an insulating layer located around the semiconductor layer 108, oxygen vacancies (V O ) and V O H, therefore, a transistor having good electrical characteristics and high reliability can be realized.

[0167] Oxygen vacancies (V O ) and V OIn particular, when the channel length L is small, the oxygen vacancies (V O ) and V O H has a greater impact on the electrical characteristics and reliability of transistor 100. For example, sometimes V O H diffuses from the source region or the drain region to the channel formation region, increasing the carrier concentration in the channel formation region, thereby causing the threshold voltage of the transistor 100 to vary or the reliability to decrease. The smaller the channel length L100 of the transistor 100, the smaller the V O The greater the impact of H diffusion on the electrical characteristics and reliability of the transistor 100, the greater the reduction of oxygen vacancies (V O ) and V O H, in particular, reducing oxygen vacancies (V O ) and V O H, therefore, a transistor with a small channel length having good electrical characteristics and high reliability can be realized.

[0168] By using an insulating layer that releases oxygen as an insulating layer in contact with the semiconductor layer 108 (for example, the insulating layer 106 or the insulating layer 110s) or an insulating layer located at the periphery of the semiconductor layer 108 (for example, the insulating layer 110), oxygen can be supplied from the insulating layer to the semiconductor layer 108. By supplying oxygen to the channel formation region of the semiconductor layer 108, oxygen vacancies (V O ) and V O H, a transistor having good electrical characteristics and high reliability can be realized. Note that as a process for supplying oxygen to the semiconductor layer 108, there is heat treatment in an atmosphere containing oxygen, plasma treatment in an atmosphere containing oxygen, or the like.

[0169] It is preferable that the amount of impurities (for example, water and hydrogen) released from the insulating layer in contact with the semiconductor layer 108 or the insulating layer itself located around the semiconductor layer 108 is small. Note that the impurities described here refer to oxygen vacancies (V O ) and V O H is a substance that may have a negative impact on the electrical characteristics of the transistor. Since the amount of impurities released is small, diffusion of the impurities into the semiconductor layer 108 can be suppressed, so that a transistor having good electrical characteristics and high reliability can be implemented.

[0170] Oxygen may be released from the semiconductor layer 108 due to heat applied in a step after forming the semiconductor layer 108. However, oxygen vacancies (V vacancies) in the semiconductor layer 108 can be suppressed by supplying oxygen to the semiconductor layer 108 from an insulating layer in contact with the semiconductor layer 108 or an insulating layer located around the semiconductor layer 108. O ) and VO H increases. In addition, the degree of freedom of the processing temperature can be increased in the process after forming the semiconductor layer 108. Specifically, the processing temperature can also be increased in the process after forming the semiconductor layer 108. As a result, the transistor 100 having good electrical characteristics and high reliability can be realized.

[0171] [Insulation layer 110]

[0172] An inorganic insulating material or an organic insulating material can be used as the insulating layer 110 (the insulating layer 110a, the insulating layer 110b, and the insulating layer 110c). The insulating layer 110 may have a stacked-layer structure of an inorganic insulating material and an organic insulating material.

[0173] As the insulating layer 110, an inorganic insulating material can be used appropriately. As the inorganic insulating material, one or more of oxides, oxynitrides, nitride oxides, and nitrides can be used. As the insulating layer 110, for example, one or more of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, yttrium oxide, zirconium oxide, gallium oxide, tantalum oxide, magnesium oxide, lanthanum oxide, cerium oxide, neodymium oxide, silicon nitride, silicon oxynitride, and aluminum nitride can be used.

[0174] The insulating layer 110 may also have a stacked structure of two or more layers. Figure 1B The insulating layer 110 has a stacked-layer structure in which an insulating layer 110a, an insulating layer 110b over the insulating layer 110a, and an insulating layer 110c over the insulating layer 110b are shown in FIG. Note that the insulating layer 110a, the insulating layer 110b, and the insulating layer 110c may be made of the same material or different materials.

[0175] It is preferable that the amount of impurities (for example, water and hydrogen) released from the insulating layer 110 itself is small.

[0176] The thickness of the insulating layer 110b may be greater than the thickness of the insulating layer 110a and the thickness of the insulating layer 110c. As described above, the insulating layer 110b is an insulating layer that contains oxygen supplied to the semiconductor layer 108. Therefore, among the three insulating layers (insulating layer 110a, insulating layer 110b, and insulating layer 110c) constituting the insulating layer 110, the insulating layer 110b has the largest thickness, so that the amount of oxygen that can be contained in the entire insulating layer 110 can be increased. The deposition speed of the insulating layer 110b is preferably faster than the deposition speed of the insulating layer 110a and the deposition speed of the insulating layer 110c. By increasing the deposition speed of a thick film, productivity can be improved.

[0177] The insulating layer 110a and the insulating layer 110c are used as a barrier film to suppress the gas from being released from the insulating layer 110b. The insulating layer 110a and the insulating layer 110c are preferably made of a material that is not easy for gas to diffuse. The insulating layer 110a and the insulating layer 110c preferably include a region with a higher film density than the insulating layer 110b. By increasing the film density of the insulating layer, the barrier property to gas can be improved. By slowing down the deposition speed of the insulating layer, the film density of the insulating layer becomes higher, so the barrier property to gas can be improved.

[0178] As the insulating layer 110b, oxide or oxynitride is preferably used. As the insulating layer 110b, a film that releases oxygen by heating is preferably used. As the insulating layer 110b, for example, silicon oxide or silicon oxynitride can be used.

[0179] Oxygen is released through the insulating layer 110b, and oxygen can be supplied from the insulating layer 110b to the semiconductor layer 108 through the insulating layer 110s. The insulating layer 110b preferably has a high oxygen diffusion coefficient. By increasing the oxygen diffusion coefficient, oxygen can be easily diffused into the insulating layer 110b, and oxygen can be efficiently supplied to the semiconductor layer 108. In addition, as described above, the thickness of the insulating layer 110b is greater than the thickness of the insulating layer 110a and the thickness of the insulating layer 110c, thereby supplying more oxygen to the semiconductor layer 108.

[0180] The insulating layer 110 is preferably formed by a deposition method such as sputtering, ALD, or plasma CVD.

[0181] In particular, by depositing by a deposition method using a sputtering method without using a hydrogen-containing gas as a deposition gas, a film with a very low hydrogen content can be deposited. Therefore, it is possible to suppress the supply of hydrogen to the semiconductor layer 108 and achieve stabilization of the electrical characteristics of the transistor 100. In addition, when silicon oxide is deposited by sputtering, for example, a silicon target material can be used for deposition in an atmosphere containing an oxidizing gas. In addition, when silicon nitride is deposited by sputtering, for example, a silicon target material can be used for deposition in an atmosphere containing a nitrogen gas. In addition, when aluminum oxide is deposited by sputtering, for example, an aluminum target material can be used for deposition in an atmosphere containing an oxidizing gas.

[0182] In addition, silicon oxide and silicon nitride can be deposited by, for example, PEALD. In addition, aluminum oxide and hafnium oxide can be deposited by, for example, thermal ALD. By depositing an insulating layer by PEALD or thermal ALD, a dense insulating film can be formed, thereby improving the barrier properties to oxygen and hydrogen.

[0183] The insulating layer 110a and the insulating layer 110c can be made of a material having a higher nitrogen content than the insulating layer 110b. By increasing the nitrogen content in the insulating layer, the barrier property against oxygen and hydrogen can be improved.

[0184] In addition, the insulating layer 110 a and the insulating layer 110 c may have a region where the hydrogen concentration in the film is lower than that in the insulating layer 110 b .

[0185] The insulating layer 110a and the insulating layer 110c are preferably not easy for oxygen to pass through. Furthermore, the insulating layer 110a and the insulating layer 110c are preferably not easy for hydrogen to pass through. The insulating layer 110a and the insulating layer 110c are used as a barrier film to inhibit hydrogen from diffusing from the outside of the transistor through the insulating layer 110a and the insulating layer 110c to the semiconductor layer 108. The film density of the insulating layer 110a and the insulating layer 110c is preferably higher than the film density of the insulating layer 110b. By increasing the film density of the insulating layer, the barrier property of oxygen and hydrogen can be improved. When silicon oxide or silicon oxynitride is used as the insulating layer 110b, silicon nitride or silicon nitride oxide can be used as the insulating layer 110a and the insulating layer 110c. In addition, hafnium oxide or aluminum oxide can be appropriately used as the insulating layer 110a and the insulating layer 110c.

[0186] In addition, as the insulating layer 110a and the insulating layer 110c, a structure in which two or more selected from silicon nitride, silicon nitride oxide, hafnium oxide, and aluminum oxide are stacked can be used.

[0187] When oxygen in the insulating layer 110b diffuses from the insulating layer 110b to the lower side (to the substrate 102 side), the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 may decrease. In addition, by providing the insulating layer 110a below the insulating layer 110b, it is possible to suppress the diffusion of oxygen contained in the insulating layer 110b to the lower side of the insulating layer 110b. In addition, by providing the insulating layer 110c on the insulating layer 110b, it is possible to suppress the diffusion of oxygen contained in the insulating layer 110b to the upper side of the insulating layer 110b. Therefore, the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 is increased, so that oxygen vacancies (V O ) and V O H.

[0188] Furthermore, by providing the insulating layer 110a and the insulating layer 110c, diffusion of hydrogen into the semiconductor layer 108 is suppressed, thereby reducing oxygen vacancies (V O ) and V O H.

[0189] The insulating layer 110a and the insulating layer 110c preferably have a thickness that is used as a barrier film for oxygen and hydrogen. When the thickness of the insulating layer is small, the function as a barrier film is sometimes reduced. On the other hand, when the thickness of the insulating layer is large, the region of the semiconductor layer 108 opposite to the insulating layer 110b becomes narrower, and sometimes the amount of oxygen supplied to the semiconductor layer 108 decreases. The thickness of the insulating layer 110a and the insulating layer 110c (relative to the thickness of the formed surface) is preferably 1 nm or more and 200 nm or less, 1 nm or more and 100 nm or less, 1 nm or more and 60 nm or less, 1 nm or more and 50 nm or less, 1 nm or more and 40 nm or less, 1 nm or more and 30 nm or less, 1 nm or more and 20 nm or less, 1 nm or more and 10 nm or less, 1 nm or more and 5 nm or less.

[0190] [Insulating layer 106, insulating layer 110s]

[0191] The insulating layer 106 and the insulating layer 110s used as the gate insulating layer preferably have a low defect density. When the defect density of the insulating layer 106 and the insulating layer 110s is low, a transistor having good electrical characteristics can be realized. Furthermore, the insulating layer 106 and the insulating layer 110s preferably have a high dielectric strength voltage. Since the insulating layer 106 and the insulating layer 110s have a high dielectric strength voltage, a transistor with high reliability can be formed.

[0192] In addition, the insulating layer 106 and the insulating layer 110s are preferably insulating layers containing oxygen. In addition, the insulating layer is preferably an insulating layer that releases oxygen by heating. Thus, for example, when a metal oxide is used as the semiconductor layer 108, oxygen contained in the insulating layer 106 and the insulating layer 110s can be supplied to the metal oxide. Thus, since oxygen vacancies in the metal oxide are repaired, the electrical characteristics and reliability of the transistor 100 can be improved.

[0193] As the insulating layer 106 and the insulating layer 110s, for example, one or more of an oxide, an oxynitride, an oxynitride, and a nitride having insulating properties can be used. As the insulating layer 106 and the insulating layer 110s, one or more of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, and Ga-Zn oxide can be used. The insulating layer 106 and the insulating layer 110s can have a single layer or a stacked layer. The insulating layer 106 and the insulating layer 110s can also have, for example, a stacked layer structure of an oxide and a nitride.

[0194] Note that in micro transistors, when the thickness of the gate insulating layer is small, the leakage current sometimes increases. By using a material with a high relative dielectric constant (also called a high-k material) for the gate insulating layer, it is possible to achieve low voltage when the transistor is operating while maintaining the physical thickness. Examples of high-k materials include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0195] Preferably, the amount of impurities (for example, water and hydrogen) released from the insulating layer 106 and the insulating layer 110s themselves is small. Since the amount of impurities released from the insulating layer 106 and the insulating layer 110s is small, diffusion of the impurities into the semiconductor layer 108 can be suppressed, thereby realizing a transistor having good electrical characteristics and high reliability.

[0196] Since the insulating layer 106 is formed on the semiconductor layer 108, it is preferably a film formed under conditions that cause little damage to the semiconductor layer 108. For example, it is preferably formed under conditions where the deposition speed (also referred to as the deposition rate) is sufficiently low. For example, when the insulating layer 106 is formed by a plasma CVD method, it is possible to reduce the damage to the semiconductor layer 108 by forming it under low power conditions.

[0197] Here, taking a structure in which the semiconductor layer 108 is made of metal oxide as an example, the insulating layer 106 and the insulating layer 110s are described in detail.

[0198] In order to improve the interface characteristics with the semiconductor layer 108, at least one of oxide and oxynitride is preferably used for the insulating layer 106 and the insulating layer 110s on the side in contact with the semiconductor layer 108. As the insulating layer 106 and the insulating layer 110s, for example, one or more of silicon oxide and silicon oxynitride can be appropriately used. In addition, the insulating layer 106 and the insulating layer 110s are preferably made of a film that releases oxygen by heating.

[0199] In addition, the insulating layer 106 and the insulating layer 110s may have a stacked structure. The insulating layer 106 may have a stacked structure of an oxide film or an oxynitride film in contact with the semiconductor layer 108 side and a nitride film in contact with the conductive layer 104 side. Similarly, the insulating layer 110s may have a stacked structure of an oxide film or an oxynitride film in contact with the semiconductor layer 108 side and a nitride film on the side opposite to the conductive layer 114. As the oxide film or the oxynitride film, for example, one or more of silicon oxide and silicon oxynitride can be appropriately used. As the nitride film, silicon nitride can be appropriately used.

[0200] The thickness of the insulating layer 106 and the insulating layer 110s (the thickness relative to the formed surface) is more preferably 1 nm or more and 100 nm or less. At least a portion of the insulating layer 106 and the insulating layer 110s may have a region having the above thickness.

[0201] [Conductive layer 112a, conductive layer 112b]

[0202] The conductive layer 112a and the conductive layer 112b used as the source electrode and the drain electrode can be formed using one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum and niobium, or an alloy containing one or more of the above metals. A low-resistance conductive material containing one or more of copper, silver, gold and aluminum can be appropriately used for the conductive layer 112a and the conductive layer 112b. Among them, copper or aluminum is particularly advantageous in mass production and is therefore preferred.

[0203] The conductive layer 112a and the conductive layer 112b may be made of a metal oxide film (also referred to as an oxide conductor). Examples of the oxide conductor (OC) include In-Sn oxide (ITO), In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Zn oxide, In-Sn-Si oxide (ITSO), and In-Ga-Zn oxide.

[0204] Here, an oxide conductor (OC) is described. For example, oxygen vacancies are formed in a metal oxide having semiconductor properties, and hydrogen is added to the oxygen vacancies to form a donor energy level near the conduction band. As a result, the conductivity of the metal oxide increases, and it becomes a conductor. A metal oxide that can become a conductor is called an oxide conductor.

[0205] The conductive layers 112a and 112b may have a stacked-layer structure of a conductive film containing the above-mentioned oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, wiring resistance can be reduced.

[0206] A Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta or Ti) may be applied as the conductive layer 112a and the conductive layer 112b. By using the Cu-X alloy film, processing can be performed by a wet etching method, thereby reducing manufacturing costs.

[0207] Note that the conductive layer 112a and the conductive layer 112b can be formed using the same material or different materials from each other.

[0208] Here, taking a structure in which the semiconductor layer 108 is made of metal oxide as an example, the conductive layer 112a and the conductive layer 112b are specifically described.

[0209] When an oxide semiconductor is used as the semiconductor layer 108, the conductive layers 112a and 112b may be oxidized by oxygen contained in the semiconductor layer 108, and the resistance may be increased. The conductive layers 112a and 112b may be oxidized by oxygen contained in the insulating layer 110 and the insulating layer 110s, and the resistance may be increased. The conductive layers 112a and 112b may be oxidized by oxygen contained in the semiconductor layer 108, and the oxygen vacancies (V O ) increases. The conductive layer 112a and the conductive layer 112b are oxidized by oxygen contained in the insulating layer 110 and the insulating layer 110s, and the amount of oxygen supplied from the insulating layer 110 and the insulating layer 110s to the semiconductor layer 108 may decrease.

[0210] The conductive layer 112a and the conductive layer 112b preferably use a material that is not easily oxidized. The conductive layer 112a and the conductive layer 112b preferably use an oxide conductor. For example, In-Sn oxide (ITO) or In-Sn-Si oxide (ITSO) can be used appropriately. The conductive layer 112a and the conductive layer 112b can also use a nitride conductor. As nitride conductors, tantalum nitride and titanium nitride can be cited. The conductive layer 112a and the conductive layer 112b can also have a stacked structure of the above materials.

[0211] By using a material that is not easily oxidized for the conductive layers 112a and 112b, an increase in resistance due to oxidation of oxygen contained in the semiconductor layer 108 or oxygen contained in the insulating layer 110 and the insulating layer 110s can be suppressed. O ) is suppressed while the amount of oxygen supplied from the insulating layer 110 and the insulating layer 110s to the semiconductor layer 108 is increased.

[0212] [Conductive layer 104, conductive layer 114]

[0213] As the conductive layer 104 and the conductive layer 114 used as the gate electrode and the back gate electrode, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, molybdenum, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt and niobium or an alloy containing one or more of the above metals as components can be used. In addition, as the conductive layer 104 and the conductive layer 114, the material that can be used for the above-mentioned conductive layer 112a and the conductive layer 112b can be used. As described above, since the insulating layer 116 formed by plasma treatment in an oxygen atmosphere or the like is provided on the side and top surface of the conductive layer 114, the conductive layer 114 is preferably a conductive material that is easily oxidized. For example, aluminum can be used as the conductive layer 114.

[0214] Note that Figure 1B In the examples, the conductive layer 104 has a single-layer structure, but is not limited thereto. For example, the conductive layer 104 has a stacked structure of two or more layers. For example, when the conductive layer 104 has a two-layer stacked structure, a nitride or an oxide may be used as the first conductive layer (the conductive layer on the insulating layer 106 side), and one or more of chromium, copper, aluminum, gold, silver, zinc, molybdenum, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, and niobium or an alloy containing one or more of the above metals as a component may be used as the second conductive layer. In addition, for example, when the conductive layer 104 has a three-layer stacked structure, an alloy containing one or more of the above metals as a component or a nitride of the metal or the alloy may be used as the first conductive layer (the conductive layer on the insulating layer 106 side), an alloy containing one or more of the above metals as a component may be used as the second conductive layer, and an alloy containing one or more of the above metals as a component or a nitride of the metal or the alloy may be used as the third conductive layer.

[0215] [Insulating layer 116]

[0216] The insulating layer 116 is an oxide contained in the element in the conductive layer 114. Examples of the insulating layer 116 include oxides of the conductive layer 114, and specifically, metal oxides such as aluminum oxide and tantalum oxide. For example, when aluminum is used as the conductive layer 114, the insulating layer 116 is aluminum oxide. The insulating layer 116 is preferably an insulating layer that can be formed by performing plasma treatment on the conductive layer 114 in an oxygen atmosphere.

[0217] The insulating layer 116 is preferably an insulating layer having a barrier property to oxygen, similarly to the insulating layer 110a and the insulating layer 110c. Therefore, it is possible to suppress the diffusion of oxygen released from the insulating layer 110s and the insulating layer 110b to the conductive layer 114 side through the insulating layer 116. Furthermore, an insulating layer having the same function as the insulating layer 110a and the insulating layer 110c can be formed without using a deposition method such as a plasma CVD method or a sputtering method, thereby sometimes reducing the number of times the above deposition method is applied, and productivity can be improved. As the insulating layer 116 that satisfies the above, for example, aluminum oxide can be cited.

[0218] [Insulation layer 195]

[0219] The insulating layer 195 used as a protective layer of the transistor 100 preferably uses a material in which impurities are not easily diffused. By providing the insulating layer 195, it is possible to effectively suppress the diffusion of impurities from the outside into the transistor, thereby improving the reliability of the body tube. As impurities, water and hydrogen can be cited, for example. The insulating layer 195 can be an insulating layer containing an inorganic material or an insulating layer containing an organic material. For example, the insulating layer 195 can appropriately use an inorganic material of oxide, oxynitride, oxynitride or nitride. More specifically, one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide and hafnium aluminate can be used. As an organic material, for example, one or more of acrylic resin and polyimide resin can be used. As an organic material, a photosensitive material can also be used. In addition, two or more of the above-mentioned insulating films can also be stacked. The insulating layer 195 can also have a stacked structure of an insulating layer containing an inorganic material and an insulating layer containing an organic material.

[0220] [Substrate 102]

[0221] Although there is no particular limitation on the material of the substrate 102, it is at least required to have heat resistance sufficient to withstand subsequent heat treatment. For example, a single crystal semiconductor substrate or polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate can be used as the substrate 102. In addition, a substrate having a semiconductor element disposed thereon can also be used as the substrate 102. Note that the shape of the semiconductor substrate and the insulating substrate can be circular or angular.

[0222] As the substrate 102, a flexible substrate may be used, and the transistor 100 and the like may be directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100 and the like. The peeling layer may be used when a part or all of a semiconductor device is manufactured on the peeling layer, and then separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like may also be transferred to a substrate with low heat resistance or a flexible substrate.

[0223] [Composition of Metal Oxide Contained in Semiconductor Layer 108]

[0224] The composition of the metal oxide included in the semiconductor layer 108 will be described below.

[0225] The composition of the metal oxide included in the semiconductor layer 108 has a great influence on the electrical characteristics and reliability of the transistor 100 .

[0226] For example, by increasing the indium content in the metal oxide, a transistor with a large on-state current can be realized.

[0227] When In-Zn oxide is used as the semiconductor layer 108, it is preferable to use a metal oxide in which the atomic ratio of indium is greater than the atomic ratio of zinc. For example, a metal oxide in which the atomic ratio of the metal elements is In:Zn=1:1, In:Zn=2:1, In:Zn=3:1, In:Zn=4:1, In:Zn=5:1, In:Zn=7:1, or In:Zn=10:1 or a metal oxide in the vicinity thereof can be used.

[0228] When In-Sn oxide is used as the semiconductor layer 108, it is preferable to use a metal oxide in which the atomic ratio of indium is greater than the atomic ratio of tin. For example, a metal oxide in which the atomic ratio of the metal elements is In:Sn=1:1, In:Sn=2:1, In:Sn=3:1, In:Sn=4:1, In:Sn=5:1, In:Sn=7:1, or In:Sn=10:1 or a metal oxide in the vicinity thereof can be used.

[0229] When In-M-Zn oxide is used as the semiconductor layer 108, a metal oxide in which the atomic ratio of indium relative to the atomic number of the metal element is higher than the atomic ratio of the element M can be used. Furthermore, it is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of the element M. For example, the semiconductor layer 108 can use a metal oxide in which the atomic ratio of the metal element is In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M :Zn=6:1:6, In:M:Zn=10:1:3, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn=10:1:8, In:M:Zn=5:2:5, In:M:Zn=10:1:10, In:M:Zn=20:1:10, In:M:Zn=40:1:10 or metal oxides thereabouts.

[0230] In addition, when a plurality of metal elements are included as the element M, the sum of the atomic number ratios of the metal elements can be used as the atomic number ratio of the element M. For example, when using an In-Ga-Al-Zn oxide containing gallium and aluminum as the element M, the sum of the atomic number ratio of gallium and the atomic number ratio of aluminum can be used as the atomic number ratio of the element M. In addition, the atomic number ratio of indium, the element M, and zinc is preferably within the above range. For example, when using an In-Ga-Sn-Zn oxide containing gallium and tin as the element M, the sum of the atomic number ratio of gallium and the atomic number ratio of tin can be used as the atomic number ratio of the element M. In addition, the atomic number ratio of indium, the element M, and zinc is preferably within the above range.

[0231] It is preferable to use a metal oxide in which the ratio of the number of atoms of indium to the number of atoms of the metal element contained in the metal oxide is 30 atomic % or more and 100 atomic % or less, preferably 30 atomic % or more and 95 atomic % or less, more preferably 35 atomic % or more and 95 atomic % or less, further preferably 35 atomic % or more and 90 atomic % or less, further preferably 40 atomic % or more and 90 atomic % or less, further preferably 45 atomic % or more and 90 atomic % or less, further preferably 50 atomic % or more and 80 atomic % or less, further preferably 60 atomic % or more and 80 atomic % or less, further preferably 70 atomic % or more and 80 atomic % or less. For example, when In-Ga-Zn oxide is used as the semiconductor layer 108, the ratio of the number of atoms of indium to the total number of atoms of indium, gallium, and zinc is preferably within the above range.

[0232] In this specification and the like, the ratio of the number of indium atoms to the number of atoms of a metal element contained may be described as the indium content. The same applies to other metal elements.

[0233] By increasing the indium content in the metal oxide, a transistor with a large on-state current can be realized. By using this transistor in a transistor that requires a large on-state current, a semiconductor device with excellent electrical characteristics can be realized.

[0234] The composition of metal oxides can be analyzed, for example, using EDX, XPS, inductively coupled plasma mass spectrometry (ICP-MS: Inductively Coupled Plasma-Mass Spectrometry) or inductively coupled plasma atomic emission spectrometry (ICP-AES: Inductively Coupled Plasma-Atomic Emission Spectrometry). Alternatively, the above methods can be combined for analysis. Note that the actual content of elements with low content is sometimes different from the content obtained by analysis due to the influence of analysis accuracy. For example, when the content of element M is low, the content of element M obtained by analysis is sometimes lower than the actual content, quantification is difficult, or element M cannot be detected.

[0235] In this specification, etc., the nearby composition includes a range of ±30% of the desired atomic number ratio. For example, when the atomic number ratio is described as In:M:Zn=4:2:3 or a composition nearby, the following cases are included: when the atomic number ratio of indium is 4, the atomic number ratio of M is greater than 1 and less than 3, and the atomic number ratio of zinc is greater than 2 and less than 4. In addition, when the atomic number ratio is described as In:M:Zn=5:1:6 or a composition nearby, the following cases are included: when the atomic number ratio of indium is 5, the atomic number ratio of M is greater than 0.1 and less than 2, and the atomic number ratio of zinc is greater than 5 and less than 7. In addition, when the atomic number ratio is described as In:M:Zn=1:1:1 or a composition nearby, the following cases are included: when the atomic number ratio of indium is 1, the atomic number ratio of M is greater than 0.1 and less than 2, and the atomic number ratio of zinc is greater than 0.1 and less than 2.

[0236] Here, the reliability of transistors is explained. As one of the indicators for evaluating the reliability of transistors, there is a GBT (Gate Bias Temperature) stress test in which an electric field is applied to the gate and maintained at a high temperature. Among them, the test in which a positive potential (positive bias) is applied to the gate relative to the source potential and the drain potential and maintained at a high temperature is called a PBTS (Positive Bias Temperature Stress) test, and the test in which a negative potential (negative bias) is applied to the gate and maintained at a high temperature is called an NBTS (Negative Bias Temperature Stress) test. In addition, the PBTS test and the NBTS test performed under the state of irradiation with light are respectively called the PBTIS (Positive Bias Temperature Illumination Stress) test and the NBTIS (Negative Bias Temperature Illumination Stress) test.

[0237] In an n-channel transistor, a positive potential is applied to the gate when the transistor is turned on (a state where current flows), so the variation in threshold voltage in the PBTS test is one of the important factors to be focused on as a reliability index of the transistor.

[0238] By using a metal oxide that does not contain gallium or has a low gallium content in the semiconductor layer 108, a transistor with high reliability for forward bias application can be realized. In other words, a transistor with a small change in threshold voltage in a PBTS test can be realized. In addition, when a metal oxide containing gallium is used, it is preferable to make the gallium content lower than the indium content. Thus, a transistor with high reliability can be realized.

[0239] One of the reasons for the change in threshold voltage in the PBTS test is that carriers are trapped due to defect states at or near the interface between the semiconductor layer and the gate insulating layer. Since the greater the defect state density, the more carriers are trapped due to defect states, the more significant the degradation in the PBTS test. The generation of this defect state can be suppressed by reducing the gallium content in the region of the semiconductor layer that contacts the gate insulating layer.

[0240] As a reason why the change in threshold voltage in the PBTS test can be suppressed by using a metal oxide that does not contain gallium or has a low gallium content as a semiconductor layer, for example, the following can be considered. For example, this may be because gallium contained in the metal oxide is more likely to absorb oxygen than other metal elements (such as indium or zinc). Therefore, it can be inferred that carrier (here, electron) trap sites are easily generated by bonding gallium with excess oxygen in the gate insulating layer at the interface between the metal oxide containing more gallium and the gate insulating layer. Therefore, when a positive potential is applied to the gate, carriers are captured at the interface between the semiconductor layer and the gate insulating layer, and the threshold voltage will fluctuate.

[0241] More specifically, when In-Ga-Zn oxide is used as the semiconductor layer 108, a metal oxide in which the atomic ratio of indium is higher than the atomic ratio of gallium can be used for the semiconductor layer 108. It is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of gallium. In other words, it is preferable to use a metal oxide in which the atomic ratio of the metal elements satisfies In>Ga and Zn>Ga for the semiconductor layer 108.

[0242] The semiconductor layer 108 preferably uses a metal oxide in which the ratio of the number of atoms of gallium to the number of atoms of the metal element contained is higher than 0 atomic % and is less than 50 atomic %, preferably greater than 0.1 atomic % and less than 40 atomic %, more preferably greater than 0.1 atomic % and less than 35 atomic %, more preferably greater than 0.1 atomic % and less than 30 atomic %, more preferably greater than 0.1 atomic % and less than 25 atomic %, more preferably greater than 0.1 atomic % and less than 20 atomic %, more preferably greater than 0.1 atomic % and less than 15 atomic %, more preferably greater than 0.1 atomic % and less than 10 atomic %. By reducing the gallium content in the semiconductor layer, a transistor with high resistance to the PBTS test can be realized. In addition, by making the metal oxide contain gallium, a metal oxide in which oxygen vacancies (V) are less likely to be generated can be obtained. O ) and other effects.

[0243] As the semiconductor layer 108, a metal oxide that does not contain gallium can also be used. For example, In-Zn oxide can be used for the semiconductor layer 108. At this time, when the atomic number ratio of indium contained in the metal oxide relative to the atomic number of the metal element is increased, the field effect mobility of the transistor can be improved. On the other hand, when the atomic number ratio of zinc contained in the metal oxide relative to the atomic number of the metal element is increased, the metal oxide has high crystallinity, so the variation of the electrical characteristics of the transistor is suppressed, and the reliability can be improved. In addition, as the semiconductor layer 108, a metal oxide such as indium oxide that does not contain gallium and zinc can also be used. By using a metal oxide that does not contain gallium, the variation of the threshold voltage in the PBTS test can be made extremely small.

[0244] For example, an oxide containing indium and zinc can be used as the semiconductor layer 108. In this case, for example, a metal oxide in which the atomic ratio of the metal elements is In:Zn=2:3 or in the vicinity thereof can be used.

[0245] Note that although gallium is used as an example for the description, the present invention can also be applied to a case where element M is used instead of gallium. A metal oxide in which the atomic ratio of indium is higher than the atomic ratio of element M is preferably used as the semiconductor layer 108. In addition, a metal oxide film in which the atomic ratio of zinc is higher than the atomic ratio of element M is preferably used.

[0246] A transistor having high reliability under forward bias application can be realized by using a metal oxide having a low content of the element M as the semiconductor layer 108. By using this transistor as a transistor that needs to have high reliability under forward bias application, a semiconductor device having high reliability can be realized.

[0247] Next, the reliability of the transistor with respect to light will be described.

[0248] When light is incident on a transistor, the electrical characteristics of the transistor may change. In particular, a transistor used in an area where light is incident preferably has electrical characteristics that change little when irradiated with light and has high reliability against light. Reliability against light can be evaluated, for example, by the amount of change in threshold voltage in an NBTIS test.

[0249] By increasing the content of the element M in the metal oxide, a transistor with high reliability to light can be realized. That is, a transistor with a small change in threshold voltage in the NBTIS test can be realized. Specifically, the band gap of the metal oxide in which the atomic number ratio of the element M is greater than the atomic number ratio of indium becomes larger, so the change in threshold voltage in the NBTIS test of the transistor can be reduced. The band gap of the metal oxide contained in the semiconductor layer 108 is preferably greater than 2.0 eV, more preferably greater than 2.5 eV, more preferably greater than 3.0 eV, more preferably greater than 3.2 eV, more preferably greater than 3.3 eV, more preferably greater than 3.4 eV, and more preferably greater than 3.5 eV.

[0250] For example, the semiconductor layer 108 may use a metal oxide having an atomic ratio of metal elements of In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4 or thereabouts.

[0251] The semiconductor layer 108 can particularly appropriately use the following metal oxide: the ratio of the number of atoms of element M relative to the number of atoms of the metal element contained is greater than 20 atomic % and less than 70 atomic %, preferably greater than 30 atomic % and less than 70 atomic %, more preferably greater than 30 atomic % and less than 60 atomic %, more preferably greater than 40 atomic % and less than 60 atomic %, and more preferably greater than 50 atomic % and less than 60 atomic %.

[0252] When In-Ga-Zn oxide is used as the semiconductor layer 108, a metal oxide in which the atomic ratio of indium to the atomic number of the metal element is less than the atomic ratio of gallium can be used. For example, a metal oxide in which the atomic ratio of the metal element is In:Ga:Zn=1:1:1, In:Ga:Zn=1:1:1.2, In:Ga:Zn=1:3:2, In:Ga:Zn=1:3:3, In:Ga:Zn=1:3:4 or a metal oxide in the vicinity thereof can be used.

[0253] The semiconductor layer 108 can particularly appropriately use the following metal oxide: the ratio of the number of atoms of gallium to the number of atoms of the metal element contained is greater than 20 atomic % and less than 60 atomic %, preferably greater than 30 atomic % and less than 60 atomic %, more preferably greater than 40 atomic % and less than 60 atomic %, and further preferably greater than 50 atomic % and less than 60 atomic %.

[0254] A transistor having high reliability with respect to light can be realized by using a metal oxide having a high content of the element M for the semiconductor layer 108. By using this transistor as a transistor that needs to have high reliability with respect to light, a semiconductor device having high reliability can be realized.

[0255] As described above, the electrical characteristics and reliability of the transistor differ depending on the composition of the metal oxide used for the semiconductor layer 108. Therefore, by varying the composition of the metal oxide according to the electrical characteristics and reliability required for the transistor, a semiconductor device having both excellent electrical characteristics and high reliability can be achieved.

[0256] The semiconductor layer 108 may also have a stacked structure including two or more metal oxide layers. The compositions of the two or more metal oxide layers included in the semiconductor layer 108 may also be the same or substantially the same as each other. When a stacked structure of metal oxide layers of equal composition is adopted, for example, the same sputtering target can be used to form them, thereby reducing the manufacturing cost.

[0257] The compositions of the two or more metal oxide layers included in the semiconductor layer 108 may also be different from each other. For example, a stacked structure of a first metal oxide layer having a composition of In:M:Zn=1:3:4 [atomic ratio] or a composition close thereto and a second metal oxide layer having a composition of In:M:Zn=1:1:1 [atomic ratio] or a composition close thereto provided on the first metal oxide layer may be appropriately used. In addition, gallium or aluminum is particularly preferably used as the element M. For example, a stacked structure of any one selected from indium oxide, indium gallium oxide, and IGZO and any one selected from IAZO, IAGZO, and ITZO (registered trademark) may be used.

[0258] <Structure Example 2>

[0259] Figure 4A Shown with Figures 1A to 2 The transistor 100 shown is a different structural example of a transistor 100A. Figure 4A It is along Figure 1A A cross-sectional view taken along the dashed line A1-A2 of the plan view shown.

[0260] Figure 4A The transistor 100A shown is Figure 1B The main difference of the transistor 100 shown is that the lower end of the insulating layer 110s is in contact with the top surface of the conductive layer 112a.

[0261] In the opening 143 of the transistor 100A, the side surfaces of the insulating layer 110a, the side surfaces of the insulating layer 116, the side surfaces of the insulating layer 110b, the side surfaces of the insulating layer 110c, and the side surfaces of the conductive layer 112b are aligned or substantially aligned. That is, unlike the transistor 100, the insulating layer 110a of the transistor 100A does not have a protruding portion in the opening 143. In addition, the insulating layer 110s is provided in contact with the top surface of the conductive layer 112a, the side surfaces of the insulating layer 110a, the side surfaces of the insulating layer 116, the side surfaces of the insulating layer 110b, the side surfaces of the insulating layer 110c, and the side surfaces of the conductive layer 112b in the opening 143.

[0262] Since the transistor 100A has the above structure, oxygen contained in the insulating layer 110s may diffuse into the conductive layer 112a. However, when a material that is not easily oxidized as described above is used as the conductive layer 112a, it is not necessary to leave a part of the insulating layer 110a between the insulating layer 110s and the conductive layer 112a. By adopting the structure of the transistor 100A, the degree of freedom in manufacturing is increased compared to the transistor 100, and thus, the transistor can be easily manufactured.

[0263] Regarding the transistor 100A, except for the above, reference can be made to the contents described in the transistor 100 .

[0264] <Structural Example 3>

[0265] Figure 4B Shown with Figures 1A to 2 The transistor 100 shown is a different structural example of a transistor 100B. Figure 4B It is along Figure 1A A cross-sectional view taken along the dashed line A1-A2 of the plan view shown.

[0266] Figure 4B The transistor 100B shown is Figure 1B The transistor 100 shown is mainly different in that the insulating layer 110s has a stacked structure of an insulating layer 110s1 and an insulating layer 110s2 on the insulating layer 110s1. In addition, in the transistor 100B, the insulating layer 116 is not provided on the side of the opening 143 of the conductive layer 114. In addition, the insulating layer 110s1 is provided in a manner of contacting the top surface of the conductive layer 112a, the side surface of the insulating layer 110a, the side surface of the conductive layer 114, the side surface of the insulating layer 116, the side surface of the insulating layer 110b, the side surface of the insulating layer 110c, and the side surface of the conductive layer 112b. The insulating layer 110s2 is provided opposite to the top surface of the conductive layer 112a, the side surface of the insulating layer 110a, the side surface of the conductive layer 114, the side surface of the insulating layer 116, the side surface of the insulating layer 110b, the side surface of the insulating layer 110c, and the side surface of the conductive layer 112b via the insulating layer 110s1.

[0267] As the insulating layer 110s1, for example, the material and manufacturing method used for the insulating layer 110a and the insulating layer 110c can be used. Also, as the insulating layer 110s2, for example, the material and manufacturing method used for the insulating layer 110b can be used.

[0268] When the insulating layer 110s2 having the function of supplying oxygen is in contact with the conductive layer 114, there is a concern that the conductive layer 114 is oxidized, the amount of oxygen contained in the insulating layer 110s2 is reduced, and the amount of oxygen supplied from the insulating layer 110s2 to the semiconductor layer 108 is reduced. Since the insulating layer 110s has a stacked structure of the insulating layer 110s1 and the insulating layer 110s2, the insulating layer 110s2 and the conductive layer 114 are not in contact. Thus, oxidation of the conductive layer 114 due to oxygen contained in the insulating layer 110s2 can be suppressed. In addition, reduction in the amount of oxygen supplied from the insulating layer 110s2 to the semiconductor layer 108 can be suppressed.

[0269] Furthermore, by providing the insulating layer 110s1, the step of providing the insulating layer 116 on the side of the opening 143 of the conductive layer 114 can be reduced. Furthermore, the insulating layer 110s2 may not be in contact with the conductive layer 112b except for the conductive layer 112a, thereby preventing the oxygen contained in the insulating layer 110s2 from diffusing to the conductive layer 112b except for the conductive layer 112a. Therefore, a conductive material that is easily nitrided and has a low resistance can be used for both the conductive layer 112a and the conductive layer 112b, thereby expanding the range of material selection.

[0270] Regarding the transistor 100B, except for the above, reference can be made to the contents described in the transistor 100 .

[0271] <Structure Example 4>

[0272] Figure 5A Shown with Figures 1A to 2 The transistor 100 shown is a different example of a structure of a transistor 100C. Figure 5A It is along Figure 1A A cross-sectional view taken along the dashed line A1-A2 of the plan view shown.

[0273] Figure 5A The transistor 100C shown is Figure 1B The transistor 100 shown is mainly different in that the conductive layer 112 b is not included and the end of the semiconductor layer 108 extends to the outside of the conductive layer 114 and the conductive layer 112 a when viewed from a plane.

[0274] In the transistor 100C, the semiconductor layer 108 has a region in contact with the top surface of the conductive layer 112a, the side surface of the insulating layer 110s, and the top surface of the insulating layer 110c. In the transistor 100C, the semiconductor layer 108 can have the function of a semiconductor layer having a channel formation region and the function of the other of the source electrode and the drain electrode. For example, in the opening 143 in the semiconductor layer 108, the region opposite to the insulating layer 110s can be used as a channel formation region. In addition, the region located outside the channel formation region (the region in contact with the top surface of the insulating layer 110c) can be used as the other of the source electrode and the drain electrode.

[0275] By making a region of a part of the semiconductor layer 108 low in resistance, the region can be used as a source region and a drain region of a transistor. For example, by supplying impurities such as boron used as a dopant to the semiconductor layer 108 in a direction perpendicular to the substrate surface using ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment, the semiconductor layer 108 can be made low in resistance. Alternatively, when an oxide semiconductor is used as the semiconductor layer 108, a silicon nitride film or the like is formed on a region of the semiconductor layer 108 that does not overlap with the opening 143, thereby converting the region into an oxide conductor (OC), and a low-resistance region can be formed in the semiconductor layer 108. Therefore, the region corresponding to the source region and the drain region of the semiconductor layer 108 can be made lower in resistance than the channel formation region. Therefore, a channel formation region and a source region and a drain region whose resistance is lower than that of the channel formation region can be manufactured in the semiconductor layer 108. Therefore, in the transistor 100C, a region corresponding to a source electrode and a drain electrode can be formed in the conductor layer 108 without providing the conductive layer 112b. Therefore, in the transistor 100C, since the conductive layer 112b is not provided, the number of steps for manufacturing the transistor can be reduced.

[0276] Regarding the transistor 100C, except for the above, reference can be made to the contents described in the transistor 100 .

[0277] <Structural Example 5>

[0278] Figure 5B Shown with Figures 1A to 2 The transistor 100 shown is a different example of a structure of a transistor 100D. Figure 5B It is along Figure 1A A cross-sectional view taken along the dashed line A1-A2 of the plan view shown.

[0279] Figure 5B The transistor 100D shown is Figure 5A The transistor 100C shown mainly differs in that an insulating layer 110 d including a single-layer structure replaces the insulating layers corresponding to the insulating layers 110 b and 110 c in the transistor 100 .

[0280] In the transistor 100D, as the insulating layer 110d, a material that can be used for the insulating layer 110a and the insulating layer 110c is preferably used. For example, as the insulating layer 110d, silicon nitride or silicon nitride oxide is preferably used. That is, it is preferable to use a material that has a high barrier property to oxygen and hydrogen. Therefore, it is possible to suppress the diffusion of oxygen from the outside of the insulating layer 110a and the insulating layer 110d and the oxidation of the conductive layer 114. In addition, it is possible to suppress the diffusion of oxygen in the semiconductor layer 108 to the side of the insulating layer 110a and the insulating layer 110d and the formation of oxygen vacancies (V O ). In addition, by providing the insulating layer 110d, the number of steps for forming the insulating layer 116 at the interface of the insulating layer 110d in contact with the conductive layer 114 can be reduced. In addition, the insulating layer 110d has a single-layer structure, whereby the number of steps for forming the insulating layer 110 can be reduced compared with the transistor 100 and the like.

[0281] Regarding the transistor 100D, except for the above, reference can be made to the contents described in the transistor 100C.

[0282] <Structural Example 6>

[0283] Fig. 6A Shown with Figures 1A to 2 The transistor 100 shown is a different example of a structure of a transistor 100E. Fig. 6A It is along Figure 1A A cross-sectional view taken along the dashed line A1-A2 of the plan view shown.

[0284] Fig. 6A The transistor 100E shown is Figure 1B The main difference of the transistor 100 shown is that the conductive layer 112a has a stacked structure.

[0285] In the transistor 100E, the conductive layer 112a has a stacked structure of a conductive layer 112a_1 and a conductive layer 112a_2 on the conductive layer 112a_1. The conductive layer 112a_1 is provided in a manner embedded in an opening of an insulating layer 115 formed on the substrate 102, and the top surface of the conductive layer 112a_1 and the top surface of the insulating layer 115 are flattened. The conductive layer 112a_2 is located on the conductive layer 112a_1 and the insulating layer 115. In the transistor 100E, the height of the top surface of the insulating layer 115 is the same or substantially the same as the height of the top surface of the conductive layer 112a_1.

[0286] In the transistor 100E, the height of the top surface of the insulating layer 115 is consistent or substantially consistent with the height of the top surface of the conductive layer 112a_1, so that the steps of the formed surfaces of the insulating layer 110 and the conductive layer 112b can be reduced. Therefore, the steps that can be formed on the top surface of the conductive layer 112b and the steps that can be formed on the top surface of the insulating layer 110 can be reduced. Thus, in the formation process of the insulating layer 110s (for example, the etching back process), it is possible to suppress the insulating layer from remaining on the top surface of the conductive layer 112b and the top surface of the insulating layer 110, and the insulating layer can be selectively formed only on the side surface of the insulating layer 116 in the opening 143, the side surface of the insulating layer 110b, the side surface of the insulating layer 110c, and the side surface of the conductive layer 112b.

[0287] Note that a process in which a planarizing film is formed on a surface of a film having irregularities and the film having irregularities is subjected to highly anisotropic etching (for example, dry etching) together with the planarizing film to reduce the irregularities of the film is sometimes referred to as an “etch-back process”.

[0288] Note that the transistor 100E shows an example in which the end of the conductive layer 112a_2 is located outside the end of the conductive layer 112a_1, but the end of the conductive layer 112a_2 may be located inside the end of the conductive layer 112a_1. In addition, when a plug is provided to connect the conductive layer 112a to the conductive layer above it, the conductive layer 112a_2 is extended to the outside of the conductive layer 112a_1, and the top surface of the conductive layer 112a_2 may be in contact with the plug in the extended region. The plug is provided in a manner embedded in an opening in the insulating layer 110, the insulating layer 195, or the like.

[0289] As described above, the conductive layer 112a and the conductive layer 112b in contact with the semiconductor layer 108 preferably use a material that is not easily oxidized. However, when a material that is not easily oxidized is used, the resistance of the conductive layer 112a and the conductive layer 112b may become high. Since the conductive layer 112a and the conductive layer 112b are used as wiring, the resistance is preferably low. Therefore, by using a material that is not easily oxidized for the conductive layer 112a_2 including the area in contact with the semiconductor layer 108 and using a low-resistance material for the conductive layer 112a_1 in the area not in contact with the semiconductor layer 108, the resistance of the conductive layer 112a as a whole can be reduced.

[0290] As described above, especially when the channel length is small, the oxygen vacancies (V O ) and V O When the conductive layer 112a_2 is made of a material that is not easily oxidized, oxygen vacancies (V O ) and V OH increases. Therefore, a transistor with a small channel length having good electrical characteristics and high reliability can be realized.

[0291] The conductive layer 112a_2 preferably uses one or more of an oxide conductor and a nitride conductor as appropriate. The conductive layer 112a_1 preferably uses a material whose resistance is lower than that of the conductive layer 112a_2. For example, the conductive layer 112a_1 can appropriately use one or more of copper, aluminum, titanium, tungsten, and molybdenum, or an alloy containing one or more of the above metals as components. Specifically, the conductive layer 112a_2 can appropriately use In-Sn-Si oxide (ITSO), and the conductive layer 112a_1 can appropriately use tungsten.

[0292] In addition, an inorganic insulating material or an organic insulating material can be used for the insulating layer 115. The insulating layer 115 may have a stacked structure of an inorganic insulating material and an organic insulating material. For example, the materials and structures mentioned in the description of the insulating layer 110a, the insulating layer 110c, and the insulating layer 195 can be appropriately used as the insulating layer 115.

[0293] Regarding the transistor 100E, except for the above, reference can be made to the contents described in the transistor 100 .

[0294] <Structural Example 7>

[0295] Figure 6B Shown with Figures 1A to 2 The transistor 100 shown is a different example of the structure of a transistor 100F. Figure 6B It is along Figure 1A A cross-sectional view taken along the dashed line A1-A2 of the plan view shown.

[0296] Figure 6B The transistor 100F shown with Figure 1B The main difference between the transistor 100 shown is the structure of the conductive layer 104 and the insulating layer 195.

[0297] In the transistor 100F, the conductive layer 104 is provided so as to be embedded in the recessed portions formed on the semiconductor layer 108 and the insulating layer 106 reflecting the shape of the opening 143, and the insulating layer 195 is provided so as to be embedded in the conductive layer 104. In addition, in the transistor 100F, the top surface of the conductive layer 104 and the top surface of the insulating layer 195 are flattened, and their heights are uniform or substantially uniform.

[0298] Since the transistor 100F has the above structure, coverage of films provided over the conductive layer 104 and the insulating layer 195 can be improved.

[0299] Regarding the transistor 100F, except for the above, reference can be made to the contents described in the transistor 100 .

[0300] <Production Method Example>

[0301] Next, a method for manufacturing a transistor according to one embodiment of the present invention will be described with reference to the accompanying drawings. Figure 1B The transistor 100 shown in FIG. 1 is taken as an example for description.

[0302] Note that a thin film (insulating film, semiconductor film, conductive film, etc.) constituting a semiconductor device can be formed by sputtering, chemical vapor deposition (CVD), vacuum evaporation, pulsed laser deposition (PLD), atomic layer deposition (ALD), or the like.

[0303] As the sputtering method, there can be cited an RF sputtering method using a high frequency power supply as a sputtering power supply, a DC sputtering method using a direct current power supply, and a pulsed DC sputtering method in which the voltage applied to the electrode is changed in a pulsed manner. The RF sputtering method is mainly used when depositing an insulating film, and the DC sputtering method is mainly used when depositing a metal conductive film. In addition, the pulsed DC sputtering method is mainly used when depositing compounds such as oxides, nitrides, or carbides using a reactive sputtering method.

[0304] The CVD method can be divided into a plasma CVD (PECVD) method using plasma, a thermal CVD (TCVD: Thermal CVD) method using heat, and a photo CVD (Photo CVD) method using light, etc. Furthermore, it can be divided into a metal CVD (MCVD: Metal CVD) method and an organic metal CVD (MOCVD: Metal Organic CVD) method according to the source gas used.

[0305] By utilizing the plasma CVD method, a high-quality film can be obtained at a lower temperature. In addition, since plasma is not used, the thermal CVD method is a deposition method that can reduce plasma damage to the object being processed. For example, the wiring, electrodes, components (transistors, capacitors, etc.) included in the semiconductor device sometimes generate charge accumulation due to receiving charges from plasma. At this time, the wiring, electrodes or components included in the semiconductor device are sometimes damaged due to the accumulated charge. On the other hand, since the above-mentioned plasma damage does not occur in the case of the thermal CVD method without using plasma, the yield of the semiconductor device can be improved. In addition, in the thermal CVD method, plasma damage is not generated during formation, so a film with fewer defects can be obtained.

[0306] As the ALD method, the following methods can be used: a thermal ALD method in which a precursor and a reactant react using only thermal energy; a PEALD method using a reactant excited by plasma; and the like.

[0307] The CVD method and the ALD method are different from the sputtering method in which particles released from a target material or the like are deposited. Therefore, the CVD method and the ALD method are deposition methods that are not easily affected by the shape of the object to be processed and have good step coverage. In particular, the ALD method has good step coverage and thickness uniformity, so the ALD method is suitable for forming a film covering the surface of an opening with a high aspect ratio, etc. However, the deposition rate of the ALD method is relatively slow, so it is sometimes preferred to be used in combination with other deposition methods such as the CVD method with a fast deposition rate.

[0308] In addition, when the CVD method is used, a film of any composition can be deposited according to the flow ratio of the source gas. For example, when the CVD method is used, a film whose composition continuously changes can be deposited by changing the flow ratio of the source gas while performing deposition. When depositing while changing the flow ratio of the source gas, since the time required for conveying and adjusting the pressure is not required, the deposition time can be shortened compared to the case where deposition is performed using multiple deposition chambers. Therefore, the productivity of the semiconductor device can sometimes be improved.

[0309] When the ALD method is used, a film of any composition can be deposited by introducing different precursors at the same time. Alternatively, when introducing different precursors, a film of any composition can be deposited by controlling the number of cycles of each precursor.

[0310] Thin films (insulating films, semiconductor films, conductive films, etc.) that constitute semiconductor devices can be formed by methods such as spin coating, dipping, spraying, inkjet, dispenser, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, and doctor blade coating.

[0311] In addition, when processing a thin film constituting a semiconductor device, it can be processed by photolithography, etc. In addition to the above methods, the thin film can also be processed by nanoimprinting, sandblasting, lift-off, etc. In addition, an island-shaped thin film can be directly formed by a deposition method using a shielding mask such as a metal mask.

[0312] There are two typical methods of photolithography. One is to form a resist mask on a thin film to be processed, process the thin film by etching, etc., and remove the resist mask. The other is to form a photosensitive thin film, then expose and develop it, and process the thin film into a desired shape.

[0313] In the photolithography method, as the light used for exposure, for example, i-line (wavelength 365nm), g-line (wavelength 436nm), h-line (wavelength 405nm) or a mixture of these lights can be used. In addition, ultraviolet rays, KrF lasers or ArF lasers can also be used. In addition, liquid immersion exposure technology can also be used for exposure. In addition, as the light used for exposure, extreme ultraviolet (EUV: Extreme Ultra-Violet) light or X-rays can also be used. In addition, instead of the light used for exposure, an electron beam can also be used. When extreme ultraviolet light, X-rays or electron beams are used, extremely fine processing can be performed, so it is preferred. Note that when exposure is performed by scanning with a light beam such as an electron beam, a photomask is not required.

[0314] As a method for etching the thin film, for example, dry etching, wet etching, or sand blasting can be used.

[0315] As a planarization process of the thin film, a polishing process such as a CMP process can be appropriately used. In addition, a reflow process can be appropriately used, in which the conductive layer is heated to fluidize it. In addition, a reflow process and a CMP process can be combined. In addition, a dry etching process or a plasma process can also be used. In addition, polishing process, dry etching process, and plasma process can be performed multiple times, and they can also be performed in combination. In addition, when they are performed in combination, there is no particular restriction on the order of the processes, and they can be appropriately set according to the concave-convex state of the surface to be processed.

[0316] In order to process the film with high precision to obtain the desired film thickness, for example, a CMP method is used. In this case, polishing is first performed at a certain processing speed until a portion of the top surface of the film is exposed. Then, polishing is performed under conditions slower than the processing speed until the film reaches the desired thickness, thereby making it possible to process the film with high precision.

[0317] As methods for detecting the end point of polishing, there are optical methods of irradiating light on the surface of the processed surface to detect changes in its reflected light, physical methods of detecting changes in the polishing resistance of the processing device from the processed surface, and methods of irradiating magnetic lines of force on the processed surface to detect changes in magnetic lines of force caused by the generated eddy currents.

[0318] After the top surface of the film is exposed, the thickness of the film can be controlled with high precision by performing a polishing process at a slow processing speed while monitoring the thickness of the film using an optical method such as a laser interferometer. In addition, the film can be polished multiple times as needed until the film reaches a desired thickness.

[0319] 7A to 10CThe figures are diagrams for explaining a method for manufacturing the transistor 100. Figure 1A A cross-sectional view taken along the dashed line A1-A2 of the plan view shown.

[0320] First, a conductive film to be the conductive layer 112a is formed over the substrate 102, and a portion of the conductive film is removed to form the conductive layer 112a ( Fig. 7A ). When forming the conductive film, for example, a sputtering method can be used. In addition, when processing the conductive film, one or both of a wet etching method and a dry etching method can be used.

[0321] Next, insulating films 110a-f are formed on the conductive layer 112a and the substrate 102.

[0322] The insulating films 110 a - f can appropriately use the material that can be used for the above-mentioned insulating layer 110 a.

[0323] As the insulating films 110a-f, for example, silicon nitride, silicon nitride oxide, aluminum oxide, hafnium oxide, or the like can be used appropriately.

[0324] Specifically, as the insulating films 110a-f, for example, silicon nitride may be deposited by sputtering, or for example, silicon nitride may be deposited by PEALD, or for example, aluminum oxide may be deposited by sputtering.

[0325] Alternatively, for example, a structure in which aluminum oxide and silicon nitride are stacked may be used. For example, aluminum oxide deposited by sputtering and silicon nitride deposited by PEALD may be stacked and used.

[0326] Next, a conductive film 114_f is formed on the insulating film 110a_f ( Figure 7B ).

[0327] The insulating film 114_f can appropriately use a material that can be used for the above-described conductive layer 114. Note that a material that is easily oxidized is preferably used because the surface of the conductive film 114_f is oxidized in a later step to form an insulating layer to be the insulating layer 116. For example, aluminum can be appropriately used as the conductive layer 114.

[0328] When the conductive film 114_f is formed, for example, a sputtering method can be used.

[0329] Next, the conductive film 114_f is processed to form a conductive layer 114_e ( Figure 7C ). The conductive layer 114_e is formed so as to have a region overlapping with the conductive layer 112a.

[0330] Next, the conductive layer 114_e is subjected to plasma treatment in an atmosphere containing oxygen to oxidize the surface of the conductive layer 114_e, thereby forming an insulating layer 116_e ( Fig.7D ). For example, when aluminum is used as the material of the conductive layer 114_e, the surface of the conductive layer 114_e is oxidized by the plasma treatment, so that aluminum nitride is formed on the top surface and side surfaces of the conductive layer 114_e, which becomes the insulating layer 116_e.

[0331] Next, an insulating film 110b_f is formed on the insulating film 110a_f and the insulating layer 116_e, and an insulating film 110c_f is formed on the insulating film 110b_f.

[0332] The insulating film 110b_f can appropriately use the material that can be used for the above-mentioned insulating layer 110b.

[0333] As the insulating film 110b_f, for example, silicon oxide, silicon oxynitride, or the like can be used appropriately.

[0334] Specifically, as the insulating film 110b-f, silicon oxide may be deposited by sputtering, for example. Alternatively, silicon oxide may be deposited by PECVD, for example. Alternatively, silicon oxynitride may be deposited by PECVD, for example.

[0335] Alternatively, for example, silicon oxide deposited by sputtering and silicon oxide or silicon oxynitride deposited by PECVD may be stacked and used.

[0336] Alternatively, heat treatment may be performed after the insulating film 110b_f is formed. By performing the heat treatment, water and hydrogen can be removed from the surface and the film of the insulating film 110b_f.

[0337] The temperature of the heat treatment is preferably 150°C or higher and lower than the strain point of the substrate, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, more preferably 300°C or higher and 400°C or lower, and more preferably 350°C or higher and 400°C or lower. The heat treatment can be performed in an atmosphere containing one or more of a noble gas, nitrogen, and oxygen. As a nitrogen-containing atmosphere or an oxygen-containing atmosphere, dry air (CDA: Clean Dry Air) can also be used. Note that the content of hydrogen or oxygen in the atmosphere is preferably as small as possible. As the atmosphere, a high-purity gas with a dew point of -60°C or lower, preferably -100°C or lower is preferably used. By using an atmosphere with as little content of hydrogen, water, etc. as possible, it is possible to prevent hydrogen, water, etc. from being absorbed by the insulating film 110b_f as much as possible. For example, an oven or a rapid thermal annealing (RTA: Rapid Thermal Annealing) device can be used for the heat treatment. By using an RTA device, the heat treatment time can be shortened.

[0338] After the above-mentioned heat treatment, a process of supplying oxygen to the insulating film 110b_f may also be performed. For example, after the insulating film 110b_f is formed, oxygen may be supplied to the insulating film 110b_f by forming a metal oxide layer on the insulating film 110b_f. In addition, heat treatment may also be performed after the metal oxide layer is formed. By performing heat treatment after the metal oxide layer is formed, oxygen can be efficiently supplied from the metal oxide layer to the insulating film 110b_f, and oxygen can be contained in the insulating film 110b_f. In the subsequent process, the oxygen supplied to the insulating film 110b_f is supplied to the semiconductor layer 108, and the oxygen vacancies (V O ) and V O H.

[0339] After forming the metal oxide layer or after the above-mentioned heat treatment, oxygen may also be supplied to the insulating film 110b-f through the metal oxide layer. As a method for supplying oxygen, for example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment may be used. As the plasma treatment, a device that converts oxygen gas into plasma with high-frequency power may be appropriately used. As a device that converts gas into plasma with high-frequency power, for example, a plasma etching device and a plasma ashing device may be cited.

[0340] The metal oxide layer may be an insulating layer or a conductive layer. For example, aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or indium tin oxide containing silicon (ITSO) may be used as the metal oxide layer.

[0341] As the metal oxide layer, an oxide material containing one or more elements that are the same as those of the semiconductor layer 108 is preferably used. In particular, an oxide semiconductor material that can be used for the semiconductor layer 108 is preferably used. This allows the metal oxide layer to be formed using the same sputtering target as that of the semiconductor layer 108, thereby reducing manufacturing costs.

[0342] When a metal oxide material containing indium and gallium is used for the metal oxide layer, the metal oxide layer may use a material having a higher gallium composition (content) than the semiconductor layer 108. Since the use of a material having a high gallium composition (content) as the metal oxide layer can improve the barrier property against oxygen, it is preferable because oxygen in the insulating films 110b-f can be prevented from escaping to the outside.

[0343] The metal oxide layer is preferably formed in an oxygen-containing atmosphere, for example. In particular, it is preferably formed by sputtering in an oxygen-containing atmosphere. Thus, oxygen can be appropriately supplied to the insulating film 110b-f when the metal oxide layer is formed.

[0344] Next, the metal oxide layer is removed. The metal oxide layer can be removed by, for example, a wet etching method as appropriate.

[0345] The oxygen supply treatment to the insulating film 110b_f is not limited to the above method. For example, oxygen radicals, oxygen atoms, oxygen atomic ions, oxygen molecular ions, etc. are supplied to the insulating film 110b_f by ion doping, ion implantation, plasma treatment, etc. In addition, after a film for inhibiting oxygen detachment is formed on the insulating film 110b_f, oxygen is supplied to the insulating film 110b_f through the film. It is preferred to remove the film after supplying oxygen. As the above-mentioned film for inhibiting oxygen detachment, a conductive film or semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt or tungsten can be used.

[0346] The insulating film 110c_f can appropriately use the material that can be used for the above-mentioned insulating layer 110c.

[0347] Regarding the materials and deposition methods that can be used for the insulating films 110 c_f, reference can be made to the descriptions of the materials and deposition methods that can be used for the insulating films 110 a_f described above.

[0348] Next, a conductive film 112b_f is formed on the insulating film 110c_f. The insulating film 112b_f can use any material that can be used for the conductive layer 112b as described above.

[0349] When forming the conductive film 112b_f, for example, a sputtering method can be used.

[0350] Next, a resist mask 191 is formed on the conductive film 112b-f by photolithography. Fig. 8A ).

[0351] Next, a portion of the conductive film 112b_f is removed using the resist mask 191 as a mask to form a conductive layer 112b_e. After the conductive layer 112b_e is formed, the resist mask 191 is removed ( Figure 8B ).

[0352] Next, a portion of each of the conductive layer 112b_e, the insulating film 110c_f, the insulating film 110b_f, the insulating layer 116_e, the conductive layer 114_e, and the insulating film 110a_f is removed to form the opening 141. For example, dry etching can be used as appropriate for this process. Through this process, the conductive layer 112b, the insulating layer 110c, the insulating layer 110b, the insulating layer 116, and the conductive layer 114 having the opening and the insulating layer 110a_e having the recess ( Figure 8C). Alternatively, it can be said that the opening 141 is composed of an opening formed in each of the conductive layer 112b, the insulating layer 110c, the insulating layer 110b, the insulating layer 116, and the conductive layer 114, and a recessed portion of the insulating layer 110a-e formed in a region overlapping with the opening.

[0353] Notice, Figure 8C The example of forming the insulating layer 110a-e having the recess by removing a portion of the top surface of the insulating film 110a-f by forming the opening 141 is shown, but the present invention is not limited thereto. When forming the opening 141, a process in which a portion of the top surface of the insulating film 110a-f is not removed may also be adopted. In this case, it can also be said that the opening 141 is composed of openings formed in each of the conductive layer 112b, the insulating layer 110c, the insulating layer 110b, the insulating layer 116, and the conductive layer 114.

[0354] Next, the side surfaces of the conductive layer 114 exposed in the opening 141 are subjected to plasma treatment in an atmosphere containing oxygen to oxidize the side surfaces, thereby forming an insulating layer 116 ( Fig. 9A ). For example, when aluminum is used as the material of the conductive layer 114 , the exposed side surface of the conductive layer 114 is oxidized by the plasma treatment, so that aluminum nitride is formed on the side surface, which becomes the insulating layer 116 .

[0355] Next, insulating films 110s-f are formed in contact with the top surface of the conductive layer 112b, the side surfaces of the conductive layer 112b in each opening 141, the side surfaces of the insulating layer 110c, the side surfaces of the insulating layer 110b, the side surfaces of the insulating layer 116, and the side surfaces and top surfaces of the insulating layers 110a-e. Fig. 9B ).

[0356] The insulating film 110s_f can appropriately use the material that can be used for the above-mentioned insulating layer 110s.

[0357] By depositing the insulating film 110s_f using the CVD method, the ALD method, etc., the insulating film 110s_f can appropriately cover the side of the conductive layer 112b in each opening 141, the side of the insulating layer 110c, the side of the insulating layer 110b, the side of the insulating layer 116 and the side of the insulating layer 110a_e, so it is preferred.

[0358] Next, etching is used to remove a portion of the insulating film 110s_f. Specifically, the region where the insulating film 110s_f contacts the top surface of the conductive layer 112b and the region where the insulating film 110a_e contacts the top surface of the insulating layer 110a_e in the opening 141 are removed. At this time, the insulating layer 110a_e overlapping a portion of the top surface of the insulating film 110s_f in the opening 141 is also removed. Thus, while the opening 143 reaching the conductive layer 112a is formed, the insulating layer 110a having a protruding portion in the opening 143 and the insulating layer 110s in contact with the side surfaces of the conductive layer 112b in each opening 143, the side surfaces of the insulating layer 110c, the side surfaces of the insulating layer 110b, the side surfaces of the insulating layer 116, and the top surface of the protruding portion of the insulating layer 110a are formed. Fig. 9C ). It can be said that the opening 143 is composed of the opening 141 and an opening of the insulating layer 110 a formed by this process (the opening diameter of which is smaller than that of the opening 141).

[0359] The insulating film 110s_f can be etched using, for example, anisotropic etching. More specifically, the insulating layer 110s can be formed by performing highly anisotropic etching, for example, in dry etching.

[0360] The insulating layer 110s has a shape in which the upper end is bent. Under different conditions of anisotropy, such as FIG. 3A to FIG. 3D As shown, the height of the upper end portion of the insulating layer 110s may be adjusted.

[0361] Note that Fig.9D As shown, the sidewall insulating layer 110w may be formed on the side surface of the conductive layer 112b located outside the opening 143 depending on the manufacturing conditions of the insulating layer 110s. Fig.9D is corresponding to Fig. 9C 163 is a diagram of a region 163 surrounded by a dotted line in FIG. In addition, such a side wall insulating layer 110w may be formed not only on the side surface of the conductive layer 112b but also on the portion having projections and depressions on the formed surface of the insulating film 110s_f.

[0362] Next, a semiconductor film to be the semiconductor layer 108 is formed in contact with the top surface of the conductive layer 112a in the opening 143, the side surface of the insulating layer 110s in the opening 143, the bent portion of the insulating layer 110s, and the top surface of the conductive layer 112b. Then, a portion of the semiconductor film is removed by etching to form the semiconductor layer 108 ( Fig. 10A ). The semiconductor layer 108 is provided so as to have a region overlapping with the opening 143. In addition, the semiconductor layer 108 is provided so as to have a region in contact with the conductive layer 112b at its end.

[0363] As the semiconductor film to be the semiconductor layer 108 , any material that can be used for the semiconductor layer 108 described above can be used as appropriate.

[0364] When forming a semiconductor film to be the semiconductor layer 108, for example, a sputtering method can be used. For example, when a metal oxide is used as the semiconductor layer 108, a sputtering method using a metal oxide target can be used. Sputtering is preferred because a film with a low hydrogen content can be formed relatively easily.

[0365] When a metal oxide is used as the semiconductor layer 108 , the semiconductor layer 108 can be formed by an ALD method using a precursor containing a constituent metal element and an oxidizing agent.

[0366] For example, when forming In-Ga-Zn oxide, three precursors including a precursor containing indium, a precursor containing gallium, and a precursor containing zinc may be used. Alternatively, two precursors including a precursor containing indium and a precursor containing gallium and zinc may be used.

[0367] As a precursor containing indium, triethylindium, tri(2,2,6,6-tetramethyl-3,5-heptanedione)indium, cyclopentadienylindium, indium(III) chloride, or the like can be used.

[0368] In addition, as a precursor containing gallium, trimethylgallium, triethylgallium, gallium trichloride, tris(dimethylamide)gallium(III), gallium(III)acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedione)gallium, dimethylchlorogallium, diethylchlorogallium, etc. can be used.

[0369] In addition, as a precursor containing zinc, dimethyl zinc, diethyl zinc, bis(2,2,6,6-tetramethyl-3,5-heptanedione) zinc, zinc chloride, or the like can be used.

[0370] As the oxidizing agent, for example, ozone, oxygen, water, etc. can be used.

[0371] As a method for controlling the composition of the obtained film, the flow ratio of the source gas, the flow time of the source gas, the flow order of the source gas, etc. can be exemplified. In addition, by adjusting these, a film whose composition changes continuously can be deposited. In addition, films with different compositions can also be deposited continuously.

[0372] The semiconductor film to be the semiconductor layer 108 is preferably formed by the ALD method because the semiconductor layer 108 can be formed with a uniform thickness on the side surface of the insulating layer 110s.

[0373] Heat treatment may be performed after deposition of the semiconductor film to be the semiconductor layer 108. By heat treatment, water and hydrogen in the semiconductor film can be reduced, and oxygen can be supplied from the insulating layer 110, the insulating layer 110s, and the like to the semiconductor film. Note that heat treatment may be performed after processing the semiconductor film.

[0374] The substrate temperature during formation of the semiconductor layer 108 is preferably room temperature (25° C.) or higher and 200° C. or lower, more preferably room temperature or higher and 130° C. or lower. By setting the substrate temperature within the above range, when a large-area glass substrate is used, warping or distortion of the substrate can be suppressed.

[0375] The higher the substrate temperature (stage temperature) during the formation of the metal oxide layer, the more crystalline the metal oxide layer can be formed. Also, the higher the oxygen flow rate ratio, the more crystalline the metal oxide layer can be formed.

[0376] Next, the insulating layer 106 is formed so as to cover the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110c. Fig. 10B ). The insulating layer 106 has a region in contact with the top surface and side surfaces of the semiconductor layer 108, the top surface of the conductive layer 112b, and the top surface of the insulating layer 110c.

[0377] The insulating layer 106 can use the above-mentioned materials as appropriate.

[0378] The insulating layer 106 can be formed, for example, by the ALD method. By using the ALD method, the insulating layer 106 is formed with high coverage of the semiconductor layer 108 formed to cover the opening 143, so it is preferable. Note that in the case where the semiconductor layer 108 can be fully covered, a method other than the ALD method can be used when forming the insulating layer 106. For example, the PECVD method, the sputtering method, etc. can be used. As a result, the deposition rate of the insulating layer 106 is increased compared to the use of the ALD method, thereby improving productivity.

[0379] Next, a conductive film to be the conductive layer 104 is formed on the insulating layer 106. As the conductive film, a material that can be used for the conductive layer 104 can be used as appropriate. In addition, when forming the conductive film, a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like can be used as appropriate. Here, the conductive film is preferably formed in contact with the insulating layer 106 facing the side surface of the insulating layer 110s in the opening 143. Therefore, when forming the conductive film, it is preferable to use a formation method with good coverage or embedding properties, and it is more preferable to use a CVD method, an ALD method, or the like.

[0380] Next, the conductive film to be the conductive layer 104 is processed to form the conductive layer 104 ( Fig. 10C ). When viewed from a plane, the conductive layer 104 is formed in a manner having a region overlapping with the semiconductor layer 108 and the insulating layer 110s. The conductive layer 104 can be formed by photolithography. The above processing can be performed by dry etching or wet etching. Processing by dry etching is suitable for micro-processing.

[0381] Next, an insulating layer 195 is formed so as to cover the conductive layer 104 and the insulating layer 106 ( Figure 1B ).

[0382] The insulating layer 195 can be formed using the same material and method as the insulating layer 110 a and the insulating layer 110 c , for example.

[0383] Through the above steps, a semiconductor device including the transistor 100 can be manufactured.

[0384] This embodiment mode can be appropriately combined with other embodiment modes. In addition, in this specification, when a plurality of structural examples are shown in a general formula in one embodiment, the structural examples can be appropriately combined.

[0385] Implementation Method 2

[0386] In this embodiment, refer to Figures 11 to 16 A display device according to one embodiment of the present invention will be described.

[0387] The display device of this embodiment mode may be a high-resolution display device or a large display device. Therefore, for example, the display device of this embodiment mode may be used as a display portion of the following devices: electronic devices with a large screen such as television devices, desktop or notebook personal computers, displays for computers, etc., digital signage, large-scale game machines such as pinball machines, etc.; digital cameras; digital video cameras; digital photo frames; mobile phones; portable game machines; portable information terminals; and sound reproduction devices.

[0388] In addition, the display device of this embodiment can be a high-definition display device. Therefore, for example, the display device of this embodiment can be used as a display unit of a watch-type and bracelet-type information terminal device (wearable device), a head-mounted display (HMD: Head Mounted Display) and other VR devices and glasses-type AR devices that can be worn on the head.

[0389] A semiconductor device of one embodiment of the present invention can be used in a display device or a module including the display device. Examples of the module including the display device include a module in which the display device is equipped with a connector such as a flexible printed circuit board (FPC) or TCP (Tape Carrier Package), a module in which an integrated circuit (IC) is installed by a COG (Chip On Glass) method or a COF (Chip On Film) method, etc.

[0390] [Display device 50A]

[0391] Fig.11 It is a perspective view of the display device 50A.

[0392] The display device 50A has a structure in which a substrate 152 and a substrate 151 are bonded together. Fig.11 In FIG. 1 , the substrate 152 is indicated by a dotted line.

[0393] The display device 50A includes a display portion 168 , a connection portion 140 , a circuit portion 164 , wiring 165 , and the like. Fig.11 The example in which the display device 50A is mounted with the IC 173 and the FPC 172 is shown. Fig.11 The structure shown is called a display module including the display device 50A, IC and FPC.

[0394] The connection portion 140 is disposed outside the display portion 168. The connection portion 140 may be disposed along one side or multiple sides of the display portion 168. The number of the connection portion 140 may also be one or more. Fig.11 The example in which the connection part 140 is provided so as to surround the four sides of the display part is shown. In the connection part 140, the common electrode of the display element is connected to the conductive layer, and a potential can be supplied to the common electrode.

[0395] The circuit unit 164 includes, for example, a scanning line driving circuit (also referred to as a gate driver). Alternatively, the circuit unit 164 may include both a scanning line driving circuit and a signal line driving circuit (also referred to as a source driver).

[0396] The wiring 165 has a function of supplying signals and power to the display portion 168 and the circuit portion 164. The signals and power are input to the wiring 165 from the outside through the FPC 172 or are input to the wiring 165 from the IC 173.

[0397] Fig.11 An example of providing IC 173 on substrate 151 by COG method or COF method is shown. As IC 173, for example, an IC including one or both of a scanning line driving circuit and a signal line driving circuit can be used. Note that the display device 50A and the display module do not necessarily have to be provided with an IC. Alternatively, the IC can be mounted on an FPC by COF method or the like.

[0398] The transistor of one embodiment of the present invention can be used for, for example, one or both of the display portion 168 and the circuit portion 164 of the display device 50A.

[0399] For example, when a transistor of one embodiment of the present invention is used in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced and a high-definition display device can be realized. In addition, for example, when a transistor of one embodiment of the present invention is used in a drive circuit of a display device (for example, one or both of a gate line drive circuit and a source line drive circuit), the area occupied by the drive circuit can be reduced and a display device with a narrow frame can be realized. In addition, a transistor of one embodiment of the present invention has good electrical characteristics, and by using the transistor in a display device, the reliability of the display device can be improved.

[0400] The display unit 168 is an image display region in the display device 50A, and includes a plurality of pixels 210 arranged periodically. Fig.11 An enlarged view of one pixel 210 is shown in FIG.

[0401] There is no particular limitation on the arrangement of pixels in the display device of this embodiment, and various methods can be used. Examples of pixel arrangements include stripe arrangement, S-stripe arrangement, matrix arrangement, Delta arrangement, Bayer arrangement, and Pentile arrangement.

[0402] Fig.11 The pixel 210 shown includes a sub-pixel 11R that exhibits red light, a sub-pixel 11G that exhibits green light, and a sub-pixel 11B that exhibits blue light.

[0403] The sub-pixel 11R, the sub-pixel 11G, and the sub-pixel 11B each include a display element and a circuit for controlling driving of the display element.

[0404] Various elements can be used as display elements, for example, liquid crystal elements and light-emitting elements. In addition, MEMS (Micro Electro Mechanical Systems) elements of shutter mode or light interference mode, display elements using microcapsule mode, electrophoresis mode, electrowetting mode or electronic powder fluid (registered trademark) mode, etc. can also be used. In addition, QLED (Quantum-dot LED) using light source and color conversion technology using quantum dot materials can also be used.

[0405] Examples of display devices using a liquid crystal element include a transmissive liquid crystal display device, a reflective liquid crystal display device, and a semi-transmissive liquid crystal display device.

[0406] As the light emitting element, for example, there can be mentioned self-luminous light emitting elements such as LED, OLED (Organic LED), semiconductor laser, etc. As the LED, for example, a small LED, a micro LED, etc. can be used.

[0407] Examples of the light-emitting substance contained in the light-emitting element include substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (TADF materials), and inorganic compounds (quantum dot materials, etc.).

[0408] The light emitting element may emit light of infrared, red, green, blue, cyan, magenta, yellow or white, etc. In addition, when the light emitting element has a microcavity structure, the color purity can be further improved.

[0409] Of a pair of electrodes included in the light emitting element, one electrode is used as an anode and the other electrode is used as a cathode.

[0410] In this embodiment, description is mainly given by taking the case where a light-emitting element is used as a display element as an example.

[0411] A display device according to one embodiment of the present invention may also adopt any of the following structures: a top emission type that emits light in a direction opposite to a substrate on which a light-emitting element is formed, a bottom emission type that emits light to one side of a substrate on which a light-emitting element is formed, or a dual emission type that emits light to both sides.

[0412] Fig.12 An example of a cross section of a portion of the region including the FPC 172 , a portion of the circuit portion 164 , a portion of the display portion 168 , a portion of the connection portion 140 , and a portion of the region including the end portion of the display device 50A is shown.

[0413] Fig.12 The display device 50A shown includes a transistor 205D, a transistor 205R, a transistor 205G, a transistor 205B, a light-emitting element 130R, a light-emitting element 130G, a light-emitting element 130B, etc. between a substrate 151 and a substrate 152. The light-emitting element 130R is a display element included in a sub-pixel 11R that emits red light, the light-emitting element 130G is a display element included in a sub-pixel 11G that emits green light, and the light-emitting element 130B is a display element included in a sub-pixel 11B that emits blue light.

[0414] The display device 50A adopts an SBS structure. In the SBS structure, the material and structure of each light emitting element can be optimized separately, the degree of freedom in selecting materials and structures is increased, and it becomes easy to improve brightness and reliability.

[0415] The display device 50A adopts a top emission type. In the top emission type, transistors and the like can be arranged so as to overlap with the light emitting region of the light emitting element, so that the aperture ratio of the pixel can be further increased compared with the bottom emission type.

[0416] The transistor 205D, the transistor 205R, the transistor 205G, and the transistor 205B are all formed over the substrate 151. These transistors can be manufactured using the same material and the same process.

[0417] In this embodiment, an example of using an OS transistor as a transistor 205D, a transistor 205R, a transistor 205G, and a transistor 205B is shown. As the transistor 205D, the transistor 205R, the transistor 205G, and the transistor 205B, a transistor of one embodiment of the present invention can be used. That is, in the display device 50A, both the display unit 168 and the circuit unit 164 include a transistor of one embodiment of the present invention. By using a transistor of one embodiment of the present invention in the display unit 168, the pixel size can be reduced and high definition can be achieved. In addition, by using a transistor of one embodiment of the present invention in the circuit unit 164, the occupied area of ​​the circuit unit 164 can be reduced and a narrow frame can be achieved. For the transistor of one embodiment of the present invention, reference can be made to the description of the above embodiment.

[0418] Specifically, transistor 205D, transistor 205R, transistor 205G and transistor 205B all include a conductive layer 104 serving as one of a first gate electrode and a second gate electrode, a conductive layer 114 serving as the other of the first gate electrode and the second gate electrode, an insulating layer 106 serving as a gate insulating layer, an insulating layer 110s serving as a gate insulating layer, a conductive layer 112a serving as one of a source electrode and a drain electrode, a conductive layer 112b serving as the other of the source electrode and the drain electrode, and a semiconductor layer 108 comprising a metal oxide.

[0419] Note that the transistor included in the display device of this embodiment is not limited to the transistor of one embodiment of the present invention. For example, the transistor of one embodiment of the present invention and a transistor of another structure may be combined.

[0420] The display device of this embodiment may include, for example, any one or more of a planar transistor, a staggered transistor, and an inversely staggered transistor. The transistor included in the display device of this embodiment has any one of a top-gate structure and a bottom-gate structure. Alternatively, gate electrodes may be provided above and below the semiconductor layer forming the channel.

[0421] Alternatively, the display device of this embodiment may include a transistor using silicon for a channel formation region (Si transistor).

[0422] Examples of silicon include single crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor including LTPS in a semiconductor layer (hereinafter also referred to as LTPS transistor) can be used. LTPS transistors have high field effect mobility and good frequency characteristics.

[0423] When the luminous brightness of the light-emitting element included in the pixel circuit is increased, the amount of current flowing through the light-emitting element needs to be increased. To this end, it is necessary to increase the source-drain voltage of the driving transistor included in the pixel circuit. Because the source-drain withstand voltage of the OS transistor is higher than that of the Si transistor, a high voltage can be applied to the source-drain of the OS transistor. Thus, by using the OS transistor as the driving transistor included in the pixel circuit, the amount of current flowing through the light-emitting element can be increased to improve the luminous brightness of the light-emitting element.

[0424] In addition, when the transistor operates in the saturation region, the OS transistor can make the change in the source-drain current for the change in the gate-source voltage smaller than the Si transistor. Therefore, by using the OS transistor as the driving transistor included in the pixel circuit, the current flowing through the source-drain can be determined in detail according to the change in the gate-source voltage, so the amount of current flowing through the light-emitting element can be controlled. As a result, the number of grayscales of the pixel circuit can be increased.

[0425] In addition, regarding the saturation characteristics of the current flowing when the transistor operates in the saturation region, compared with the Si transistor, the OS transistor can make a stable current (saturation current) flow even if the source-drain voltage is gradually increased. Therefore, by using the OS transistor as a driving transistor, even if, for example, the current-voltage characteristics of the light-emitting element are uneven, a stable current can flow through the light-emitting element. That is, when the OS transistor operates in the saturation region, even if the source-drain voltage is changed, the source-drain current remains almost unchanged, so the light-emitting brightness of the light-emitting element can be stabilized.

[0426] The transistor included in the circuit portion 164 and the transistor included in the display portion 168 may have the same structure or different structures. The plurality of transistors included in the circuit portion 164 may have the same structure or two or more different structures. Similarly, the plurality of transistors included in the display portion 168 may have the same structure or two or more different structures.

[0427] All transistors included in the display portion 168 may be OS transistors, all transistors included in the display portion 168 may be Si transistors, some transistors included in the display portion 168 may be OS transistors and the remaining transistors may be Si transistors.

[0428] For example, by using both LTPS transistors and OS transistors in the display portion 168, a display device with low power consumption and high driving capability can be realized. In addition, a structure combining LTPS transistors and OS transistors is sometimes referred to as LTPO. As a more preferred example, a structure in which an OS transistor is used as a transistor used as a switch for controlling conduction / non-conduction between wirings and an LTPS transistor is used as a transistor for controlling current can be cited.

[0429] For example, one of the transistors included in the display unit 168 is used as a transistor for controlling the current flowing through the light-emitting element and may also be referred to as a driving transistor. One of the source and drain of the driving transistor is connected to the pixel electrode of the light-emitting element. An LTPS transistor is preferably used as the driving transistor. Thus, the current flowing through the light-emitting element in the pixel circuit can be increased.

[0430] On the other hand, one of the other transistors included in the display unit 168 is used as a switch for controlling the selection and non-selection of pixels, and may also be referred to as a selection transistor. The gate of the selection transistor is connected to the gate line, and one of the source and the drain is connected to the source line (signal line). An OS transistor is preferably used as the selection transistor. Therefore, even if the frame rate is significantly reduced (for example, below 1fps), the grayscale of the pixel can be maintained, thereby reducing power consumption by stopping the driver when displaying a static image.

[0431] An insulating layer 195 is provided to cover the transistor 205D, the transistor 205R, the transistor 205G, and the transistor 205B, and an insulating layer 235 is provided over the insulating layer 195 .

[0432] The insulating layer 195 is preferably used as a protective layer of the transistor. The insulating layer 195 is preferably made of a material that does not easily diffuse impurities such as water and hydrogen. Thus, the insulating layer 195 can be used as a barrier layer. By adopting this structure, it is possible to effectively suppress the diffusion of impurities from the outside into the transistor, thereby improving the reliability of the display device.

[0433] The insulating layer 195 preferably includes one or more inorganic insulating films. Examples of the inorganic insulating film include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Specific examples of the inorganic insulating film are as described above.

[0434] The insulating layer 235 is preferably used as a planarization layer, and an organic insulating film is suitable. As materials that can be used for the organic insulating film, for example, acrylic resins, polyimide resins, epoxy resins, polyamide resins, polyimide amide resins, siloxane resins, benzocyclobutene resins, phenolic resins, and precursors of these resins can be cited. In addition, the insulating layer 235 can also adopt a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 is preferably used as an etching protection layer. Thus, when processing the pixel electrode 111R, the pixel electrode 111G, the pixel electrode 111B, etc., it is possible to suppress the formation of a recess in the insulating layer 235. Alternatively, a recess can be provided in the insulating layer 235 when processing the pixel electrode 111R, the pixel electrode 111G, the pixel electrode 111B, etc.

[0435] The light emitting element 130R, the light emitting element 130G, and the light emitting element 130B are provided on the insulating layer 235 .

[0436] The light emitting element 130R includes a pixel electrode 111R on the insulating layer 235 , an EL layer 113R on the pixel electrode 111R, and a common electrode 135 on the EL layer 113R. Fig.12 The light emitting element 130R shown emits red light (R). The EL layer 113R includes a light emitting layer that emits red light.

[0437] The light emitting element 130G includes a pixel electrode 111G on the insulating layer 235 , an EL layer 113G on the pixel electrode 111G, and a common electrode 135 on the EL layer 113G. Fig.12 The light emitting element 130G shown emits green light (G). The EL layer 113G includes a light emitting layer that emits green light.

[0438] The light emitting element 130B includes a pixel electrode 111B on the insulating layer 235 , an EL layer 113B on the pixel electrode 111B, and a common electrode 135 on the EL layer 113B. Fig.12 The light emitting element 130B shown emits blue light (B). The EL layer 113B includes a light emitting layer that emits blue light.

[0439] Note that Fig.12 EL layer 113R, EL layer 113G, and EL layer 113B are shown as having the same thickness, but the present invention is not limited thereto. The thicknesses of EL layer 113R, EL layer 113G, and EL layer 113B may be different. For example, it is preferable to set the thicknesses corresponding to the optical path length of the light emitted by EL layer 113R, EL layer 113G, and EL layer 113B. Thus, a microcavity structure can be realized to improve the color purity of the light emitted from each light-emitting element.

[0440] The pixel electrode 111R is connected to the conductive layer 112b included in the transistor 205R through an opening provided in the insulating layer 106, the insulating layer 195, and the insulating layer 235. Similarly, the pixel electrode 111G is connected to the conductive layer 112b included in the transistor 205G, and the pixel electrode 111B is connected to the conductive layer 112b included in the transistor 205B.

[0441] Each end of the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B is covered by an insulating layer 237. The insulating layer 237 is used as a partition wall (also called a bank, a dam, or a spacer). The insulating layer 237 can be set to a single-layer structure or a stacked-layer structure using one or both of an inorganic insulating material and an organic insulating material. For example, the insulating layer 237 can use a material that can be used for the insulating layer 195 and a material that can be used for the insulating layer 235. The insulating layer 237 can insulate the pixel electrode from the common electrode. In addition, the insulating layer 237 can insulate the light-emitting elements adjacent to each other.

[0442] The common electrode 135 is a continuous film shared by the light-emitting elements 130R, 130G, and 130B. The common electrode 135 shared by the plurality of light-emitting elements is connected to the conductive layer 123 provided in the connection portion 140. The conductive layer 123 is preferably formed using the same material as the pixel electrodes 111R, 111G, and 111B and by the same process as the pixel electrodes 111R, 111G, and 111B.

[0443] In the display device of one embodiment of the present invention, a conductive film that transmits visible light is used as the electrode on the light extraction side of the pixel electrode and the common electrode. In addition, a conductive film that reflects visible light is preferably used as the electrode on the side that does not extract light.

[0444] Alternatively, the electrode on the side where light is not extracted may be a conductive film that transmits visible light. In this case, it is preferred to configure the electrode between the reflective layer and the EL layer. In other words, the light emitted by the EL layer may also be reflected by the reflective layer and extracted from the display device.

[0445] As the material for forming a pair of electrodes of the light-emitting element, metals, alloys, conductive compounds, mixtures thereof, etc. can be appropriately used. As the material, specifically, metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium and neodymium and alloys appropriately combined therewith can be cited. In addition, as the material, indium tin oxide (also referred to as In-Sn oxide, ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), In-W-Zn oxide, etc. can be cited. In addition, as the material, aluminum alloys (aluminum alloys) such as alloys of aluminum, nickel and lanthanum (Al-Ni-La), silver and magnesium alloys and silver, palladium and copper alloys (also referred to as Ag-Pd-Cu, APC) and other silver-containing alloys can be cited. In addition, examples of the material include elements belonging to Group 1 or Group 2 of the periodic table that are not listed above (e.g., lithium, cesium, calcium, and strontium), rare earth metals such as europium and ytterbium, alloys of appropriately combined elements, and graphene.

[0446] The light-emitting element preferably adopts a microcavity resonator (microcavity) structure. Therefore, one of a pair of electrodes included in the light-emitting element preferably includes an electrode having visible light transmittance and reflectivity (semi-transmissive-semi-reflective electrode), and the other preferably includes an electrode having visible light reflectivity (reflective electrode). When the light-emitting element has a microcavity structure, the light emitted from the light-emitting layer can be resonated between the two electrodes, and the light emitted from the light-emitting element can be enhanced.

[0447] The light transmittance of the transparent electrode is 40% or more. For example, an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more is preferably used as a transparent electrode of a light-emitting element. The visible light reflectance of the semi-transmissive-semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less. In addition, the resistivity of these electrodes is preferably 1×10 -2 Ωcm or less.

[0448] The EL layer 113R, the EL layer 113G, and the EL layer 113B are all arranged in an island shape. Fig.12 In the embodiment, the ends of the adjacent EL layers 113R overlap with the ends of the EL layers 113G, the ends of the adjacent EL layers 113G overlap with the ends of the EL layers 113B, and the ends of the adjacent EL layers 113R overlap with the ends of the EL layers 113B. Fig.12As shown in FIG. 1 , when an island-shaped EL layer is deposited using a high-definition metal mask, the ends of adjacent EL layers may overlap each other, but the present invention is not limited to this. That is, adjacent EL layers may not overlap each other but may be separated. In addition, in a display device, there may be both overlapping portions of adjacent EL layers and separated portions of adjacent EL layers not overlapping each other.

[0449] Each of the EL layer 113R, the EL layer 113G, and the EL layer 113B includes at least a light-emitting layer. The light-emitting layer includes one or more light-emitting substances. As the light-emitting substance, a substance that emits a light-emitting color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used. In addition, as the light-emitting substance, a substance that emits near-infrared light can also be used.

[0450] Examples of the light-emitting substance include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0451] The light-emitting layer may contain one or more organic compounds (host material, auxiliary material, etc.) in addition to the light-emitting substance (guest material). As one or more organic compounds, one or both of a substance with high hole transport properties (hole transport material) and a substance with high electron transport properties (electron transport material) may be used. In addition, as one or more organic compounds, a bipolar substance (a substance with high electron transport properties and hole transport properties) or a TADF material may also be used.

[0452] For example, the light-emitting layer preferably includes a combination of a phosphorescent material, a hole transport material that easily forms an exciplex, and an electron transport material. By adopting such a structure, light emission by ExTET (Exciplex-Triplet Energy Transfer) utilizing energy transfer from the exciplex to the luminescent substance (phosphorescent material) can be efficiently obtained. In addition, by selecting a combination of light whose wavelength overlaps with the absorption band on the lowest energy side of the luminescent substance as the exciplex, energy transfer can be smoothed, thereby efficiently obtaining light emission. By adopting the above structure, high efficiency, low voltage drive, and long life of the light-emitting element can be achieved at the same time.

[0453] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole injection properties (hole injection layer), a layer containing a hole transport material (hole transport layer), a layer containing a substance with high electron blocking properties (electron blocking layer), a layer containing a substance with high electron injection properties (electron injection layer), a layer containing an electron transport material (electron transport layer), and a layer containing a substance with high hole blocking properties (hole blocking layer). In addition, the EL layer may also include one or both of a bipolar material and a TADF material.

[0454] The light emitting element may use a low molecular weight compound or a high molecular weight compound, and may further contain an inorganic compound. The layers constituting the light emitting element may be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, or coating.

[0455] The light-emitting element can adopt a single structure (a structure with only one light-emitting unit) or a series structure (a structure including multiple light-emitting units). The light-emitting unit includes at least one light-emitting layer. The series structure has a structure in which multiple light-emitting units are connected in series through a charge generation layer. The charge generation layer has the function of injecting electrons into one of the two light-emitting units and injecting holes into the other when a voltage is applied between a pair of electrodes. By adopting a series structure, a light-emitting element that can emit light with high brightness can be realized. In addition, the series structure can improve reliability because it can reduce the current required to obtain the same brightness compared to the single structure. In addition, the series structure can also be called a stacked structure.

[0456] exist Fig.12 When a tandem-structured light-emitting element is used, it is preferred that the EL layer 113R include a plurality of light-emitting units emitting red light, the EL layer 113G include a plurality of light-emitting units emitting green light, and the EL layer 113B include a plurality of light-emitting units emitting blue light.

[0457] A protective layer 131 is provided on the light emitting element 130R, the light emitting element 130G, and the light emitting element 130B. The protective layer 131 and the substrate 152 are bonded by an adhesive layer 149. The substrate 152 is provided with a light shielding layer 117. As a seal for the light emitting element, for example, a solid sealing structure or a hollow sealing structure can be used. Fig.12 In the embodiment, the space between substrate 152 and substrate 151 is filled with adhesive layer 149, that is, a solid sealing structure is adopted. Alternatively, a hollow sealing structure in which an inert gas (nitrogen or argon, etc.) is used to fill the space can also be adopted. In this case, adhesive layer 149 can also be set in a manner that does not overlap with the light-emitting element. In addition, a resin different from the adhesive layer 149 set in a frame shape can also be used to fill the space.

[0458] The protective layer 131 is provided at least in the display portion 168, and is preferably provided in a manner covering the entire display portion 168. The protective layer 131 is preferably provided in a manner covering the connection portion 140 and the circuit portion 164 in addition to the display portion 168. In addition, the protective layer 131 is preferably provided in a manner extending to the end of the display device 50A. On the other hand, in order to connect the FPC 172 to the conductive layer 167, there is a portion in the connection portion 204 where the protective layer 131 is not provided.

[0459] By providing the protective layer 131 on the light emitting element 130R, the light emitting element 130G, and the light emitting element 130B, the reliability of the light emitting elements can be improved.

[0460] The protective layer 131 may have a single layer structure or a stacked layer structure of two or more layers. There is no limitation on the conductivity of the protective layer 131. As the protective layer 131, at least one of an insulating film, a semiconductor film, and a conductive film may be used.

[0461] When the protective layer 131 includes an inorganic film, degradation of the light-emitting element can be suppressed, such as preventing oxidation of the common electrode 135 and suppressing impurities (e.g., water, oxygen, etc.) that cause degradation from entering the light-emitting element, thereby improving the reliability of the display device.

[0462] As the protective layer 131, for example, an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film can be used. Specific examples of the above-mentioned inorganic insulating film are as described above. In particular, the protective layer 131 preferably includes a nitride insulating film or a nitride oxide insulating film, and more preferably includes a nitride insulating film.

[0463] Alternatively, an inorganic film including ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or IGZO may be used as the protective layer 131. The inorganic film preferably has a high resistance, and more specifically, the inorganic film preferably has a resistance higher than that of the common electrode 135. The inorganic film may further include nitrogen.

[0464] When light emitted from the light emitting element is extracted through the protective layer 131, the protective layer 131 preferably has high visible light transmittance. For example, ITO, IGZO, and alumina are inorganic materials with high visible light transmittance and are therefore preferred.

[0465] As the protective layer 131, for example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used. By using this stacked structure, impurities (for example, water, oxygen, etc.) that may cause degradation of the light-emitting element can be suppressed from entering the EL layer side.

[0466] Furthermore, the protective layer 131 may include an organic film. For example, the protective layer 131 may include both an organic film and an inorganic film. Examples of the organic film that can be used for the protective layer 131 include an organic insulating film that can be used for the insulating layer 235 .

[0467] A connection portion 204 is provided in a region where the substrate 151 and the substrate 152 do not overlap. In the connection portion 204, the wiring 165 is connected to the FPC 172 through the conductive layer 166, the conductive layer 167, and the connection layer 242. An example is shown in which the wiring 165 adopts a conductive layer of a single-layer structure obtained by processing the same conductive film as the conductive layer 112a. An example is shown in which the conductive layer 166 adopts a conductive layer of a single-layer structure obtained by processing the same conductive film as the conductive layer 112b. An example is shown in which the conductive layer 167 adopts a conductive layer of a single-layer structure obtained by processing the same conductive film as the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B. The conductive layer 167 is exposed on the top surface of the connection portion 204. Therefore, the connection portion 204 can be connected to the FPC 172 through the connection layer 242.

[0468] The display device 50A adopts a top emission type. Light emitted by the light emitting element is emitted to the side of the substrate 152. The substrate 152 is preferably made of a material with high visible light transmittance. The pixel electrodes 111R, 111G, and 111B include a material that reflects visible light, and the counter electrode (common electrode 135) includes a material that transmits visible light.

[0469] A light shielding layer 117 is preferably provided on a surface of the substrate 152 on the substrate 151 side. The light shielding layer 117 can be provided between adjacent light emitting elements, in the connection portion 140, the circuit portion 164, and the like.

[0470] Alternatively, a coloring layer such as a color filter may be provided on the surface of the substrate 152 on the substrate 151 side or on the protective layer 131. When the color filter is provided so as to overlap with the light-emitting element, the color purity of light emitted from the pixel can be improved.

[0471] In addition, various optical components can be arranged on the outside of the substrate 152 (the surface on the opposite side of the substrate 151). As optical components, for example, polarizers, phase difference plates, light diffusion layers (diffusion films, etc.), anti-reflection layers, and light-focusing films (condensing films) can be cited. In addition, surface protective layers such as antistatic films that inhibit the adhesion of dust, water-repellent films that are not easily soiled, hard coatings that inhibit damage during use, and impact-absorbing layers can also be arranged on the outside of the substrate 152. For example, by providing a glass layer or a silicon dioxide layer (SiO x Layer), which can prevent the surface from being dirty or damaged, is preferred. In addition, DLC (diamond-like carbon), aluminum oxide (AlO x ), polyester materials or polycarbonate materials, etc. In addition, as the surface protection layer, it is preferred to use a material with high visible light transmittance. In addition, the surface protection layer is preferably made of a material with high hardness.

[0472] Glass, quartz, ceramic, sapphire, resin, metal, alloy, semiconductor, etc. can be used for the substrate 151 and the substrate 152, respectively. A material that transmits the light is used for the substrate on the side that extracts the light from the light-emitting element. By using a flexible material for the substrate 151 and the substrate 152, the flexibility of the display device can be improved, thereby realizing a flexible display. A polarizing plate can also be used as at least one of the substrate 151 and the substrate 152.

[0473] As the substrate 151 and the substrate 152, the following materials can be used respectively: polyester resins such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, polymethyl methacrylate resins, polycarbonate (PC) resins, polyether sulfone (PES) resins, polyamide resins (nylon, aramid, etc.), polysiloxane resins, cycloolefin resins, polystyrene resins, polyamide-imide resins, polyurethane resins, polyvinyl chloride resins, polyvinylidene chloride resins, polypropylene resins, polytetrafluoroethylene (PTFE) resins, ABS resins, and cellulose nanofibers, etc. In addition, glass having a thickness that allows flexibility can be used as at least one of the substrates 151 and 152.

[0474] When the circular polarizer is overlapped on the display device, it is preferred to use a substrate with high optical isotropy as the substrate included in the display device. The substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small). As films with high optical isotropy, triacetyl cellulose (TAC, also called triacetyl cellulose) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, acrylic resin film, etc. can be cited.

[0475] As the adhesive layer 149, various curing adhesives such as light curing adhesives such as ultraviolet curing adhesives, reaction curing adhesives, heat curing adhesives, anaerobic adhesives, etc. can be used. As these adhesives, epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene-vinyl acetate) resins, etc. can be cited. In particular, it is preferred to use materials with low moisture permeability such as epoxy resins. In addition, two-liquid mixed resins can also be used. In addition, adhesive sheets, etc. can also be used.

[0476] As the connection layer 242 , an anisotropic conductive film (ACF: Anisotropic Conductive Film), anisotropic conductive paste (ACP: Anisotropic Conductive Paste), or the like can be used.

[0477] [Display device 50B]

[0478] Fig.13 The main difference between the display device 50B shown and the display device 50A is that in the former, a light-emitting element including an EL layer 113 shared by the light-emitting elements and a coloring layer (color filter, etc.) are used in the sub-pixels of each color. Note that in the description of the display device described later, the description of the same parts as the display device described previously is sometimes omitted.

[0479] Fig.13 The display device 50B shown includes a transistor 205D, a transistor 205R, a transistor 205G, a transistor 205B, a light-emitting element 130R, a light-emitting element 130G, a light-emitting element 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, and a coloring layer 132B that transmits blue light, etc. between a substrate 151 and a substrate 152.

[0480] The light emitting element 130R includes a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 135 on the EL layer 113. Light emitted by the light emitting element 130R is extracted as red light to the outside of the display device 50B through the coloring layer 132R.

[0481] The light emitting element 130G includes a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 135 on the EL layer 113. Light emitted by the light emitting element 130G is extracted as green light to the outside of the display device 50B through the coloring layer 132G.

[0482] The light emitting element 130B includes a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 135 on the EL layer 113. Light emitted by the light emitting element 130B is extracted as blue light to the outside of the display device 50B through the coloring layer 132B.

[0483] The light emitting elements 130R, 130G, and 130B share the EL layer 113 and the common electrode 135. Compared with a structure in which each sub-pixel of each color is provided with a different EL layer, a structure in which each sub-pixel of each color shares the EL layer 113 can reduce the number of manufacturing steps.

[0484] For example, Fig.13 The light emitting elements 130R, 130G, and 130B shown all emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B all pass through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0485] The white light-emitting element preferably includes two or more light-emitting layers. In the case of using two light-emitting layers to obtain white light, the light-emitting layers can be selected in such a way that the light-emitting colors of the two light-emitting layers are in a complementary color relationship. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer in a complementary color relationship, a structure in which the light-emitting element as a whole emits white light can be obtained. In addition, in the case of using three or more light-emitting layers to obtain white light, the light-emitting colors of the three or more light-emitting layers are combined to obtain a structure in which the light-emitting element as a whole emits white light.

[0486] The EL layer 113 preferably includes, for example, a light-emitting layer containing a light-emitting substance that emits blue light and a light-emitting layer containing a light-emitting substance that emits visible light having a longer wavelength than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0487] The light-emitting element emitting white light preferably adopts a series structure. Specifically, it can adopt: a two-stage series structure including a light-emitting unit emitting yellow light and a light-emitting unit emitting blue light; a two-stage series structure including a light-emitting unit emitting red light and green light and a light-emitting unit emitting blue light; a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light, and a light-emitting unit emitting blue light in sequence; or a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light and red light, and a light-emitting unit emitting blue light in sequence, etc. For example, as the number of layers and color sequence of the light-emitting unit, there can be cited a two-stage structure in which B and Y are stacked from the anode side, a two-stage structure in which B and the light-emitting unit X are stacked, a three-stage structure in which B, Y and B are stacked, and a three-stage structure in which B, X and B are stacked. As the number of layers and color sequence of the light-emitting layer in the light-emitting unit X, there can be adopted a two-stage structure in which R and Y are stacked from the anode side, a two-stage structure in which R and G are stacked, a two-stage structure in which G and R are stacked, a three-stage structure in which G, R and G are stacked, or a three-stage structure in which R, G and R are stacked. In addition, another layer may be provided between two light-emitting layers.

[0488] Or, for example Fig.13The light-emitting element 130R, the light-emitting element 130G, and the light-emitting element 130B shown emit blue light. In this case, the EL layer 113 includes one or more light-emitting layers that emit blue light. With respect to the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. In addition, with respect to the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, by providing a color conversion layer between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength and extracted as red light or green light. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer on the light-emitting element 130R and the substrate 152, and to provide a coloring layer 132G between the color conversion layer on the light-emitting element 130G and the substrate 152. A part of the light emitted by the light-emitting element is sometimes transmitted without being converted by the color conversion layer. By extracting the light that has passed through the color conversion layer through the coloring layer, the coloring layer can absorb light other than the desired color light, thereby improving the color purity of the light presented by the sub-pixel.

[0489] [Display device 50C]

[0490] Fig.14 The main difference between the illustrated display device 50C and the display device 50B is that the former is a bottom emission type display device.

[0491] Light emitted by the light emitting element is emitted toward the substrate 151. A material having high visible light transmittance is preferably used for the substrate 151. On the other hand, there is no limitation on the light transmittance of the material used for the substrate 152.

[0492] A light shielding layer 117 is preferably formed between the substrate 151 and the transistor. Fig.14 The following example is shown: a light shielding layer 117 is provided on a substrate 151, an insulating layer 153 is provided on the light shielding layer 117, and a transistor 205D, a transistor 205R (not shown), a transistor 205G, a transistor 205B, etc. are provided on the insulating layer 153. In addition, a coloring layer 132R (not shown), a coloring layer 132G, and a coloring layer 132B are provided on the insulating layer 195, and an insulating layer 235 is provided on the coloring layers 132R (not shown), the coloring layer 132G, and the coloring layer 132B.

[0493] The light emitting element 130G overlapping the colored layer 132G includes a pixel electrode 111G, an EL layer 113 , and a common electrode 135 .

[0494] The light emitting element 130B overlapping the colored layer 132B includes a pixel electrode 111B, an EL layer 113 , and a common electrode 135 .

[0495] The pixel electrodes 111G and 111B are each made of a material having high visible light transmittance. The common electrode 135 is preferably made of a material that reflects visible light. Since a metal with low resistance or the like can be used for the common electrode 135 in a bottom emission display device, a voltage drop caused by the resistance of the common electrode 135 can be suppressed, and high display quality can be achieved.

[0496] A transistor according to one embodiment of the present invention can be miniaturized and its occupied area can be reduced, so that the aperture ratio of a pixel can be increased or the size of a pixel can be reduced in a bottom emission display device.

[0497] [Display device 50D]

[0498] Fig.15 The main difference between the display device 50D shown and the display device 50A is that the former includes a light receiving element 130S.

[0499] The display device 50D includes a light-emitting element and a light-receiving element in a pixel. In the display device 50D, it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element. The organic EL element and the organic photodiode can be formed on the same substrate. Therefore, the organic photodiode can be installed in the display device using the organic EL element.

[0500] In the display device 50D in which pixels include a light-emitting element and a light-receiving element, the pixels have a light-receiving function, so the display device can detect the contact or approach of an object while displaying an image. Therefore, the display unit 168 has one or both of a camera function and a sensing function in addition to an image display function. For example, instead of displaying an image in all sub-pixels included in the display device 50D, a part of the sub-pixels can be used as a light source to emit light, another part of the sub-pixels can be used for light detection, and the remaining sub-pixels can be used to display an image.

[0501] Therefore, it is not necessary to separately provide a light receiving unit and a light source with the display device 50D, and the number of components of the electronic device can be reduced. For example, it is not necessary to separately provide a biometric device installed in the electronic device or an electrostatic capacitive touch panel for scrolling, etc. Therefore, by using the display device 50D, an electronic device with reduced manufacturing cost can be provided.

[0502] When the light receiving element is used for the image sensor, the display device 50D can capture images using the light receiving element. For example, the image sensor can be used to capture images for personal identification using fingerprints, palm prints, irises, vein shapes (including vein shapes, artery shapes) or faces.

[0503] In addition, the light receiving element can be used for a touch sensor (also called a direct touch sensor) or a non-contact sensor (also called a floating sensor, a floating touch sensor, a non-touch sensor), etc. A touch sensor can detect an object when the object (a finger, a hand, a pen, etc.) directly contacts the display device. In addition, a non-contact sensor can detect the object even if the object does not contact the display device.

[0504] The light emitting element 130S includes a pixel electrode 111S on the insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 135 on the functional layer 113S. Light Lin is incident on the functional layer 113S from the outside of the display device 50D.

[0505] The pixel electrode 111S is connected to the conductive layer 112 b included in the transistor 205S through an opening provided in the insulating layer 106 , the insulating layer 195 , and the insulating layer 235 .

[0506] The end portion of the pixel electrode 111S is covered with the insulating layer 237 .

[0507] The common electrode 135 is a continuous film shared by the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B. The common electrode 135 shared by the light emitting element and the light receiving element is connected to the conductive layer 123 provided in the connection portion 140 .

[0508] The functional layer 113S includes at least an active layer (also referred to as a photoelectric conversion layer). The active layer includes a semiconductor. As the semiconductor, inorganic semiconductors such as silicon and organic semiconductors including organic compounds can be cited. In this embodiment, an example of using an organic semiconductor as a semiconductor contained in the active layer is shown. By using an organic semiconductor, the light-emitting layer and the active layer can be formed by the same method (e.g., vacuum evaporation method), and the manufacturing equipment can be used together, so it is preferred.

[0509] The functional layer 113S may also include a layer containing a substance with high hole transport properties, a substance with high electron transport properties, or a bipolar substance (a substance with high electron transport properties and hole transport properties) as a layer other than the active layer. In addition, without limitation thereto, a layer containing a substance with high hole injection properties, a hole blocking material, a substance with high electron injection properties, or an electron blocking material may also be included. As a layer other than the active layer included in the light-receiving element, for example, the above-mentioned material that can be used for the light-emitting element can be used.

[0510] The light receiving element may use a low molecular weight compound or a high molecular weight compound, and may also contain an inorganic compound. The layer constituting the light receiving element may be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, or coating.

[0511] [Display device 50E]

[0512] Fig.16 The display device 50E shown is an example of a display device using an MML (Metal Mask Less) structure. That is, the display device 50E includes a light-emitting element that is not manufactured using a high-definition metal mask. Note that the stacked structure from the substrate 151 to the insulating layer 235 and the stacked structure from the protective layer 131 to the substrate 152 are the same as those of the display device 50A, so the description thereof is omitted.

[0513] exist Fig.16 In the embodiment, the light emitting element 130R, the light emitting element 130G and the light emitting element 130B are disposed on the insulating layer 235 .

[0514] The light emitting element 130R includes a conductive layer 124R on the insulating layer 235 , a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 134 on the layer 133R, and a common electrode 135 on the common layer 134 . Fig.16 The light emitting element 130R shown emits red light (R). The layer 133R includes a light emitting layer that emits red light. In the light emitting element 130R, the layer 133R and the common layer 134 may be collectively referred to as an EL layer. One or both of the conductive layer 124R and the conductive layer 126R may be referred to as a pixel electrode.

[0515] The light emitting element 130G includes a conductive layer 124G on the insulating layer 235 , a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 134 on the layer 133G, and a common electrode 135 on the common layer 134 . Fig.16 The light emitting element 130G shown emits green light (G). The layer 133G includes a light emitting layer that emits green light. In the light emitting element 130G, the layer 133G and the common layer 134 can be collectively referred to as an EL layer. One or both of the conductive layer 124G and the conductive layer 126G can be referred to as a pixel electrode.

[0516] The light emitting element 130B includes a conductive layer 124B on the insulating layer 235 , a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 134 on the layer 133B, and a common electrode 135 on the common layer 134 . Fig.16 The light emitting element 130B shown emits blue light (B). Layer 133B includes a light emitting layer that emits blue light. In the light emitting element 130B, layer 133B and common layer 134 may be collectively referred to as an EL layer. One or both of conductive layer 124B and conductive layer 126B may be referred to as a pixel electrode.

[0517] In this specification and the like, an island-shaped layer provided for each light-emitting element in the EL layer included in the light-emitting element is referred to as layer 133B, layer 133G, or layer 133R, and a layer shared by a plurality of light-emitting elements is referred to as common layer 134. In addition, in this specification and the like, layer 133R, layer 133G, and layer 133B excluding common layer 134 are sometimes referred to as island-shaped EL layers, EL layers formed in an island shape, and the like.

[0518] Layer 133R, layer 133G, and layer 133B are separated from each other. By providing an island-shaped EL layer in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, unintentional light emission caused by crosstalk can be suppressed, thereby realizing a display device with a very high contrast.

[0519] In addition, Fig.16 In the figure, the thicknesses of the layer 133R, the layer 133G, and the layer 133B are shown as being the same, but the present invention is not limited thereto. The thicknesses of the layer 133R, the layer 133G, and the layer 133B may be different from each other.

[0520] Conductive layer 124R is connected to conductive layer 112b included in transistor 205R through openings provided in insulating layer 106, insulating layer 195, and insulating layer 235. Similarly, conductive layer 124G is connected to conductive layer 112b included in transistor 205G, and conductive layer 124B is connected to conductive layer 112b included in transistor 205B.

[0521] Conductive layer 124R, conductive layer 124G, and conductive layer 124B are formed to cover the opening provided in insulating layer 235. Concave portions of conductive layer 124R, conductive layer 124G, and conductive layer 124B are filled with layer 128, respectively.

[0522] Layer 128 has the function of flattening the concave portions of conductive layer 124R, conductive layer 124G, and conductive layer 124B. Conductive layers 126R, conductive layer 126G, and conductive layer 126B connected to conductive layer 124R, conductive layer 124G, and conductive layer 124B are provided on conductive layer 124R, conductive layer 124G, and conductive layer 124B, and layer 128. Therefore, the region overlapping with the concave portions of conductive layer 124R, conductive layer 124G, and conductive layer 124B can also be used as a light-emitting region, thereby increasing the aperture ratio of the pixel. It is preferable that conductive layer 124R and conductive layer 126R use a conductive layer used as a reflective electrode.

[0523] Layer 128 may be an insulating layer or a conductive layer. Layer 128 may be formed of various inorganic insulating materials, organic insulating materials, and conductive materials as appropriate. In particular, layer 128 is preferably formed of an insulating material, and is particularly preferably formed of an organic insulating material. As layer 128, for example, an organic insulating material that can be used for the above-mentioned insulating layer 237 can be used.

[0524] Although Fig.16 An example is shown in which the top surface of the layer 128 has a flat portion, but there is no particular limitation on the shape of the layer 128. The top surface of the layer 128 may have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0525] In addition, the height of the top surface of layer 128 may be the same as or substantially the same as the height of the top surface of conductive layer 124R, or may be different from each other. For example, the height of the top surface of layer 128 may be lower or higher than the height of the top surface of conductive layer 124R.

[0526] The end of the conductive layer 126R may also be aligned with the end of the conductive layer 124R, and may also cover the side of the end of the conductive layer 124R. Each end of the conductive layer 124R and the conductive layer 126R preferably has a tapered shape. Specifically, each end of the conductive layer 124R and the conductive layer 126R preferably has a tapered shape with a taper angle less than 90 degrees. When the end of the pixel electrode has a tapered shape, the layer 133R provided along the side of the pixel electrode has an inclined portion. By making the side of the pixel electrode have a tapered shape, the coverage of the EL layer provided along the side of the pixel electrode can be improved.

[0527] Since the conductive layers 124G and 126G and the conductive layers 124B and 126B are the same as the conductive layers 124R and 126R, detailed descriptions thereof will be omitted.

[0528] The top surface and side surfaces of the conductive layer 126R are covered by the layer 133R. Similarly, the top surface and side surfaces of the conductive layer 126G are covered by the layer 133G, and the top surface and side surfaces of the conductive layer 126B are covered by the layer 133B. Therefore, the entire region where the conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting region of the light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.

[0529] Part of the top surface and side surfaces of the layers 133R, 133G, and 133B are covered by the insulating layers 125 and 127. A common layer 134 is provided on the layers 133R, 133G, 133B, the insulating layers 125 and 127, and a common electrode 135 is provided on the common layer 134. Both the common layer 134 and the common electrode 135 are continuous films shared by a plurality of light-emitting elements.

[0530] exist Fig.16 In the embodiment, there is no arrangement between the conductive layer 126R and the layer 133R. Fig.12In other words, the display device 50E is not provided with an insulating layer (also referred to as a partition wall, a dam, a spacer, etc.) that contacts the pixel electrode and covers the top surface end of the pixel electrode. Therefore, the interval between adjacent light-emitting elements can be made very small. Thus, a high-definition or high-resolution display device can be realized. In addition, there is no need for a mask for forming the insulating layer, thereby reducing the manufacturing cost of the display device.

[0531] As described above, layer 133R, layer 133G, and layer 133B all include a light-emitting layer. Layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B may also include a light-emitting layer, a carrier blocking layer on the light-emitting layer, and a carrier transport layer on the carrier blocking layer. The surfaces of layer 133R, layer 133G, and layer 133B are exposed in the manufacturing process of the display device, so by providing one or both of the carrier transport layer and the carrier blocking layer on the light-emitting layer, the light-emitting layer can be prevented from being exposed to the outermost surface and the damage to the light-emitting layer can be reduced. As a result, the reliability of the light-emitting element can be improved.

[0532] The common layer 134 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 134 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The light emitting element 130R, the light emitting element 130G, and the light emitting element 130B share the common layer 134.

[0533] The side surfaces of the layers 133R, 133G, and 133B are covered with the insulating layer 125. The insulating layer 127 covers the side surfaces of the layers 133R, 133G, and 133B via the insulating layer 125.

[0534] By covering the side surfaces of the layers 133R, 133G, and 133B (or even covering a portion of the top surfaces thereof) with at least one of the insulating layer 125 and the insulating layer 127, the common layer 134 (or the common electrode 135) can be prevented from contacting the pixel electrode and the side surfaces of the layers 133R, 133G, and 133B, thereby preventing short circuits of the light-emitting elements. Thus, the reliability of the light-emitting elements can be improved.

[0535] The insulating layer 125 is preferably in contact with the side surfaces of the layers 133R, 133G, and 133B. By adopting a structure in which the insulating layer 125 is in contact with the layers 133R, 133G, and 133B, film peeling of the layers 133R, 133G, and 133B can be prevented, thereby improving the reliability of the light-emitting element.

[0536] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recessed portion of the insulating layer 125. The insulating layer 127 preferably covers at least a part of the side surface of the insulating layer 125.

[0537] By providing the insulating layer 125 and the insulating layer 127, the space between adjacent island-shaped layers can be filled, so that the unevenness of the formed surface of the layer (for example, the carrier injection layer, the common electrode, etc.) provided on the island-shaped layer can be reduced and further flattened. Therefore, the coverage of the carrier injection layer, the common electrode, etc. can be improved.

[0538] The common layer 134 and the common electrode 135 are provided on the layer 133R, the layer 133G, the layer 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, steps are generated due to the region where the pixel electrode and the island EL layer are provided and the region where the pixel electrode and the island EL layer are not provided (the region between the light-emitting elements). The display device of one embodiment of the present invention can flatten the steps by including the insulating layer 125 and the insulating layer 127, thereby improving the coverage of the common layer 134 and the common electrode 135. Therefore, poor connection caused by disconnection of the common layer 134 or the common electrode 135 can be suppressed. Alternatively, the increase in resistance caused by local thin filmization of the common electrode 135 due to the steps can be suppressed.

[0539] The top surface of the insulating layer 127 preferably has a shape with higher flatness. The top surface of the insulating layer 127 may also have at least one of a plane, a convex surface, and a concave surface. For example, the top surface of the insulating layer 127 preferably has a smooth convex surface shape with high flatness.

[0540] The insulating layer 125 may be an insulating layer containing an inorganic material. As the insulating layer 125, for example, an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film may be used. Specific examples of the inorganic insulating film are as described above. The insulating layer 125 may be a single-layer structure or a stacked-layer structure. In particular, the selectivity of aluminum oxide to the EL layer is high in etching, and it has a function of protecting the EL layer in the formation of the insulating layer 127 described later, so it is preferred. In particular, by using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by the ALD method for the insulating layer 125, an insulating layer 125 with fewer pinholes and a good function of protecting the EL layer can be formed. In addition, the insulating layer 125 may also have a stacked-layer structure of a film formed by the ALD method and a film formed by the sputtering method. For example, the insulating layer 125 may have a stacked-layer structure of an aluminum oxide film formed by the ALD method and a silicon nitride film formed by the sputtering method.

[0541] The insulating layer 125 preferably has a function of blocking the insulating layer from at least one of water and oxygen. In addition, the insulating layer 125 preferably has a function of suppressing the diffusion of at least one of water and oxygen. In addition, the insulating layer 125 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.

[0542] In this specification, etc., a blocking insulating layer refers to an insulating layer having a barrier property. In addition, in this specification, etc., a barrier property refers to a function of suppressing the diffusion of a corresponding substance (it can also be said that the permeability is low). Alternatively, it refers to a function of capturing or fixing a corresponding substance (also called doping).

[0543] When the insulating layer 125 is used as a blocking insulating layer or has an impurity gettering function, it can have a structure that suppresses the entry of impurities (substances that may cause degradation of the light-emitting element. Typically, at least one of water and oxygen) that may diffuse from the outside into each light-emitting element. By adopting this structure, a light-emitting element with high reliability can be provided, and a display device with high reliability can be provided.

[0544] In addition, the impurity concentration of the insulating layer 125 is preferably low. This can prevent impurities from being mixed into the EL layer from the insulating layer 125 and deteriorating the EL layer. In addition, by reducing the impurity concentration in the insulating layer 125, the barrier property against at least one of water and oxygen can be improved. For example, it is preferable that one of the hydrogen concentration and the carbon concentration in the insulating layer 125 is sufficiently low, and it is preferable that both the hydrogen concentration and the carbon concentration are sufficiently low.

[0545] The insulating layer 127 provided on the insulating layer 125 has the function of flattening the large unevenness of the insulating layer 125 formed between adjacent light emitting elements. In other words, the insulating layer 127 improves the flatness of the surface on which the common electrode 135 is formed.

[0546] As the insulating layer 127, an insulating layer containing an organic material can be used as appropriate. As the organic material, a photosensitive organic resin is preferably used, for example, a photosensitive resin composition containing an acrylic resin is preferably used. Note that in this specification, etc., acrylic resin does not refer to only polymethacrylate or methacrylic resin, and sometimes refers to acrylic polymers in a broad sense as a whole.

[0547] In addition, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimide amide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenolic resin, precursors of the above resins, etc. can also be used as the insulating layer 127. In addition, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinyl pyrrolidone, polyethylene glycol, polyglycerol, pullulan, water-soluble cellulose or alcohol-soluble polyamide resin can also be used as the insulating layer 127. In addition, photoresist can also be used as a photosensitive resin. As a photosensitive organic resin, a positive material or a negative material can be used.

[0548] A material that absorbs visible light may also be used as the insulating layer 127. By absorbing the light emitted from the light-emitting element by the insulating layer 127, it is possible to suppress the leakage of light from the light-emitting element through the insulating layer 127 to the adjacent light-emitting element (stray light). Therefore, the display quality of the display device can be improved. In addition, the display quality can be improved even if a polarizing plate is not used in the display device, so the display device can be made lighter and thinner.

[0549] As materials that absorb visible light, materials including pigments such as black, materials including dyes, resin materials having light absorption (e.g., polyimide, etc.), and resin materials that can be used for color filters (color filter materials) can be cited. In particular, when using a resin material formed by mixing or laminating color filter materials of two colors or three or more colors, the effect of shielding visible light can be improved, so it is preferred. In particular, by mixing color filter materials of three or more colors, a black or nearly black resin layer can be achieved.

[0550] A transistor according to one embodiment of the present invention can be miniaturized and its occupied area can be reduced, so that the aperture ratio of a pixel can be increased or the size of a pixel can be reduced in a bottom emission display device.

[0551] This embodiment mode can be combined with other embodiment modes as appropriate.

[0552] Implementation 3

[0553] In this embodiment, a structural example of a display device to which a semiconductor device which is one embodiment of the present invention can be applied is described.

[0554] The semiconductor device of one embodiment of the present invention can be formed into an extremely micro-size, so the display device using the semiconductor device of one embodiment of the present invention can be an extremely high-definition display device. For example, the display device of one embodiment of the present invention can be used for the display portion of information terminal devices (wearable devices) such as watch-type and bracelet-type devices, and the display portion of VR devices such as head-mounted displays, and glasses-type AR devices that can be worn on the head (HMD).

[0555] [Display module]

[0556] Fig.17A 2 is a perspective view of a display module 280. The display module 280 includes a display device 200A and an FPC 290. Note that the display device included in the display module 280 is not limited to the display device 200A, and may be a display device 200B or a display device 200C which will be described later.

[0557] The display module 280 includes a substrate 291 and a substrate 292. The display module 280 includes a display portion 281. The display portion 281 is a region that displays an image.

[0558] Fig. 17B Schematic perspective view showing the structure of one side of the substrate 291. A circuit portion 282, a pixel circuit portion 283 on the circuit portion 282, and a pixel portion 284 on the pixel circuit portion 283 are stacked on the substrate 291. In addition, a terminal portion 285 for connecting to the FPC 290 is provided on a portion of the substrate 291 that does not overlap with the pixel portion 284. The terminal portion 285 and the circuit portion 282 are connected via a wiring portion 286 composed of a plurality of wirings.

[0559] The pixel portion 284 includes a plurality of pixels 284 a arranged periodically. Fig. 17B The right side of FIG. 284 shows an enlarged view of one pixel 284 a. The pixel 284 a includes a sub-pixel 11R that emits red light, a sub-pixel 11G that emits green light, and a sub-pixel 11B that emits blue light.

[0560] The pixel circuit unit 283 includes a plurality of pixel circuits 283a arranged periodically. One pixel circuit 283a controls the light emission of three light emitting elements included in one pixel 284a. One pixel circuit 283a may include three circuits for controlling the light emission of one light emitting element. For example, the pixel circuit 283a may adopt a structure having at least one selection transistor, one current control transistor (driving transistor) and a capacitor for one light emitting element. At this time, a gate signal is input to the gate of the selection transistor, and a source signal is input to the source. Thus, an active matrix display device can be realized.

[0561] The circuit section 282 includes a circuit for driving each pixel circuit 283a of the pixel circuit section 283. For example, it is preferable to include one or both of a gate line driving circuit and a source line driving circuit. In addition, it may also include at least one of an operation circuit, a storage circuit, and a power supply circuit. In addition, the transistor provided in the circuit section 282 may also constitute a part of the pixel circuit 283a. That is, the pixel circuit 283a may also be constituted by the transistor included in the pixel circuit section 283 and the transistor included in the circuit section 282.

[0562] The FPC 290 is used as wiring for supplying video signals, power supply potential, and the like from the outside to the circuit portion 282. In addition, an IC may be mounted on the FPC 290.

[0563] The display module 280 can adopt a structure in which one or both of the pixel circuit unit 283 and the circuit unit 282 are overlapped on the lower side of the pixel unit 284, so that the display unit 281 can have an extremely high aperture ratio (effective display area ratio). For example, the aperture ratio of the display unit 281 can be 40% or more and less than 100%, preferably 50% or more and 95% or less, and more preferably 60% or more and 95% or less. In addition, the pixels 284a can be arranged at an extremely high density, thereby making the display unit 281 have an extremely high definition. For example, it is preferred that the definition of the display unit 281 is 2000ppi or more and 30000ppi or less, preferably 3000ppi or more and 20000ppi or less, more preferably 5000ppi or more and 20000ppi or less, and further preferably 6000ppi or more and 20000ppi or less.

[0564] This display module 280 is very clear, so it is suitable for use in VR devices such as head-mounted displays or glasses-type AR devices. For example, because the display module 280 has a display unit 281 with extremely high clarity, in the structure of viewing the display unit of the display module 280 through a lens, even if the display unit is magnified by a lens, the user cannot see the pixels, thereby achieving a highly immersive display. In addition, the display module 280 can also be applied to electronic devices with a relatively small display unit. For example, it is suitable for use in the display unit of wearable electronic devices such as watch-type devices.

[0565] [Display device 200A]

[0566] Fig.18 The display device 200A shown includes a substrate 331, a light-emitting element 130R, a light-emitting element 130G, a light-emitting element 130B, a capacitor 240, and a transistor 320. The light-emitting element 130R is a display element included in the sub-pixel 11R that emits red light, the light-emitting element 130G is a display element included in the sub-pixel 11G that emits green light, and the light-emitting element 130B is a display element included in the sub-pixel 11B that emits blue light.

[0567] Substrate 331 is equivalent to Fig.17A The substrate 291 in.

[0568] The transistor 320 is a vertical channel transistor in which an oxide semiconductor is used in a semiconductor layer forming a channel. The transistor 320 can use any of the various transistors described in Embodiment 1.

[0569] An insulating layer 332 is provided over the substrate 331. The insulating layer 332 is used as a barrier layer to prevent impurities such as water and hydrogen that may have a bad influence on the electrical characteristics of the transistor from diffusing from the substrate 331 to the transistor 320 and oxygen from the semiconductor layer 108 from escaping toward the insulating layer 332. As the insulating layer 332, for example, a film into which hydrogen or oxygen is less likely to diffuse than a silicon oxide film, such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film, can be used.

[0570] A conductive layer 112a is provided on the insulating layer 332. In addition, an insulating layer 110a, a conductive layer 114 on the insulating layer 110a, an insulating layer 110b on the conductive layer 114, and a conductive layer 112b on the insulating layer 110b are provided on the conductive layer 112a. Openings are provided in the insulating layer 110a, the conductive layer 114, the insulating layer 110b, and the conductive layer 112b, and an insulating layer 110s is provided along the sidewalls of each opening. A semiconductor layer 108 is provided in a manner covering the top surface of the conductive layer 112a, the sidewalls of the insulating layer 110s, and the top surface of the conductive layer 112b, an insulating layer 106 is provided on the semiconductor layer 108, and a conductive layer 104 is provided on the insulating layer 106. An insulating layer 195 is provided on the insulating layer 106 and the conductive layer 104. In addition, an insulating layer 196 is provided on the insulating layer 195. The top surface of the insulating layer 196 is planarized, and an insulating layer 266 is disposed on the insulating layer 196 .

[0571] The insulating layer 196 and the insulating layer 266 serve as interlayer insulating layers. A barrier layer may be provided between the insulating layer 266 and the insulating layer 196 to prevent impurities such as water or hydrogen that may adversely affect the electrical characteristics of the transistor from diffusing from the insulating layer 266 to the transistor 320. As the barrier layer, an insulating film similar to the insulating layer 332 can be used.

[0572] The plug 274 connected to the conductive layer 112b is provided in a manner embedded in the insulating layer 266, the insulating layer 196, the insulating layer 195, and the insulating layer 106. Here, the plug 274 preferably includes a conductive layer 274a covering the side surfaces of the openings of the insulating layer 266, the insulating layer 196, the insulating layer 195, and the insulating layer 106 and a portion of the top surface of the conductive layer 112b, and a conductive layer 274b in contact with the top surface of the conductive layer 274a. At this time, it is preferable to use a conductive material that does not easily diffuse hydrogen and oxygen as the conductive layer 274a.

[0573] In addition, a capacitor 240 is provided on the insulating layer 266. The capacitor 240 includes a conductive layer 241, a conductive layer 245, and an insulating layer 243 located therebetween. The conductive layer 241 serves as one electrode of the capacitor 240, the conductive layer 245 serves as the other electrode of the capacitor 240, and the insulating layer 243 serves as a dielectric of the capacitor 240.

[0574] Conductive layer 241 is provided on insulating layer 266 and embedded in insulating layer 254. Conductive layer 241 is connected to conductive layer 112b of transistor 320 through plug 274. Insulating layer 243 is provided to cover conductive layer 241. Conductive layer 245 is provided in a region overlapping conductive layer 241 with insulating layer 243 interposed therebetween.

[0575] The cover capacitor 240 is provided with an insulating layer 255 a , an insulating layer 255 b is provided on the insulating layer 255 a , and an insulating layer 255 c is provided on the insulating layer 255 b .

[0576] Inorganic insulating films can be used as appropriate for the insulating layers 255a, 255b, and 255c. For example, it is preferable to use silicon oxide films as the insulating layers 255a and 255c, and to use a silicon nitride film as the insulating layer 255b. Thus, the insulating layer 255b can be used as an etching protection film. Although an example in which a portion of the insulating layer 255c is etched to provide a recess is shown in this embodiment, the recess may not be provided in the insulating layer 255c.

[0577] The light emitting element 130R, the light emitting element 130G, and the light emitting element 130B are provided on the insulating layer 255c. For details of the light emitting element 130R, the light emitting element 130G, and the light emitting element 130B, reference can be made to the above embodiment.

[0578] The light emitting element 130R includes a pixel electrode 111R, a layer 133R, a common layer 134, and a common electrode 135. The light emitting element 130G includes a pixel electrode 111G, a layer 133G, a common layer 134, and a common electrode 135. The light emitting element 130B includes a pixel electrode 111B, a layer 133B, a common layer 134, and a common electrode 135. The common layer 134 and the common electrode 135 are commonly provided in the light emitting element 130R, the light emitting element 130G, and the light emitting element 130B.

[0579] The layer 133R included in the light-emitting element 130R contains a light-emitting organic compound that emits at least red light. The layer 133G included in the light-emitting element 130G contains a light-emitting organic compound that emits at least green light. The layer 133B included in the light-emitting element 130B contains a light-emitting organic compound that emits at least blue light. The layers 133R, 133G, and 133B may each be referred to as an EL layer, and include at least a layer (light-emitting layer) containing a light-emitting organic compound.

[0580] The display device 200A forms a light-emitting device for each light-emitting color, so the chromaticity change between low-brightness light and high-brightness light is small. In addition, the layers 133R, 133G, and 133B are separated from each other, so even if a high-definition display device is used, crosstalk between adjacent sub-pixels can be suppressed. Therefore, a high-definition and high-quality display device can be realized.

[0581] Insulating layer 119 , insulating layer 125 , and insulating layer 127 are provided in a region between adjacent light emitting elements.

[0582] The insulating layer 119 is a portion of the insulating layer (also referred to as a mask layer) provided in contact with the top surfaces of the layers 133R, 133G, and 133B when processing the layers 133R, 133G, and 133B. In this way, a portion of the mask layer used to protect the layers 133R, 133G, and 133B during manufacturing may remain in the display device of one embodiment of the present invention. For example, the insulating layer 119 can use the same material as that used for the insulating layer 125 described above.

[0583] The pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B of the light-emitting element are connected to the conductive layer 112b of the transistor 320 via the plug 256 embedded in the insulating layer 243, the insulating layer 255a, the insulating layer 255b, and the insulating layer 255c, the conductive layer 241 embedded in the insulating layer 254, and the plug 274. The height of the top surface of the insulating layer 255c is the same as or substantially the same as the height of the top surface of the plug 256. Various conductive materials can be used as the plug.

[0584] Furthermore, a protective layer 131 is provided on the light emitting element 130R, the light emitting element 130G, and the light emitting element 130B. A substrate 170 is bonded to the protective layer 131 via an adhesive layer 171 .

[0585] No insulating layer covering the top end of the pixel electrode 111 is provided between two adjacent pixel electrodes 111 (pixel electrode 111R, pixel electrode 111G, and pixel electrode 111B). Therefore, the interval between adjacent light-emitting elements can be made very small. Therefore, a high-definition or high-resolution display device can be realized.

[0586] [Display device 200B]

[0587] Hereinafter, a display device having a partially different structure from the above example will be described. Note that the same parts as above are referred to the above description, and the description may be omitted.

[0588] Fig.19The display device 200B shown in the figure shows an example in which a transistor 320A which is a planar transistor in which a semiconductor layer is formed on a plane and a transistor 320B which is a vertical channel transistor are stacked. The transistor 320B has the same structure as the transistor 320 in the display device 200A described above.

[0589] The transistor 320A includes a semiconductor layer 351 , an insulating layer 353 , a conductive layer 354 , a pair of conductive layers 355 , an insulating layer 356 , and a conductive layer 357 .

[0590] An insulating layer 352 is provided over the substrate 331. The insulating layer 352 is used as a barrier layer to prevent impurities such as water and hydrogen that may have a bad influence on the electrical characteristics of the transistor from diffusing from the substrate 331 to the transistor 320A and oxygen from being desorbed from the semiconductor layer 351 to the insulating layer 352. As the insulating layer 352, for example, a film such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film, in which hydrogen or oxygen is less likely to diffuse than a silicon oxide film, can be used.

[0591] A conductive layer 357 is provided over the insulating layer 352, and an insulating layer 356 is provided so as to cover the conductive layer 357. The conductive layer 357 functions as a first gate electrode of the transistor 320A, and a portion of the insulating layer 356 functions as a first gate insulating layer. An oxide insulating film such as a silicon oxide film is preferably used for at least a portion of the insulating layer 356 that contacts the semiconductor layer 351. The top surface of the insulating layer 356 is preferably planarized.

[0592] The semiconductor layer 351 is provided on the insulating layer 356. The semiconductor layer 351 preferably includes a metal oxide (also referred to as an oxide semiconductor) film having semiconductor characteristics. A pair of conductive layers 355 are in contact with the semiconductor layer 351 and function as a source electrode and a drain electrode.

[0593] An insulating layer 358 and an insulating layer 350 are provided to cover the top surface and side surfaces of the pair of conductive layers 355 and the side surfaces of the semiconductor layer 351. The insulating layer 358 is used as a barrier layer to prevent impurities such as water and hydrogen that may have a bad influence on the electrical characteristics of the transistor from diffusing into the semiconductor layer 351 and oxygen from being separated from the semiconductor layer 351. As the insulating layer 358, an insulating film similar to the insulating layer 352 described above can be used.

[0594] The insulating layer 358 and the insulating layer 350 are provided with openings reaching the semiconductor layer 351. The insulating layer 353 and the conductive layer 354 are embedded in the openings and are in contact with the top surface of the semiconductor layer 351. The conductive layer 354 functions as a second gate electrode, and the insulating layer 353 functions as a second gate insulating layer.

[0595] The top surface of the conductive layer 354, the top surface of the insulating layer 353, and the top surface of the insulating layer 350 are planarized so that their heights are uniform or substantially uniform, and an insulating layer 359 is provided to cover them. The insulating layer 359 is used as a barrier layer to prevent impurities such as water and hydrogen that may adversely affect the electrical characteristics of the transistor from diffusing into the transistor 320A. The insulating layer 359 can use the same insulating film as the insulating layer 352 described above.

[0596] As transistor 320A, a structure in which two gates sandwich a semiconductor layer forming a channel is adopted. Alternatively, two gates may be connected and the transistor may be driven by supplying the same signal to the two gates. Alternatively, the threshold voltage of the transistor may be controlled by applying a potential for controlling the threshold voltage to one of the two gates and applying a potential for driving to the other.

[0597] [Display device 200C]

[0598] Fig. 20 The display device 200C shown includes a stacked structure of a transistor 310 having a channel formed in a semiconductor substrate and a transistor 320B which is a vertical channel transistor.

[0599] The transistor 310 is a transistor having a channel formation region in the substrate 301. As the substrate 301, for example, a semiconductor substrate such as a single crystal silicon substrate can be used. The transistor 310 includes a portion of the substrate 301, a conductive layer 311, a low resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 is used as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311, and is used as a gate insulating layer. The low resistance region 312 is a region in the substrate 301 doped with impurities used as a dopant, and is used as a source and a drain. The insulating layer 314 covers the side of the conductive layer 311.

[0600] Furthermore, an element isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301 .

[0601] At least a part of this embodiment mode can be implemented in combination with other embodiment modes described in this specification as appropriate.

[0602] Implementation 4

[0603] In this embodiment, a circuit, a layout, and the like that can be used for a display device which is one embodiment of the present invention are described.

[0604] Fig.21 2 is a block diagram for explaining the display device 200. The display device 200 includes a display portion 435, a first driving circuit portion 431, and a second driving circuit portion 432.

[0605] The display unit 435 includes a plurality of pixels 230 arranged in a matrix of m rows (m is an integer greater than or equal to 1) and n columns (n ​​is an integer greater than or equal to 1).

[0606] The display unit 435 corresponds to, for example, Fig.11 The display unit 168, the pixels 230 correspond to Fig.11 Sub-pixel 11R, sub-pixel 11G, sub-pixel 11B and pixel 210.

[0607] In addition, the display unit 435 corresponds to, for example, Fig.17A The display unit 281, the pixels 230 correspond to Fig. 17B Sub-pixel 11R, sub-pixel 11G, sub-pixel 11B and pixel 284a.

[0608] exist Fig.21 , the pixel 230 in the 1st row and the nth column is recorded as pixel 230[1,n], the pixel 230 in the mth row and the 1st column is recorded as pixel 230[m,1], and the pixel 230 in the mth row and the nth column is recorded as pixel 230[m,n]. In addition, an arbitrary pixel 230 in the display unit 435 is sometimes recorded as pixel 230[r,s]. r is an integer greater than 1 and less than m, and s is an integer greater than 1 and less than n.

[0609] The circuit included in the first driving circuit portion 431 is used as, for example, a scanning line driving circuit. The circuit included in the second driving circuit portion 432 is used as, for example, a signal line driving circuit. Note that a certain circuit may be provided at a position opposite to the first driving circuit portion 431 across the display portion 435. A certain circuit may be provided at a position opposite to the second driving circuit portion 432 across the display portion 435. Note that in this specification, etc., the circuits included in the first driving circuit portion 431 and the second driving circuit portion 432 are sometimes collectively referred to as a peripheral driving circuit 433.

[0610] As the peripheral driver circuit 433, various circuits such as a shift register circuit, a level converter circuit, an inverter circuit, a latch circuit, an analog switch circuit, a multiplexer circuit, a demultiplexer circuit, and a logic circuit can be used. In the peripheral driver circuit 433, the transistor 100 according to one embodiment of the present invention can be used. Note that the transistor in the peripheral driver circuit can also be formed using the same process as the transistor in the pixel 230.

[0611] The display device 200 includes m wirings 436 arranged substantially in parallel with each other and whose potentials are controlled by the circuit in the first driver circuit portion 431 , and n wirings 437 arranged substantially in parallel with each other and whose potentials are controlled by the circuit in the second driver circuit portion 432 .

[0612] exist Fig.212 shows an example in which the wiring 436 and the wiring 437 are connected to the pixel 230. However, the wiring 436 and the wiring 437 are just examples, and the wiring connected to the pixel 230 is not limited to the wiring 436 and the wiring 437.

[0613] <Configuration Example of Pixel Circuit>

[0614] FIG. 22A to FIG. 22D , FIG. 23A to FIG. 23D as well as Fig.24A and Fig. 24B 2 shows an example of the structure of the pixel 230. The pixel 230 includes a pixel circuit 51 (pixel circuit 51A, pixel circuit 51B, pixel circuit 51C, pixel circuit 51D, pixel circuit 51E, pixel circuit 51F, pixel circuit 51G, pixel circuit 51H, pixel circuit 51I or pixel circuit 51J) and a light emitting element 61.

[0615] The light-emitting element (also referred to as a light-emitting device) described in this embodiment and the like refers to a self-luminous light-emitting device such as an organic EL element (also referred to as an OLED). In addition, the light-emitting element connected to the pixel circuit may be a self-luminous light-emitting element such as an LED, a micro-LED, a QLED, or a semiconductor laser.

[0616] Fig.22A The pixel circuit 51A shown is a 2Tr1C type pixel circuit including a transistor 52A, a transistor 52B, and a capacitor 53 .

[0617] One of the source and drain of the transistor 52A is connected to the wiring SL, and the gate of the transistor 52A is connected to the wiring GL. One of the source and drain of the transistor 52A is connected to the gate of the transistor 52B and one terminal of the capacitor 53. One of the source and drain of the transistor 52B is electrically connected to the wiring ANO. The other of the source and drain of the transistor 52B is connected to the other terminal of the capacitor 53 and the anode of the light emitting element 61. The cathode of the light emitting element 61 is connected to the wiring VCOM. The region where the other of the source and drain of the transistor 52A, the gate of the transistor 52B, and one terminal of the capacitor 53 are connected is used as a node ND.

[0618] The wiring GL corresponds to the wiring 436, and the wiring SL corresponds to the wiring 437. The wiring VCOM is a wiring for supplying a potential for supplying a current to the light emitting element 61. The transistor 52A has a function of controlling the conduction state or non-conduction state between the wiring SL and the gate of the transistor 52B according to the potential of the wiring GL. For example, VDD is supplied to the wiring ANO, and VSS is supplied to the wiring VCOM.

[0619] By turning on the transistor 52A, the image signal is supplied from the wiring SL to the node ND. Then, by turning off the transistor 52A, the image signal is held in the node ND. In order to surely hold the image signal supplied to the node ND, it is preferable to use a transistor with a small off-state current as the transistor 52A. For example, it is preferable to use an OS transistor as the transistor 52A.

[0620] The transistor 52B has a function of controlling the amount of current flowing through the light emitting element 61. The capacitor 53 has a function of holding the gate potential of the transistor 52B. The intensity of light emitted by the light emitting element 61 is controlled according to an image signal supplied to the gate (node ​​ND) of the transistor 52B.

[0621] exist Fig.22A In the pixel circuit 51A shown, transistor 52A and transistor 52B include back gates. By connecting the back gate to a signal line or a power line, an arbitrary potential can be supplied. In addition, the back gate can also be connected to a ground potential. In addition, the back gate can also be connected to a gate. In addition, the back gate can also be connected to a source or a drain. Note that an example in which all transistors have back gates is shown here, but only a part of the transistors can include back gates.

[0622] Fig. 22B The pixel circuit 51B shown is a 3Tr1C type pixel circuit including a transistor 52A, a transistor 52B, a transistor 52C, and a capacitor 53 . Fig. 22B The pixel circuit 51B shown has a Fig.22A The pixel circuit 51A shown in the figure has a structure in which a transistor 52C is added.

[0623] One of the source and the drain of the transistor 52C is connected to the other of the source and the drain of the transistor 52B. The other of the source and the drain of the transistor 52C is connected to the wiring V0. For example, a reference potential is supplied to the wiring V0.

[0624] The transistor 52C has a function of controlling the conduction state or non-conduction state between the other of the source and the drain of the transistor 52B and the wiring V0 according to the potential of the wiring GL. The wiring V0 is a wiring for supplying a reference potential. When an n-channel transistor is used as the transistor 52B, the unevenness of the gate-source voltage of the transistor 52B can be suppressed by the reference potential of the wiring V0 supplied through the transistor 52C.

[0625] In addition, the wiring V0 can be used to obtain a current value that can be used for setting pixel parameters. More specifically, the wiring V0 can be used as a monitoring line for outputting the current flowing through the transistor 52B or the current flowing through the light-emitting element 61 to the outside. The current output to the wiring V0 can be converted into a voltage by a source follower circuit or the like and output to the outside. Alternatively, it can be converted into a digital signal by an A / D converter or the like and output to the outside.

[0626] exist Fig. 22B In the pixel circuit 51B shown, transistor 52A, transistor 52B and transistor 52C include back gates. By connecting the back gate to a signal line or a power line, an arbitrary potential can be supplied. In addition, the back gate can also be connected to a ground potential. In addition, the back gate can also be connected to a gate. In addition, the back gate can also be connected to a source or a drain. Note that an example in which all transistors have back gates is shown here, but only a part of the transistors can include back gates.

[0627] Fig. 22C The pixel circuit 51C shown is an example in which the transistor 52A and the transistor 52B of the pixel circuit 51A are transistors including a back gate and the back gate is connected to the gate. Fig.22D The pixel circuit 51D shown is an example of a pixel circuit 51B using this transistor. Thus, the current that can flow through the transistor can be increased. Note that all transistors shown here use transistors with gates connected to back gates, but are not limited to this. In addition, transistors including gates and back gates and connected to different wirings can also be used. For example, by using a transistor with one of the gate and back gate connected to the source, reliability can be improved.

[0628] Fig.23A The pixel circuit 51E shown has a Fig. 22B The pixel circuit 51B shown has a structure in which a transistor 52D is added. Fig.23A The pixel circuit 51E shown is a 4Tr1C type pixel circuit including a transistor 52A, a transistor 52B, a transistor 52C, a transistor 52D, and a capacitor 53 .

[0629] One of the source and the drain of the transistor 52D is connected to the node ND, and the other of the source and the drain is connected to the wiring V0. In addition, the transistor 52D includes a back gate.

[0630] The pixel circuit 51E is connected to the wiring GL1, the wiring GL2, and the wiring GL3. The wiring GL1 is connected to the gate of the transistor 52A, the wiring GL2 is connected to the gate of the transistor 52C, and the wiring GL3 is connected to the gate of the transistor 52D. Note that in this embodiment, the wiring GL1, the wiring GL2, and the wiring GL3 are sometimes collectively referred to as the wiring GL. Therefore, the wiring GL is not limited to one, and may be multiple.

[0631] By turning on transistors 52C and 52D at the same time, the source and gate of transistor 52B have the same potential, so that transistor 52B can be turned off. This can forcibly cut off the current flowing through light-emitting element 61. This pixel circuit is preferably used when a display method in which a display period and a light-off period are alternately set is used.

[0632] Fig. 23B The pixel circuit 51F shown is an example in which a capacitor 53A is added to the pixel circuit 51E described above. The capacitor 53A is used as a storage capacitor. Fig.23A The pixel circuit 51E shown is a 4Tr1C type pixel circuit. In addition, Fig. 23B The pixel circuit 51F shown is a 4Tr2C type pixel circuit.

[0633] Fig.23C The pixel circuit 51G and Fig.23D The pixel circuit 51H shown has a structure different from the above-mentioned pixel circuit 51E or pixel circuit 51F, in which the back gates of the transistors 52A, 52C, and 52D are connected to the gate and the back gate of the transistor 52B is connected to the source.

[0634] Fig.24A The illustrated pixel circuit 51I is a 6Tr1C type pixel circuit including a transistor 52A, a transistor 52B, a transistor 52C, a transistor 52D, a transistor 52E, a transistor 52F, and a capacitor 53. The transistors 52A to 52F include back gates.

[0635] One of the source and drain of the transistor 52A is connected to the wiring SL, and the gate of the transistor 52A is connected to the wiring GL1. One of the source and drain of the transistor 52D is connected to the wiring ANO, and the gate of the transistor 52D is connected to the wiring GL2. The other of the source and drain of the transistor 52D is connected to one of the source and drain of the transistor 52B. The other of the source and drain of the transistor 52B is connected to the other of the source and drain of the transistor 52A and one of the source and drain of the transistor 52F. The gate of the transistor 52F is connected to the wiring GL3.

[0636] One of the source and drain of transistor 52E is connected to the other of the source and drain of transistor 52D and one of the source and drain of transistor 52B. The other of the source and drain of transistor 52E is connected to the gate of transistor 52B and one terminal of capacitor 53. The other terminal of capacitor 53 is connected to the other of the source and drain of transistor 52F, the anode of light emitting element 61, and one of the source and drain of transistor 52C. The gate of transistor 52E and the gate of transistor 52C are electrically connected to wiring GL4. The other of the source and drain of transistor 52C is electrically connected to wiring V0. The region where the other of the source and drain of transistor 52E, the gate of transistor 52B, and one terminal of capacitor 53 are electrically connected is used as node ND.

[0637] also, Fig. 24B It is shown that the back gates of the transistors 52A, 52C, 52D, 52E, and 52F are connected to the gate, and the back gate of the transistor 52B is connected to the other of the source and the drain.

[0638] By using the transistor 100 according to one embodiment of the present invention in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced. Therefore, the definition of the display device can be improved. For example, a display device having a definition of 1000 ppi or more and 10000 ppi or less, preferably 2000 ppi or more and 9000 ppi or less, more preferably 3000 ppi or more and 8000 ppi or less, further preferably 4000 ppi or more and 8000 ppi or less, further preferably 5000 ppi or more and 8000 ppi or less, further preferably 6000 ppi or more and 8000 ppi or less can be realized.

[0639] In addition, by reducing the area occupied by the pixel circuit, the number of pixels of the display device can be increased (the resolution can be improved). For example, extremely high-resolution display devices such as HD (1280×720 pixels), FHD (1920×1080 pixels), WQHD (2560×1440 pixels), WQXGA (2560×1600 pixels), 4K2K (3840×2160 pixels), or 8K4K (7680×4320 pixels) can be realized.

[0640] Therefore, by using the transistor 100 according to one embodiment of the present invention and the like in a pixel circuit of a display device, the display quality of the display device can be improved. In addition, the aperture ratio of the pixel can be increased in a bottom emission type display device using an EL element. A pixel with a high aperture ratio can emit light with the same brightness as a pixel with a low aperture ratio at a lower current density than a pixel with a low aperture ratio. Therefore, the reliability of the display device can be improved.

[0641] The structure described in this embodiment mode can be used in combination with the structures described in other embodiment modes as appropriate.

[0642] Implementation method 5

[0643] In this embodiment, using FIG. 25A to FIG. 27G An electronic device according to one embodiment of the present invention will be described.

[0644] The electronic device of this embodiment includes a display device of one embodiment of the present invention in a display portion. The display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, it can be used in the display portion of various electronic devices.

[0645] Electronic devices include, for example, television sets, desktop or notebook personal computers, displays for computers, etc., digital signage, large-scale game consoles such as pinball machines, and other electronic devices with larger screens, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, portable information terminals, sound reproduction devices, and the like.

[0646] In particular, since the display device of one embodiment of the present invention can improve the clarity, it can be suitably used in electronic devices including a smaller display unit. Examples of such electronic devices include watch-type and bracelet-type information terminal devices (wearable devices), wearable devices that can be worn on the head, VR devices such as head-mounted displays, glasses-type AR devices, and MR devices.

[0647] A display device according to one embodiment of the present invention preferably has an extremely high resolution such as HD (1280×720 pixels), FHD (1920×1080 pixels), WQHD (2560×1440 pixels), WQXGA (2560×1600 pixels), 4K (3840×2160 pixels), 8K (7680×4320 pixels), etc. In particular, the resolution is preferably set to 4K, 8K or above. In addition, the pixel density (clarity) in the display device according to one embodiment of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, further preferably 1000 ppi or more, further preferably 2000 ppi or more, further preferably 3000 ppi or more, further preferably 5000 ppi or more, further preferably 7000 ppi or more. By using a display device having one or both of high resolution and high definition, the sense of reality and depth can be further improved. In addition, there is no particular limitation on the screen ratio (aspect ratio) of the display device of one embodiment of the present invention. For example, the display device can adapt to various screen ratios such as 1:1 (square), 4:3, 16:9, 16:10, etc.

[0648] The electronic device of this embodiment may also include a sensor (the sensor has the function of detecting, detecting or measuring the following factors: force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, electricity, radiation, flow, humidity, inclination, vibration, smell or infrared).

[0649] The electronic device of this embodiment may have various functions. For example, it may have the following functions: a function of displaying various information (static images, dynamic images, text images, etc.) on a display unit; a function of a touch panel; a function of displaying a calendar, date, or time, etc.; a function of executing various software (programs); a function of wireless communication; a function of reading programs or data stored in a storage medium; etc.

[0650] use FIG. 25A to FIG. 25D An example of a wearable device that can be worn on the head is described. These wearable devices have at least one of a function of displaying AR content, a function of displaying VR content, a function of displaying SR content, and a function of displaying MR content. When an electronic device has a function of displaying at least one of AR, VR, SR, MR, etc., the user's sense of immersion can be improved.

[0651] Fig.25A The electronic device 700A shown and Fig.25BThe electronic devices 700B shown include a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting units 723, a control unit (not shown), an imaging unit (not shown), a pair of optical components 753, glasses frames 757 and a pair of nose pads 758.

[0652] The display device of one embodiment of the present invention can be applied to the display panel 751. Therefore, an electronic device capable of performing extremely high-definition display can be realized.

[0653] Both the electronic device 700A and the electronic device 700B can project the image displayed by the display panel 751 onto the display area 756 in the optical member 753. Since the optical member 753 is light-transmissive, the user can see the image displayed in the display area overlapping the transmitted image seen through the optical member 753. Therefore, both the electronic device 700A and the electronic device 700B are electronic devices capable of AR display.

[0654] The electronic device 700A and the electronic device 700B may also be provided with a camera capable of photographing the front as an imaging unit. In addition, by providing an acceleration sensor such as a gyro sensor on the electronic device 700A and the electronic device 700B, the user's head orientation can be detected and an image corresponding to the direction can be displayed on the display area 756.

[0655] The communication unit includes a wireless communication device, through which a video signal etc. can be supplied. In addition to or in place of the wireless communication device, a connector to which a cable for supplying a video signal and a power supply potential can be connected may be included.

[0656] Electronic device 700A and electronic device 700B are provided with a battery (not shown) and can be charged by one or both of wireless and wired methods.

[0657] The housing 721 may also be provided with a touch sensor module. The touch sensor module has a function of detecting whether the outer surface of the housing 721 is touched. Through the touch sensor module, various processes can be performed by detecting a user's tapping operation or sliding operation. For example, a process such as temporarily stopping or reproducing a dynamic image can be performed through a tapping operation, and a process such as fast forwarding or rewinding can be performed through a sliding operation. In addition, by providing a touch sensor module on each of the two housings 721, the operating range can be expanded.

[0658] As the touch sensor module, various touch sensors can be used. For example, various methods such as electrostatic capacitance, resistance film, infrared, electromagnetic induction, surface acoustic wave, and optical can be used. In particular, it is preferred to use electrostatic capacitance or optical sensors in the touch sensor module.

[0659] When an optical touch sensor is used, a photoelectric conversion element may be used as a light receiving element. Inorganic semiconductors and organic semiconductors may be used for the active layer of the photoelectric conversion element, or both.

[0660] Fig.25C The electronic device 800A shown and Fig.25D The electronic devices 800B shown each include a pair of display portions 820 , a housing 821 , a communication portion 822 , a pair of mounting portions 823 , a control portion 824 , a pair of imaging portions 825 , and a pair of lenses 832 .

[0661] The display unit 820 may be a display device according to one embodiment of the present invention. Therefore, an electronic device capable of displaying with extremely high definition may be realized, thereby allowing the user to experience a high sense of immersion.

[0662] The display unit 820 is provided at a position visible through the lens 832 inside the housing 821. In addition, by displaying different images between the pair of display units 820, three-dimensional display using parallax can be performed.

[0663] The electronic device 800A and the electronic device 800B can both be referred to as VR-oriented electronic devices. A user who wears the electronic device 800A or the electronic device 800B can see the image displayed on the display unit 820 through the lens 832 .

[0664] The electronic device 800A and the electronic device 800B preferably have a mechanism in which the left and right positions of the lens 832 and the display unit 820 can be adjusted so that the lens 832 and the display unit 820 are located at the most suitable position according to the position of the user's eyes. In addition, it is preferable to have a mechanism in which the focus is adjusted by changing the distance between the lens 832 and the display unit 820.

[0665] The user can use the mounting portion 823 to mount the electronic device 800A or the electronic device 800B on the head. Fig.25C In the examples, the mounting portion 823 is shaped like the temples of glasses (also called temples), but the invention is not limited thereto. As long as the user can wear it, the mounting portion 823 may have a helmet-shaped or belt-shaped shape, for example.

[0666] The imaging unit 825 has a function of acquiring external information. The data acquired by the imaging unit 825 can be output to the display unit 820. An image sensor can be used in the imaging unit 825. In addition, a plurality of cameras can be provided to correspond to various viewing angles such as telephoto and wide angle.

[0667] Note that the example including the imaging unit 825 is shown here, and a distance measuring sensor (hereinafter also referred to as a detection unit) capable of measuring the distance to the object ...

Claims

1. A semiconductor device comprising: a first insulating layer; a second insulating layer; A third insulating layer; as well as Transistors, including: Semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a fourth conductive layer; a fourth insulating layer; a fifth insulating layer; and The sixth insulating layer, The first conductive layer, the first insulating layer, the third conductive layer, the fifth insulating layer, the second insulating layer, the third insulating layer and the second conductive layer are stacked in sequence in an overlapping manner. The first insulating layer, the third conductive layer, the second insulating layer, the third insulating layer, and the second conductive layer include an opening reaching the first conductive layer, The first insulating layer includes a portion in the opening that protrudes from a side surface of the third conductive layer, a side surface of the second insulating layer, a side surface of the third insulating layer, and a side surface of the second conductive layer, The fifth insulating layer contacts the top surface of the second conductive layer and a plurality of side surfaces including the side surface of the second conductive layer. The fourth insulating layer contacts the top surface of the first insulating layer, the side surface of the fifth insulating layer, and the side surface of the second insulating layer in the opening. The semiconductor layer is in contact with the top surface of the first conductive layer in the opening, the side surface of the fourth insulating layer in the opening, and the top surface of the second conductive layer. The sixth insulating layer is in contact with the top surface of the semiconductor layer, When viewed from a plane, the fourth conductive layer is disposed on the sixth insulating layer in a manner overlapping with the opening. The third conductive layer comprises a first element, Furthermore, the fifth insulating layer includes an oxide of the first element.

2. The semiconductor device according to claim 1, wherein the semiconductor layer comprises a metal oxide, The metal oxide comprises two or three selected from indium, element M and zinc, The element M comprises one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, cobalt and magnesium, And the fourth insulating layer includes silicon oxide or silicon oxynitride.

3. The semiconductor device according to claim 1, wherein the third conductive layer comprises aluminum, And the fifth insulating layer includes aluminum oxide.

4. The semiconductor device according to claim 1, The first insulating layer and the third insulating layer respectively include silicon nitride, silicon oxynitride, hafnium oxide or aluminum oxide, And the second insulating layer includes silicon oxide or silicon oxynitride.

5. A semiconductor device comprising: a first insulating layer; a second insulating layer; A third insulating layer; as well as Transistors, including: Semiconductor layer; a first conductive layer; a second conductive layer; a third conductive layer; a fourth insulating layer; a fifth insulating layer; and The sixth insulating layer, The first conductive layer, the first insulating layer, the second conductive layer, the fifth insulating layer, the second insulating layer and the third insulating layer are stacked in sequence in an overlapping manner. The first insulating layer, the second conductive layer, the second insulating layer, and the third insulating layer include an opening reaching the first conductive layer, The first insulating layer includes a portion in the opening that protrudes from a side surface of the second conductive layer, a side surface of the second insulating layer, and a side surface of the third insulating layer, The fifth insulating layer contacts the top surface of the second conductive layer and a plurality of side surfaces including the side surface of the second conductive layer. The fourth insulating layer contacts the top surface of the first insulating layer, the side surface of the fifth insulating layer, and the side surface of the second insulating layer in the opening. The semiconductor layer is in contact with the top surface of the first conductive layer in the opening, the side surface of the fourth insulating layer in the opening, and the top surface of the third insulating layer. The sixth insulating layer is in contact with the top surface of the semiconductor layer, When viewed from a plane, the third conductive layer is arranged on the sixth insulating layer in a manner overlapping with the opening. The second conductive layer comprises a first element, Furthermore, the fifth insulating layer includes an oxide of the first element.

6. The semiconductor device according to claim 5, wherein the semiconductor layer comprises a metal oxide, The metal oxide comprises two or three selected from indium, element M and zinc, The element M comprises one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, cobalt and magnesium, And the fourth insulating layer includes silicon oxide or silicon oxynitride.

7. The semiconductor device according to claim 5, wherein the second conductive layer comprises aluminum, And the fifth insulating layer includes aluminum oxide.

8. The semiconductor device according to claim 5, The first insulating layer and the third insulating layer respectively include silicon nitride, silicon oxynitride, hafnium oxide or aluminum oxide, And the second insulating layer includes silicon oxide or silicon oxynitride.

9. A method for manufacturing a semiconductor device, comprising the following steps: forming a first conductive layer; forming a first insulating film on the first conductive layer; forming a second conductive layer on the first insulating film so as to have a region overlapping with the first conductive layer; forming a first insulating layer on the top surface and side surfaces of the second conductive layer by oxidizing the surface of the second conductive layer; forming a second insulating film, a third insulating film and a third conductive layer in sequence on the first insulating film and the first insulating layer; Partially removing the third conductive layer, the third insulating film, the second insulating film, the first insulating layer and the second conductive layer to form a first opening, and forming a fourth conductive layer, a second insulating layer, a third insulating layer, a fourth insulating layer and a fifth conductive layer; oxidizing the side surface of the fifth conductive layer exposed in the first opening to form the fourth insulating layer on the side surface of the fifth conductive layer; forming a fourth insulating film in contact with a top surface of the fourth conductive layer, a side surface of the fourth conductive layer in the first opening, a side surface of the second insulating layer in the first opening, a side surface of the third insulating layer in the first opening, a side surface of the fourth insulating layer in the first opening, and a top surface of the first insulating film in the first opening; Partially removing the fourth insulating film and the first insulating film to form a second opening reaching the first conductive layer, forming a fifth insulating layer having a protrusion in the second opening, and a sixth insulating layer in contact with a side surface of the fourth conductive layer in the second opening, a side surface of the second insulating layer in the second opening, a side surface of the third insulating layer in the second opening, a side surface of the fourth insulating layer in the second opening, and a top surface of the protrusion in the second opening; forming a semiconductor layer in contact with a top surface of the fourth conductive layer, a side surface of the sixth insulating layer in the second opening, and a top surface of the first conductive layer; forming a seventh insulating layer in contact with the top surface and side surfaces of the semiconductor layer, the top surface of the fourth conductive layer, and the top surface of the second insulating layer; as well as When viewed from a planar perspective, a sixth conductive layer having a region overlapping the semiconductor layer and the sixth insulating layer is formed on the seventh insulating layer.

10. The method for manufacturing a semiconductor device according to claim 9, By removing a portion of the first insulating film when forming the first opening, an eighth insulating layer having a recessed portion can be formed in a region overlapping the first opening.

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