A method for detecting chip path in integrated circuit package
Through multi-dimensional contactless scanning and real-time data analysis, a three-dimensional mapping map is constructed and probe access sequences are planned, which solves the flexibility and adaptability of chip detection in the existing technology, and realizes efficient and accurate chip path detection, reducing detection time and cost.
Patent Information
- Application Number
- CN202510196107.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-21
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2045-02-21
AI Technical Summary
The existing chip path detection methods lack flexibility and adaptability, making it difficult to efficiently and accurately handle diverse chip products, especially when facing chips of different models, sizes or pin configurations, resulting in high detection costs and low efficiency.
Multi-dimensional non-contact scanning is used to build a three-dimensional structural map, plan the probe access sequence, analyze the response parameters in real time, dynamically adjust the probe operation strategy, and optimize the test process.
It realizes efficient and accurate chip path detection, reduces detection time and cost, improves detection flexibility and adaptability, and enhances detection accuracy and reliability.
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Figure CN119667451B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of electronic manufacturing, and in particular relates to a method for detecting a path of an integrated circuit package chip. Background Art
[0002] In the modern electronics manufacturing industry, integrated circuit (IC) package inspection is a critical step in ensuring product quality and reliability. Existing chip path inspection methods typically rely on pre-defined, fixed patterns designed for chips with specific sizes and pinouts. While this approach can effectively inspect specific chip types, it lacks flexibility and adaptability. When dealing with chips of different models, sizes, or pinouts, equipment recalibration or adjustments to inspection procedures are often required, which not only increases inspection costs but can also lead to inefficiencies.
[0003] Existing technical solutions generally include:
[0004] Fixed-pattern inspection: Using probe cards and inspection platforms designed for certain standard package sizes, these tools typically accommodate only a limited range of die types.
[0005] Contact scanning: Electrical characteristics are measured by directly contacting the chip pins with a physical probe. This method is prone to mechanical damage and is difficult to guarantee accuracy for chips with high-density pin distribution.
[0006] Preset path access: The probe moves along a predetermined path and applies a test signal. This process is not adaptive and cannot be dynamically adjusted to accommodate different chip structures.
[0007] Offline data analysis: The collected data needs to be processed later before conclusions can be drawn, which affects the speed and accuracy of immediate decision-making.
[0008] The main technical challenges faced by these methods are their static and non-adaptive nature, which makes them difficult to efficiently and accurately handle a wide range of chip products. In particular, as electronic products become increasingly miniaturized and complex, traditional detection methods are increasingly unable to meet the market demand for fast, flexible, and high-precision testing. Summary of the Invention
[0009] The purpose of the present invention is to provide an integrated circuit package chip path detection method, which not only improves the flexibility and adaptability of detection, but also significantly reduces detection time and cost, bringing important technological progress to the electronics manufacturing industry to solve the static and non-adaptive problems in the existing technology.
[0010] To achieve the above object, the present invention proposes a method for detecting a path of an integrated circuit package chip, comprising the following steps:
[0011] The chip to be tested is placed on the testing platform and provided with positioning information. Based on the positioning information, the multi-dimensional scanning system is activated to perform non-contact scanning around the chip surface.
[0012] Based on the acquired scan data, a three-dimensional structure map is constructed to reflect the chip pin distribution and connection path. The resulting map is used to plan the probe access sequence so that the probe can reach each target location in an orderly manner.
[0013] According to the set access sequence, the probe is driven to move to the specified coordinate point and a preset signal is applied. After the signal is applied, the response parameters fed back from the chip are collected as the basis for evaluation;
[0014] Combine the obtained response parameters, compare them with the ideal value range, identify abnormal conditions or impedance changes, record any deviations found, and adjust subsequent probe operation strategies to optimize the test;
[0015] After completing all the scheduled probe actions, all the test data are summarized and a final report is output to indicate the chip path status.
[0016] Preferably, placing the chip to be tested on a testing platform includes:
[0017] Use an optical system to perform initial imaging on the chip surface to obtain boundary contour information;
[0018] According to the obtained boundary contour, calculate the center point coordinates ,in , and Represents the position of the chip's geometric center in the plane rectangular coordinate system;
[0019] To determine the center point As a reference, establish a local coordinate system and measure the four corners of the chip to The distance L1 to L4 is calculated by the formula Ln=sqrt(( - )^2+( - )^2), where n=1 to 4 represents the four corners;
[0020] The measured data is used to adjust the angle and height of the detection platform to ensure that the chip fits perfectly with the contact surface and eliminate any gaps that affect signal transmission.
[0021] Preferably, the multi-dimensional scanning system is activated to perform a non-contact scanning operation around the chip surface, including:
[0022] Set the initial scanning starting point based on the obtained chip position data , located at the edge of the chip;
[0023] To determine the starting point As the starting point, the scanning probe is moved step by step along the preset path Q, where the path Q consists of a series of discrete points, satisfying Q={ , ,..., };
[0024] At each point on the defined path Q At , record the reflection intensity J value, and use the formula J=A*exp(-B*d), where A and B are coefficients related to material properties and d represents the scanning depth, to quantify the reflection difference between different layers;
[0025] Complete all points After data collection, the reflection intensity changes ΔJ between adjacent points are compared and ΔJ=| - |, to determine whether there are potential defects or abnormalities.
[0026] Preferably, the construction of a three-dimensional structure map based on the acquired scan data to reflect the chip pin distribution and connection path includes:
[0027] The obtained reflection intensity J value is used to perform layer processing on the chip surface and determine the boundary Lm of each layer, where m represents the number of layers;
[0028] For each layer , according to the point on the path Q The data recorded at each layer are used to calculate the thickness of each layer. =( ), Z represents the position coordinate along the vertical direction;
[0029] Based on the thickness of each layer and reflection intensity J, draw the connecting line segments between layers , where i is the pin number, ensuring that each pin position accurately corresponds to a specific coordinate in three-dimensional space;
[0030] Using the established connecting segments , integrate all pin distribution and connection path information to generate a complete three-dimensional mapping diagram F.
[0031] Preferably, the method of utilizing the formed mapping graph to plan a probe access sequence so that the probe can reach each target location in an orderly manner includes:
[0032] Calculate the shortest path between adjacent pins based on the position coordinates of each pin in the three-dimensional mapping diagram F , where p and q represent different pin numbers respectively;
[0033] According to the established connecting line segments , combined with the shortest path , determine the probe movement direction =( - ) / , X represents the horizontal coordinate of the pin on the map;
[0034] Based on the generated complete three-dimensional map F and the probe moving direction , construct the probe access order O to ensure that the probe reaches each target point in the most efficient order;
[0035] Using the constructed probe access order O, adjust the probe starting position S0 to optimize the overall access path length Pl, using the formula Pl=Sum( ), where Sum represents the sum of the distances between all adjacent probe access locations.
[0036] Preferably, the step of driving the probe to move to a designated coordinate point and applying a preset signal according to a set access sequence includes:
[0037] According to the coordinate point information in the probe access order O, calculate the displacement required for each movement stage , where n represents the position index in the access sequence;
[0038] According to the calculated displacement , adjust the current position of the probe = + Complete location update;
[0039] The probe arrives at the new coordinates After that, activate the signal output module according to the preset conditions
[0040] In the signal output module In the activated state, the signal duration is controlled by adjusting the parameter K =G(K, ), G represents the functional relationship between time, intensity and control parameters.
[0041] Preferably, after the signal is applied, collecting the response parameters fed back from the chip includes:
[0042] After the signal is applied, start the data acquisition module
[0043] According to the set signal duration , adjust the data acquisition module The time interval Δt ensures that the data at each time point are recorded. The formula is Δt=
[0044] At each time interval Δt, the change in the response parameter is recorded =
[0045] After completing all scheduled acquisition cycles, integrate all response parameter changes , construct the response parameter sequence ={ , ,..., }, which serves as the basis for subsequent evaluation.
[0046] Preferably, the combined response parameters are compared with an ideal value range to identify abnormal conditions or impedance changes, including:
[0047] According to the constructed response parameter sequence , calculate the response change rate of each acquisition cycle = / Δt, is the change in response parameter, Δt is the time interval;
[0048] Compare to the preset ideal response rate range , determine the actual rate of change Is it out of bounds? If | - |>ε, then it is marked as a potential outlier
[0049] For identified anomalies , analyze the impedance changes within the corresponding period =V / Represent the voltage and current of the applied signal, respectively, to evaluate the internal state of the chip;
[0050] Integrate all outliers and its corresponding impedance change , generate exception reports The report lists all responses that deviate from the ideal value range and the associated impedance changes.
[0051] Preferably, the recording of any deviations found and adjusting subsequent probe operation strategies to optimize the test include:
[0052] Based on the generated exception report , all responses that deviate from the ideal range and the associated impedance changes Recorded in the database
[0053] Analyze database Deviation records in , calculate each abnormal point Weight =H( , ), H represents the comprehensive evaluation function based on impedance change and response change rate;
[0054] Based on the weight , adjust the probe access order O, re-plan the detection path P' with higher priority to ensure that the key areas are inspected more carefully, and apply the formula P'=sort(O, ), where sort represents the operation of sorting by weight;
[0055] Under the guidance of the updated detection path P', set the new probe movement speed , through the formula =M( )and =N( ), M and N represent the functions that adjust the speed and strength according to the weights, respectively.
[0056] Preferably, after completing all predetermined probe actions, all detection data are summarized and a final report is output to indicate the chip path status, including:
[0057] Collect all the test results after the probe operation, including the response change rate , impedance change and abnormal points data into a comprehensive dataset
[0058] According to the adjusted detection path P' and the set new probe movement speed and signal strength , evaluate the effect of each detection point , using the formula =O( , , ), O represents the effect evaluation function to quantify the test quality of each point;
[0059] Based on effect evaluation , combined with the historical deviation records in the database Db, determine the overall health index HI of the chip path, and apply the formula HI=P( , ), P is the function for calculating the health index, is the outlier weight;
[0060] All information is summarized and a final report Rf is generated. The report not only lists the status of all detection points, but also includes the overall health index HI and improvement suggestions for the problems found.
[0061] Technical effects and advantages of the present invention: Compared with the prior art, the present invention provides a method for detecting chip paths in an integrated circuit package, which has the following advantages:
[0062] By introducing innovative measures such as multi-dimensional non-contact scanning, constructing a three-dimensional map based on real-time data, and intelligently planning probe access sequences, the present invention can dynamically adapt to chips of various sizes and pin layouts, thereby achieving efficient and high-precision detection results. In addition, through the real-time analysis of response parameters and the application of a feedback mechanism, the present invention can also automatically adjust the probe operation strategy, further optimize the test process, and improve detection efficiency and accuracy. Ultimately, this method not only improves the flexibility and adaptability of detection, but also significantly reduces detection time and cost, bringing important technological advances to the electronics manufacturing industry. BRIEF DESCRIPTION OF THE DRAWINGS
[0063] Figure 1 The figure is a flow chart of the integrated circuit package chip path detection method of the present invention. DETAILED DESCRIPTION
[0064] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. The specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0065] The present invention provides a method for detecting a path of an integrated circuit package chip. Figure 1 As shown, the following steps are included:
[0066] Step 1: Place the chip to be tested on the test platform and provide positioning information; further use the optical system to perform initial imaging on the chip surface to obtain boundary contour information; calculate the center point coordinates based on the obtained boundary contour ,in , and Represents the position of the chip's geometric center in the plane rectangular coordinate system;
[0067] To determine the center point As a reference, establish a local coordinate system and measure the four corners of the chip to The distance L1 to L4 is calculated by the formula Ln=sqrt(( - )^2+( - )^2), where n=1 to 4 represents the four corners; the angle and height of the detection platform are adjusted using the measured data to ensure that the chip fits perfectly with the contact surface and eliminate any gaps that affect signal transmission.
[0068] Assume there is a chip to be tested with a size of 20 mm x 20 mm. The coordinates of the four corners are A(0,0), B(20,0), C(20,20), and D(0,20), in millimeters. The test will be performed as follows:
[0069] Optical imaging to obtain profiles:
[0070] A high-resolution optical system is used to initially image the chip surface, capturing clear boundary contour information.
[0071] Calculate the center point coordinates :
[0072] According to the obtained boundary contour, the coordinates of the four corner points of the chip are determined and the geometric center position is calculated. For the above rectangular chip, the center point The coordinates of can be obtained by simple arithmetic averaging:
[0073] =(Xa+Xb+Xc+Xd) / 4;
[0074] =(Ya+Yb+Yc+Yd) / 4;
[0075] After substituting specific values, we get:
[0076] =(0+20+20+0) / 4=10mm;
[0077] =(0+0+20+20) / 4=10mm;
[0078] Therefore, the center point coordinates =(10,10).
[0079] Establish a local coordinate system and measure distances:
[0080] by Establish a new local rectangular coordinate system for the center, and then calculate the distance Ln from each corner point to the center according to the formula:
[0081] Ln=sqrt(( - )^2+( - )^2);
[0082] Calculate the distances L1 to L4 from the four corner points to the center point respectively:
[0083] L1=sqrt((0-10)^2+(0-10)^2)=sqrt(100+100)=sqrt(200)≈14.14mm;
[0084] L2=sqrt((20-10)^2+(0-10)^2)=sqrt(100+100)=sqrt(200)≈14.14mm;
[0085] L3=sqrt((20-10)^2+(20-10)^2)=sqrt(100+100)=sqrt(200)≈14.14mm;
[0086] L4=sqrt((0-10)^2+(20-10)^2)=sqrt(100+100)=sqrt(200)≈14.14mm;
[0087] Adjust the detection platform:
[0088] Using the measured distances L1 to L4, a robotic arm or precision adjustment mechanism fine-tunes the angle and height of the inspection platform to ensure that the chip is completely aligned with the contact surface, eliminating any gaps that could affect signal transmission. This step is crucial to ensuring the effectiveness of subsequent non-contact scanning and other electrical tests.
[0089] This method precisely positions each chip under test and dynamically adapts to chips of varying sizes and shapes. This adaptive positioning mechanism not only improves detection accuracy but also enhances the system's flexibility and versatility. Furthermore, ensuring a perfect fit between the chip and the contact surface effectively reduces false positives caused by poor contact, thereby improving overall detection efficiency and reliability. Furthermore, the use of mathematical formulas for calculations simplifies the operational process, reduces the potential for human error, and further enhances the level of automation and the value of the technology.
[0090] Step 2: Based on the positioning information, a multi-dimensional scanning system is activated to perform a non-contact scanning operation around the chip surface; further comprising:
[0091] Set the initial scanning starting point based on the obtained chip position data , located at the edge of the chip; to determine the starting point As the starting point, the scanning probe is moved step by step along the preset path Q, where the path Q consists of a series of discrete points, satisfying Q={ , ,..., };
[0092] At each point on the defined path Q At each point, record the reflection intensity J value, and use the formula J=A*exp(-B*d), where A and B are coefficients related to material properties and d represents the scanning depth, to quantify the reflection difference between different layers; complete all points After collecting the data, the reflection intensity changes ΔJ between adjacent points are compared and J=| - , in order to determine whether there are potential defects or abnormalities.
[0093] Assume there is a chip to be tested that is 20 mm x 20 mm in size. The four corner coordinates are A(0,0), B(20,0), C(20,20), and D(0,20), in millimeters. The following steps will be used for non-contact scanning:
[0094] Set the initial scan starting point :
[0095] Based on the chip position data, select a point on the edge of the chip as the initial scan starting point For example, you can choose the lower left corner point A(0,0) as .
[0096] Define the preset path Q:
[0097] Suppose a scanning path Q along the chip surface, which consists of a series of discrete points, satisfying Q={ , ,..., In order to cover the entire chip surface, the path can be designed to start from the lower left corner and gradually move inward along the edge in a spiral until all key areas are covered. The position is determined by coordinates express.
[0098] Record the reflection intensity J value:
[0099] At every point on path Q At the point where the reflection intensity J is recorded, a non-contact scanning probe is used. The reflection intensity J can be calculated using the formula:
[0100] J=A*exp(-B*d);
[0101] Among them, A and B are coefficients related to material properties, and d represents the scanning depth. For different materials, the specific values of A and B will be different. For example, suppose A=1.0, B=0.5, and at a certain point The scanning depth at d = 2 mm, the reflection intensity J is calculated as follows:
[0102] Jn=1.0*exp(-0.5*2)=1.0*exp(-1)≈0.3679;
[0103] Compare the change in reflection intensity ΔJ between adjacent points:
[0104] Complete all points After collecting data, calculate the reflection intensity change ΔJ between adjacent points to determine whether there are potential defects or abnormalities. The reflection intensity change ΔJ is calculated using the formula:
[0105] J=| - |;
[0106] Assume that at two consecutive points and The reflection intensities measured at =0.3679 and =0.4, then the reflection intensity change ΔJ between them is:
[0107] ΔJ=|0.3679-0.4|=0.0321;
[0108] This method enables efficient and precise scanning of the chip surface, ensuring full coverage and detecting any subtle structural differences or defects. This method is applicable to chips of various sizes and shapes, eliminating the need to adjust equipment settings for each chip type, greatly enhancing the system's flexibility and versatility.
[0109] Step 3: Based on the acquired scan data, a 3D structure map is constructed to reflect the chip pin distribution and connection paths, further including:
[0110] The obtained reflection intensity J value is used to perform layered processing on the chip surface to determine the boundary of each layer. , where m represents the number of layers;
[0111] For each layer , calculate the thickness of each layer based on the data recorded at point Sn on path Q , using the formula =( ), Z represents the position coordinate along the vertical direction;
[0112] Based on the thickness of each layer and reflection intensity J, draw the connecting line segments between layers , where i is the pin number, ensuring that each pin position accurately corresponds to a specific coordinate in three-dimensional space;
[0113] Using the established connecting segments , integrate all pin distribution and connection path information to generate a complete three-dimensional mapping diagram F.
[0114] Assume there is a chip to be tested, and the reflection intensity J value and other relevant data of multiple points on its surface are obtained through non-contact scanning. The following steps will be followed to construct a 3D structure map:
[0115] Layered processing and boundary determination:
[0116] According to the obtained reflection intensity J value, the chip surface is layered. For example, suppose the chip is identified to have three layers, namely the top layer, the middle layer and the bottom layer, which are marked as L1, L2, and L3 respectively. The boundary of each layer This can be determined by analyzing changes in reflection intensity, as there are often significant differences in reflection properties between different materials or layers.
[0117] Calculate the thickness of each layer :
[0118] For each layer , based on the data recorded at point Sn on path Q (including position coordinates ), calculate the thickness of each layer . The formula used here is:
[0119] =( );
[0120] in, Indicates the vertical coordinates of the current point. Indicates the position coordinates of the previous point. Suppose there are two consecutive points in a certain layer and , their position coordinates along the vertical direction are =5 mm and =3 mm, then the thickness of the layer Hm is calculated as follows:
[0121] Hm=5mm-3mm=2mm;
[0122] Draw connecting line segments between layers :
[0123] Based on the thickness of each layer and reflection intensity J, draw the connecting line segments between layers , where i is the pin number. These line segments are used to accurately map each pin position to a specific coordinate in three-dimensional space. For example, for a specific pin, if it is located on the second layer and its horizontal position in the plane rectangular coordinate system is known , and the corresponding vertical position , a connecting line segment from the first layer to the second layer can be established .
[0124] Generate a complete three-dimensional map F:
[0125] Using the established connecting segments , integrating all pin distribution and connection path information to generate a complete three-dimensional mapping diagram F. This diagram not only shows the geometric shape of the chip surface, but also includes the structure of each internal layer and the electrical connection relationship between pins, providing comprehensive visualization information.
[0126] This method can achieve high-precision 3D reconstruction of the chip's internal structure. Specific technical effects include:
[0127] Accurate layering: Through the effective use of the reflection intensity J value, the different layers of the chip can be clearly distinguished, ensuring that the boundaries of each layer are accurately identified, thereby improving the accuracy of subsequent analysis.
[0128] High-precision thickness measurement: Based on the discrete point data on path Q, the thickness of each layer is calculated using a simple difference method ,This method is both simple and efficient, and can reduce the computational ,complexity while ensuring accuracy.
[0129] Detailed pin positioning: by drawing connecting line segments between layers , ensuring that each pin position can be accurately mapped into three-dimensional space, which helps in the subsequent evaluation of pin function and connectivity.
[0130] Comprehensive information display: The resulting 3D map F integrates all key chip information, including geometry, internal structure, and pinout, providing engineers with an intuitive and detailed reference tool for further analysis and diagnosis.
[0131] Improved testing efficiency: The entire process is highly automated, reducing manual intervention, improving testing speed and efficiency, while ensuring the consistency and reliability of results.
[0132] Step 4: Using the generated mapping graph, planning the probe access sequence so that the probe can reach each target location in an orderly manner; further comprising:
[0133] Calculate the shortest path between adjacent pins based on the position coordinates of each pin in the three-dimensional mapping diagram F , where p and q represent different pin numbers; according to the established connection line segment , combined with the shortest path , determine the probe movement direction , the formula is =( - ) / , X represents the horizontal coordinate of the pin on the map;
[0134] Based on the generated complete three-dimensional map F and the probe moving direction , construct the probe access order O to ensure that the probe reaches each target point in the most efficient order; using the constructed probe access order O, adjust the probe starting position S0 to optimize the overall access path length Pl, using the formula Pl=Sum( ), where Sum represents the sum of the distances between all adjacent probe access locations.
[0135] Assuming that a three-dimensional map F of the chip has been constructed, it is now necessary to plan the probe access sequence to ensure that the probes can reach each target location in an orderly manner. The following steps will be followed:
[0136] Calculate the shortest path between adjacent pins :
[0137] According to the position coordinates of each pin in the three-dimensional map F, calculate the shortest path between any two adjacent pins p and q For example, if the position coordinates of pin p are (Xp, Yp, Zp) = (2, 3, 4), and the position coordinates of pin q are (Xq, Yq, Zq) = (5, 7, 8), then the Euclidean distance (i.e., the shortest path) between them can be calculated using the following formula:
[0138] Spq=sqrt((Xq-Xp)^2+(Yq-Yp)^2+(Zq-Zp)^2);
[0139] Substituting the above coordinate values into the formula we get:
[0140] Spq=sqrt((5-2)^2+(7-3)^2+(8-4)^2)=sqrt(9+16+16)=sqrt(41)≈6.4;
[0141] Determine the probe movement direction :
[0142] According to the established connecting line segments , and combined with the shortest path , determines the direction the probe moves from one pin to another . The formula used here is:
[0143] =( - ) / ;
[0144] Assuming that in the above example, the probe is to be moved from pin p to pin q, the horizontal movement direction of the probe is:
[0145] =(5-2) / 6.4≈0.47;
[0146] Note that here It only represents the movement ratio in the horizontal direction; for practical applications, changes in the vertical direction and other dimensions also need to be considered.
[0147] Construct probe access order O:
[0148] Based on the generated complete three-dimensional map F and the probe moving direction , construct the probe visit order O. This process can be implemented by a variety of algorithms, such as the traveling salesman problem (TSP) algorithm, which aims to find a path so that the probe can reach each target point in the most efficient order while minimizing the total moving distance.
[0149] Adjust the probe starting position S0:
[0150] Using the constructed probe access order O, adjust the probe's starting position S0 to optimize the overall access path length Pl. The formula used here is:
[0151] Pl=Sum( );
[0152] Where Sum represents the sum of the distances between all adjacent probe access locations. For example, if there are three consecutive probe access locations p, q, and r, the shortest paths between them are =6.4 and =5.0, then the total access path length Pl is:
[0153] Pl=Sum( + )=6.4+5.0=11.4;
[0154] The probe starting position S0 should be selected to make P1 as small as possible, thereby improving the probe access efficiency.
[0155] This method can significantly improve the efficiency and accuracy of probe testing. Specific technical effects include:
[0156] Accurate path planning: by calculating the shortest path between adjacent pins , which ensures that the probe moves along the shortest and most direct route, reducing unnecessary movement distance.
[0157] Efficient moving direction: According to the probe moving direction , the probe can smoothly transition between different layers and avoid sharp turns or unstable movements, which helps protect the probe equipment and ensure test accuracy.
[0158] Optimize the access order: By constructing the probe access order O, the probe can visit each target point in the optimal order, which not only improves the work efficiency but also reduces the movement time of the probe in the non-working state.
[0159] Global path optimization: Adjusting the probe starting position S0 to optimize the overall access path length Pl can further shorten the time of the entire test process and improve production efficiency.
[0160] Enhanced reliability: Planning the probe access sequence in this way reduces potential errors caused by improper path selection, such as probe stuck or damaged, thereby enhancing the reliability of the entire test process.
[0161] Step 5: According to the set access sequence, the probe is driven to move to the specified coordinate point and a preset signal is applied, further comprising:
[0162] According to the coordinate point information in the probe access order O, calculate the displacement required for each movement stage , where n represents the position index in the access sequence;
[0163] According to the calculated displacement , adjust the current position of the probe To the next target coordinates , using the formula = + Complete location update;
[0164] The probe arrives at the new coordinates After that, activate the signal output module according to the preset conditions , ready to apply the specified signal strength to the target location;
[0165] In the signal output module In the activated state, the signal duration is controlled by adjusting the parameter K , apply the formula =G(K, ), G represents the functional relationship between time, intensity and control parameters.
[0166] Assume that the probe's movement path has been planned based on the three-dimensional map F and the probe access sequence O. Now, it is necessary to drive the probe to the specified coordinate point according to the set access sequence and apply the preset signal. The following steps will be followed:
[0167] Calculate displacement :
[0168] For each movement phase, the required displacement is calculated based on the coordinate point information in the probe access order O. For example, if the current probe position is =(3,4,5), and the next target coordinates =(6,8,9), then the displacement ΔPn is:
[0169] ΔPn= - =(6-3,8-4,9-5)=(3,4,4);
[0170] Update the probe position:
[0171] According to the calculated displacement , adjust the current position of the probe To the next target coordinates . Using the formula:
[0172] = + ;
[0173] Substitute the above values into the formula to get the new probe position :
[0174] =(3,4,5)+(3,4,4)=(6,8,9);
[0175] Activate signal output module :
[0176] The probe arrives at the new coordinates After that, activate the signal output module according to the preset conditions , ready to apply the specified signal strength To the target location. Assume that the signal strength required is =5V, the probe will set its output voltage to match this value.
[0177] Control signal duration :
[0178] In the signal output module In the activated state, the signal duration is controlled by adjusting the parameter K Here we use the function relationship G(K, ) to determine the duration, where K is a control parameter that affects the duration. Assume that when K=0.5, for =5V signal, duration is = 2 seconds, then:
[0179] =G(K, )=G(0.5,5)=2 seconds;
[0180] The specific form of the function G depends on the characteristics of the actual system and may be an empirical formula derived from experiments or a theoretical expression based on a physical model.
[0181] This method enables precise control of probe movement and signal application. Specific technical effects include:
[0182] Precise positioning: by accurately calculating the displacement of each moving stage , and update the probe position accordingly , which ensures that the probe can accurately reach the predetermined target coordinates every time.
[0183] Stable signal output: Activate the signal output module , and applies the specified signal strength Si according to the preset conditions, ensuring the consistency and reliability of the signal output during the test.
[0184] Flexible time control: Use parameter K to adjust the signal duration , the signal action time can be flexibly adjusted according to different test requirements, thus adapting to various test scenarios.
[0185] Step 6: After the signal is applied, the response parameters fed back from the chip are collected as a basis for evaluation; this further includes:
[0186] After the signal is applied, start the data acquisition module , in the preset time window Initial response value fed back by internal capture chip ;
[0187] According to the set signal duration , adjust the data acquisition module The time interval Δt ensures that the data at each time point are recorded. The formula is Δt= / N, N represents the number of acquisition cycles;
[0188] At each time interval Δt, the change in the response parameter is recorded , where i represents the i-th acquisition cycle, using the formula = , to track trends in responses over time;
[0189] After completing all scheduled acquisition cycles, integrate all response parameter changes , construct the response parameter sequence ={ , ,..., }, which serves as the basis for subsequent evaluation.
[0190] Assuming that the probe movement has been completed and the preset signal has been applied, it is now necessary to collect the response parameters fed back from the chip. The following steps will be followed:
[0191] Start the data acquisition module :
[0192] After the signal is applied, the data acquisition module is immediately started , in the preset time window Initial response value fed back by internal capture chip For example, assuming the preset time window If the value is 5 seconds, the initial response value will be recorded during this period.
[0193] Adjust the time interval Δt of the data acquisition module:
[0194] According to the set signal duration , adjust the data acquisition module The time interval Δt ensures that the data at each time point is recorded. The formula used here is:
[0195] Δt= / N;
[0196] Assume that in the above example, the preset time window If the acquisition period is 5 seconds and the number of acquisition cycles N is 10, the time interval Δt is calculated as follows:
[0197] Δt=5 seconds / 10=0.5 seconds;
[0198] Record the change in response parameters :
[0199] At each time interval Δt, the change in the response parameter is recorded , where i represents the i-th acquisition cycle. Use the formula:
[0200] = ;
[0201] Assume that in the first acquisition cycle (i=1), the recorded response value R1 is 2.0V, and in the second acquisition cycle (i=2), the recorded response value R2 is 2.3V. The change in the response parameter ΔR2 is:
[0202] ΔR2=R2-R1=2.3V-2.0V=0.3V;
[0203] Constructing a response parameter sequence :
[0204] After completing all scheduled acquisition cycles, integrate all response parameter changes , construct the response parameter sequence For example, if there are 10 acquisition cycles, then the response parameter sequence It can be expressed as:
[0205] ={ , ,..., };
[0206] This series not only shows the change in response at each time point, but also provides information on the trend of the response over time.
[0207] This method enables efficient and accurate acquisition of chip internal feedback responses. Specific technical benefits include:
[0208] Real-time data capture: by starting the data acquisition module , and in the preset time window Capture initial response value , which can ensure timely acquisition of the first-time feedback after the signal is applied, and enhance the timeliness of detection.
[0209] Uniform time sampling: according to the set signal duration , adjust the data acquisition module The time interval Δt ensures that the data at each time point can be recorded evenly, which improves the integrity and reliability of the data.
[0210] Accurate trend tracking: by recording the changes in response parameters , can accurately track the trend of response changes over time, help identify potential problems or abnormal situations, and provide a basis for more in-depth analysis.
[0211] Step 7: Combine the obtained response parameters and compare them with the ideal value range to identify abnormal conditions or impedance changes, further including:
[0212] According to the constructed response parameter sequence , calculate the response change rate of each acquisition cycle , using the formula = / Δt, is the change in response parameter, Δt is the time interval;
[0213] Compare to the preset ideal response rate range , determine the actual rate of change Is it out of bounds? If | - |>ε, then it is marked as a potential outlier , where ε represents the allowable error;
[0214] For identified anomalies , analyze the impedance changes within the corresponding period , apply the formula =V / , V and Represent the voltage and current of the applied signal, respectively, to evaluate the internal state of the chip;
[0215] Integrate all outliers and its corresponding impedance change , generate exception reports The report lists all responses that deviate from the ideal value range and the associated impedance changes.
[0216] Assume that the response parameter sequence of the chip internal feedback has been collected , and the sequence has been constructed. Now we need to combine this data, compare it to the ideal value range, and identify anomalies or impedance changes. We will follow the following steps:
[0217] Calculate the response rate of change :
[0218] According to the constructed response parameter sequence , calculate the response change rate of each acquisition cycle . Using the formula:
[0219] = / Δt;
[0220] in is the response parameter change, and Δt is the time interval. For example, if in the i-th acquisition cycle, the response parameter change is 0.3V, and the time interval Δt is 0.5 seconds, then the response change rate The calculation is as follows:
[0221] =0.3V / 0.5s=0.6V / s;
[0222] Comparison of ideal response rate range :
[0223] Compare to the preset ideal response rate range , determine the actual rate of change Is it out of limit? Assuming the ideal response change rate range is [0.4V / s, 0.8V / s] and the allowable error ε is 0.1V / s, the judgment condition is:
[0224] | - |>ε;
[0225] If | -0.6V / s|>0.1V / s (assuming the ideal value is the middle value of 0.6V / s), it is marked as a potential abnormal point For example, if is 0.9V / s, then:
[0226] |0.9V / s-0.6V / s|=0.3V / s>0.1V / s;
[0227] Therefore, the point is marked as a potential outlier .
[0228] Analyzing impedance changes :
[0229] For identified anomalies , analyze the impedance changes within the corresponding period . Apply the formula:
[0230] =V / ;
[0231] Where V and Represent the voltage and current of the applied signal respectively. Assume that at the abnormal point At the point where the applied voltage V is 5V, the measured current is 0.5A, the impedance changes The calculation is as follows:
[0232] =5V / 0.5A=10Ω;
[0233] Generate exception report Ar:
[0234] Integrate all outliers and its corresponding impedance change , generate exception reports The report lists all responses that deviate from the ideal value range and the associated impedance changes. For example, if there are two abnormal points P1 and P2, and their corresponding impedance changes are Zc1=10Ω and Zc2=12Ω respectively, then the abnormal report It can be expressed as:
[0235] ={
[0236] "Abnormal point": [P1, P2],
[0237] "Impedance change": [10Ω, 12Ω]
[0238] };
[0239] In summary, this method of identifying abnormal conditions or impedance changes not only ensures the accuracy of detection results, but also provides rich information support for subsequent fault analysis and performance optimization, greatly promoting the quality control and technological development of electronic products.
[0240] Step 8: Record any deviations found and adjust subsequent probe operation strategies to optimize testing; further including:
[0241] Based on the generated exception report , all responses that deviate from the ideal range and the associated impedance changes Recorded in the database middle;
[0242] Analyze database Deviation records in , calculate each abnormal point Weight , using the formula =H( , ), H represents the comprehensive evaluation function based on impedance change and response change rate;
[0243] Based on the weight , adjust the probe access order O, re-plan the detection path P' with higher priority to ensure that the key areas are inspected more carefully, and apply the formula P'=sort(O, ), where sort represents the operation of sorting by weight;
[0244] Under the guidance of the updated detection path P', set the new probe movement speed And the signal strength Si_new, through the formula =M( )and =N( ), M and N represent the functions that adjust the speed and strength according to the weights, respectively.
[0245] Assume that an exception report has been generated , and records all responses that deviate from the ideal value range and the associated impedance changes Any deviations found need to be documented and subsequent probe operation strategies adjusted to optimize the test. This will be done in the following steps:
[0246] Record abnormal points to the database :
[0247] Based on the generated exception report , all responses that deviate from the ideal range and the associated impedance changes Recorded in the database For example, suppose the exception report There are two abnormal points P1 and P2, and their corresponding impedance changes are Zc1=10Ω and Zc2=12Ω respectively. The following information is recorded:
[0248] ={
[0249] "Abnormal point": [P1, P2],
[0250] "Impedance change":[10Ω,12Ω],
[0251] "Response rate": [0.9V / s, 1.1V / s]
[0252] };
[0253] Calculate outlier weights :
[0254] Analyze database Deviation records in , calculate each abnormal point Weight . Using the formula:
[0255] =H( , );
[0256] Where H represents a comprehensive evaluation function based on impedance change and response change rate. Assume that the specific form of H function is:
[0257] =H( , )=0.6* +0.4* ;
[0258] For abnormal point P1 (Zc1=10Ω, =0.9V / s) and P2 (Zc2=12Ω, =1.1V / s), we can calculate:
[0259] Wp1=0.6*10+0.4*0.9=6+0.36=6.36;
[0260] Wp2=0.6*12+0.4*1.1=7.2+0.44=7.64;
[0261] Adjust the probe access order O:
[0262] Based on the weight , adjust the probe access order O, re-plan the detection path P' with higher priority, and ensure that the key areas are inspected more carefully. Application formula:
[0263] P'=sort(O, );
[0264] Assume that the original probe access order O is [P1, P2, P3], and the new path P' after sorting according to the weights calculated above is [P2, P1, P3].
[0265] Set a new probe movement speed and signal strength :
[0266] Under the guidance of the updated detection path P', set the new probe movement speed and signal strength . Through the formula:
[0267] =M( );
[0268] =N( );
[0269] Assume that the specific forms of M and N functions are:
[0270] M( )=5+0.5* ;
[0271] N( )=5+0.2* ;
[0272] For the outlier points P1 (Wp1=6.36) and P2 (Wp2=7.64), the new probe movement speed and signal strength are calculated:
[0273] P1=5+0.5*6.36=8.18 (unit: mm / s);
[0274] P1=5+0.2*6.36=6.27 (unit: V);
[0275] P2=5+0.5*7.64=8.82 (unit: mm / s);
[0276] P2=5+0.2*7.64=6.53 (unit: V);
[0277] In summary, this method of adjusting the probe operation strategy not only ensures the efficiency and pertinence of the detection process, but also provides a solid foundation for continuous optimization of the test process, greatly promoting the quality control and technological development of electronic products.
[0278] Step 9: After completing all the scheduled probe actions, all the test data are summarized and a final report is output to indicate the chip path status, further including:
[0279] Collect all the test results after the probe operation, including the response change rate , impedance change and abnormal points data into a comprehensive dataset ;
[0280] According to the adjusted detection path P' and the set new probe movement speed and signal strength , evaluate the effect of each detection point , using the formula =O( , , ), O represents the effect evaluation function to quantify the test quality of each point;
[0281] Based on effect evaluation , combined with the database The historical deviation records in the chip are used to determine the overall health index HI of the chip channel, and the formula HI=P( , ), P is the function for calculating the health index, is the outlier weight;
[0282] All information is summarized and a final report Rf is generated. The report not only lists the status of all detection points, but also includes the overall health index HI and improvement suggestions for the problems found.
[0283] Assuming that all scheduled probe actions have been completed and relevant test results have been collected, it is now necessary to summarize all the test data and output a final report indicating the chip path status. The following steps will be followed:
[0284] Integrating comprehensive datasets :
[0285] Collect all the test results after the probe operation, including the response change rate , impedance change and abnormal points data into a comprehensive dataset For example, suppose there are three detection points P1, P2, and P3, and their corresponding response change rates are The impedance changes are 0.9V / s, 1.1V / s, and 0.7V / s respectively. 10Ω, 12Ω, and 8Ω, as well as abnormal points For P1 and P2, the comprehensive data set It can be expressed as:
[0286] ={
[0287] "Detection point": [P1, P2, P3],
[0288] "Response change rate": [0.9V / s, 1.1V / s, 0.7V / s],
[0289] "Impedance change":[10Ω,12Ω,8Ω],
[0290] "Outlier": [P1, P2]
[0291] };
[0292] Evaluate the effectiveness of each test point :
[0293] According to the adjusted detection path P' and the set new probe movement speed and signal strength , evaluate the effect of each detection point . Using the formula:
[0294] =O( , , );
[0295] Where O represents the effect evaluation function. Assume that the specific form of O function is:
[0296] O( , , )=0.4*Vnew+0.3*Si_new+0.3*Rri;
[0297] For the detection point P1 ( P1=8.18mm / s, P1=6.27V, =0.9V / s), we can calculate:
[0298] P1=0.4*8.18+0.3*6.27+0.3*0.9≈5.71;
[0299] Similarly, for detection point P2:
[0300] ( P2=8.82mm / s, P2=6.53V, =1.1V / s), we can calculate:
[0301] P2=0.4*8.82+0.3*6.53+0.3*1.1≈6.12;
[0302] Determine the overall health index HI:
[0303] Based on effect evaluation , combined with the database The historical deviation records in the chip are used to determine the overall health index HI of the chip channel. The application formula is:
[0304] HI=P( , );
[0305] Where P is the function for calculating the health index, is the outlier weight. Assume that the specific form of the P function is:
[0306] P( , )=0.7* +0.3* ;
[0307] For the detection point P1 ( P1=5.71,Wp1=6.36) and P2 ( P2=6.12,Wp2=7.64), we get:
[0308] HIP1=0.7*5.71+0.3*6.36≈5.93;
[0309] HIP2=0.7*6.12+0.3*7.64≈6.46;
[0310] Generate final report Rf:
[0311] All information is summarized and a final report Rf is generated. The report not only lists the status of all detection points, but also includes the overall health index HI and improvement suggestions for the problems found. For example, the final report Rf can be expressed as:
[0312] Rf={
[0313] "Checkpoint status":[
[0314] {"Point":P1,"Effect":5.71,"Health Index":5.93},
[0315] {"Point":P2,"Effect":6.12,"Health Index":6.46},
[0316] {"Point":P3,"Effect":N / A,"Health Index":N / A}
[0317] ],
[0318] "Overall Health Index": (5.93+6.46) / 2≈6.20,
[0319] Improvement Suggestions: For abnormal points P1 and P2, it is recommended to further investigate the cause of the impedance change and optimize the design of the relevant areas to improve stability.
[0320] };
[0321] This method enables a comprehensive assessment of the chip path status and provides a detailed final report. Specific technical effects include:
[0322] Comprehensive data integration: By combining all test results into a comprehensive data set , ensuring that the data of each test is completely saved to facilitate subsequent analysis and improvement.
[0323] Accurate effect evaluation: Using the effect evaluation function O based on probe movement speed, signal strength and response change rate, the test quality of each detection point is quantified, providing a scientific evaluation basis.
[0324] Dynamic health index: evaluation based on results Based on the historical deviation records, the overall health index HI of the chip path is determined, which can intuitively reflect the overall performance status of the chip and facilitate quick decision-making.
[0325] Systematic report generation: The final report Rf not only lists the status of all detection points in detail, but also provides the overall health index HI and improvement suggestions, providing engineers with clear and intuitive information support.
[0326] Improved diagnostic accuracy: Summarizing test data and generating reports in this way reduces the possibility of misdiagnosis, improves the accuracy and reliability of diagnosis, and thus improves product quality.
[0327] In summary, this method of aggregating test data and generating a final report not only ensures the accuracy of the evaluation results, but also provides rich information support for subsequent fault diagnosis and performance optimization, greatly promoting the quality control and technological development of electronic products.
[0328] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A method for detecting a path of an integrated circuit package chip, characterized in that: The following steps are involved: The chip to be tested is placed on the testing platform and positioning information is provided, specifically including: using an optical system to perform initial imaging of the chip surface to obtain boundary contour information; According to the obtained boundary contour, calculate the center point coordinates ,in , and Represents the position of the chip's geometric center in the plane rectangular coordinate system; To determine the center point As a reference, establish a local coordinate system and measure the four corners of the chip to The distance L1 to L4 is calculated by the formula , where n = 1 to 4 represents the four corners; Use the measured data to adjust the angle and height of the detection platform to ensure that the chip fits perfectly with the contact surface and eliminate any gaps that affect signal transmission; Based on the positioning information, the multi-dimensional scanning system is started to perform non-contact scanning around the chip surface, including: setting the initial scanning starting point based on the obtained chip position data , located at the edge of the chip; To determine the initial scan starting point As the starting point, the scanning probe is moved step by step along the preset path Q, where the path Q consists of a series of discrete points that satisfy ; At each point on the defined path Q At , record the reflection intensity J value, and use the formula J=A*exp(-B*d), where A and B are coefficients related to material properties and d represents the scanning depth, to quantify the reflection difference between different layers; Complete all points After collecting data, compare the reflection intensity changes ΔJ between adjacent points and calculate Δ , in order to determine whether there are potential defects or abnormalities; Based on the acquired scanning data, a three-dimensional structure mapping diagram is constructed to reflect the chip pin distribution and connection path. Specifically, the obtained reflection intensity J value is used to layer the chip surface and determine the boundary of each layer. , where m represents the number of layers; For each layer , according to the point on the path Q The data recorded at each layer are used to calculate the thickness of each layer. , using the formula , Z represents the position coordinate along the vertical direction; Based on the thickness of each layer and reflection intensity J, draw the connecting line segments between layers , where i is the pin number, ensuring that each pin position accurately corresponds to a specific coordinate in three-dimensional space; Using the established connecting segments ,Integrate all pin distribution and connection path information to generate a complete three-dimensional mapping diagram F; Using the formed mapping graph, the probe access sequence is planned so that the probe can reach each target location in an orderly manner; According to the set access sequence, the probe is driven to move to the specified coordinate point and a preset signal is applied. After the signal is applied, the response parameters fed back from the chip are collected as the basis for evaluation; Combine the obtained response parameters, compare them with the ideal value range, identify abnormal conditions or impedance changes, record any deviations found, and adjust subsequent probe operation strategies to optimize the test; After completing all the scheduled probe actions, all the test data are summarized and a final report is output to indicate the chip path status.
2. The method for detecting a path in an integrated circuit package chip according to claim 1, wherein: The method utilizes the formed mapping graph to plan the probe access sequence so that the probe can reach each target location in an orderly manner, including: Calculate the shortest path between adjacent pins based on the position coordinates of each pin in the three-dimensional mapping diagram F , where p and q represent different pin numbers respectively; According to the established connecting line segments , combined with the shortest path , determine the probe movement direction , the formula is , X represents the horizontal coordinate of the pin on the map; Based on the generated complete three-dimensional map F and the probe moving direction , construct the probe access order O to ensure that the probe reaches each target point in the most efficient order; Using the constructed probe access order O, adjust the probe starting position S0 to optimize the overall access path length Pl, using the formula , where Sum represents the sum of the distances between all adjacent probe access locations.
3. The method for detecting a path in an integrated circuit package chip according to claim 2, wherein: The step of driving the probe to move to a designated coordinate point and applying a preset signal according to a set access sequence includes: According to the coordinate point information in the probe access order O, calculate the displacement required for each movement stage , where n represents the position index in the access sequence; According to the calculated displacement , adjust the current position of the probe To the next target coordinates , using the formula Complete location update; The probe arrives at the new coordinates After that, activate the signal output module according to the preset conditions , ready to apply the specified signal strength to the target location; In the signal output module In the activated state, the signal duration is controlled by adjusting the parameter K , apply the formula , G represents the functional relationship between time, intensity and control parameters.
4. The method for detecting a path of an integrated circuit package chip according to claim 3, wherein: After the signal is applied, the response parameters fed back from the chip are collected, including: After the signal is applied, start the data acquisition module , in the preset time window Initial response value fed back by internal capture chip ; According to the set signal duration , adjust the data acquisition module The time interval Δt ensures that the data at each time point are recorded. The formula is , N represents the number of acquisition cycles; At each time interval Δt, the change in the response parameter is recorded , where i represents the i-th acquisition cycle, using the formula , to track trends in responses over time; After completing all scheduled acquisition cycles, integrate all response parameter changes , construct the response parameter sequence ,Right now , which will serve as the basis for subsequent evaluation.
5. The method for detecting a path of an integrated circuit package chip according to claim 4, wherein: The combined response parameters are compared with the ideal value range to identify abnormal conditions or impedance changes, including: According to the constructed response parameter sequence , calculate the response change rate of each acquisition cycle , using the formula = / Δt, is the change in response parameter, Δt is the time interval; Compare to the preset ideal response rate range , determine the actual rate of change Is it out of bounds? If , it is marked as a potential outlier , where ε represents the allowable error; For identified anomalies , analyze the impedance changes within the corresponding period , apply the formula , V and Represent the voltage and current of the applied signal, respectively, to evaluate the internal state of the chip; Integrate all outliers and its corresponding impedance change , generate exception reports The report lists all responses that deviate from the ideal value range and the associated impedance changes.
6. The method for detecting a path of an integrated circuit package chip according to claim 5, wherein: Any deviations found are recorded and subsequent probe operation strategies are adjusted to optimize the test, including: Based on the generated exception report , all responses that deviate from the ideal range and the associated impedance changes Recorded in the database middle; Analyze database Deviation records in , calculate each abnormal point Weight , using the formula , H represents the comprehensive evaluation function based on impedance change and response change rate; Based on the weight , adjust the probe access order O, re-plan the detection path P' with higher priority to ensure that the key areas are inspected more carefully, and apply the formula , where sort represents the operation of sorting by weight; Under the guidance of the updated detection path P', set the new probe movement speed and signal strength , through the public and , M and N represent the functions that adjust the speed and intensity according to the weight, respectively.
7. The method for detecting a path of an integrated circuit package chip according to claim 6, wherein: After completing all the scheduled probe actions, all the test data are summarized and a final report is output to indicate the chip path status, including: Collect all the test results after the probe operation, including the response change rate , impedance change and abnormal points data into a comprehensive dataset ; According to the adjusted detection path P' and the set new probe movement speed and signal strength , evaluate the effect of each detection point , using the formula , O represents the effect evaluation function to quantify the test quality at each point; Based on effect evaluation , combined with the database The historical deviation records in the chip are used to determine the overall health index HI of the chip pathway. The formula is applied. , P is the function for calculating the health index, is the outlier weight; All information is summarized and a final report Rf is generated. The report not only lists the status of all detection points, but also includes the overall health index HI and improvement suggestions for the problems found.
Citation Information
Patent Citations
Chip testing method and chip testing equipment
CN118258448A