Power consumption adjusting method and device and PCIe system

Abstract

The invention provides a power consumption adjusting method and device and a PCIe system. The method comprises the steps that the data flow and the power consumption state of a target port of PCIe equipment are monitored; determining an activeness coefficient of the target port based on the data traffic and the power consumption state; and based on the activeness coefficient and the power consumption state, adjusting the delay time of the target port in different power consumption states, and / or adjusting the number of opened physical channels of the target port. According to the technical scheme, the low-power-consumption active coefficient is reversely deduced by using the result of the power consumption, the finally obtained active coefficient is positively correlated with the power consumption, and the power consumption state of the current link can be most accurately and intuitively counted, so that a low-power-consumption strategy in the next time slice is specified.

Description

Technical Field

[0001] The present application belongs to the field of chip technology, and in particular relates to a power consumption adjustment method, device and PCIe system. Background Art

[0002] As modern computer systems have increasing requirements for both performance and power consumption, PCIe, as a high-bandwidth, low-latency interface standard, is widely used in various computer systems. The power consumption of chips not only affects their performance, but also has a serious impact on their service life. Especially in high-performance computing and data-intensive applications, power consumption control is even more critical. Summary of the invention

[0003] The purpose of the present application is to provide a power consumption adjustment method, device and PCIe system, aiming to solve the technical problem that the existing technology has a relatively single adjustment range for the power consumption of the PCIe system and cannot optimize the system performance and energy efficiency by dynamically adjusting the power consumption of the PCIe system.

[0004] According to a first aspect of the present application, a power consumption adjustment method is provided, comprising:

[0005] Monitor the data flow and power consumption status of the target port of the PCIe device;

[0006] Determine the activity coefficient of the target port based on the data flow and power consumption status;

[0007] Based on the activity coefficient and the power consumption state, the delay time of the target port in different power consumption states is adjusted, and / or the number of enabled physical channels of the target port is adjusted.

[0008] In an optional implementation manner, determining the activity coefficient of the target port based on the data traffic and the power consumption state includes:

[0009] Divide the preset time period into multiple time slices;

[0010] Obtaining a low power consumption coefficient in a power consumption state corresponding to the time slice: wherein the low power consumption coefficient is determined in advance based on actual power consumption of the target port in different power consumption states;

[0011] The activity coefficient of the target port within the preset time period is determined based on the data flow corresponding to the time slice and the low power consumption coefficient.

[0012] In an optional implementation, based on the activity coefficient and the power consumption state, adjusting the delay time of the target port in different power consumption states and / or adjusting the number of enabled physical channels of the target port includes:

[0013] Determine a threshold interval in which the activity coefficient is located; wherein the threshold interval includes a low threshold interval, a high threshold interval, and an intermediate threshold interval between the low threshold interval and the high threshold interval;

[0014] If the activity coefficient is within the middle threshold interval, adjusting the delay time of the target port in a low power consumption state;

[0015] If the activity coefficient is within the low threshold range, reducing the transmission rate of the target port and / or reducing the number of enabled physical channels of the target port;

[0016] If the activity coefficient is in the high threshold interval, the transmission rate of the target port is restored to the original rate, and / or the number of opened physical channels of the target port is restored to the original number.

[0017] In an optional implementation manner, adjusting the delay time of the target port in a low power consumption state includes:

[0018] The delay time in the low power consumption state is adjusted to the set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficients of different gears is predetermined.

[0019] In an optional implementation, the low power consumption state includes a first low power consumption state and a second low power consumption state; the power consumption of the first low power consumption state is lower than the power consumption of the second low power consumption state; and adjusting the delay time in the low power consumption state to the set time corresponding to the activity coefficient includes:

[0020] If the target port has entered the first low power consumption state, adjusting the delay time of the target port in the first low power consumption state to the set time corresponding to the first low power consumption state at the current gear of the activity coefficient;

[0021] If the target port has not entered the first low power state, the delay time of the target port in the second low power state is adjusted to the set time corresponding to the second low power state at the current gear of the activity coefficient.

[0022] According to a second aspect of the present application, a power consumption adjustment device is provided, including:

[0023] A flow and power consumption detection module is configured to monitor the data flow and power consumption status of a target port of a PCIe device;

[0024] An activity coefficient determination module, configured to determine the activity coefficient of the target port based on the data flow and power consumption status;

[0025] The adjustment module is configured to adjust the delay time of the target port in different power consumption states and / or adjust the number of enabled physical channels of the target port based on the activity coefficient and the power consumption state.

[0026] In an optional implementation, the activity coefficient determination module includes:

[0027] A division submodule is configured to divide a preset time period into a plurality of time slices;

[0028] An acquisition submodule is configured to acquire a low power consumption coefficient in a power consumption state corresponding to the time slice; wherein the low power consumption coefficient is determined in advance based on actual power consumption of the target port in different power consumption states;

[0029] The first determination submodule is configured to determine the activity coefficient of the target port within the preset time period based on the data flow corresponding to the time slice and the low power consumption coefficient.

[0030] In an optional implementation, the adjustment module includes:

[0031] A second determination submodule is configured to determine a threshold interval in which the activity coefficient is located; wherein the threshold interval includes a low threshold interval, a high threshold interval, and an intermediate threshold interval between the low threshold interval and the high threshold interval;

[0032] a first adjustment submodule, configured to adjust the delay time of the target port in a low power consumption state if the activity coefficient is in the middle threshold interval;

[0033] A second adjustment submodule is configured to reduce the transmission rate of the target port and / or reduce the number of enabled physical channels of the target port if the activity coefficient is in the low threshold interval;

[0034] The third adjustment submodule is configured to restore the transmission rate of the target port to the original rate and / or restore the number of enabled physical channels of the target port to the original number if the activity coefficient is in the high threshold range.

[0035] In an optional implementation, the first adjustment submodule includes:

[0036] The fourth adjustment submodule is configured to adjust the delay time in the low power consumption state to the set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficients of different gears is predetermined.

[0037] In an optional implementation, the low power consumption state includes a first low power consumption state and a second low power consumption state; the power consumption of the first low power consumption state is lower than the power consumption of the second low power consumption state; the fourth adjustment submodule includes:

[0038] a fifth adjustment submodule, configured to adjust the delay time of the target port in the first low power state to a set time corresponding to the first low power state at the current gear of the activity coefficient if the target port has entered the first low power state;

[0039] The sixth adjustment submodule is configured to adjust the delay time of the target port in the second low power state to the set time corresponding to the second low power state at the current gear of the activity coefficient if the target port has not entered the first low power state.

[0040] According to a third aspect of the present application, a PCIe system is provided, comprising: a power consumption adjustment device as described in the second aspect.

[0041] Compared with the related art, the technical solution of this application has the following advantages:

[0042] The embodiment of the present application directly uses the power consumption results to reversely infer the low power consumption activity coefficient. The final activity coefficient is positively correlated with the power consumption, which can most accurately and intuitively count the power consumption status of the current link, thereby specifying the low power consumption strategy in the next time slice.

[0043] The present application proposes a method for dynamically controlling the power consumption of each port by monitoring the data flow transmitted by each independent port per unit time and the time in the low power consumption state per unit time, thereby solving the problem that the data transmission states of each port in the PCIe system power consumption are different, but when entering the low power consumption time initialization, they are uniformly set to fixed values, and the link bandwidth and link rate are initially set to fixed values, and a method for saving power consumption by adjusting individually according to the state of each port is not considered.

[0044] This application proposes a set of methods for dynamically adjusting the power consumption of a port by measuring the activity of a single port and setting corresponding high and low thresholds, including slowing down and reducing the lane of inactive ports, and dynamically adjusting the time control for entering a low power consumption state, thereby dynamically adjusting the power consumption of a PCIe system without affecting normal data service transmission.

[0045] This application proposes a method for configurable time gradient in PCIe system power consumption, which can dynamically configure time units according to different application scenarios, thereby more effectively optimizing system power consumption for different implementation scenarios to adapt to diverse business scenario requirements.

[0046] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by practicing the present application. The purpose and other advantages of the present application can be realized and obtained through the structures and processes indicated in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. It is obvious that the drawings described below are certain embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0048] Figure 1 It is a structural block diagram of a PCIe system according to the related art.

[0049] Figure 2 It is a flowchart of a power consumption adjustment method according to an exemplary embodiment of the present application.

[0050] Figure 3 is a structural block diagram of a PCIe system according to an exemplary embodiment of the present application.

[0051] Figure 4 It is a schematic diagram of the effects of different processing methods for different activity coefficients of the target port according to an exemplary embodiment of the present application.

[0052] Figure 5 It is a schematic diagram of an implementation flow of a power consumption adjustment method according to an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0054] The PCIe (Peripheral Component Interconnect Express) system has built-in multiple power management states ASPM (Active State Power Management) to optimize the power consumption performance of the device under different workloads. ASPM mainly reduces overall power consumption by automatically adjusting the power consumption state of the link when the link is idle. The power consumption management method of the related technology mainly relies on a fixed time threshold to determine when to switch the link to a low-power state, such as L0s or L1 state. Specifically, when the link detects that it has been idle for a certain period of time, the system will automatically switch it to LOs or L1 state, thereby reducing power consumption.

[0055] L0s state: L0s state is one of the low power states of the PCIe link, which allows the link to enter low power mode for a short period of time to reduce power consumption. In this state, some functions of the link will be disabled, but the system can quickly recover to full-speed transmission mode.

[0056] L1 state: L1 state is a deeper low power state that consumes less power than LOs state, but takes longer to recover to normal operation. In L1 state, more functions of the link are turned off to achieve greater power consumption reduction.

[0057] PCIe link bandwidth refers to the amount of data that a PCIe port can transmit per unit time, which depends on the number of channels in the link and the transmission rate of each channel. A PCIe link consists of one or more channels, each of which provides a certain data transmission rate in a single direction. Different versions of the PCIe standard define different per-channel bandwidths, so that the total bandwidth continues to increase with the upgrade of the PCIe version.

[0058] The PCIe link rate is a core indicator for measuring data transmission performance. It and the link width (that is, the number of channels) together determine the total bandwidth of the PCIe interface. As the PCIe standard continues to evolve, the link rate is also continuously increasing to meet the growing performance requirements. From PCIe 1.0 to PCIe 6.0, each version upgrade has significantly enhanced data transmission capabilities and supported higher-bandwidth devices and applications.

[0059] Figure 1It is a structural block diagram of a PCIe system according to the related technology. The PCIe system includes 8 ports from Port_0 to Port_7. Each group of ports works independently without affecting each other. In this system, each port has different output transmission states, and the data flow transmitted by each port is also different. The initialization time for the related technology's multiple ports to enter the low-power state is a fixed value, and the link rate width is also a fixed value.

[0060] Although the ASPM method of the related art effectively reduces power consumption, there are still some shortcomings. The main problem is that these methods are usually based on fixed time thresholds and lack adaptive adjustment of each port and link status. The same problem exists for the rate and bandwidth of the link. They are all configured as a fixed value at the beginning of the link transmission, and the rate and width of the link will not change with the power consumption state of the link. This fixed strategy will lead to inefficient power management, thereby increasing additional power consumption and affecting the energy consumption and reliability of the system.

[0061] As mentioned above, the related technology allows the device to request the link channel to enter a low power state (L0s, L1) after the link has been idle for a period of time, using a static idle time. When the PCIe link reaches the LOs idle time, the link initiates entering the L0s low power state, and when the link reaches the L1 idle time, the link initiates entering the L1 low power state. When the device needs to send data, it initiates a request to exit from the LOs or L1 state, thereby achieving the purpose of reducing power consumption. Under this method, under the fixed time threshold strategy, if the link enters the low power state for too short a time, it may cause the system to switch states frequently, resulting in unnecessary waste of resources and performance degradation. If the link enters the low power state for too long, an overly conservative power management strategy may cause the link to consume more power, thereby failing to fully utilize the power optimization effect brought by the low power state.

[0062] There is a related technology that predicts the historical data of the link in PCIe ASPM and adjusts the time threshold to adjust the time of entering and exiting the low power state. This solution adjusts the time threshold and optimizes the fixed time strategy of ASPM. However, this related technology still has the following two problems:

[0063] (1) The data type extracted by the prediction model in this method is single: the data types extracted include parameters such as the number of data packets and the average time interval between adjacent data packets. These parameters can only simply quantitatively analyze the link data, while the throughput that shows how much data is transmitted in the link is not counted. In addition, the time when the link is in different low-power states in different time slices is strongly correlated with the actual power consumption of the link. These two types of data can more truly reflect the actual transmission situation of the link and the model estimation of the current link power consumption;

[0064] (2) This method has a single adjustment range for the power consumption of the entire PCIe system: Since PCIe is a systematic solution, it is often divided into multiple ports to work during link transmission applications. The rate and width of each port have a great impact on the power consumption of the system. Simply adjusting the time for each port to enter the low-power LOs / L1 state has limited effect on the power consumption optimization of the system. It is necessary to combine the port width of the entire system and the rate and time management of each port entering the low-power state to dynamically control the low power consumption of the PCIe system from the system level, thereby achieving the effect of significantly reducing the system low power consumption management.

[0065] Based on the above analysis, this application exemplarily proposes a power consumption adjustment method, device and PCIe system. Different from the global power consumption management of related technologies, this application emphasizes independent power consumption management for each PCIe port (Port). Each Port can be personalized according to its actual data flow and power consumption status. This independent management method can more accurately control the power consumption of each Port, thereby improving the overall energy efficiency.

[0066] See also Figure 2 As shown, the present application exemplarily proposes a power consumption adjustment method, comprising the following steps:

[0067] In step S201, the data flow and power consumption status of the target port of the PCIe device are monitored;

[0068] In step S202, the activity coefficient of the target port is determined based on the data flow and power consumption status;

[0069] In step S203, based on the activity coefficient and the power consumption state, the delay time of the target port in different power consumption states is adjusted, and / or the number of enabled physical channels of the target port is adjusted.

[0070] Exemplarily, the target port can be any port in the PCIe system. The data flow of the target port can be understood as the throughput of the target port within a preset time period. The power consumption state may include a low power consumption state, a high power consumption state, etc. The present application may be based on the power consumption state mode in the prior art. For example, the power consumption states in the prior art include LOs, ASPM L1.0 / L1.1 / L1.2, PCI-PM L1, L2 and L3, a total of 7 types, and ASPM L1.0 and PCI-PM L1 are only different in the way of entering L1, but the optimization of power consumption after entering L1 is the same, so the present application can combine them, and the final statistics are: L0s, L1, L1.1, L1.2, L2, L3, a total of 6 power consumption states.

[0071] Exemplarily, the present application can sample the low-power state configuration of ASPM, that is, dynamically adjust the entry time into the ASPM low-power state according to the activity of each Port. For example, when the Port is idle for a period of time, the delay time for entering the ASPM low-power mode can be configured to be low, so that the low-power state can be entered faster; when the Port needs to process a large amount of data, it is restored to a normal working state, and the delay time for entering the ASPM low-power mode is configured to be high, so that more time for data transmission can be allowed.

[0072] For example, the activity coefficient is calculated for a single port, and the activity coefficient Actice_value is a key indicator to measure the data processing capability and power consumption requirement of the port. The activity coefficient Actice_value of a single port can be understood as the data flow of the port in a unit time and the proportion of time the port is in a power consumption state. These two factors together determine the power consumption management strategy of the port.

[0073] Exemplarily, the present application addresses the problems existing in related technologies, such as the problem of single data type. The extracted data types include the throughput of the current link transmission, that is, the data flow, the number of times the link enters and exits low power consumption within a period of time, and the time the current time period is in the low power consumption state. These data can better reflect the actual transmission situation of the link, thereby dynamically adjusting the time to enter the low power consumption state according to the activity of the current link.

[0074] For example, regarding the problem of a single adjustment range for the power consumption of the entire PCIe system, the present application combines the bandwidth of the ports of the entire system and the rate of each port with the time management for entering a low power consumption state according to the activity coefficient Actice_value of the link, and adds a function for dynamically adjusting the bandwidth and rate of the link according to the current activity of the link.

[0075] For example, the present application sets different weights according to the data flow transmitted by each Port in a unit time slice and the different low power consumption states in the unit time slice, and calculates the active coefficient Active of each Port. _ value, set the dynamic range according to the activity coefficient, and dynamically adjust the link in the following aspects while ensuring the integrity of data service transmission:

[0076] Speed ​​​​up and down configuration: According to the active coefficient Active - The value of the PCIe link is changed to dynamically adjust the transmission rate of the PCIe link. For example, when the data flow is low, the link rate can be reduced to reduce power consumption; when the data flow increases, the link rate is increased to meet performance requirements.

[0077] Lane configuration up and down: Optimize power consumption by adjusting the number of Lanes (physical channels) of the link. For example, in the case of low activity coefficient, the number of open Lanes can be reduced to reduce power consumption; in the case of high activity coefficient Active_value, the number of open Lanes can be increased to improve bandwidth and performance. The number of open Lanes (that is, the number of open physical channels) can be understood as the number of physical channels currently configured for the link that can transmit signals. The number of physical channels configured for the link that can transmit signals can be dynamically adjusted based on the power consumption status and the activity coefficient.

[0078] When the activity of the link is restored after a period of time, the link status is restored to the link, thereby achieving a method for adaptively adjusting the dynamic power consumption of the system.

[0079] In some optional implementations, step S202, i.e., the step of determining the activity coefficient of the target port based on the data traffic and the power consumption state, includes:

[0080] Divide the preset time period into multiple time slices;

[0081] Obtaining a low power consumption coefficient in a power consumption state corresponding to the time slice; wherein the low power consumption coefficient is determined in advance based on actual power consumption of the target port in different power consumption states;

[0082] The activity coefficient of the target port within the preset time period is determined based on the data flow corresponding to the time slice and the low power consumption coefficient.

[0083] For example, Figure 3 is a block diagram of a PCIe system according to the present application. Figure 1On the basis of the power consumption adjustment device, a power consumption adjustment device is added to monitor the data flow transmitted by each independent port in a unit time, the time in the low power consumption state in a unit time, and the number of times of entering and exiting the low power consumption state.

[0084] The data flow throughput transmitted per unit time of a single port is T. The larger the T value is, the more active the port is. In addition to counting the data flow throughput of a single port, the time when a single port is in a low power state is also counted, that is, the time of 6 low power states, namely, LOs, L1, L1.1, L1.2, L2, and L3. According to the power consumption statistics of the simulation data of the power consumption of low power states in different modes at a rate of 2Gbps, the low power consumption coefficient k in various low power states is determined according to the percentage of the real-time power consumption of each low power state in the L0 state, as shown in Table 1 below:

[0085] Table 1

[0086]

[0087]

[0088] Among them, the power consumption in Table 1 is the power consumption of each link, and the low power consumption coefficient k is the coefficient obtained by normalizing the power consumption of each link in the low power consumption state. For example, the coefficient corresponding to the 950 power consumption in the LO state is 1, and the coefficients corresponding to the power consumption in other power consumption states are all less than 1.

[0089] According to the low power consumption state of the above links in a unit time, the time can be divided into 1 to n equal time slices. The final determination of the activity coefficient of a single link is Actice v The alue is:

[0090]

[0091] In the above formula, n represents the number of time slices into which the preset time period is divided. If the preset time period is 1 hour and is divided into 10 minutes, n is 6; k represents the low power consumption coefficient under different low power consumption states. The specific correspondence between the low power consumption state and the low power consumption coefficient is shown in Table 1. The data comes from the actual monitoring results in the PCIe system; T represents the amount of data transmitted by each Port in the current time slice, which is also the result of actual monitoring; According to the above formula, the active coefficient Active_value of each Port can be obtained, so that subsequent systematic processing can be performed according to the active coefficient; the higher the active coefficient Active_value, the greater the power consumption of the link should be.

[0092] As shown in Table 2 below, Port _0 are all in L0 state. Assuming that 1Mb of data is transmitted in each time slice, Port _ 0 The low-power active coefficient in this time period is 6; eventually all ports will generate an active coefficient based on the time slice based on their own data traffic:

[0093] Table 2

[0094]

[0095]

[0096] In some optional implementations, step S203, i.e., adjusting the delay time of the target port in different power consumption states and / or adjusting the number of enabled physical channels of the target port based on the activity coefficient and the power consumption state, includes:

[0097] Determine a threshold interval in which the activity coefficient is located; wherein the threshold interval includes a low threshold interval, a high threshold interval, and an intermediate threshold interval between the low threshold interval and the high threshold interval;

[0098] If the activity coefficient is within the middle threshold interval, adjusting the delay time of the target port in a low power consumption state;

[0099] If the activity coefficient is within the low threshold range, reducing the transmission rate of the target port and / or reducing the number of enabled physical channels of the target port;

[0100] If the activity coefficient is in the high threshold interval, the transmission rate of the target port is restored to the original rate, and / or the number of opened physical channels of the target port is restored to the original number.

[0101] Exemplarily, the present application further sets high threshold and low threshold standards, thereby dividing the activity coefficient into a high threshold interval, a low threshold interval, and an intermediate threshold interval between the low threshold interval and the high threshold interval based on the high threshold and the low threshold; these threshold intervals are used to indicate the working status of the Port and the basis for adjusting the power consumption strategy.

[0102] First, the activity coefficient of each port calculated above is Actice _ The value is normalized and the activity coefficient of a single port is defined as ranging from 0 to 1, where 0 means that the port is completely inactive (i.e., the data flow is extremely low and it is in a low power state for a long time), and 1 means that the data flow of the port in a unit time reaches the maximum value. Figure 4As shown in the figure, the high threshold and the low threshold are set to 0.7 and 0.3 respectively, and these two thresholds are used to define the high load and low load states of the port respectively. Among them, less than 0.3 indicates the low threshold interval, greater than 0.7 indicates the high threshold interval, and between 0.3 and 0.7 is the middle threshold interval.

[0103] For example, see Figure 5 As shown in Figure 2, when the activity of the Port is between the low threshold and the high threshold, that is, Figure 4 When the middle threshold interval ① in the figure is reached, the delay time for the port to enter the low power state can be adjusted according to the actual activity coefficient. For example, when the activity coefficient is close to the low threshold, the activity state of the port is low, and the delay time for entering the low power state can be reduced to reduce power consumption.

[0104] On the other hand, when the activity of the port is lower than the low threshold, that is, it is in the low threshold interval, this means that the data display throughput of the port is low, and the port is in a low power consumption state for a long time. At this time, in order to further reduce the power consumption of the port, speed reduction and lane reduction operations can be adopted. Speed ​​reduction operation refers to reducing the transmission rate of the PCIe link, such as from gen 5's 32Gb to 16Gb, 8Gb, 5Gb, 2.5Gb in sequence, thereby reducing power consumption; and lane reduction operation is to reduce the number of lanes of the link, such as from X8 mode to X4, X2, X1 in sequence to further reduce power consumption, that is Figure 4 As data transmission resumes, activity will gradually increase, and the system will dynamically adjust the delay time to enter the low power state according to the new activity coefficient, thereby returning to the middle threshold interval ①. It is understandable that before the speed reduction or lane reduction operation, it is possible to first determine whether the target port has enabled the speed reduction or lane reduction. If it has, the speed reduction or lane reduction operation can be stopped.

[0105] In contrast, when the activity of the Port is higher than the high threshold, that is, it is in the high threshold interval, this means that the data of the Port shows a high throughput and has not entered a low power consumption state for a long time. In this case, for example, the system will increase the link rate to gen5's 32Gb (gen5's 32Gb is the transmission rate of the link in the normal state, that is, the original rate, and the transmission rate before the increase is the rate after the link entered the low threshold interval and was reduced in speed), and increase the number of Lanes of the link to X8 mode (the number of physical channels in X8 mode is 8, which is the number of physical channels in the normal state of the link, that is, the original number, and the physical channel data before the increase is the number of physical channels after the link entered the low threshold interval and was reduced in lanes) to ensure the efficiency of data transmission and to meet the needs of high-load data transmission, that is Figure 4Increasing the link rate and the number of Lanes can improve data transmission performance, but after data transmission is completed, the activity will decrease, and the system will dynamically adjust the time to enter the low power state according to the current activity, that is, Figure 4 In this way, the system ensures that sufficient bandwidth is provided under high load conditions and re-optimizes the power consumption configuration after the load decreases.

[0106] In summary, by carefully defining and managing the activity of a single port, combined with high threshold and low threshold standards, accurate power consumption control can be achieved. This method not only improves the energy efficiency of the system, but also ensures the stability and reliability of data transmission. In practical applications, the system will dynamically adjust its power consumption state according to the real-time activity of the port to optimize performance and power consumption, thereby meeting the dual needs of modern computer systems for high performance and low power consumption.

[0107] In some optional implementations, the step of adjusting the delay time of the target port in a low power consumption state includes:

[0108] The delay time in the low power consumption state is adjusted to the set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficients of different gears is predetermined.

[0109] Exemplarily, for the intermediate threshold interval, different set times corresponding to activity coefficients of different gears can be pre-set, so that when the power consumption is dynamically adjusted, if the activity coefficient is in the intermediate threshold interval, the delay time for the Port to enter the low power consumption state can be set to a predetermined corresponding set time based on the gear where the activity coefficient is located.

[0110] In some optional implementations, the low power consumption state includes a first low power consumption state and a second low power consumption state; the power consumption of the first low power consumption state is lower than the power consumption of the second low power consumption state; the step of adjusting the delay time in the low power consumption state to the set time corresponding to the activity coefficient includes:

[0111] If the target port has entered the first low power consumption state, adjusting the delay time of the target port in the first low power consumption state to the set time corresponding to the first low power consumption state at the current gear of the activity coefficient;

[0112] If the target port has not entered the first low power state, the delay time of the target port in the second low power state is adjusted to the set time corresponding to the second low power state at the current gear of the activity coefficient.

[0113] For example, since the PCIE protocol stipulates that the hardware will automatically enter the L0s or L1 state when idle for a period of time in the L0 state, the first low power consumption state may be the L1 state, and the second low power consumption state may be the L0s state. Figure 4 The active coefficient in the range shown in ① is Active _ The parameter settings of value and latency time for entering LOs and L1 are shown in Table 3 below, where L0s_latency is the latency time of L0s state and L1s_latency is the latency time of L1 state:

[0114] Table 3

[0115] Active_value L0s_latency L1_latency 0～0.3 1us 1us 0.3～0.4 2us 4us 0.4～0.5 4us 8us 0.5～0.6 5us 16us 0.6～0.7 6us 32us 0.7～1.0 7us 64us

[0116] Since PCIe systems are deployed in large numbers in core networks such as data centers, and data processing in data centers is highly periodic, a large amount of data is often transmitted during the day and less data is transmitted at night. Therefore, the time slices can be divided into 12-hour (half-day) gradients, and dynamic adjustments can be made later based on the periodicity of data transmission.

[0117] It can be seen that the power consumption adjustment method proposed in this application has the following advantages compared with the related art:

[0118] The embodiment of the present application directly uses the power consumption results to reversely infer the low power consumption activity coefficient. The final activity coefficient is positively correlated with the power consumption, which can most accurately and intuitively count the power consumption status of the current link, thereby specifying the low power consumption strategy in the next time slice.

[0119] The present application proposes a method for dynamically controlling the power consumption of each port by monitoring the data flow transmitted by each independent port per unit time and the time in the low power consumption state per unit time, thereby solving the problem that the data transmission states of each port in the PCIe system power consumption are different, but when entering the low power consumption time initialization, they are uniformly set to fixed values, and the link bandwidth and link rate are initially set to fixed values, and a method for saving power consumption by adjusting individually according to the state of each port is not considered.

[0120] This application proposes a set of methods for dynamically adjusting the power consumption of a port by measuring the activity of a single port and setting corresponding high and low thresholds, including slowing down and reducing the lane of inactive ports, and dynamically adjusting the time control for entering a low power consumption state, thereby dynamically adjusting the power consumption of a PCIe system without affecting normal data service transmission.

[0121] This application proposes a method for configurable time gradient in PCIe system power consumption, which can dynamically configure time units according to different application scenarios, thereby more effectively optimizing system power consumption for different implementation scenarios to adapt to diverse business scenario requirements.

[0122] After simulation verification, the operating frequency of a single-lane PCIe system is reduced from 32G to 2.5G, and its system power consumption can be reduced by 30%; after a single-lane PCIe system enters L1 mode from normal mode, its system power consumption can be reduced by 90%. This solution can significantly reduce power consumption.

[0123] Accordingly, the present application provides a power consumption adjustment device in a second aspect, including:

[0124] A flow and power consumption detection module is configured to monitor the data flow and power consumption status of a target port of a PCIe device;

[0125] An activity coefficient determination module, configured to determine the activity coefficient of the target port based on the data flow and power consumption status;

[0126] The adjustment module is configured to adjust the delay time of the target port in different power consumption states and / or adjust the number of enabled physical channels of the target port based on the activity coefficient and the power consumption state.

[0127] In some optional implementations, the activity coefficient determination module includes:

[0128] A division submodule is configured to divide a preset time period into a plurality of time slices;

[0129] An acquisition submodule is configured to acquire a low power consumption coefficient in a power consumption state corresponding to the time slice; wherein the low power consumption coefficient is determined in advance based on actual power consumption of the target port in different power consumption states;

[0130] The first determination submodule is configured to determine the activity coefficient of the target port within the preset time period based on the data flow corresponding to the time slice and the low power consumption coefficient.

[0131] In some optional implementations, the adjustment module includes:

[0132] A second determination submodule is configured to determine a threshold interval in which the activity coefficient is located; wherein the threshold interval includes a low threshold interval, a high threshold interval, and an intermediate threshold interval between the low threshold interval and the high threshold interval;

[0133] a first adjustment submodule, configured to adjust the delay time of the target port in a low power consumption state if the activity coefficient is in the middle threshold interval;

[0134] A second adjustment submodule is configured to reduce the transmission rate of the target port and / or reduce the number of enabled physical channels of the target port if the activity coefficient is in the low threshold interval;

[0135] The third adjustment submodule is configured to restore the transmission rate of the target port to the original rate and / or restore the number of enabled physical channels of the target port to the original number if the activity coefficient is in the high threshold range.

[0136] In some optional implementations, the first adjustment submodule includes:

[0137] The fourth adjustment submodule is configured to adjust the delay time in the low power consumption state to the set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficients of different gears is predetermined.

[0138] In some optional implementations, the low power consumption state includes a first low power consumption state and a second low power consumption state; the power consumption of the first low power consumption state is lower than the power consumption of the second low power consumption state; the fourth adjustment submodule includes:

[0139] a fifth adjustment submodule, configured to adjust the delay time of the target port in the first low power state to a set time corresponding to the first low power state at the current gear of the activity coefficient if the target port has entered the first low power state;

[0140] The sixth adjustment submodule is configured to adjust the delay time of the target port in the second low power state to the set time corresponding to the second low power state at the current gear of the activity coefficient if the target port has not entered the first low power state.

[0141] The power consumption adjustment method provided in the above embodiment is implemented by the above power consumption adjustment device. The specific details of the power consumption adjustment device can be found in the description of the power consumption adjustment method in the above embodiment, which will not be repeated here.

[0142] It is understandable that the power consumption adjustment device can be implemented by hardware or by software. Considering the efficiency and other issues, the power consumption adjustment device can be implemented by hardware. It is understandable that the modules or sub-modules included in the power consumption adjustment device in the above embodiment are not necessarily implemented as separate modules. The above multiple modules and / or sub-modules can be implemented as the same hardware module in hardware. Of course, the above modules or sub-modules can also be implemented as one hardware module or multiple hardware modules in hardware. The specific implementation can be based on the actual implementation, and this application does not impose specific restrictions on this.

[0143] Accordingly, the present application provides a PCIe system in a third aspect, comprising: the power consumption adjustment device provided in the above embodiment. It can be understood that in the PCIe system, the power consumption adjustment device can be implemented by hardware.

[0144] It is understood that the circuit structures, names and parameters described in the above embodiments are only examples. Those skilled in the art can also easily combine and adjust the structural features of the above embodiments according to the use requirements, and should not limit the concept of the present application to the specific details of the above examples.

[0145] Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that he or she may still modify the technical solutions described in the aforementioned embodiments, or make equivalent substitutions for some of the technical features therein; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A power consumption adjustment method, characterized in that: include: Monitor the data flow and power consumption status of the target port of the PCIe device; Determine the activity coefficient of the target port based on the data flow and power consumption status; Based on the activity coefficient and the power consumption state, the delay time of the target port in different power consumption states is adjusted, and / or the number of enabled physical channels of the target port is adjusted.

2. The power consumption adjustment method according to claim 1, characterized in that: Determining the activity coefficient of the target port based on the data traffic and the power consumption state includes: Divide the preset time period into multiple time slices; Obtaining a low power consumption coefficient in a power consumption state corresponding to the time slice; wherein the low power consumption coefficient is determined in advance based on actual power consumption of the target port in different power consumption states; The activity coefficient of the target port within the preset time period is determined based on the data flow corresponding to the time slice and the low power consumption coefficient.

3. The power consumption adjustment method according to claim 1 or 2, characterized in that: Adjusting the delay time of the target port in different power consumption states and / or adjusting the number of enabled physical channels of the target port based on the activity coefficient and the power consumption state includes: Determine a threshold interval in which the activity coefficient is located; wherein the threshold interval includes a low threshold interval, a high threshold interval, and an intermediate threshold interval between the low threshold interval and the high threshold interval; If the activity coefficient is within the middle threshold interval, adjusting the delay time of the target port in a low power consumption state; If the activity coefficient is within the low threshold range, reducing the transmission rate of the target port and / or reducing the number of enabled physical channels of the target port; If the activity coefficient is in the high threshold range, the transmission rate of the target port is restored to the original rate, and / or the number of opened physical channels of the target port is restored to the original number.

4. The power consumption adjustment method according to claim 3, characterized in that: Adjusting the delay time of the target port in a low power consumption state includes: The delay time in the low power consumption state is adjusted to the set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficients of different gears is predetermined.

5. The power consumption adjustment method according to claim 4, characterized in that: The low power consumption state includes a first low power consumption state and a second low power consumption state; the power consumption of the first low power consumption state is lower than the power consumption of the second low power consumption state; and adjusting the delay time in the low power consumption state to a set time corresponding to the activity coefficient includes: If the target port has entered the first low power consumption state, adjusting the delay time of the target port in the first low power consumption state to the set time corresponding to the first low power consumption state at the current gear of the activity coefficient; If the target port has not entered the first low power state, the delay time of the target port in the second low power state is adjusted to the set time corresponding to the second low power state at the current gear of the activity coefficient.

6. A power consumption adjustment device, characterized in that: include: A flow and power consumption detection module is configured to monitor the data flow and power consumption status of a target port of a PCIe device; An activity coefficient determination module, configured to determine the activity coefficient of the target port based on the data flow and power consumption status; The adjustment module is configured to adjust the delay time of the target port in different power consumption states and / or adjust the number of enabled physical channels of the target port based on the activity coefficient and the power consumption state.

7. The power consumption adjustment device according to claim 6, characterized in that: The activity coefficient determination module includes: A division submodule is configured to divide a preset time period into a plurality of time slices; An acquisition submodule is configured to acquire a low power consumption coefficient in a power consumption state corresponding to the time slice; wherein the low power consumption coefficient is determined in advance based on actual power consumption of the target port in different power consumption states; The first determination submodule is configured to determine the activity coefficient of the target port within the preset time period based on the data flow corresponding to the time slice and the low power consumption coefficient.

8. The power consumption adjustment device according to claim 6 or 7, characterized in that: The adjustment module comprises: A second determination submodule is configured to determine a threshold interval in which the activity coefficient is located; wherein the threshold interval includes a low threshold interval, a high threshold interval, and an intermediate threshold interval between the low threshold interval and the high threshold interval; a first adjustment submodule, configured to adjust the delay time of the target port in a low power consumption state if the activity coefficient is in the middle threshold interval; A second adjustment submodule is configured to reduce the transmission rate of the target port and / or reduce the number of enabled physical channels of the target port if the activity coefficient is in the low threshold interval; The third adjustment submodule is configured to restore the transmission rate of the target port to the original rate and / or restore the number of enabled physical channels of the target port to the original number if the activity coefficient is in the high threshold range.

9. The power consumption adjustment device according to claim 8, characterized in that: The first adjustment submodule includes: The fourth adjustment submodule is configured to adjust the delay time in the low power consumption state to the set time corresponding to the activity coefficient; wherein the set time corresponding to the activity coefficients of different gears is predetermined.

10. The power consumption adjustment device according to claim 9, characterized in that: The low power consumption state includes a first low power consumption state and a second low power consumption state; The power consumption of the first low power consumption state is lower than the power consumption of the second low power consumption state; The fourth adjustment submodule includes: a fifth adjustment submodule, configured to adjust the delay time of the target port in the first low power state to a set time corresponding to the first low power state at the current gear of the activity coefficient if the target port has entered the first low power state; The sixth adjustment submodule is configured to adjust the delay time of the target port in the second low power state to the set time corresponding to the second low power state at the current gear of the activity coefficient if the target port has not entered the first low power state.

11. A PCIe system, characterized in that: include: A power consumption adjustment device as described in any one of claims 6 to 10.

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