Method of manufacturing semiconductor device, method of manufacturing semiconductor module, and semiconductor device
By using a homogenized die bonding paste and sealing resin, the semiconductor chip is attached to the substrate, and the mechanical stress problems caused by thermal shift in the prior art are solved, and the adhesion and electrical properties of the chip to the substrate are improved.
Patent Information
- Application Number
- CN202410912086.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-09-20
- Filing Date
- 2024-07-09
- Publication Date
- 2025-03-21
AI Technical Summary
When manufacturing high-power semiconductor devices and modules, it is difficult to effectively solve the mechanical stress problems caused by thermal shifts, resulting in the risk of fracture, and it is difficult to take into account the thermal, mechanical and electrical characteristics of the packaging materials.
Using a homogenized die bonding paste, the semiconductor chip is attached to the substrate, and the chip and wire are sealed by a sealing resin, an unsmissed die bonding paste including a plurality of Ag fillers is used, and vibrations are added during the stirring to homogenize the paste.
Through the use of homogenized die bonding paste and sealing resin, the adhesion and electrical properties of the semiconductor chip to the substrate are improved, the risk of rupture caused by thermal shift is reduced, and the thermal, mechanical and electrical characteristics of the package are improved.
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Figure CN119673780A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure generally relates to systems and methods for reliably manufacturing semiconductor devices and semiconductor modules, and more particularly to systems and methods for manufacturing semiconductor devices including one high-power semiconductor chip and semiconductor modules that may include two or more high-power semiconductor chips that may experience high temperatures. Background Art
[0002] Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
[0003] Electronic systems using high-power electronics are expected to face thermal challenges, and heat dissipation is a common concern for many designers. Various techniques can be used, such as packaging to surround thermal components and conduct heat directly away from the thermal components. However, thermal excursions (e.g., changes or fluctuations in temperature) may generate mechanical stresses that can cause fractures over time. Therefore, the thermal, mechanical, and electrical properties of various packaging materials must be carefully considered. For example, some designers may choose to limit performance to reduce the risk of fracture. Other designers may choose exotic materials that are more tolerant to higher thermal excursions but at a significantly increased cost. For those seeking higher performance, higher reliability, and lower cost, neither of these alternatives is attractive.
[0004] Various solutions have been attempted, including mounting the semiconductor chip on a substrate via a porous sintered silver (Ag) layer partially covered by a resin as a die bonding layer, such as the example disclosed in U.S. published patent application US 20140264383 entitled “Semiconductor device and manufacturing method of the same” and assigned to the present applicant.
[0005] Another solution includes applying the die bonding material using a stamping nozzle having a tapped portion (e.g., a space portion) for holding a certain amount of die bonding material, such as the example disclosed in U.S. published patent application US20130009300, entitled “Semiconductor device and manufacturing method of the same” and assigned to the present applicant.
[0006] Another solution includes a compression molding method suitable for large substrate molding, such as the example disclosed in U.S. published patent application US 20220068668, entitled "Method of manufacturing semiconductor device" and assigned to the present applicant. What is needed is a solution to these and other problems. Summary of the invention
[0007] According to one example, a method of fabricating a semiconductor device is generally described. A method for manufacturing a semiconductor device may include: (a) preparing a substrate; (b) after (a), cleaning a chip mounting surface of the substrate; (c) after (b), supplying a homogenized die bonding paste to the chip mounting surface of the substrate, and attaching a semiconductor chip to the chip mounting surface of the substrate via the homogenized die bonding paste, the semiconductor chip having a front surface, a rear surface opposite to the front surface, and a first electrode formed on the front surface; (d) after (c), curing the homogenized die bonding paste; (e) after (d), electrically connecting the first electrode of the semiconductor chip to a first terminal of the substrate via a first wire; and (f) after (e), sealing the semiconductor chip and the first wire with a sealing resin, wherein the homogenized die bonding paste used in (c) may initially be provided as an unstirred die bonding paste including a plurality of Ag fillers, and wherein in (c), after the unstirred die bonding paste and the plurality of Ag fillers may be stirred together for a first predetermined period of time, the homogenized die bonding paste may be supplied to the chip mounting surface of the substrate.
[0008] According to this example, in the method, in (b), the chip mounting surface of the substrate can be cleaned by a plasma cleaning method using Ar (argon) gas. In the method, the substrate can have: a first terminal; and a second terminal arranged on the chip mounting surface, wherein the semiconductor chip can also have: a front surface; a rear surface opposite to the front surface; a first electrode formed on the front surface; and a second electrode formed on the rear surface, wherein in (b), the surface of the first terminal and the chip mounting surface of the second terminal can be cleaned, wherein in (c), a die bonding paste can be supplied to the chip mounting surface of the second terminal, and wherein in (e), the second electrode of the semiconductor chip can be electrically connected to the second terminal of the substrate via a homogenized die bonding paste. In the method, in (c), starting within a second predetermined time period after the die bonding paste can be supplied to the chip mounting surface of the substrate, the semiconductor chip can be supplied to the chip mounting surface of the substrate.
[0009] According to this example, in the method, the second predetermined time period can be less than 60 minutes. In the method, in (c), before the homogenized die bonding paste can be supplied to the chip mounting surface of the substrate, the homogenized die bonding paste can be stirred with vibration for a first predetermined time period. In the method, in (c), before the homogenized die bonding paste can be dispensed onto the chip mounting surface of the substrate, the homogenized die bonding paste can be stirred with vibrations of 40,000 times per minute for a first predetermined time period, and wherein the first predetermined time period can be at least 90 seconds and not more than 150 seconds. In the method, the unstirred die bonding paste used in (c) can be a silver sintered epoxy paste including a plurality of Ag fillers. In the method, the unstirred die bonding paste used in (c) can be a silver sintered epoxy paste including a plurality of Ag fillers and a plurality of AlN fillers.
[0010] According to this example, in the method, in (c), the homogenized die bonding paste can be supplied to the chip mounting surface of the substrate by using a dispenser, the dispenser comprising: a nozzle; a syringe arranged above the nozzle and connected to the nozzle; and a piston arranged in the syringe, and wherein in (c), the homogenized die bonding paste can be stirred in the syringe and can be dispensed to the chip mounting surface of the substrate by pushing out the homogenized die bonding paste with the piston. In the method, the substrate can be a wiring substrate including glass fiber and epoxy resin, and wherein in (f), the semiconductor chip and the wire can be sealed with a sealing resin by using a compression molding method. The method may also include: (g) after (f), in a state where the molded package including the semiconductor chip obtained by performing (f) can be sandwiched with a first metal plate and a second metal plate, the molded package is heated.
[0011] According to another example, a method for manufacturing a semiconductor module is generally described. The method may include: (a) preparing a substrate having a chip mounting surface, the chip mounting surface having a first bonding area and a second bonding area; (b) after (a), cleaning each of the first bonding area and the second bonding area; (c) after (b), supplying a homogenized die bonding paste to each of the first bonding area and the second bonding area; (d) after (c), attaching a first semiconductor chip to the first bonding area via the homogenized die bonding paste supplied to the first bonding area, the first semiconductor chip having a first front surface, a first rear surface opposite to the first front surface, and a first electrode formed on the first front surface; (e) after (d), attaching a second semiconductor chip to the second bonding area via the homogenized die bonding paste supplied to the second bonding area, the second semiconductor chip having a second front surface, a second rear surface opposite to the second front surface, and a first electrode formed on the first front surface; (f) after (e), curing the homogenized die bonding paste supplied to each of the first bonding area and the second bonding area; (g) after (f), electrically connecting the first electrode of the first semiconductor chip to the first terminal of the substrate via the first wire, and electrically connecting the second electrode of the second semiconductor chip to the second terminal of the substrate via the second wire; and (h) after (g), sealing the first semiconductor chip, the second semiconductor chip, the first wire and the second wire with a sealing resin by compression molding, wherein the die bonding paste used in (c) can initially be provided as an unstirred die bonding paste including a plurality of Ag fillers, and wherein in (c), after the unstirred die bonding paste and the plurality of Ag fillers can be stirred together for a first predetermined time period, the homogenized die bonding paste can be supplied to each of the first bonding area and the second bonding area.
[0012] According to this example, the method may further include: (i) after (h), in a state where the molded package including the first semiconductor chip and the second semiconductor chip that can be obtained by performing (h) can be clamped between the first metal plate and the second metal plate, heating the molded package. Wherein in (b), each of the first bonding area and the second bonding area can be cleaned by a plasma cleaning method using Ar (argon) gas. In the method, the first semiconductor chip can be composed of one of GaN and GaAs, the second semiconductor chip can be composed of one of Si and SiC, and the flatness of the first rear surface of the first semiconductor chip can be lower than the flatness of the second rear surface of the second semiconductor chip.
[0013] According to another example, a semiconductor device is generally described. The semiconductor device may include a substrate; a semiconductor chip mounted on a chip mounting surface of the substrate via a cured homogenized die bonding paste; a wire electrically connecting a first electrode of the semiconductor chip to a terminal; and a sealing body sealing the semiconductor chip and the wire, wherein the homogenized die bonding paste may include a plurality of Ag fillers and a plurality of AlN fillers, wherein a density of the plurality of AlN fillers per unit volume may be less than a density of the plurality of Ag fillers per unit volume.
[0014] According to this example, in the semiconductor device, the diameter of each of the plurality of AlN fillers may be smaller than the diameter of each of the plurality of Ag fillers. In the semiconductor device, the semiconductor chip may further have: a front surface; a rear surface opposite to the front surface; a first electrode formed on the front surface; and a second electrode formed on the rear surface, wherein the semiconductor chip may be mounted on a chip mounting surface of a substrate so that the rear surface of the semiconductor chip faces the chip mounting surface of the substrate, and wherein the second electrode of the semiconductor chip may be electrically connected to the substrate via a homogenized die bonding paste. In the semiconductor device, before mounting the semiconductor chip, the homogenized die bonding paste may be stirred at 40,000 vibrations per minute for at least 90 seconds and not more than 150 seconds.
[0015] To be described more fully below, various examples herein are intended to address various problems, such as improving the wettability of a die bonding paste including a plurality of silver (Ag) fillers (e.g., silver sintered epoxy paste) to a substrate and a semiconductor chip, which may include one of gallium nitride (GaN), gallium arsenide (GaAs), silicon carbide (SiC), and / or silicon (Si) technologies mounted on a substrate. Various examples may also improve the electrical properties of the die bonding paste between the semiconductor chip and the substrate by evenly distributing a plurality of Ag fillers. Various examples may also reduce warping of a semiconductor substrate forming a semiconductor device or semiconductor module.
[0016] The above summary of the invention is illustrative only and is not intended to be limiting in any way. In addition to the above illustrative aspects, embodiments and features, other aspects, embodiments and features will become clear by reference to the accompanying drawings and the following detailed description. In the accompanying drawings, the same reference numerals represent the same or functionally similar elements. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 illustrates a block diagram view showing details of a manufacturing system that can produce semiconductor devices according to various examples of the present disclosure;
[0018] Figure 2A-2Eillustrates a side partial cross-sectional view of a sequence of operations for preparing and dispensing a homogenized die bonding paste according to various examples of the present disclosure;
[0019] Figure 3A-3B illustrates a side partial cross-sectional view of a sequence of operations associated with placing a semiconductor chip placed on a suitable amount of homogenized die bonding paste on a substrate to form a semiconductor device according to various examples of the present disclosure;
[0020] Figure 4A Illustrated is a top plan view of a semiconductor device having a single semiconductor chip according to various examples of the present disclosure. Figure 4B Pictured Figure 4A A side plan view of a semiconductor device;
[0021] Figure 5A A top plan view of a semiconductor module having a plurality of semiconductor chips according to various examples of the present disclosure is illustrated. Figure 5B Pictured Figure 5A A side plan view of a semiconductor module;
[0022] Figure 6A-Figure 6I illustrates a side partial cross-sectional view of a sequence of operations associated with molding a semiconductor module according to various examples of the present disclosure;
[0023] Figure 7A-7C A method of manufacturing a semiconductor module according to various examples of the present disclosure is illustrated; and
[0024] Figure 8 Illustrated are graphs of experimental data of die shear test force versus agitation time conditions according to various examples of the present disclosure.
[0025] The accompanying drawings are intended to illustrate the various features described herein and may not be drawn to scale. DETAILED DESCRIPTION
[0026] In the following description, many specific details, such as specific structures, components, materials, sizes, processing steps and technologies are set forth to facilitate understanding of various embodiments of the present application. However, it will be appreciated by those of ordinary skill in the art that various embodiments of the present application can be practiced without these specific details. In other cases, in order to avoid confusing the present application, well-known structures or processing steps are not described in detail.
[0027] As will be described in more detail below, semiconductor modules can be implemented by one or more of the systems, devices, and methods described in accordance with the present disclosure. The described examples can efficiently and economically provide power consumption and improved reliability for electronic systems that experience temperature excursions. As disclosed herein, examples of the present disclosure provide various solutions related to the operation and mounting of one or more semiconductor devices on a substrate.
[0028] Figure 1 A block diagram view showing details of a manufacturing system that can produce semiconductor devices according to various examples of the present disclosure is illustrated. The semiconductor manufacturing system 100 can be implemented as a collection of various manufacturing equipment 102 using various manufacturing tools and materials 110. For example, the manufacturing equipment 102 may include one or more interoperable elements of the manufacturing tools and materials 110 to perform various operations and transformations of various materials and components to provide semiconductor systems, semiconductor modules, and various semiconductor devices, as disclosed herein. The semiconductor manufacturing system 100 can generally be implemented as a hybrid system including various electronic, mechanical, and electromechanical elements. Some or all of the various manufacturing equipment 102 can be arranged in one or more closed chambers or cabinets to reduce process contamination and include manufacturing byproducts such as gases, noise, etc.
[0029] In one example, the manufacturing tools and materials may include a controller 114 having a processor 116 configured to read and execute instructions from a memory 118 to operate various manufacturing devices 102 among other computer-accessible elements of the semiconductor manufacturing system 100. The memory 118 (e.g., a non-transitory computer-readable medium) may include instructions for the controller 114 in the form of computer instructions (e.g., computer-implemented code). The controller 114 may also implement an up-counting and / or down-counting timer 120 (e.g., one or more serial or overlapping timers) that may be used to operate and control various processes corresponding to the various methods described herein. Alternatively, the timer 120 may be used to notify a user (e.g., using a display, indicator light, or sounder, not shown) about the status of a process, such as a request to introduce or remove various materials and / or intermediate products into or from various manufacturing devices 102 composed of one or more interoperable elements of the manufacturing tools and materials 110.
[0030] The manufacturing tools and materials 110 may include an inspection module 124 configured to inspect various items, including various components of semiconductor devices, semiconductor modules, and various elements associated with the manufacturing tools and manufacturing materials 110. The inspection module 124 may include one or more cameras 126 configured to inspect various components, including terminals, electrodes, substrates, semiconductor chip mounting surfaces, or to help users inspect various components, etc. Therefore, the inspection module 124 may be automatically operated by the controller 114 or in cooperation with the user. The manufacturing tools and materials 110 may include a cleaning module 130 configured to clean various items, including various components of semiconductor devices, semiconductor modules, and various elements associated with the manufacturing tools and manufacturing materials 110. The cleaning module 130 may include one or more nozzles 132 configured to emit argon gas (e.g., argon plasma) to effectively clean various components, including terminals, electrodes, substrates, semiconductor chip mounting surfaces, etc. The cleaning module 130 may be automatically operated by the controller 114 or in cooperation with the user.
[0031] The manufacturing tool and material 110 may include a stirring module 138 having a motion generator 140, which is configured to provide motion such as vibration to a stirring tip 142 (e.g., a micro-tool), wherein the motion generated by the motion generator 140 is directed through the stirring tip 142 to stir or agitate, for example, a die bonding (e.g., die attach) paste. The motion generator 140 may provide an oscillating motion to the stirring tip 142, such as high-speed or ultrasonic vibrations up to 40,000 vibrations per minute (vpm). For example, the motion generator 140 may provide other oscillating motions of different frequencies, different amplitudes, and with different motion patterns. Some or all of the motion generator 140 and the stirring tip 142 may be handheld and operated by a user. In addition, the stirring tip 142 may be an elongated member having a handle surrounded by threads or radial extensions of various sizes. For example, the stirring tip 142 may have a shank with a radial extension disposed in a helical manner about the shank to agitate the die bonding paste when actuated by the motion generator 140 .
[0032] The manufacturing tool and material 110 may include a die module 146 configured to perform die molding of a resin, which will be described more fully below. The die module 146 may include a vacuum element 148, a removable top 150, a removable bottom 152, a first heating element 154, and a second heating element 156, which will be described more fully below. Alternatively, in some examples, the second heating element 156 may not be used. The manufacturing tool and material 110 may also include a curing module 158 having an oven 160, such as a heating chamber, which is used to heat various elements, such as substrates, components, etc. The oven 160 may be used for an extended period of time according to a heating curve that increases heat to a first target temperature at a first rate, maintains heat at the first target temperature for a first predetermined heating time period, and then reduces heat to a second target temperature at a second rate for a second predetermined time period. In this way, the curing module 158 can be used to cure, for example, epoxy resins and / or resins placed in the oven 160. The manufacturing tools and materials 110 may also include a planarization module 164 having one or more weights 166 and a support plate 168 configured to flatten a substrate or array of substrates that may have developed curvature from its original planar configuration due to various processing steps (e.g., curing) described herein.
[0033] The manufacturing tools and materials 110 may include a wire bonding module 170, which is configured to apply bonding wires using a bonding head 172 to form electrical connections between various components, and to move various components using a chuck 174. The manufacturing tools and materials 110 may include a cutting module 178 with a saw 180 or other cutting device to cut and separate (e.g., to singulate) various semiconductor components, such as multiple assembled substrates or substrate arrays. Finally, the manufacturing tools and materials 110 may include a plurality of different materials 184, which may be used in various manufacturing steps that will be further described below. For example, the material 184 may include one or more substrates, one or more active components (such as semiconductor devices), one or more passive components (such as resistors, capacitors, and inductors). Each of these passive or active components may be mounted to a substrate or other surface using various techniques (e.g., including surface mounting technology). The material 184 may include solder for flowing to connect various leads and wires. The material 184 may include a dispenser (eg, a syringe) used to, for example, hold, mix, homogenize, and dispense the die bonding paste.
[0034] Materials 184 may include a sealing resin (e.g., a molding resin for compression molding) that is thermally conductive but electrically insulating or non-conductive. Materials 184 may include a source of argon (Ar) gas for use with cleaning module 130. Materials 184 may also include a source of bonding tape for use with wire bonding module 170. Materials 184 may also include a source of release film for use with die module 146. Finally, for example, materials 184 may include various liquid delivery tools and techniques to measure and dispense liquids, such as liquid resins, within and for manufacturing tools and materials 110, and materials 184 may also include various solid material delivery processes and techniques to measure and dispense various solid materials, such as solid (e.g., granular) sealing resins and release films, within and for manufacturing tools and materials 110.
[0035] One or more computer-accessible elements of the manufacturing tools and materials 110 may be coupled to a host computer 190, which may include a processor 192 configured to read and execute instructions 194 from a memory 196 (e.g., a non-transitory computer-readable medium), which may include instructions in the form of computer instructions (e.g., computer-implemented code) for the host computer 190. The host computer 190 may communicate with the controller 114 via a control and status bus 198 to start and stop various operations, update instructions in the memory 118 of the controller 114, receive status regarding completion of various actions and various results, and so on.
[0036] Figure 2A-2E A side partial cross-sectional view of a sequence of operations for preparing and dispensing a homogenized die bonding paste according to various examples of the present disclosure is illustrated. Figure 2A A partial cross-sectional view of a dispenser 200 is shown that can be used to hold a quantity of die bonding paste 240. The dispenser 200 can be implemented as a syringe 202 having a graduated plastic or glass cylinder 204 having a wide opening 208 and a narrow opening 210 on opposite ends of the cylinder 204. The syringe 202 can include a tapered portion 214 that narrows toward a nozzle 216 (e.g., a hub 216), and the contents of the syringe can be dispensed at a piston 218 (e.g., a plunger, Figure 2D ) is dispensed from the nozzle under a compressive pressure of , the piston being disposed in a portion of the wide end 208 of the syringe 202 and in a direction 220 ( Figure 2E ) from the wide end 208 to the narrow end 210. The angle of the tapered portion 214 may not be critical. For example, the nozzle 216 may be a cylindrical output portion that may be centrally aligned with the central axis of the syringe 202, or the nozzle 216 may be offset toward the outer edge of the syringe body 204.
[0037] As described above, the contents of the syringe 202 may include a die bonding paste 240. As a specific example, the die bonding paste 240 may be a silver sintering (Ag) die attach (e.g., die bonding) paste having a mixture of silver and a solvent-based resin in a specified proportion. Due to the inclusion of a die bonding paste silver first filler 242 in the form of silver flakes or silver blocks, the die bonding paste 240 may have a silver content of at least 80% or more, and preferably may have a silver content of about 87%. The die bonding material 240 may be purchased, shipped, and stored under frozen conditions, such as -40°C or lower. The frozen die bonding material 240 may be thawed or heated to about room temperature of about 25°C (77°F) before use to reduce the viscosity and improve the flow of the die bonding paste material 240 at a temperature far below the temperature at which curing may begin to occur.
[0038] like Figure 2A As shown, the syringe 202 can be configured to receive a thawed die bonding paste material 240 (e.g., silver sintered epoxy paste) that includes a resin 246 and a first filler material 242 (e.g., a plurality of silver / silver fillers) prior to freezing, storage, shipping, and thawing. Alternatively, the syringe 202 can receive a thawed or room temperature die bonding paste material 240 that includes the first filler material 242 and can be introduced through the wide end 208 or the narrow end 210. As another alternative, a different die bonding paste material that does not contain silver can be introduced into the syringe 202, and an appropriate amount of the first filler material 242 can also be introduced into the syringe 202. Figure 2B As shown, syringe 202 may be configured to receive thawed or room temperature die bonding paste material 240 and second filler material 244 (eg, a plurality of AlN / aluminum nitride fillers). As previously described, the paste and / or filler may be introduced through wide end 208 or narrow end 210 alone or together.
[0039] like Figure 2C As shown, it can be stirred Figure 2A A thawed preparation of a die bonding paste 240 including a first filler 242 (Ag), or Figure 2BThe motion generator 140 may be operably attached to the stirring tip 142 and configured to apply a stirring or mixing motion to the contents of the syringe 202 to produce the homogenized die bonding paste 256. The stirring tip 142 may include an end 252 configured to extend to a position (e.g., a suitable depth) above the tapered portion 214 within the syringe 202, wherein the end 252 may be approximately equidistant from an interface between a side of the syringe 202 and a bottom of the syringe 202, for example, at an interface between the tapered portion and the nozzle 216. In some examples, the interface between the tapered portion 214 and the nozzle 216 can be closed by a membrane or plug so that the agitated die bonding paste 256 does not escape from the dispenser body 204, for example, during stirring. To improve mixing, the stirring tip 142 can include multiple surfaces, such as threads or radial extensions of various sizes, that extend radially from the long axis of the stirring tip 142 and are configured to bond with the die bonding paste 256 during stirring or mixing. Once stirring is complete, the membrane (if present) can be pierced, or the plug removed, to allow the homogenized die bonding paste 256 to pass through the nozzle 216.
[0040] like Figure 2C As shown, the stirring tip 142 can be inserted into the wide end 208 to extend longitudinally through the body 204. Alternatively, the stirring tip 142 can be inserted into the body 204 a suitable distance into the narrow end 210. The stirring or mixing motion applied to the stirring tip 142 by the motion generator 140 can be continued for a predetermined period of time sufficient to homogenize the die bonding paste 240 together with the first filler 242 and the second filler 244 (if used) so that the first filler 242 and the second filler 244 can be evenly distributed throughout the homogenized die bonding paste 256. As described above, the first filler 242 and the second filler 244 can be considered to be suspended in the die bonding paste 240, wherein the fillers are evenly dispersed after stirring to produce the homogenized die bonding paste 256, as shown. Figure 2D shown.
[0041] For example, once agitation is complete, the motion generator and agitation tip 142 can be withdrawn from the body 204, and the piston 218 can be introduced into the wide end 208. The chip mounting surface 272 of the substrate 276 can be cleaned before dispensing the homogenized die bonding paste 256. Shortly after agitation is complete (e.g., within about 60 minutes), the piston 218 can be advanced in the direction 220 from the wide end 208 toward the narrow end 210, and the homogenized die bonding paste 256 can be dispensed through the nozzle 216 as a stream 260 onto the chip mounting surface 272 of a portion of the substrate 276, as shown. Figure 2E As shown. Therefore, the homogenized die bonding paste 256 can have improved wettability to improve flow and contact with the chip mounting surface 272 of the substrate 276, and reduce dripping to reduce waste, overflow and cleanup. After dispensing an appropriate amount of the homogenized die bonding paste 256 onto the chip mounting surface 272, the semiconductor chip (e.g., a semiconductor die) can be attached to the chip mounting surface 272 via the homogenized die bonding paste 256. As will be described more fully below. The homogenized die bonding paste 256 can be dispensed and the semiconductor chip attached shortly after stirring is completed to avoid precipitation (e.g., deposition) of the homogenized die bonding paste 256, such as starting the dispensing and attachment within a few seconds after stirring is completed and completing it within a time period of, for example, approximately 60 minutes. Advantageously, after curing, attaching a semiconductor chip to a chip mounting surface 272 using a homogenized die bond paste 256 can reduce cracking and failure during thermal excursions and can also improve adhesion of the attached semiconductor chip, as will be described more fully below.
[0042] Figure 3A-3B A side partial cross-sectional view of a sequence of operations associated with placing a semiconductor chip placed on a suitable amount of homogenized die bonding paste on a substrate to form a semiconductor device according to various examples of the present disclosure is illustrated. Figure 3A As shown, the semiconductor chip 308 can be carried by the wire bonding module 170 chuck 174 (eg, a die chuck), which can be used to pick up and accurately place the semiconductor chip 308 in the bonding area 310. Figure 2A-2E As described, the semiconductor chip 308 may be attached to the chip mounting surface 272 via a homogenized die bonding paste 256. The homogenized die bonding paste 256 may include filler materials such as larger and more dense silver (Ag) filler particles 242 and smaller and less dense aluminum nitride (AlN) filler particles 244. For convenience, the semiconductor device 302 may be formed of one semiconductor chip 308, while a semiconductor module may be formed of two or more semiconductor chips, which will be described more fully below.
[0043] The semiconductor chip 308 may be formed by various technologies, including gallium nitride (GaN), gallium arsenide (GaAs), silicon carbide (SiC), silicon on insulator (SoI), silicon (Si) complementary metal oxide semiconductor (CMOS), or other high temperature and / or high power consumption microelectronics and semiconductor technologies. The semiconductor chip 308 may be an elongated structure having a first face 316 (e.g., a front surface or top surface) and a second face 320 (e.g., a rear surface or bottom surface) opposite the first face. The semiconductor chip 308 may include a first electrode 324 on the first face 316, which is configured to be electrically connected to a circuit formed on or within the semiconductor chip 308. Alternatively, the first electrode 324 may be a conductive surface area of the semiconductor chip 308 that is electrically connected to a circuit at least partially disposed within the semiconductor chip 308. The electrode may also be represented as an electrical conductor or pad, and may, for example, be a location for wire bonding, etc., for connecting the semiconductor chip 308 to another electrical system. Similarly, the semiconductor chip 308 may include a second electrode 328 on the second side 320, which is configured to be electrically connected to the same or different circuits formed on the semiconductor chip 308. In this manner, the first electrode 324 and the second electrode 328 may be disposed on opposite sides of the semiconductor chip 308. The second electrode 328 may be coplanar with the bottom surface 320 of the semiconductor chip 308. The chip mounting surface 272 may include an optional terminal 338 that is electrically connected to a portion of the chip mounting surface 272, or to another circuit associated with the substrate 276. The terminal 338 may have a conductive top surface 342. In another example, the top surface 342 may be coplanar with the chip mounting surface 272.
[0044] As mentioned above Figure 2A-2E As described above, a suitable amount 352 of homogenized die bonding paste 256 can be deposited on the cleaned chip mounting surface 272 with improved wetting and reduced dripping. Figure 2E As shown, a measured amount 352 of homogenized die bonding paste 256 may be deposited in at least five portions, one portion for each corner of the placed semiconductor chip, and at least one portion located in the center between the corners. For an elongated rectangular semiconductor chip, additional portions may be deposited on the long axis of the semiconductor chip placement. Figure 3BAs shown, once the appropriate amount 352 of homogenized die bonding paste 256 is deposited in the bonding area 310, the semiconductor chip 308 can be placed by the wire bonding module chuck 174 at a depth 380 on the top surface 356 of the die bonding paste 256, at which depth the entire bottom surface 320 of the semiconductor chip 308 (including the second electrode 328) is immersed in a portion of the appropriate amount 352 of the die bonding paste 256 to form the semiconductor device 302. The appropriate amount of homogenized die bonding paste 352 can be based on the rectangular size of the semiconductor chip (e.g., semiconductor die) that is sufficient to cover the entire bottom surface 320 of the semiconductor chip 308 and a portion of each side of the semiconductor chip, as described above. Bottom surface 320 may be spaced apart from chip mounting surface 272 by a distance 384, which may be at least 1.0 mil (0.001 inch, 25.4 microns) and no more than 1.5 mil (0.0015 inch, 38.1 microns) from chip mounting surface 272, and may preferably be approximately 1.25 mil (0.0022 inch, 31.8 microns). In one example, depth 380 may correspond to approximately 15-20% (15-20%) of a thickness 388 (approximately 110 microns) of semiconductor chip 308.
[0045] After positioning the semiconductor chip 308 as described above, a conductive path 346 may be formed between the second electrode 328 and the terminal 338 by an appropriate amount of the homogenized die bonding paste 256. For example, the terminal 338 may span the entire width of the homogenized die bonding paste 256 between the bottom 320 of the semiconductor chip 308 (e.g., Figure 3A 320 ), or the terminal 338 may span only a portion of the width while extending below a portion of the bottom 320. In this way, the homogenized die bonding paste 256 can be connected between the bottom 320 of the semiconductor chip 308, the terminal 338 of the substrate 276, and the surface 272. The conductive path 346 can be, for example, a main ground path or a supplementary ground path, or an electrical signal path. In this way, an appropriate amount of homogenized die bonding paste 352 can be thermally and electrically conductive before and after curing. The semiconductor chip 308 can be placed on an appropriate amount 352 of homogenized die bonding paste 256 and oriented so that the bottom surface 320 is substantially parallel to the chip mounting surface 272 within a tolerance range, so that relative to the chip mounting surface 272, on all four sides of the semiconductor chip 308, the tilt relative to the XZ plane 392 is about 2 microns (about 2 microns, 7.87E-5 inches) or less. For example, these tolerances may reflect a die attach process consistency (Cpk) of greater than 1.33 over time compared to specification requirements.
[0046] The die bonding paste first filler 242 in the exemplary die bonding paste may have an average diameter 360 of about 1 micron (about 1 micron, 3.94E-5 inches) and a mass of about 10.49 g / cm 3 In some examples, a suitable amount of second filler 244 can be introduced into wide end 208 of syringe 202, such as aluminum nitride (AlN) in the form of flakes or nuggets having an average diameter 370 of about 250 nanometers (about 250 nm, 9.84E-6 inches) and a density of about 3.26 g / cm 3 The density 372 of the first filler 242 (e.g., per unit volume) and can be widely available through chemical suppliers. In this example, the ratio between the first filler 242 density 362 and the second filler 244 density 372 (e.g., the first density 362 divided by the second density 372) can be greater than 3 times to help maintain uniformity after stirring (or mixing). Once the one or more semiconductor chips are placed on the appropriate amount 352 of the homogenized tube die bonding paste 256 and are oriented so that the bottom surface 320 is substantially parallel to the chip mounting surface 272, the substrate 276 carrying the one or more mounted semiconductor chips can be transferred to the curing module 158 having the curing oven 160 to provide an elevated temperature for an extended time according to a thermal curing profile based on the selected tube die bonding paste 240. For example, when using a homogenized die bonding paste 256, a substrate 276 having one or more semiconductor chips mounted via an appropriate amount 352 of the homogenized die bonding paste 256 can be placed in an oven 160 that is activated at a first target temperature of about 200°C (392°F), a ramp time of 60 minutes to achieve the first target temperature, and then a curing time of about another 60 minutes, maintained at 200°C to fully cure the homogenized die bonding paste 256, for example. Alternatively, for example, the oven 160 can be activated at a second target temperature of about 175°C (347°F), a ramp time of 60 minutes to achieve the second target temperature, and then a curing time of about 90 minutes, maintained at 175°C to fully cure the homogenized die bonding paste 256. In this way, the mixture of silver and solvent can create permanent bridges between the filler molecules (242, 244) after curing. Thereby forming a thermally conductive and electrically conductive path. Other curing temperature profiles are also possible.
[0047] Figure 4A FIG. 4 is a top plan view of a semiconductor device having a single semiconductor chip according to various examples of the present disclosure. As shown, the semiconductor device 402 may include a semiconductor chip 308. The semiconductor chip 308 may be similar in some aspects to the reference Figure 3A-3BThe semiconductor chip 308 is described. After cleaning the chip mounting surface 272 including the first bonding area 406, the semiconductor chip 308 can be placed on the chip mounting surface 272 of the substrate 276 via an appropriate amount 352 of the homogenized die bonding paste 256 supplied to the bonding area 406. The appropriate amount of the homogenized die bonding paste 256 can be based on the rectangular size of the semiconductor chip 308 (e.g., semiconductor die). For example, as described in reference Figure 3A-3B As described above, each appropriate amount of homogenized die bonding paste 256 can be sufficient to cover the entire bottom surface 320 of the first semiconductor chip 308 and appropriate portions of each side of the semiconductor chip 308, and support the semiconductor chip 308 at a height above the substrate 276 (e.g., a separation distance from the substrate 276).
[0048] After the homogenized die bonding paste 256 is cured, it can be electrically connected to the placed semiconductor chip as needed. The semiconductor chip 308 may include, for example, a top surface 316 having a plurality of electrodes. The wire bonding module 170 can provide a wired connection by applying a bonding tape segment of appropriate length between electrodes, terminals, or other electrical connectors available on the semiconductor device 402. For example, the wire bonding module 170 can apply a first bonding tape segment as a first wire 412 between an electrode 324 and a terminal 410 on the semiconductor chip 308. Each bonding tape segment can be considered as a wire, such as a wire 412, and can conduct electrical signals or electrical power. The terminal 410 may include a surface 414, which is cleaned together with other surfaces after curing and before activating the wire bonding module 170 to ensure that a reliable electrical connection and a durable connection are formed. Compared with the chip mounting surface 272 or substrate 276 (e.g., floor), both the electrode 324 and the terminal 410 can be positioned at different heights relative to each other. Terminal 410 and other terminals can be electrical connectors or pads (e.g., electrodes) mounted on substrate 276, so that the terminals can be contacts that can extend from substrate 276 or can be coplanar with the top surface of substrate 276, while electrode 324 can be positioned, for example, on the top surface of semiconductor chip 308.
[0049] The wire bonding module 170 can be programmed to include a ring of a predetermined height at each bonding location, so that, for example, the bonding wire between the electrode 324 and the terminal 410 can have a height curve. Bonding wires with higher rings may be less reliable due to the increased likelihood of possible separation under various conditions, such as vibrations of the substrate 276, which can be conducted to each unreinforced bonding wire, or the movement of unsupported bonding wires. Therefore, each wire formed by the wire bonding module 170 can have various dimensional characteristics, including height, lateral offset of the die attachment location, ring direction, and other features. For example, the wire bonding module 170 can apply a second bonding band segment as a second wire 422 between the electrode 418 on the semiconductor chip 308 and the terminal 420. The terminal 420 can include a surface 424 that is cleaned along with other surfaces after curing and before activating the wire bonding module 170 to ensure that a reliable electrical connection and a structurally durable connection are formed. The first wire 412 and the second wire 422 are exemplary in nature. Other electrical signal or electrical power lines to and between the plurality of semiconductor chips and various terminals or connectors in the semiconductor device 402 may be formed in a similar manner.
[0050] After curing and wire bonding are completed, a thermally conductive sealing resin 480 can be formed over the semiconductor chip 308 and various terminals to seal, encapsulate, protect and conduct heat away from the semiconductor chip 308, and conduct heat in the chip mounting surface 272 and the area of the substrate 276 covered by the sealing resin 480. The substrate 276 may include a wiring substrate 460 (e.g., or a lead frame or ceramic substrate), fiberglass 462 and / or epoxy resin 464. Generally, a semiconductor device having a substrate having only one semiconductor chip mounted and cured is less likely to experience warpage than a substrate having two or more semiconductor chips mounted and cured thereon, as described above. In some cases, it is desirable to flatten the substrate 276 of the semiconductor device 402 after curing to address any possible warpage, whether or not inspection is performed. Figure 4B Pictured Figure 4A In this illustration, for example, various exemplary features regarding how the sealing resin 480 surrounds the semiconductor chip 308, the first conductive line 512, and the second conductive line 522 can be shown.
[0051] Figure 5A A top plan view of a semiconductor module having multiple semiconductor chips according to various examples of the present disclosure is illustrated. As shown, the semiconductor module 502 may include a first semiconductor chip 308 and a second semiconductor chip 540. The first semiconductor chip 308 may be similar in some aspects to the reference Figure 3A-3B and Figure 4A-4B The semiconductor chip 308 described. For example, the first semiconductor chip 308 may include one of GaN or GaAs technology, while the second semiconductor chip 540 may be formed of Si technology, or vice versa. Alternatively, each semiconductor chip that performs a specific function may include the same technology, such as four GaN power amplifier chips mounted on the substrate 276. After cleaning the chip mounting surface 272 including the first bonding area 506 and the second bonding area 542, the first semiconductor chip 308 can be placed on the chip mounting surface 272 of the substrate 276 via an appropriate amount 352 of homogenized die bonding paste 256 supplied to the first bonding area 506. Similarly, the second semiconductor chip 540 can be placed on the chip mounting surface 272 of the substrate 276 via an appropriate amount 352 of homogenized die bonding paste 256 supplied to the second bonding area 542. For each placed semiconductor chip, the appropriate amount of homogenized die bonding paste can be based on the rectangular size of the semiconductor chip (e.g., semiconductor die). Each appropriate amount of the homogenized die bonding paste 256 can be sufficient to cover the entire bottom surface 320 of the first semiconductor chip 308 and the entire bottom surface 544 of the second semiconductor chip 540, for example, together with an appropriate portion of each side of the semiconductor chips, and to support each semiconductor chip at a height above the substrate 276 (e.g., a separation distance from the substrate 276), for example, as described with reference to Figure 3A-3B described.
[0052] After the homogenized die bonding paste 256 is cured, it can be electrically connected to each placed semiconductor chip as needed. For example, the first semiconductor chip 308 may include a top surface 316 with multiple electrodes, and the second semiconductor chip 540 may include a top surface 516 with multiple electrodes. The wire bonding module 170 can provide a wired connection by applying a bonding band segment of appropriate length between electrodes, terminals, or other electrical connectors available on the semiconductor module 502. For example, the wire bonding module 170 can apply a first bonding band segment as a first wire 512 between the electrode 324 on the first semiconductor chip 308 and the terminal 510. Each bonding band segment can be considered as a wire, such as a wire 512, and can conduct electrical signals or electrical power. The terminal 510 can include a surface 514, which is cleaned together with other surfaces after curing and before activating the wire bonding module 170 to ensure that a reliable and durable connection is formed. Compared to the chip mounting surface 272 or substrate 276 (e.g., floor), both the electrode 324 and the terminal 510 can be positioned at different heights relative to each other. The terminal 510 and the other terminals can be electrical connectors or pads (e.g., electrodes) mounted on the substrate 276, so the terminals can extend from the substrate 276, or can be coplanar with the top surface of the substrate 276, while the electrode 324 can be positioned, for example, on the top surface of the first semiconductor chip 308.
[0053] The wire bonding module 170 can be programmed to include a ring of a predetermined height at the bonding location, so that the bonding wires between the electrode 324 and the terminal 510 can have, for example, a height profile of each bonding wire. Bonding wires with higher rings may be less reliable due to the increased likelihood of possible separation under various conditions, such as vibrations of the substrate 276, which can be conducted to each of the unreinforced or unsupported bonding wires. Therefore, each interconnect formed by the wire bonding module 170 can have various dimensional characteristics, including height, lateral offset of the die attachment location, ring direction, and other features. For example, the wire bonding module 170 can apply a second bonding ribbon segment as a second conductor 522 between the electrode 518 on the second semiconductor chip 540 and the terminal 520. The terminal 520 can include a surface 524 that is cleaned along with other surfaces after curing and before activating the wire bonding module 170 to ensure that a reliable and structurally durable connection is formed. Similarly, the wire bonding module 170 can apply a third bonding ribbon segment as a third wire 532 between the electrode 528 on the first semiconductor device 308 and the electrode 530 on the second semiconductor chip 540. The first wire 512, the second wire 522, and the third wire 532 are exemplary in nature. Other electrical signal or electrical power lines to and between the plurality of semiconductor chips and various terminals or connectors in the semiconductor device 502 can be formed in a similar manner.
[0054] After curing and wire bonding are completed, a thermally conductive sealing resin 580 can be formed on the first semiconductor chip 308, the second semiconductor chip 540 and various terminals to seal, encapsulate, protect and conduct heat away from the first semiconductor chip 308, the second semiconductor chip 540, and conduct heat in the chip mounting surface 272 and the substrate 276 in the area covered by the sealing resin 580. The substrate 276 can include a wiring substrate 560 with glass fiber 562 and epoxy resin 564. Generally, a semiconductor module with a substrate on which two or more semiconductor chips can be mounted and cured is more prone to warping than a substrate with a semiconductor chip mounted and cured, as described above. In some cases, it is desirable to flatten the substrate 276 of the semiconductor module 502 after curing to address any possible warping, whether or not an inspection is performed. Figure 5B Pictured Figure 5A In this illustration, various exemplary features regarding how the sealing resin 580 surrounds each of the first semiconductor chip 308, the second semiconductor chip 540, the first wire 512, the second wire 522, and the third wire 532 can be shown.
[0055] Various configurations of semiconductor chips in semiconductor module 502 are possible. For example, semiconductor module 502 may also include four semiconductor chips, each of which is formed as a gallium nitride (GaN) power amplifier (PA), and the four semiconductor chip GaN semiconductor module 502 together may be a multi-chip module power amplifier. As the number of semiconductor chips in semiconductor module 502 increases, the likelihood of substrate 276 warping also increases.
[0056] Figure 6A-Figure 6I A side partial cross-sectional view illustrates a sequence of operations associated with molding a semiconductor module according to various examples of the present disclosure. Figure 1 and Figure 5A-Figure 5B , Fig. 6A The beginning steps of a compression molding method utilizing a compression molding module 146 are illustrated, which may have a removable top 150, a removable bottom 152, a first heating element 154 disposed on the left side of the compression molding module 146 as shown, and a second heating element 156 disposed on the right side of the compression molding module 146 as shown, to form a die cavity 602 that may have an open and closed position. In some examples, only one heating element may be used, wherein only one heating element may be disposed on one side of the die cavity 602, but not on both sides at the same time. An exemplary semiconductor module 502 may be mounted on a lower portion of the removable top 150, wherein the top surface of the semiconductor module 502 is directed downward into the die cavity 602. In this manner, the removable top 150 may be moved in a downward and upward direction 604, as shown, so that the mounted semiconductor module 502 may, for example, be moved into and out of the die cavity.
[0057] Figure 6B An intermediate step of the compression molding process is illustrated, in which a portion of a release film 610 from material 184 may be placed over portions of compression molding module 146 to enable the die product to be released from compression molding module 146. Release film 610 may be a temperature resistant film that may also be configured to retain an appropriate amount of the encapsulating resin in granular or liquid form when the encapsulating resin is heated for a period of time. Release film 610 may be partially compressible to form a pressure seal, which will be described more fully below.
[0058] Figure 6CAn intermediate step of the compression molding process is illustrated, where a quantity of sealing resin 620 from material 184 may be placed in a reservoir 622, bowl or can portion defined by release film 610 for holding the sealing resin 620 in a solid, heated liquid, and then solid form. Although shown in partially cutaway form, it should be understood that reservoir 622 extends in three dimensions and release film 610 surrounds reservoir 622 at the front, back, left, right, and bottom as shown. Vacuum 148 may be activated to evacuate 624 air and other gases from reservoir 622.
[0059] Fig.6D An intermediate step of the compression molding process is illustrated, wherein once the vacuum 148 has exhausted air, airborne contaminants, and possibly other gases from the reservoir 622, the movable top 150 can be moved in a downward direction 630 to close the compression molding module 146. For example, an edge portion of the release film 610 can be positioned between the substrate 276 and the top of the left heating element 154, the right heating element 156, the front wall, and the rear wall of the reservoir 622 to hold the sealing resin 620. The front wall and the rear wall are not shown in this view. The edge portion of the release film 610 can be compressed around the top edge portion of the sealing resin reservoir 622, which is shown by the left edge 632 and the right edge 634. The front edge and the rear edge of the top edge seal are not shown in this view. The left heating element 154 and / or the right heating element 156 can be activated 636 to melt the sealing resin 620 to a molten state (e.g., completely and evenly melted).
[0060] Fig. 6EAn intermediate step of the compression molding process is illustrated, wherein the movable bottom 152 may be moved in an upward direction 640 to provide compression of the molten sealing resin 620 in the reservoir 622 against the top surface of the semiconductor module 502, such that the compression molding module 146 immerses the top surface of the semiconductor module 502, including the first semiconductor 308, the second semiconductor 540, and the various bonding wires (512, 522, 532), to reach, for example, the top surface of the substrate 276 in the molten sealing resin. While the movable bottom 152 may be pushed in an upward direction, the movable top 150 may be pushed in a downward direction 642. As shown, a minimal compressive force may be required to form an appropriate seal around the top of the reservoir 622 and to ensure that any remaining compressible air does not melt the sealing resin and completely cover all exposed surfaces of the substrate 276, which faces downward into the reservoir 622. It should be noted that the amount of sealing resin is sufficient to ensure that the highest wire bonding ring is completely immersed in the molten sealing resin without contacting (e.g., not compressing) any wire bonding ring 644. In this example, once the sealing resin 620 is in a molten state and the die module 146 is closed, the substrate 276 carrying the semiconductor module 502 can be immersed in the molten sealing resin 620, and can be a molded package 646 (e.g., a sealing body 646), which can be clamped between the movable top 150 as a first metal plate and clamped between the movable bottom 152 serving as a second metal plate. Once the molded package 646 is clamped, the oven 160 can be activated according to the curing profile to cure the sealing resin 620 within a predetermined period of time. Once the compression molding module 146 is closed and sufficient compression is applied to the molten encapsulating resin 620, both the left heating element 154 and the right heating element 156 (if both are used) may be deactivated so that the molten resin 620 may now proceed toward cooling, solidifying, and curing as a molded package 646. For example, other curing profiles may be used depending on the curing characteristics of the selected encapsulating resin 620.
[0061] Fig. 6F An optional intermediate step of the compression molding process is illustrated, wherein one or more weights 650 may be placed on top of the removable top 150 while the sealing resin 620 cures and then cools to form a molded package 646. Figure 1 , Fig. 6FA post-molding curing (PMC) step following a compression molding process implemented by a planarization module 164 having one or more weights 166 may be illustrated. For example, the weight 650 may be a 1 kg weight placed on top of the removable top 150 for stress relief. The oven 160 may be activated at a first target temperature of about 175°C (347°F), with a ramp time of about 15 to 30 minutes to reach the target temperature, and a curing time of about 4 hours, during which the sealing resin 620 may be fully cured. Thereafter, the oven 160 may be set to a second target temperature of about 25°C (77°F) and a ramp-down time of about 30 minutes to achieve the second target temperature, after which the substrate 276 and the cured sealing resin 620 may proceed to the next step. Other temperature profiles may be used.
[0062] Figure 6G An intermediate step of the molding process is illustrated, wherein the sealing resin 620 may be fully cured and cooled, and the molding module 146 may begin to open by moving the movable bottom 152 in a downward direction 660 to release the movable bottom 152 from the release film 610. In addition, Figure 6H An intermediate step of the molding process is illustrated, where the movable top 150 can be moved in an upward direction 670 to extract the substrate 276 with the cured sealing resin 620 encapsulating the semiconductor module 502 from the molding module 146. The outer portion of the release film 610 can sag and become more accessible or grippable to make the release film easier to remove. Finally, Fig.6I The final step of removing the release film 610 and separating the substrate 276 from the removable top 150 is illustrated when curing and planarization of the substrate 276 may be complete. The substrate 276 may be part of an array of substrates that may be separated from one another in a singulation process, for example, by transferring the array of substrates to a cutting module 178 having a saw 180 or other suitable cutting device.
[0063] Figure 7A-7C A method of manufacturing a semiconductor module according to various examples of the present disclosure is illustrated. Fig. 7A A method 700 of manufacturing (eg, obtaining) a semiconductor device 402 and a method of manufacturing a semiconductor module 502 are illustrated. Figures 1 to 7C, method 700 may start with step 704 of preparing a substrate 276 having a chip mounting surface 272, the chip mounting surface having at least one bonding area. In this manner, step 704 may include preparing a substrate 276 having a chip mounting surface 272 and a first bonding area 506 and a second bonding area 542. In this example, preparing the substrate 276 may include a rough cleaning process and arranging the substrate 276 and necessary components and / or materials 184 in an initial setting. Method 700 may proceed to step 706, i.e., cleaning (e.g., fine cleaning) the chip mounting surface 272 of the substrate 276 using an argon (Ar) plasma cleaning method. In this process, an argon plasma is emitted near the chip mounting surface 272 to remove debris without etching the chip mounting surface 272, to remove static charge on the chip mounting surface 272, and to clean the chip mounting surface without leaving residue. In this example, various terminals and connectors may also be cleaned with the argon plasma cleaning method.
[0064] The method 700 may proceed to step 710 of supplying the homogenized die bonding paste 256 onto the chip mounting surface 272 and each bonding area. In this example, step 710 may include supplying an appropriate amount 352 of the homogenized die bonding paste 256 to each of the first bonding area 506 and the second bonding area 542. The supplying step 710 of the method 700 may include various sub-steps, including an optional sub-step 714 of thawing the frozen die bonding paste 240 in the dispenser 200, which may include a plurality of first fillers 242, the first fillers including silver (Ag) having a first density 362. The dispenser 200 may be, for example, the syringe 202. The thawing sub-step 714 may be optional because in some cases, the die bonding paste 240 may not be frozen, may not be initially located within the dispenser 200 (e.g., the syringe 202), or may not have the first filler 242 already within the die bonding paste 240. In this case, along with adding the first filler 242, the die bonding paste 240 may be added to the dispenser 200. The supplying step 710 may proceed to an optional sub-step 716 of adding the second filler 244 including aluminum nitride (AlN) having the second density 372 to the dispenser 200. The supplying step 710 may proceed to a sub-step 718 of stirring the unstirred die bonding paste 240 with the first filler 242 and possibly the second filler 244 for a first predetermined period of time 720 (e.g., a first predetermined amount of time), which may be at least ninety (e.g., 90) seconds and no more than 150 seconds, for example, to produce (e.g., obtain) a homogenized die bonding paste 256. In this manner, the homogenized die bonding paste 256 is initially provided as an unhomogenized die bonding paste 240 including a plurality of Ag fillers 242. The supplying step 710 may end with a sub-step 722 of dispensing an appropriate amount 352 of the homogenized die bonding paste 256 onto the chip mounting surface 272 having at least one bonding area. In this example, the sub-step 722 may include dispensing an appropriate amount 352 of the homogenized die bonding paste 256 onto at least one of the first bonding area 506 and the second bonding area 542.
[0065] After the supplying step 710, the method 700 may proceed to step 726, i.e., attaching a semiconductor chip on each bonding area via a suitable holder 352 of the homogenized die bonding paste 256, wherein each semiconductor chip has a front surface and a rear surface opposite the front surface. In this example, step 726 may include attaching a first semiconductor chip 308 on the first bonding area 506 via the homogenized die bonding paste 256 supplied to the first bonding area 256 within a second predetermined time period 728 (e.g., and attaching the first semiconductor chip 308 within approximately 60 minutes), wherein the first semiconductor chip 308 may have a first front surface 316, a first rear surface 320 opposite the first front surface 316, and a first electrode 324 formed on the first front surface. In this example, step 726 may also include attaching a second semiconductor chip 540 to the second bonding region 542 via the homogenized die bonding paste 256 supplied to the second bonding region 542 within a second predetermined time period 728, wherein the second semiconductor chip 540 may have a second front surface 516, a second rear surface 544 opposite to the second front surface 516, and a second electrode 518 formed on the second front surface. The method 700 may continue to step 730, namely, curing the homogenized die bonding paste 256 supplied to each bonding region. In this example, step 730 may include curing the homogenized die bonding paste 256 supplied to each of the first bonding region 506 and the second bonding region 542 in an appropriate amount 352. In this manner, the cured die bonding paste 256 may include a plurality of AG fillers 242, and may also include a plurality of AlN fillers 244. During the curing process, the solvent-based resin 246 may be evaporated.
[0066] like Figure 7B As shown, the method 700 may proceed to step 740, i.e., electrically connecting the first electrode 324 of the first semiconductor chip 308 to the first terminal 510 of the substrate 276 via the first wire 512, and electrically connecting the second electrode 518 of the second semiconductor chip 540 to the second terminal 520 of the substrate 276 via the second wire 522. In addition, step 740 may include connecting the third electrode 528 of the first semiconductor chip 308 to the fourth electrode 530 of the second semiconductor chip 540 via the third wire 532. As described above, the wire bonding module 170 may use the bonding tape as a wire to electrically connect various terminals on the substrate 276 to various electrodes (e.g., pads) on the semiconductor chip, and may use the bonding tape as a wire to electrically connect various electrodes on the semiconductor chip to other semiconductor chips.
[0067] Once all electrical connections to the wire bonding module 170 are complete, the method 700 may proceed to step 744, where each semiconductor chip and wire is sealed with the sealing resin 620 by compression molding, as shown in FIG. Figure 6A-Figure 6I In one example, the method 700 may proceed to step 744, i.e., sealing the first semiconductor chip 308, the second semiconductor chip 540, the first wire 512, and the second wire 522 with the sealing resin 620 by compression molding. The sealing step 744 of the method 700 may include various sub-steps, including a sub-step 748, i.e., fixing the substrate 276 to the movable top 150 of the open die module 146. Step 744 may proceed to sub-step 750, i.e., applying a flexible retaining film to form a reservoir 622. Step 744 may proceed to sub-step 752, i.e., providing an appropriate amount of sealing resin into the reservoir 622. Step 744 may proceed to sub-step 754, i.e., activating the heating elements 154, 156 to put the sealing resin 620 in a molten state. Step 744 may proceed to sub-step 756, i.e., closing the die module 146 to immerse each semiconductor chip and wire in the molten sealing resin 620.
[0068] Once the sealing resin 620 is in a molten state and the die module 146 is closed, step 744 may proceed to sub-step 758, i.e., deactivating the heating elements 154, 156. Step 744 may proceed to sub-step 760, i.e., clamping the molded package 646 between the removable top 150 (e.g., the first metal plate) and the removable bottom 152 (e.g., the second metal plate), and activating the oven 160 to heat the molded package 646, thereby curing the sealing resin 620 according to a heating profile, e.g., depending on the selected sealing resin 620. Step 744 may proceed to optional sub-step 762, i.e., adding one or more weights to planarize the substrate 276 while the molded package 646 is curing. Step 744 may proceed to sub-step 764, i.e., opening the die module 146. Step 744 may proceed to sub-step 766, i.e., removing the retaining film 610. Step 744 may end with sub-step 768, namely, releasing substrate 276 carrying molded package 646 from removable top surface 150. In one example, molded package 646 may be associated with a single substrate 276 that was previously separated from other substrates in an array of substrates in material 184. In other examples, molded package 646 may be associated with a substrate that is attached to other substrates in an array of substrates in material 184, and wherein each associated substrate is removed (e.g., singulated, separated) after compression molding and curing are complete.
[0069] After sealing each semiconductor chip and wire with a sealing resin by compression molding in step 744, method 700 can continue in step 780, that is, evaluating the flatness of the substrate 276 or the substrate array, as described above. For example, the inspection module 124 and one or more cameras 126 can be used to inspect the substrate array and compare with a known flat edge tool, using one or more feeler gauges or other devices. Method 700 can continue to step 782, that is, determine whether the flatness of the substrate array is acceptable. If the flatness of the substrate array is unacceptable, the method 700 can continue to step 784, that is, place the substrate 276 or the substrate array in a face-down manner (e.g., the cured portion is oriented downward) on the support plate 168. For example, the support plate 168 can have a raised border for surrounding the substrate 276 or the substrate array, so that if the substrate is flat, the top surface of the substrate oriented downward can be flush with the border. However, in some cases, curing may cause bending in the direction toward the cured surface. Unacceptable flat substrate 276 can extend upward from the border of the support plate 168 (e.g., bend upward).
[0070] The method 700 may proceed to step 786 by applying one or more plates or planar weights 166 from the planarization module 164 to an underside portion of the substrate 276 that may protrude above the border of the support plate 168. The weight 166 may be 0.5 kg (1.1 lbs), 1.0 kg (2.2 lbs), or 1.5 kg (3.3 lbs), individually or in combination, depending on, for example, the amount and rate of planarization that may be required. The method 700 may proceed to step 788 by activating the oven 160 for a third predetermined amount of time according to the heating profile. For example, the oven 160 may be activated at a third target temperature of about 175° C. (347° F.) with a ramp-up time of about 15 to 30 minutes to reach the target temperature, followed by a soak time of about 7 hours, during which the substrate 276 or array of substrates may be planarized or flattened. Thereafter, the oven 160 may be set to a fourth target temperature of about 25°C (77°F) and a ramp-down time of about 30 minutes to achieve the fourth target temperature, after which the substrate 276 may be planarized. The method 700 may proceed to step 790, where the planarization weight is removed from above the support plate 168, and the substrate 276 or array of substrates is removed from the support plate 168. The method 700 may proceed to step 792, where the substrate 276 or array of substrates is inspected. After the evaluation step 780, if the flatness of the substrate 276 or array of substrates is acceptable, control may move to step 792 to avoid post-mold cure planarization, as described. The method 700 may proceed to step 794, where each substrate in the substrate 276 or array of substrates is marked to indicate various properties of each substrate. Thereafter, the method 700 may end, as desired, with an optional step 796, where the array of substrates is separated (e.g., singulated) into individual, marked substrates.
[0071] Figure 8 FIG. 1 is a graph showing experimental data of die cut test (DST) force versus stirring time conditions according to various examples of the present disclosure. Figure 2C , Figure 3A , Fig. 7A and Figure 8, the stirring time condition is related to step 718, that is, the die bonding paste 240 (possibly also having the filler 244) is stirred for a predetermined amount of time to produce a homogenized die bonding paste 256. According to various embodiments, different stirring times can produce different degrees of homogenization of the die bonding paste 240 (and the filler 244). As shown in the test data, a greater mixing time can produce a more homogenized homogenization, which can result in a greater degree of adhesion of the semiconductor chip 308 to the substrate 276. This improvement in adhesion performance can be measured by a greater die shear test (DST) force (e.g., lateral force) (which is required to separate the mounted component from the substrate), which is measured in kilograms (kg), for example, measured according to MIL-STD-883 Method 2019.9.
[0072] Figure 8 It is illustrated that control batch 802, corresponding to no agitation or 0 seconds of agitation, was found to require a die shear test force 804 ranging from about 1.47 kg to about 2.05 kg, with an average force of about 1.70 kg. In this example, the combined standard deviation is used to calculate the interval. Control batch 812, corresponding to a 60 second agitation time, was found to require a die shear test force 814 ranging from about 1.37 kg to about 1.93 kg, with an average force of about 1.63 kg. Control batch 822, corresponding to a 90 second agitation time, was found to require a die shear test force 824 ranging from about 1.43 kg to about 2.00 kg, with an average force of about 1.65 kg. Control batch 832, corresponding to a 120 second agitation time, was found to require a die shear test force 834 ranging from about 1.80 kg to about 2.37 kg, with an average force of about 2.09 kg. It was found that the required die shear test force 844 for the control batch 842 corresponding to a stirring time of 150 seconds ranged from about 2.05 kg to about 2.60 kg, with an average force of about 2.30 kg. In this way, the test data showed that a stirring time of at least 90 seconds to 150 seconds can produce stronger adhesion of the semiconductor die to the substrate, as described herein.
[0073] The terms used herein are only used to describe specific embodiments and are not intended to limit the present invention. As used herein, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" shall also include the plural forms. It should be further understood that the terms "includes", "comprises" and / or "comprising" when used in this specification specify the presence of the features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof.
[0074] The corresponding structures, materials, actions, and equivalents of all means or step plus function elements (if any) in the following claims are intended to include any structure, material, or action for performing the function in combination with other claimed elements specifically claimed. The description of the present invention is presented for the purpose of illustration and description and is not intended to be exhaustive or limited to the present invention in the disclosed form. Many modifications and variations will be clear to those of ordinary skill in the art without departing from the scope and spirit of the present invention. Various embodiments are selected and described in order to best explain the principles and practical applications of the present invention and to enable others of ordinary skill in the art to understand the present invention in various embodiments with various modifications suitable for the intended specific use. [Description of Reference Numerals] 190: Host computer / microcontroller / power supply 192: Processor 196: Computer readable medium 194: Instructions 198: Control / Status 110: Manufacturing tools and materials 114: (multiple) controllers 116: Processor 118: Memory 120: (multiple) timers 124: Check module 126: (multiple) cameras 130: Cleaning module 132: (multiple) nozzles 138: Mixing module 140: Motion Generator 142: Stirring Tips / Micro Tools 146: Die Module 148: Vacuum 150: Removable top 152: Removable bottom 154,156: Heating elements 158: Curing module 160: Oven 164: Planarization module 166: (multiple) heavy objects 168: Support plate 170: Wire bonding module 172: Bonding head 174: Chuck 178: Cutting module 180: Saw 184: Materials.
Claims
1. A method for manufacturing a semiconductor device, the method comprising: (a) preparing a substrate; (b) after (a), cleaning the chip mounting surface of the substrate; (c) after (b), supplying a homogenized die bonding paste onto the chip mounting surface of the substrate, and attaching a semiconductor chip on the chip mounting surface of the substrate via the homogenized die bonding paste, the semiconductor chip having a front surface, a rear surface opposite to the front surface, and a first electrode formed on the front surface; (d) after (c), curing the homogenized die bonding paste; (e) after (d), electrically connecting the first electrode of the semiconductor chip to a first terminal of the substrate via a first wire; as well as (f) after (e), sealing the semiconductor chip and the first lead with a sealing resin, wherein the homogenized die bonding paste used in (c) is initially provided as an unstirred die bonding paste comprising a plurality of Ag fillers, and Wherein, in (c), after the unstirred die bonding paste is stirred together with the plurality of Ag fillers for a first predetermined period of time, the homogenized die bonding paste is supplied onto the chip mounting surface of the substrate. 2 . The method according to claim 1 , wherein in (b), the chip mounting surface of the substrate is cleaned by a plasma cleaning method using Ar gas.
3. The method according to claim 1, The substrate comprises: the first terminal; and a second terminal provided on the chip mounting surface, The semiconductor chip further comprises: said front surface; the rear surface opposite to the front surface; the first electrode formed on the front surface; and a second electrode formed on the rear surface, in, In (b), the surface of the first terminal and the chip mounting surface of the second terminal are cleaned, wherein, in (c), the die bonding paste is supplied to the chip mounting surface of the second terminal, and Wherein, in (e), the second electrode of the semiconductor chip is electrically connected to the second terminal of the substrate via the homogenized die bonding paste.
4. The method according to claim 1, wherein in (c), the semiconductor chip is supplied onto the chip mounting surface of the substrate starting within a second predetermined period of time after the die bonding paste is supplied onto the chip mounting surface of the substrate. The method of claim 4 , wherein the second predetermined period of time is less than 60 minutes.
6. The method of claim 1, wherein in (c), the homogenized die bonding paste is agitated with vibration for the first predetermined period of time before the homogenized die bonding paste is supplied onto the chip mounting surface of the substrate.
7. The method according to claim 6, in, In (c), the homogenized die bonding paste is stirred at 40,000 vibrations per minute for the first predetermined period of time before the homogenized die bonding paste is dispensed onto the chip mounting surface of the substrate, and The first predetermined time period is at least 90 seconds and no more than 150 seconds. 8 . The method of claim 7 , wherein the unstirred die bonding paste used in (c) is a silver sintered epoxy paste including the plurality of Ag fillers. 9 . The method of claim 8 , wherein the unstirred die bonding paste used in (c) is a silver sintered epoxy paste including the plurality of Ag fillers and a plurality of AlN fillers.
10. The method according to claim 1, in, In (c), the homogenized die bonding paste is supplied onto the chip mounting surface of the substrate by using a dispenser, the dispenser comprising: nozzle; a syringe disposed above the nozzle and connected to the nozzle; and a piston disposed in the syringe, and wherein in (c), the homogenized die bonding paste is stirred in the syringe and dispensed onto the chip mounting surface of the substrate by pushing out the homogenized die bonding paste with the piston.
11. The method according to claim 1, wherein the substrate is a wiring substrate comprising glass fiber and epoxy resin, and in, In (f), the semiconductor chip and the wires are sealed with the sealing resin by using a compression molding method.
12. The method according to claim 11, further comprising: (g) After (f), heating the molded package including the semiconductor chip obtained by performing (f) in a state where the molded package is sandwiched by the first metal plate and the second metal plate.
13. A method for manufacturing a semiconductor module, the method comprising: (a) preparing a substrate having a chip mounting surface, the chip mounting surface having a first bonding area and a second bonding area; (b) after (a), cleaning each of the first bonding region and the second bonding region; (c) after (b), supplying a homogenized die bonding paste onto each of the first bonding area and the second bonding area; (d) after (c), attaching a first semiconductor chip on the first bonding area via the homogenized die bonding paste supplied onto the first bonding area, the first semiconductor chip having a first front surface, a first rear surface opposite to the first front surface, and a first electrode formed on the first front surface; (e) after (d), attaching a second semiconductor chip on the second bonding area via the homogenized die bonding paste supplied onto the second bonding area, the second semiconductor chip having a second front surface, a second rear surface opposite to the second front surface, and a second electrode formed on the second front surface; (f) after (e), curing the homogenized die bonding paste supplied to each of the first bonding region and the second bonding region; (g) after (f), electrically connecting the first electrode of the first semiconductor chip to a first terminal of the substrate via a first wire, and electrically connecting the second electrode of the second semiconductor chip to a second terminal of the substrate via a second wire; and (h) after (g), sealing the first semiconductor chip, the second semiconductor chip, the first wire, and the second wire with a sealing resin by compression molding, wherein the die bonding paste used in (c) is initially provided as an unstirred die bonding paste comprising a plurality of Ag fillers, and Wherein, in (c), after the unstirred die bonding paste is stirred together with the plurality of Ag fillers for a first predetermined period of time, the homogenized die bonding paste is supplied to each of the first bonding region and the second bonding region.
14. The method according to claim 13, further comprising: (i) After (h), heating the molded package including the first semiconductor chip and the second semiconductor chip obtained by performing (h) in a state where the molded package is sandwiched between a first metal plate and a second metal plate.
15. The method according to claim 14, wherein: In (b), each of the first bonding region and the second bonding region is cleaned by a plasma cleaning method using Ar argon gas.
16. The method according to claim 13, The first semiconductor chip is made of one of GaN and GaAs, wherein the second semiconductor chip is composed of one of Si and SiC, and The flatness of the first rear surface of the first semiconductor chip is lower than the flatness of the second rear surface of the second semiconductor chip.
17. A semiconductor device comprising: substrate; A semiconductor chip is mounted on a chip mounting surface of the substrate via the solidified homogenized die bonding paste; A wire electrically connects the first electrode of the semiconductor chip to a terminal; as well as a sealing body, sealing the semiconductor chip and the wire, The homogenized die bonding paste comprises a plurality of Ag fillers and a plurality of AlN fillers, The density of the plurality of AlN fillers per unit volume is less than the density of the plurality of Ag fillers per unit volume. 18 . The semiconductor device according to claim 17 , wherein a diameter of each of the plurality of AlN fillers is smaller than a diameter of each of the plurality of Ag fillers.
19. The semiconductor device according to claim 18, The semiconductor chip further comprises: front surface; a rear surface opposite to the front surface; the first electrode formed on the front surface; and a second electrode formed on the rear surface, wherein the semiconductor chip is mounted on the chip mounting surface of the substrate so that the rear surface of the semiconductor chip faces the chip mounting surface of the substrate, and The second electrode of the semiconductor chip is electrically connected to the substrate via the homogenized die bonding paste.
20. The semiconductor device according to claim 18, Before mounting the semiconductor chip, the homogenized die bonding paste is stirred at 40,000 vibrations per minute for at least 90 seconds and no longer than 150 seconds.
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