Semiconductor device, device preparation method and device test method
By designing multiple test electrodes in semiconductor devices, leakage of the functional layer can be detected in different directions, and the problem of leakage of the passivation layer cannot be detected in the prior art is solved, and the passivation effect of the functional layer is accurately evaluated.
Patent Information
- Application Number
- CN202411890727.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-03-21
AI Technical Summary
In the prior art, leakage testing of passivation layer mainly relies on the MIM structure, and the surface leakage of the passivation layer cannot be detected, resulting in the inability to accurately evaluate the passivation effect of the functional layer.
A semiconductor device is designed, including at least one set of leakage test electrodes. By providing the first test electrode, the second test electrode and the third test electrode, the leakage situation of the functional layer to be tested in different directions can be detected, and the impact of leakage in the vertical direction on detection can be separated.
Accurate detection of leakage on the surface of the functional layer and leakage along the lamination direction is achieved, and the evaluation accuracy of the passivation effect of the passivation layer is improved.
Smart Images
Figure CN119673921A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor device detection, and in particular to a semiconductor device, a device preparation method and a device testing method. Background Art
[0002] In the process of preparing semiconductor devices, one or more layers of passivation layer materials are usually grown to protect the surface of the functional layer materials. Taking the passivation layer as an example, the passivation layer protects the functional layer materials from reacting with the external environment and being modified. The passivation effect of the passivation layer significantly affects the gate characteristics, voltage resistance, RF performance and reliability of the device. The passivation effect of the passivation layer in the semiconductor device is determined by its growth quality and the surface treatment process of the passivation layer. In the actual process monitoring process, the passivation condition of the passivation layer is usually characterized by electrical testing of the leakage of the passivation layer. However, the current leakage test of the passivation layer mostly uses the MIM (Metal-Insulator-Metal) structure to test the leakage of the passivation layer in the vertical direction. The MIM structure is a structure in which the dielectric layer is sandwiched between two metal layers to test the leakage of the dielectric layer in the vertical direction. However, this test structure cannot test the surface leakage of the passivation layer. The dielectric layer is a type of functional layer.
[0003] Therefore, how to provide a method for accurately testing the surface leakage of the functional layer is a technical problem that needs to be solved urgently by those skilled in the art. Summary of the invention
[0004] In view of this, the purpose of the present invention is to provide a semiconductor device, a device preparation method and a device testing method, which solves the problem that in the prior art, leakage testing of the passivation layer mostly uses a MIM structure to test the leakage of the passivation layer in the vertical direction, but this MIM structure cannot test the surface leakage of the passivation layer.
[0005] In order to solve the above technical problems, the present invention provides a semiconductor device, comprising:
[0006] At least one set of leakage test electrodes, and a stacked device functional layer and a first functional layer to be tested;
[0007] Each group of leakage test electrodes at least includes a first test electrode, a second test electrode and a third test electrode;
[0008] The first test electrode is disposed on a first surface of the first functional layer to be tested, a first end of the second test electrode is exposed from the first surface, and a first distance is formed between the first test electrode and the first test electrode on the first surface;
[0009] The first functional layer to be tested also includes a second surface facing away from the first surface, the second end of the second test electrode exposes the second surface, and the second end of the second test electrode is the end of the second test electrode facing away from the first end of the second test electrode; the first test electrode is mapped on the second surface along the stacking direction to form a mapping area, the lead structure is arranged at the mapping area, and the lead structure is conductively connected to the third test electrode; the second test electrode and the lead structure form a second distance on the second surface;
[0010] Two opposite ends of the third test electrode expose the second surface and the first surface correspondingly.
[0011] Optionally, the third test electrode exposed on the second surface extends to cover the entire mapping area.
[0012] Optionally, the second surface of the first functional layer to be tested is close to the device functional layer, and a surface of the device functional layer close to the first functional layer to be tested is doped to form a low resistance region;
[0013] The third test electrode exposed on the second surface is connected to the low resistance area, and the low resistance area covers the entire mapping area.
[0014] Optionally, the third test electrode exposed on the first surface forms a third distance between the first surface and the first test electrode;
[0015] The third interval is equal to the first interval.
[0016] Optionally, the first spacing is equal to the second spacing.
[0017] Optionally, it also includes a second functional layer to be tested;
[0018] The second functional layer to be tested is arranged on a side close to the second surface of the first functional layer to be tested, and a two-dimensional electron gas covering the entire surface is formed on a side of the second functional layer to be tested that faces away from the second surface;
[0019] The second end of the second test electrode is located on a side surface of the second functional layer to be tested close to the second surface;
[0020] One end of the third testing electrode exposed from the second surface is conductively connected to the two-dimensional electron gas.
[0021] Optionally, a plurality of functional layers to be tested are stacked in the semiconductor device;
[0022] Each functional layer to be tested is correspondingly provided with a group of leakage test electrodes.
[0023] The present invention also provides a method for preparing a semiconductor device, which is used to prepare the semiconductor device as described above, comprising:
[0024] Providing a semiconductor preform, wherein the semiconductor preform comprises the device functional layer;
[0025] Preparing a patterned test electrode on the upper side of the device functional layer to obtain a first structure to be processed;
[0026] Depositing a passivation layer material on the upper side of the first structure to be processed to form a passivation layer, and etching the passivation layer to expose a portion of the patterned test electrode in a first area and a portion of the device functional layer in a second area; the first area is a region corresponding to the formation of the third test electrode, and the second area is a region corresponding to the formation of the second test electrode;
[0027] Depositing metal material in the first region and the second region to correspondingly form the second test electrode exposing the surface of the passivation layer and the third test electrode exposing the surface of the passivation layer;
[0028] A third area is selected on the surface of the passivation layer to deposit a metal material to form a first test electrode, thereby completing the preparation of the semiconductor device; the edge contour of the third area does not exceed the graphic test electrode, and there is no overlapping area between the third area and the first area.
[0029] The present invention also provides a semiconductor device testing method, comprising:
[0030] Providing a semiconductor device as described above;
[0031] Applying a first voltage to both the first test electrode and the third test electrode in the semiconductor device, applying a second voltage to the second test electrode, and acquiring a first current at the first test electrode and a second current at the third test electrode;
[0032] determining leakage information of the first surface of the first functional layer to be measured according to the first current;
[0033] determining leakage information of the second surface of the first functional layer to be measured according to the second current;
[0034] After determining the leakage information of the first surface of the first functional layer to be measured according to the first current, and determining the leakage information of the second surface of the first functional layer to be measured according to the second current, the method further includes:
[0035] Adjusting to apply a first voltage to both the first test electrode and the second test electrode in the semiconductor device, adjusting to apply a second voltage to the third test electrode, and acquiring a third current at the first test electrode;
[0036] Determine leakage information of the first functional layer to be tested along the stacking direction according to the third current and the first current; or,
[0037] Adjusting to apply a first voltage to both the second test electrode and the third test electrode in the semiconductor device, adjusting to apply a second voltage to the first test electrode, and acquiring a fourth current at the third test electrode;
[0038] The leakage information of the first functional layer to be measured along the stacking direction is determined according to the fourth current and the first current.
[0039] Optionally, after adjusting to apply a first voltage to both the first test electrode and the second test electrode in the semiconductor device and adjusting to apply a second voltage to the third test electrode, the method further includes:
[0040] acquiring a fifth current at the second test electrode;
[0041] The leakage information of the second surface of the first functional layer to be tested is verified according to the fifth current.
[0042] It can be seen that the semiconductor device provided by the present invention includes at least one group of leakage test electrodes, and a stacked device functional layer and a first functional layer to be tested, each group of leakage test electrodes includes at least a first test electrode, a second test electrode and a third test electrode, the first test electrode is arranged on the first surface of the first functional layer to be tested, the first end of the second test electrode exposes the first surface, and forms a first spacing with the first test electrode on the first surface, the first functional layer to be tested also includes a second surface facing away from the first surface, the second end of the second test electrode exposes the second surface, the second end of the second test electrode is the end of the second test electrode facing away from the first end of the second test electrode, the first test electrode is mapped on the second surface along the stacking direction to form a mapping area, the lead structure is arranged at the mapping area, and the lead structure is conductively connected to the third test electrode, the second test electrode and the lead structure form a second spacing on the second surface, and the opposite ends of the third test electrode correspondingly expose the second surface and the first surface. The present invention can detect the surface leakage of the first functional layer to be tested and the leakage along the stacking direction by setting the above three test electrodes. At least a first test electrode, a second test electrode and a third test electrode are arranged at the first functional layer to be tested, and the second end of the second test electrode is arranged to expose the second surface, and the third test electrode is conductively connected to a conducting structure arranged at a mapping area of the second surface, so that when the same voltage is applied to the first test electrode and the third test electrode, the first test electrode and the third test electrode are at the same potential, which can separate the influence of vertical leakage on detection, thereby achieving accurate detection of surface leakage of the functional layer to be tested.
[0043] In addition, the present invention also provides a device preparation method and a device testing method, which also have the above-mentioned beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS
[0044] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.
[0045] Figure 1 A schematic diagram of the structure of a semiconductor device provided by an embodiment of the present invention;
[0046] Figure 2 A schematic structural diagram of another semiconductor device provided by an embodiment of the present invention;
[0047] Figure 3 A schematic structural diagram of another semiconductor device provided by an embodiment of the present invention;
[0048] Figure 4A schematic structural diagram of another semiconductor device provided by an embodiment of the present invention;
[0049] Figure 5 A flowchart of a method for preparing a semiconductor device provided by an embodiment of the present invention;
[0050] Figures 6 to 10 An example diagram of a process for preparing a first functional layer to be tested and a leakage test electrode in a method for preparing a semiconductor device provided in an embodiment of the present invention;
[0051] Fig.11 A flowchart of a semiconductor device testing method provided by an embodiment of the present invention;
[0052] Fig.12 A structural example diagram of a semiconductor device testing method provided by an embodiment of the present invention;
[0053] Fig.13 A structural example diagram of another semiconductor device testing method provided by an embodiment of the present invention;
[0054] The following are the descriptions of the reference numerals:
[0055] 1-patterned test electrode, 2-two-dimensional electron gas, 10-device functional layer, 11-substrate, 20-first functional layer to be tested, 21-first surface, 22-second surface, 23-passivation layer, 24-first region, 25-second region, 26-second functional layer to be tested, 27-third functional layer to be tested, 31-first test electrode, 32-second test electrode, 33-third test electrode, d1-first spacing, d2-second spacing, d3-third spacing, 50-lead structure, 61-first current, 62-second current, 63-third current, 70-low resistance region. DETAILED DESCRIPTION
[0056] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0057] Please refer to Figure 1 , Figure 1 A schematic diagram of the structure of a semiconductor device provided by an embodiment of the present invention. The semiconductor device may include:
[0058] At least one set of leakage test electrodes, and a stacked device functional layer 10 and a first functional layer to be tested 20;
[0059] Each group of leakage test electrodes at least includes a first test electrode 31, a second test electrode 32 and a third test electrode 33;
[0060] The first test electrode 31 is disposed on the first surface 21 of the first functional layer 20 to be tested, the first end of the second test electrode 32 is exposed from the first surface 21 , and a first distance d1 is formed between the first test electrode 31 and the first test electrode 31 on the first surface 21 ;
[0061] The first functional layer to be tested 20 further includes a second surface 22 facing away from the first surface 21, a second end of the second test electrode 32 is exposed on the second surface 22, and the second end of the second test electrode 32 is an end of the second test electrode 32 facing away from the first end of the second test electrode 32; the first test electrode 31 is mapped on the second surface 22 along the stacking direction to form a mapping area, the conductive structure 50 is arranged at the mapping area, and the conductive structure 50 is conductively connected to the third test electrode 33; the second test electrode 32 and the conductive structure 50 form a second interval d2 on the second surface 22;
[0062] Two opposite ends of the third testing electrode 33 expose the second surface 22 and the first surface 21 correspondingly.
[0063] It should be noted that in this embodiment, the device functional layer 10 and the first functional layer to be tested 20 are stacked, and the first functional layer to be tested 20 is generally set on the surface of the device functional layer 10, and at least one group of leakage test electrodes is set for the first functional layer to be tested 20. In this embodiment, the number of leakage test electrodes set corresponding to one layer of the first functional layer to be tested 20 is not limited. For example, one group of leakage test electrodes can be set corresponding to one layer of the first functional layer to be tested 20, or two groups of leakage test electrodes can be set corresponding to one layer of the first functional layer to be tested 20, or three groups of leakage test electrodes can be set corresponding to one layer of the first functional layer to be tested 20. However, it should be further noted that in order to reduce the complexity of detection, only one group of leakage test electrodes can be set corresponding to one layer of the first functional layer to be tested 20. In order to improve the accuracy of detection, multiple groups of leakage test electrodes can be set corresponding to one layer of the first functional layer to be tested 20. In this embodiment, the device functional layer 10 can be set on the substrate 11.
[0064] In this embodiment, each group of leakage test electrodes can be configured to include a first test electrode 31, a second test electrode 32, and a third test electrode 33. By arranging the first test electrode 31 on the first surface 21 of the first functional layer 20 to be tested, the first end of the second test electrode 32 exposes the first surface 21. At this time, a first spacing d1 is formed between the second test electrode 32 and the first test electrode 31 on the first surface 21. At this time, when different voltages are applied to the first test electrode 31 and the second test electrode 32, the surface leakage current information of the first surface 21 of the first functional layer 20 to be tested can be obtained by detecting the current between the first spacing d1. In this embodiment, the first surface 21 of the first functional layer 20 to be tested can be set as the surface of the first functional layer 20 to be tested that is opposite to the device functional layer 10. In this embodiment, the first end of the second test electrode 32 exposes the first surface 21. It should be further explained that the first end of the second test electrode 32 in this embodiment is the end of the second test electrode 32 facing the first surface 21 and exposed from the first surface 21. Specifically, the first end of the second test electrode 32 can be set to protrude from the first surface 21 or flush with the first surface 21, that is, the first end of the second test electrode 32 can be set to be flush with the first surface 21, or it can also be set to protrude from the first surface 21. In this case, the second test electrode 32 forms a first spacing d1 along the first surface 21 with the first test electrode 31. Specifically, the first end of the second test electrode 32 can be set to be an end away from the device functional layer 10, such as Figure 1 As shown in , the first end of the second test electrode 32 is the upper end. Further, in this embodiment, the second end of the second test electrode 32 is set to expose the second surface 22. Correspondingly, the second end of the second test electrode 32 here is the end of the second test electrode 32 facing the second surface 22 and exposed from the second surface 22. Specifically, the second end of the second test electrode 32 can be set to protrude from the second surface 22 or be flush with the second surface 22. Specifically, the second end of the second test electrode 32 can be set to be the end close to the device functional layer 10, such as Figure 1As shown in , the first end of the second test electrode 32 is the lower end. The first test electrode 31 is mapped on the second surface 22 along the stacking direction to form a mapping area, which is the area of the first test electrode 31 facing the second surface 22 along the stacking direction. The lead structure 50 is arranged at the mapping area, and the lead structure 50 is conductively connected to the third test electrode 33. At this time, the lead structure 50 has the same potential as the third test electrode 33, and the second test electrode 32 and the lead structure 50 form a second interval d2 on the second surface 22. At this time, when different voltages are applied to the second test electrode 32 and the third test electrode 33, the surface leakage current information of the second surface 22 of the first functional layer 20 to be tested can be obtained by detecting the current between the second interval d2. In this embodiment, the second end of the second test electrode 32 exposes the second surface 22. The second end of the second test electrode 32 can be set to be flush with the second surface 22, or the second end of the second test electrode 32 can be set to protrude from the second surface 22. However, when the second test electrode 32 protrudes from the surface of the first functional layer 20 to be tested, it is necessary to ensure that other adjacent device layers are not affected. Accordingly, in this embodiment, it is necessary to ensure that the conductive structure 50 set at the mapping area should completely cover the first test electrode 31 along the stacking direction, that is, the conductive structure 50 at least completely occupies the mapping area. This embodiment does not limit the specific material of the conductive structure 50, as long as it can achieve conductive connection with the third test electrode 33 and ensure that the potential of the mapping area is consistent with the potential of the third test electrode 33. In this embodiment, the opposite ends of the third test electrode 33 are set to expose the second surface 22 and the first surface 21. Specifically, the opposite ends of the third test electrode 33 can be set to correspond to an end away from the device functional layer 10 and an end close to the device functional layer, that is, two ends along the stacking direction, such as Figure 1 As shown in , the two opposite ends of the third test electrode 33 correspond to the upper and lower ends of the third test electrode 33. Through the above arrangement, when the same voltage is applied to the first test electrode 31 and the third test electrode 33, the first test electrode 31 and the conductive structure arranged at the mapping area can have the same potential, thereby avoiding a voltage drop between the two along the stacking direction, thereby avoiding the generation of current between the first test electrode 31 and the third test electrode 33, and avoiding affecting the detection of the surface leakage current of the first functional layer 20 to be tested.
[0065] In addition, it should be noted that the potentials described in this embodiment are the same, and the conductive material is used as an ideal conductive material for description, and the internal resistance of the structure formed by the conductive material itself is not considered, and it does not affect the final detection method and detection structure. In this embodiment, the first test electrode 31, the second test electrode 32 and the third test electrode 33 can be set as metal electrodes.
[0066] In addition, in a feasible manner, the first functional layer to be tested is specifically a dielectric layer, and the thickness information of the dielectric layer can be determined by testing the capacitance between the first test electrode 31 and the third test electrode 33. Specifically, the following formula can be used:
[0067] ;
[0068] in is the dielectric capacitance of the dielectric layer, is the dielectric constant of vacuum, is the dielectric constant of the dielectric layer, which can be measured by ellipsometer. The dielectric constant is the inherent property of the dielectric layer material. is the facing area between the first test electrode 31 and the lead structure 50, is the thickness of the dielectric layer. In this embodiment, the dielectric layer may be a passivation layer, and may be specifically a silicon nitride passivation layer.
[0069] Furthermore, in order to ensure the convenience of manufacturing the lead structure 50 , the third test electrodes 33 exposed on the second surface 22 may be extended to cover the entire mapping area.
[0070] It should be noted that in this embodiment, the third test electrode 33 exposed on the second surface 22 is extended along the second surface 22 of the first functional layer 20 to be tested until the entire mapping area is covered. At this time, the portion of the third test electrode 33 extending outward and covering the mapping area is the above-mentioned conductive structure 50.
[0071] Further, in a feasible embodiment, reference may be made to Figure 2 , Figure 2 A schematic diagram of another semiconductor device structure provided by an embodiment of the present invention. The second surface 22 of the first functional layer 20 to be tested may be arranged close to the device functional layer 10, and the surface of the device functional layer 10 close to the first functional layer 20 to be tested may be doped to form a low resistance region 70;
[0072] The third test electrode 33 exposed on the second surface 22 is connected to the low resistance region 70 , and the low resistance region 70 covers the entire mapping area.
[0073] It should be noted that in this embodiment, the surface of the device functional layer 10 close to the first functional layer to be tested 20 is doped to form a low resistance region 70, and the low resistance region 70 covers the entire mapping area. At this time, the low resistance region 70 corresponding to the mapping area is the above-mentioned conductive structure 50, and the low resistance region 70 is in contact with the third test electrode 33, so that the conductive structure 50 and the third test electrode 33 have the same potential. In this embodiment, by setting the low resistance region 70 formed by doping on the surface of the device functional layer 10 close to the first functional layer to be tested 20, the conductive structure 50 will not affect the thickness of the first functional layer to be tested 20, and further improve the accuracy of the detection of the first functional layer to be tested 20. In this embodiment, the above-mentioned low resistance region 70 can be prepared by ion implantation, and the low resistance region 70 is in ohmic contact with the third test electrode 33.
[0074] Furthermore, in order to improve the convenience of detection, a third test electrode 33 exposed on the first surface 21 may be provided to form a third distance d3 between the first surface 21 and the first test electrode 31; the third distance d3 is equal to the first distance d1.
[0075] In this embodiment, a third test electrode 33 exposed on the first surface 21 is provided, and a third spacing d3 formed between the first surface 21 and the first test electrode 31 is equal to a first spacing d1 formed between the first surface 21 and the first test electrode 31 by the second test electrode 32 exposed on the first surface 21, so that when the voltage applied to the first test electrode 31, the second test electrode 32 and the third test electrode 33 is adjusted, the surface leakage current obtained is the same, thereby improving the simplicity of detection. It should be further explained here that the third spacing d3 and the first spacing d1 can be set to be unequal.
[0076] Furthermore, in order to further improve the simplicity of detecting the leakage information on the surface of the first functional layer 20 to be tested, the first distance d1 and the second distance d2 may be set to be equal.
[0077] In this embodiment, by setting the second test electrode 32 that exposes the first surface 21, the first spacing d1 formed between the first surface 21 and the first test electrode 31 is equal to the second spacing d2 formed between the second surface 22 and the conductive structure 50 by the second test electrode 32 that exposes the second surface 22, which can improve the convenience of processing the leakage information when detecting the leakage information of the first surface 21 and the second surface 22 of the first functional layer 20 to be tested along the stacking direction, and when adjusting the voltage applied by each test electrode, the leakage information of the first spacing d1 and the second spacing d2 can be replaced, thereby improving the convenience of detection. It should be further explained here that the above-mentioned first spacing d1 and the second spacing d2 can be set to be unequal, and because it is necessary to ensure that the conductive structure 50 completely covers the mapping area, when the first spacing d1 and the second spacing d2 are unequal, it can be specifically manifested that the first spacing d1 is greater than the second spacing d2.
[0078] Further, in a feasible embodiment, reference may be made to Figure 3 , Figure 3 A schematic diagram of the structure of another semiconductor device provided by an embodiment of the present invention. The semiconductor device may further include a second functional layer to be tested 26;
[0079] The second functional layer to be tested 26 is disposed on a side close to the second surface 22 of the first functional layer to be tested 20 , and a two-dimensional electron gas 2 covering the entire surface is formed on a side of the second functional layer to be tested 26 facing away from the second surface 22 ;
[0080] The second end of the second test electrode 32 is located on a side surface of the second functional layer 26 to be tested close to the second surface 22 ;
[0081] One end of the third testing electrode 33 that is exposed from the second surface 22 is conductively connected to the two-dimensional electron gas 2 .
[0082] It should be noted that, in this embodiment, a two-dimensional electron gas 2 covering the entire surface is formed on the side of the second functional layer 26 to be tested that faces away from the second surface 22, and at this time, one end of the third test electrode 33 that exposes the second surface 22 is conductively connected to the two-dimensional electron gas 2, that is, the two-dimensional electron gas 2 covers the mapping area formed by the second test electrode 32 on the second surface 22 of the first functional layer 20 to be tested along the stacking direction, and at the same time covers the mapping area formed by the first test electrode 31 along the stacking direction directly opposite to the second surface 22 of the first functional layer 20 to be tested. At this time, by applying a voltage to the second test electrode 32 and applying another voltage to the first test electrode 31 and the third test electrode 33, on the one hand, leakage information of the first surface 21 of the first functional layer 20 to be tested can be obtained according to the current value between the first test electrode 31 and the second test electrode 32, and on the other hand, leakage information of the second functional layer 26 to be tested along the stacking direction can be obtained according to the current value between the third test electrode 33 and the second test electrode 32. This embodiment does not limit the specific manner of conductively connecting the third test electrode 33 to the two-dimensional electron gas 2 . For example, the structure doping between the third test electrode 33 and the two-dimensional electron gas 2 can be set to a low resistance region 70 to achieve conductive connection between the third test electrode 33 and the two-dimensional electron gas 2 .
[0083] Furthermore, in order to improve the functionality of the detection structure, a plurality of functional layers to be detected may be stacked in the semiconductor device;
[0084] Each functional layer to be tested is correspondingly provided with a group of leakage test electrodes.
[0085] It should be noted that, in this embodiment, a plurality of functional layers to be tested are stacked in the semiconductor device, and each functional layer to be tested is correspondingly provided with a group of leakage test electrodes, so that the detection efficiency can be improved.
[0086] In a feasible embodiment, multiple functional layers can be provided, which can be referred to as Figure 4 , Figure 4 A schematic diagram of the structure of another semiconductor device provided by an embodiment of the present invention includes a first functional layer 20 to be tested and a third functional layer 27 to be tested.
[0087] A semiconductor device provided by an embodiment of the present invention includes at least one group of leakage test electrodes, and a device functional layer 10 and a first functional layer to be tested 20 that are stacked, each group of leakage test electrodes includes at least a first test electrode 31, a second test electrode 32 and a third test electrode 33, the first test electrode 31 is arranged on the first surface 21 of the first functional layer to be tested 20, the first end of the second test electrode 32 exposes the first surface 21, and forms a first distance d1 with the first test electrode 31 on the first surface 21, the first functional layer to be tested also includes a second surface facing away from the first surface, the second end of the second test electrode exposes the second surface, the second end of the second test electrode is the end of the second test electrode facing away from the first end of the second test electrode, the first test electrode is mapped on the second surface along the stacking direction to form a mapping area, the lead structure is arranged at the mapping area, and the lead structure is conductively connected to the third test electrode, the second test electrode and the lead structure form a second distance on the second surface, and the opposite ends of the third test electrode correspondingly expose the second surface and the first surface. The present invention arranges at least a first test electrode 31, a second test electrode 32 and a third test electrode 33 at the first functional layer 20 to be tested, and the second end of the second test electrode 32 is arranged to expose the second surface 22, and the third test electrode 33 is conductively connected to a conducting structure 50 arranged at a mapping area of the second surface 22, so that when the same voltage is applied to the first test electrode 31 and the third test electrode 33, the first test electrode 31 and the third test electrode 33 are at the same potential, which can separate the influence of vertical leakage on detection, thereby realizing accurate detection of surface leakage of the functional layer to be tested.
[0088] In addition, in the embodiment of the present invention, the third test electrode 33 exposed on the second surface 22 is extended along the second surface 22 of the first functional layer 20 to be tested until the entire mapping area is covered, and the portion of the third test electrode 33 extending from the second surface 22 and covering the mapping area is used as a conductive structure 50, thereby ensuring the convenience of preparing the conductive structure 50; a low resistance region 70 formed by doping is arranged on the surface of the device functional layer 10 close to the first functional layer 20 to be tested, so that the conductive structure 50 will not affect the thickness of the first functional layer 20 to be tested, thereby further improving the accuracy of detecting the first functional layer 20 to be tested; the third spacing d3 is set equal to the first spacing d1, so that when the voltage applied to the first test electrode 31, the second test electrode 32 and the third test electrode 33 is adjusted, the surface leakage current obtained is the same, thereby improving the simplicity of detection; by setting the first spacing d1 equal to the second spacing d2, the convenience of processing leakage information can be improved, and when adjusting each test electrode When the voltage is applied to the electrodes, the leakage information of the first spacing d1 and the second spacing d2 can be replaced, thereby improving the convenience of detection; by setting the second functional layer 26 to be tested, and conductively connecting the third test electrode 33 to the two-dimensional electron gas 2 formed on one side of the second functional layer 26 to be tested, at this time, by applying a voltage at the second test electrode 32, and applying another voltage at the first test electrode 31 and the third test electrode 33, on the one hand, the leakage information of the first surface 21 of the first functional layer 20 to be tested can be obtained according to the current value between the first test electrode 31 and the second test electrode 32, and on the other hand, the leakage information of the second functional layer 26 to be tested along the stacking direction can be obtained according to the current value between the third test electrode 33 and the second test electrode 32, thereby improving the functionality of the device; by setting a plurality of functional layers to be tested in a stacked manner in the semiconductor device, and each functional layer to be tested is correspondingly provided with a group of leakage test electrodes, the efficiency of leakage detection of the semiconductor device can be improved.
[0089] A method for preparing a semiconductor device provided in an embodiment of the present invention is introduced below, which is used to prepare the semiconductor device as described above, and the method for preparing the semiconductor device described below and the semiconductor device described above can be referred to each other.
[0090] Please refer to Figure 5 , Figure 5 A flowchart of a method for preparing a semiconductor device provided by an embodiment of the present invention, the method may include:
[0091] S101 : providing a semiconductor preform, wherein the semiconductor preform comprises a device functional layer 10 .
[0092] The execution subject of this embodiment is a semiconductor device manufacturing system. In this embodiment, the semiconductor preform may also include a substrate 11 carrying a functional layer 10 for manufacturing a device.
[0093] S102: preparing a patterned test electrode 1 on the upper side of the device functional layer 10 to obtain a first structure to be processed.
[0094] It should be noted that the graphic test electrode 1 prepared in this embodiment corresponds to the subsequent formation of the third test electrode 33, and the structure extending from the third test electrode 33 to form the lead structure 50. In this embodiment, the graphic test electrode 1 can be made of ITO (indium tin oxide), graphene, etc., or can also be made of metal materials such as Ti (titanium), Pt (platinum), Al (aluminum), Au (gold), etc. This embodiment does not limit the specific method of preparing the metal electrode. For example, one or more methods of electron beam evaporation, sputtering, and wet electroplating can be used to prepare the metal electrode. For details in this embodiment, please refer to Figures 6 to 10 , Figures 6 to 10 This is a flow chart of preparing a first functional layer to be tested and a leakage test electrode in a semiconductor device preparation method provided in an embodiment of the present invention. Figure 6 .
[0095] S103: depositing a passivation layer 23 material on the upper side of the first structure to be processed to form a passivation layer 23, and etching the passivation layer 23 to expose a portion of the patterned test electrode 1 in the first area 24, and to expose a portion of the device functional layer 10 in the second area 25; the first area 24 is a region corresponding to the formation of the third test electrode 33, and the second area 25 is a region corresponding to the formation of the second test electrode 32.
[0096] In this embodiment, etching exposes the first region 24 and the second region 25 for the subsequent preparation of the second test electrode 32 and the third test electrode 33. In this embodiment, the passivation layer 23 is usually made of high-resistance materials with few defects, such as aluminum oxide, silicon oxide, silicon nitride and other materials, and the passivation layer 23 can be prepared by PECVD (plasma enhanced chemical vapor deposition), LPCVD (low pressure chemical vapor deposition), ALD (atomic layer deposition), MOCVD (metal organic chemical vapor deposition), MBE (molecular beam epitaxy) and other processes. In this embodiment, the etching process can be wet chemical etching or dry etching, and the dry etching process includes chemical reaction etching and physical bombardment etching. This step S103 can refer to Figure 7 and Figure 8 .
[0097] S104 : depositing metal material on the first region 24 and the second region 25 to correspondingly form a second test electrode 32 exposing the surface of the passivation layer 23 , and a third test electrode 33 exposing the surface of the passivation layer 23 .
[0098] In this embodiment, one or more methods of electron beam evaporation, sputtering, and wet plating can be used to prepare the second test electrode 32 and the third test electrode 33. Fig. 9 .
[0099] S105 : depositing metal material in a third region on the surface of the passivation layer 23 to form a first test electrode 31 , thereby completing the preparation of the semiconductor device; the edge contour of the third region does not exceed the patterned test electrode 1 , and there is no overlapping area between the third region and the first region 24 .
[0100] In this embodiment, the extended portion of the third test electrode 33 is formed into a lead structure 50, so that the third test electrode 33 and the lead structure 50 are integrally manufactured, thereby improving the convenience of manufacturing. Fig.10 .
[0101] In this embodiment, the first functional layer to be tested and the leakage test electrode are prepared on the upper side of the device functional layer 10 by using photolithography, deposition and etching processes to form the semiconductor device as described above. The semiconductor device prepared in this embodiment at least includes:
[0102] At least one set of leakage test electrodes, and a stacked device functional layer 10 and a first functional layer to be tested;
[0103] Each group of leakage test electrodes at least includes a first test electrode 31, a second test electrode 32 and a third test electrode 33;
[0104] The first test electrode 31 is disposed on the first surface of the first functional layer to be tested, the first end of the second test electrode 32 is exposed from the first surface, and forms a first distance with the first test electrode 31 on the first surface;
[0105] The first functional layer to be tested also includes a second surface facing away from the first surface, the second end of the second test electrode is exposed on the second surface, and the second end of the second test electrode is the end of the second test electrode facing away from the first end of the second test electrode; the first test electrode is mapped on the second surface along the stacking direction to form a mapping area, the lead structure is arranged at the mapping area, and the lead structure is conductively connected to the third test electrode; the second test electrode and the lead structure form a second distance on the second surface;
[0106] Two opposite ends of the third testing electrode expose the second surface and the first surface correspondingly.
[0107] The semiconductor device preparation method provided by the embodiment of the present invention comprises S101: providing a semiconductor preform, wherein the semiconductor preform comprises a device functional layer 10; S102: preparing a patterned test electrode 1 on the upper side of the device functional layer 10 to obtain a first structure to be processed; S103: depositing a passivation layer 23 material on the upper side of the first structure to be processed to form a passivation layer 23, and etching the passivation layer 23 to expose a portion of the patterned test electrode 1 in a first region 24 and expose a portion of the device functional layer 10 in a second region 25; the first region 24 is formed to form a third test electrode 1 corresponding to the patterned test electrode 1; The area of the test electrode 33, the second area 25 is the area corresponding to the formation of the second test electrode 32; S104: depositing metal material in the first area 24 and the second area 25, corresponding to forming the second test electrode 32 exposing the surface of the passivation layer 23, and the third test electrode 33 exposing the surface of the passivation layer 23; S105: selecting a third area on the surface of the passivation layer 23 to deposit metal material to form the first test electrode 31, and completing the preparation of the semiconductor device; the edge contour of the third area does not exceed the patterned test electrode 1, and there is no overlapping area between the third area and the first area 24. The present invention arranges at least a first test electrode 31, a second test electrode 32 and a third test electrode 33 at the first functional layer to be tested, and the second end of the second test electrode 32 is arranged to expose the second surface, and the third test electrode 33 is conductively connected to a lead structure 50 arranged at a mapping area of the second surface, so that when the same voltage is applied to the first test electrode 31 and the third test electrode 33, the first test electrode 31 and the third test electrode 33 are at the same potential, which can separate the influence of vertical leakage on detection, thereby realizing accurate detection of surface leakage of the functional layer to be tested.
[0108] A semiconductor device testing method provided by an embodiment of the present invention is introduced below. The semiconductor device testing method described below and the semiconductor device described above can be referenced to each other.
[0109] Please refer to Fig.11 , Fig.11 A flowchart of a semiconductor device testing method provided by an embodiment of the present invention, the method may include:
[0110] S201: Provide the semiconductor device as described above.
[0111] S202 : applying a first voltage to both the first test electrode 31 and the third test electrode 33 in the semiconductor device, applying a second voltage to the second test electrode 32 , obtaining a first current 61 at the first test electrode 31 , and obtaining a second current 62 at the third test electrode 33 .
[0112] It should be noted that step S202 can refer to Fig.12 , Fig.12A structural example diagram of a semiconductor device testing method provided by an embodiment of the present invention. In this embodiment, a first voltage is applied to both the first test electrode 31 and the third test electrode 33, and a second voltage is applied to the second test electrode 32. At this time, the potentials of the first test electrode 31 and the third test electrode 33 are the same, that is, no current flows between the first test electrode 31 and the third test electrode 33 on the first surface 21 of the first functional layer 20 to be tested, and no current flows between the first test electrode 31 and the lead structure 50 along the stacking direction of the first functional layer 20 to be tested. At this time, if there is leakage on the first surface 21 of the first functional layer 20 to be tested, then only on the first surface 21 of the first functional layer 20 to be tested, a leakage current flows between the first test electrode 31 and the second test electrode 32, that is, the above-mentioned first current 61. If there is leakage on the second surface 22 of the first functional layer 20 to be tested, then only on the second surface 22 of the first functional layer 20 to be tested, a leakage current flows between the second test electrode 32 and the third test electrode 33, that is, the above-mentioned second current 62. In this embodiment, the first voltage can be set to zero voltage and the second voltage can be set to positive voltage.
[0113] S203 : determining leakage information of the first surface 21 of the first functional layer 20 to be tested according to the first current 61 .
[0114] In this embodiment, the leakage information of the first surface 21 of the first functional layer 20 to be tested can be determined based on whether the first current 61 exists and the magnitude of the first current 61. That is, if the first current 61 exists, the first surface 21 of the first functional layer 20 to be tested has leakage.
[0115] S204 : Determine leakage information of the second surface 22 of the first functional layer 20 to be tested according to the second current 62 .
[0116] According to the existence and magnitude of the second current 62 , leakage information of the second surface 22 of the first functional layer 20 to be tested can be determined, that is, if the second current 62 exists, leakage occurs on the second surface 22 of the first functional layer 20 to be tested.
[0117] After determining the leakage information of the first surface 21 of the first functional layer 20 to be tested according to the first current 61 and determining the leakage information of the second surface 22 of the first functional layer 20 to be tested according to the second current 62, the method may further include:
[0118] S205 : adjusting to apply a first voltage to both the first test electrode 31 and the second test electrode 32 in the semiconductor device, adjusting to apply a second voltage to the third test electrode 33 , and acquiring a third current 63 at the first test electrode 31 .
[0119] This step S202 can refer to Fig.13 , Fig.13A structural example diagram of another semiconductor device testing method provided by an embodiment of the present invention. In this embodiment, the parameters of the voltage applied to each test electrode are adjusted, and the first voltage is applied to both the first test electrode 31 and the second test electrode 32. At this time, no current flows between the first test electrode 31 and the second test electrode 32 on the first surface 21 of the first functional layer 20 to be tested, and a second voltage is applied to the third test electrode 33. At this time, if there is leakage on the first surface 21 of the first functional layer 20 to be tested, there is leakage current between the first test electrode 31 and the third test electrode 33 at the first surface 21 of the first functional layer 20 to be tested. If there is leakage on the second surface 22 of the first functional layer 20 to be tested, there is leakage current between the second test electrode 32 and the third test electrode 33 at the second surface 22 of the first functional layer 20 to be tested. If there is leakage on the first functional layer 20 to be tested along the stacking direction, there is leakage current between the first test electrode 31 and the third test electrode 33 in the first functional layer 20 to be tested along the stacking direction. That is, if there is leakage current between the first test electrode 31 and the third test electrode 33 in this embodiment, that is, the third current 63, it is caused by the leakage phenomenon of the first surface 21 of the first functional layer 20 to be tested and the leakage phenomenon of the first functional layer 20 to be tested along the stacking direction. Fig.12 and Fig.13 The arrows used to mark the current are only examples and do not limit the specific direction.
[0120] S206 : determining leakage information of the first functional layer 20 to be tested along the stacking direction according to the third current 63 and the first current 61 .
[0121] In this embodiment, since the first current 61 is also the leakage current of the first surface 21 of the first functional layer 20 to be tested, the third current 63 is compared with the first current 61 to determine the leakage current of the first functional layer 20 to be tested along the stacking direction.
[0122] or,
[0123] S207 : adjusting to apply the first voltage to both the second test electrode 32 and the third test electrode 33 in the semiconductor device, adjusting to apply the second voltage to the first test electrode 31 , and acquiring a fourth current at the third test electrode 33 .
[0124] Correspondingly, in another manner, in this embodiment, the parameters of the voltage applied to each test electrode are adjusted, and the first voltage is applied to both the second test electrode 32 and the third test electrode 33. At this time, no current flows between the second test electrode 32 and the third test electrode 33 on the second surface 22 of the first functional layer 20 to be tested, and a second voltage is applied to the first test electrode 31. At this time, if there is leakage on the first surface 21 of the first functional layer 20 to be tested, then at the first surface 21 of the first functional layer 20 to be tested, there is leakage current between the first test electrode 31 and the third test electrode 33, and there is leakage current between the first test electrode 31 and the second test electrode 32. At the second surface 22 of the first functional layer 20 to be tested, no current flows between the second test electrode 32 and the third test electrode 33. If there is leakage along the stacking direction of the first functional layer 20 to be tested, there is leakage current between the first test electrode 31 and the third test electrode 33 in the first functional layer 20 to be tested along the stacking direction. That is, if there is leakage current between the first test electrode 31 and the third test electrode 33 in this embodiment, that is, the fourth current, it is caused by the leakage phenomenon of the first surface 21 of the first functional layer 20 to be tested and the leakage phenomenon of the first functional layer 20 to be tested along the stacking direction.
[0125] S208 : determining leakage information of the first functional layer 20 to be tested along the stacking direction according to the fourth current and the first current 61 .
[0126] In this embodiment, since the first current 61 is also the leakage current of the first surface 21 of the first functional layer 20 to be tested, the fourth current is compared with the first current 61 to determine the leakage current of the first functional layer 20 to be tested along the stacking direction.
[0127] Further, in order to improve the accuracy of leakage detection of the first functional layer 20 to be tested, after adjusting the first voltage to be applied to both the first test electrode 31 and the second test electrode 32 in the semiconductor device and adjusting the second voltage to be applied to the third test electrode 33, the method may further include:
[0128] acquiring a fifth current at the second test electrode 32;
[0129] The leakage information of the second surface 22 of the first functional layer to be tested 20 is verified according to the fifth current.
[0130] In this embodiment, when the first voltage is applied to the first test electrode 31 and the third test electrode 33 in the semiconductor device and the second voltage is applied to the second test electrode 32, a second current 62 can be obtained at the third test electrode 33, and the second current 62 is the surface leakage current of the second surface 22 of the first functional layer 20 to be tested. When the first voltage is applied to the first test electrode 31 and the second test electrode 32 in the semiconductor device and the second voltage is applied to the third test electrode 33, a fifth current can be obtained at the second test electrode 32, and the fifth current is the surface leakage current of the second surface 22 of the first functional layer 20 to be tested at this time. Therefore, the fifth current is compared with the second current 62 for detection to verify the leakage information of the second surface 22 of the first functional layer 20 to be tested.
[0131] Correspondingly, when the first voltage is applied to the second test electrode 32 and the third test electrode 33 in the semiconductor device, and the second voltage is applied to the first test electrode 31, a sixth current at the second test electrode 32 can be obtained. Based on the sixth current, compared with the first current 61, the leakage information of the first surface 21 of the first functional layer 20 to be tested can be verified.
[0132] The semiconductor device testing method provided by the embodiment of the present invention includes S201: providing a semiconductor device as described above; S202: applying a first voltage to both a first test electrode 31 and a third test electrode 33 in the semiconductor device, applying a second voltage to the second test electrode 32, and obtaining a first current 61 at the first test electrode 31, and obtaining a second current 62 at the third test electrode 33; S203: determining leakage information of a first surface 21 of a first functional layer 20 to be tested according to the first current 61; S204: determining leakage information of a second surface 22 of the first functional layer 20 to be tested according to the second current 62; after determining the leakage information of the first surface 21 of the first functional layer 20 to be tested according to the first current 61, determining the leakage information of the first surface 22 of the first functional layer 20 to be tested according to the second current 62 After obtaining the leakage information of the second surface 22 of the semiconductor device, the method may further include: S205: adjusting the first voltage applied to the first test electrode 31 and the second test electrode 32 in the semiconductor device, adjusting the second voltage applied to the third test electrode 33, and obtaining the third current 63 at the first test electrode 31; S206: determining the leakage information of the first functional layer 20 to be tested along the stacking direction according to the third current 63 and the first current 61; or, S207: adjusting the first voltage applied to the second test electrode 32 and the third test electrode 33 in the semiconductor device, adjusting the second voltage applied to the first test electrode 31, and obtaining the fourth current at the third test electrode 33; S208: determining the leakage information of the first functional layer 20 to be tested along the stacking direction according to the fourth current and the first current 61. The present invention sets at least a first test electrode 31, a second test electrode 32 and a third test electrode 33 at the first functional layer 20 to be tested, and sets the second end of the second test electrode 32 to expose the second surface 22, and the third test electrode 33 is conductively connected to the lead structure 50 set at the mapping area of the second surface 22, so that when the same voltage is applied to the first test electrode 31 and the third test electrode 33, the first test electrode 31 and the third test electrode 33 are both at the same potential, which can separate the influence of vertical leakage on the detection, thereby accurately detecting the surface leakage of the functional layer to be tested. In addition, the embodiment of the present invention verifies the leakage information of the second surface 22 of the first functional layer 20 to be tested according to the fifth current, thereby improving the accuracy of leakage detection of the first functional layer 20 to be tested.
[0133] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.
[0134] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.
[0135] Finally, it should be noted that, in this article, relationships such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variations are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.
[0136] The semiconductor device, device preparation method and device testing method provided by the present invention are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for general technicians in this field, according to the idea of the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.
Claims
1. A semiconductor device, characterized in that: include: At least one set of leakage test electrodes, and a stacked device functional layer (10) and a first functional layer to be tested (20); Each group of leakage test electrodes comprises at least a first test electrode (31), a second test electrode (32) and a third test electrode (33); The first test electrode (31) is arranged on the first surface (21) of the first functional layer (20) to be tested, the first end of the second test electrode (32) exposes the first surface (21), and forms a first distance (d1) with the first test electrode (31) on the first surface (21); The first functional layer to be tested (20) further comprises a second surface (22) facing away from the first surface (21); the second end of the second test electrode (32) exposes the second surface (22); the second end of the second test electrode (32) is the end of the second test electrode (32) facing away from the first end of the second test electrode (32); the first test electrode (31) is mapped onto the second surface (22) along a stacking direction to form a mapping area; a lead structure (50) is arranged at the mapping area, and the lead structure (50) is conductively connected to the third test electrode (33); the second test electrode (32) and the lead structure (50) form a second spacing (d2) on the second surface (22); The second surface (22) and the first surface (21) are correspondingly exposed at two opposite ends of the third test electrode (33).
2. The semiconductor device according to claim 1, wherein: The third test electrode (33) exposed on the second surface (22) extends to cover the entire mapping area.
3. The semiconductor device according to claim 1, wherein: The second surface (22) of the first functional layer to be tested (20) is close to the device functional layer (10), and a surface of the device functional layer (10) close to the first functional layer to be tested (20) is doped to form a low resistance region (70); The third test electrode (33) exposed on the second surface (22) is connected to the low resistance area (70), and the low resistance area (70) covers the entire mapping area.
4. The semiconductor device according to claim 1, wherein: The third test electrode (33) is exposed on the first surface (21), and a third distance (d3) is formed between the first surface (21) and the first test electrode (31); The third distance (d3) is equal to the first distance (d1).
5. The semiconductor device according to claim 1, wherein: The first distance (d1) is equal to the second distance (d2).
6. The semiconductor device according to claim 1, wherein: It also includes a second functional layer to be tested (26); The second functional layer to be tested (26) is arranged on a side close to the second surface (22) of the first functional layer to be tested (20), and a two-dimensional electron gas (2) covering the entire surface is formed on a side of the second functional layer to be tested (26) facing away from the second surface (22); The second end of the second test electrode (32) is located on a side surface of the second functional layer (26) to be tested that is close to the second surface (22); One end of the third test electrode (33) that exposes the second surface (22) is conductively connected to the two-dimensional electron gas (2).
7. A method for preparing a semiconductor device, characterized in that: For preparing a semiconductor device as claimed in any one of claims 1 to 6, comprising: Providing a semiconductor preform, the semiconductor preform comprising the device functional layer (10); Preparing a patterned test electrode (1) on the upper side of the device functional layer (10) to obtain a first structure to be processed; Depositing a passivation layer material on the upper side of the first structure to be processed to form a passivation layer (23), and etching the passivation layer (23) to expose a portion of the patterned test electrode (1) in a first area (24), and to expose a portion of the device functional layer (10) in a second area (25); the first area (24) is a region corresponding to the formation of the third test electrode (33), and the second area (25) is a region corresponding to the formation of the second test electrode (32); Depositing metal material in the first region (24) and the second region (25) to correspondingly form the second test electrode (32) exposing the surface of the passivation layer (23), and the third test electrode (33) exposing the surface of the passivation layer (23); A third area is selected on the surface of the passivation layer (23) to deposit a metal material to form a first test electrode (31), thereby completing the preparation of the semiconductor device; the edge contour of the third area does not exceed the patterned test electrode (1), and there is no overlapping area between the third area and the first area (24).
8. A semiconductor device testing method, characterized in that: include: Providing a semiconductor device according to any one of claims 1 to 6; Applying a first voltage to both the first test electrode (31) and the third test electrode (33) in the semiconductor device, applying a second voltage to the second test electrode (32), and obtaining a first current (61) at the first test electrode (31), and obtaining a second current (62) at the third test electrode (33); Determining leakage information of the first surface (21) of the first functional layer (20) to be tested according to the first current (61); Determining leakage information of the second surface (22) of the first functional layer (20) to be tested according to the second current (62); After determining the leakage information of the first surface (21) of the first functional layer (20) to be tested according to the first current (61), and determining the leakage information of the second surface (22) of the first functional layer (20) to be tested according to the second current (62), the method further comprises: Adjusting to apply a first voltage to both the first test electrode (31) and the second test electrode (32) in the semiconductor device, adjusting to apply a second voltage to the third test electrode (33), and acquiring a third current (63) at the first test electrode (31); Determining leakage information of the first functional layer (20) to be tested along a stacking direction according to the third current (63) and the first current (61); or, adjusting to apply a first voltage to both the second test electrode (32) and the third test electrode (33) in the semiconductor device, adjusting to apply a second voltage to the first test electrode (31), and obtaining a fourth current at the third test electrode (33); The leakage information of the first functional layer (20) to be tested along the stacking direction is determined according to the fourth current and the first current (61).
9. The semiconductor device testing method according to claim 8, characterized in that: After adjusting the first test electrode (31) and the second test electrode (32) in the semiconductor device to apply a first voltage, and adjusting the third test electrode (33) to apply a second voltage, the method further comprises: obtaining a fifth current at the second test electrode (32); The leakage information of the second surface (22) of the first functional layer (20) to be tested is verified according to the fifth current.