Semiconductor device

By using multi-layered bonding materials in semiconductor devices, the problem of narrow heat dissipation path in the prior art is solved, more effective heat dissipation performance is achieved, and the overall performance of semiconductor devices is improved.

CN119673928APending Publication Date: 2025-03-21DENSO CORP
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Patent Information

Application Number
CN202411878701.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2021-05-27
Filing Date
2022-04-21
Publication Date
2025-03-21

AI Technical Summary

Technical Problem

The existing semiconductor device is equipped with an uneven oxide film on the opposite surface of the heat sink, which causes the heat dissipation path to narrow and cannot meet the further improvement needs of the semiconductor device.

Method used

A multi-layer structure bonding material is designed, which has a structure between the second main electrode and the second wiring member, and has a sintered layer and a fragile layer. The Young's modulus and/or yield stress of the sintered layer are greater than that of the second main electrode, and the Young's modulus and/or yield stress of the fragile layer are less than that of the second main electrode.

Benefits of technology

By optimizing the structure of the bonding material, the heat dissipation performance of the semiconductor device is improved, the width of the heat dissipation path is increased, thereby improving the overall performance of the semiconductor device.

✦ Generated by Eureka AI based on patent content.

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Abstract

This semiconductor device is provided with: a semiconductor element having a semiconductor substrate, a first main electrode provided on one surface of the semiconductor substrate, and a second main electrode provided on the back surface opposite the one surface in the plate thickness direction; a first wiring member electrically connected to the first main electrode; a second wiring member disposed in the plate thickness direction so as to sandwich the semiconductor element between the first wiring member and the second wiring member, the second wiring member being connected to the second main electrode; and a bonding material that bonds the second main electrode and the second wiring member. The bonding material has a multilayer structure comprising a sintered layer and a fragile layer, the Young's modulus and / or yield stress of the sintered layer being greater than that of the second main electrode, the fragile layer being adjacent to the sintered layer in the plate thickness direction, and the Young's modulus and / or yield stress of the fragile layer being smaller than that of the second main electrode; the fragile layer is a sintered body of particles of the same type as the sintered layer, and the interval between the particles is larger than that of the sintered layer; the bonding material has a three-layer structure having sintered layers at both ends in the plate thickness direction and a fragile layer between the sintered layers.
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Description

[0001] This application is a divisional application of the Chinese patent application with an application date of 2022 / 04 / 21, application number "202280037252.4", and invention name "Semiconductor Device".

[0002] Cross-references of related applications

[0003] This application is based on Japanese Patent Application No. 2021-88984 filed in Japan on May 27, 2021, the entire contents of which are incorporated herein by reference. Technical Field

[0004] The present invention relates to semiconductor devices. Background Art

[0005] Patent document 1 discloses a semiconductor device having a semiconductor element (semiconductor chip) having main electrodes on both sides, a pair of wiring members (heat sinks) arranged so as to sandwich the semiconductor element, and a sealing body (resin portion). The contents of the prior art document are cited as explanations of the technical elements in this specification by reference.

[0006] Prior art literature

[0007] Patent Literature

[0008] Patent Document 1: Japanese Patent Application Publication No. 2018-160653 Summary of the invention

[0009] In Patent Document 1, a concavoconvex oxide film having a continuously concavoconvex surface is provided on the opposite surface of the heat sink to the semiconductor element. The concavoconvex oxide film is formed by melting and vaporizing the metal due to laser irradiation, and evaporating it to the laser irradiated portion and its peripheral portion. In the peripheral portion, the thickness of the concavoconvex oxide film is thinner than that of the laser irradiated portion, and the height of the convex portion is also lower. The solder as the bonding material does not wet and diffuse on the thin film portion. Therefore, the heat dissipation path becomes narrower. From the above viewpoints or other viewpoints not mentioned, further improvements are required for semiconductor devices.

[0010] The semiconductor device disclosed herein comprises: a semiconductor element having a semiconductor substrate, a first main electrode provided on a high potential side of one surface of the semiconductor substrate, and a second main electrode provided on a low potential side of a back surface opposite to the one surface in a plate thickness direction; a first wiring component electrically connected to the first main electrode; a second wiring component arranged in the plate thickness direction with the semiconductor element sandwiched between the first wiring component and connected to the second main electrode; and a bonding material interposed between the second main electrode and the second wiring component to bond the second main electrode to the substrate. The second wiring component is joined; the above-mentioned bonding material is a multi-layer structure having a sintered layer and a fragile layer, the Young's modulus and / or yield stress of the above-mentioned sintered layer is greater than the above-mentioned second main electrode, the above-mentioned fragile layer is adjacent to the above-mentioned sintered layer in the above-mentioned plate thickness direction, and the Young's modulus and / or yield stress of the above-mentioned fragile layer is less than the above-mentioned second main electrode; the above-mentioned fragile layer is a sintered body of particles of the same type as the above-mentioned sintered layer, and the spacing between the above-mentioned particles is greater than the above-mentioned sintered layer; the above-mentioned bonding material is a three-layer structure having the above-mentioned sintered layers at both ends in the above-mentioned plate thickness direction and the above-mentioned fragile layer between the above-mentioned sintered layers.

[0011] The multiple technical solutions disclosed in this specification adopt different technical means to achieve their respective purposes. The purposes, features and effects disclosed in this specification will become more clear by referring to the subsequent detailed description and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a diagram showing a circuit configuration of a power conversion device to which the semiconductor device according to the first embodiment is applied.

[0013] Figure 2 It is a perspective view showing a semiconductor device.

[0014] Figure 3 It is a perspective view showing a semiconductor device.

[0015] Figure 4 is a plan view showing a semiconductor device.

[0016] Figure 5 It is along Figure 4 Cross-sectional view of the V-V line.

[0017] Figure 6 It is along Figure 4 Cross-sectional view of line VI-VI.

[0018] Figure 7 It is along Figure 4 Cross-sectional view along line VII-VII.

[0019] Figure 8 It is along Figure 4 Cross-sectional view along line VIII-VIII.

[0020] Fig. 9 Yes Figure 8 An enlarged view of region IX is shown.

[0021] Fig.10 This is an exploded perspective view for explaining a semiconductor device.

[0022] Fig.11 It is a plan view showing a state where a semiconductor element is mounted on a substrate on the drain electrode side.

[0023] Fig.12 It is a plan view showing a circuit pattern of a substrate on the drain electrode side.

[0024] Fig.13 It is a plan view showing a circuit pattern of a substrate on the source electrode side.

[0025] Fig.14 It is a diagram showing the arrangement of a circuit pattern, a semiconductor element, and a terminal on the drain electrode side.

[0026] Fig.15 This is a diagram showing the circuit pattern on the source electrode side, and the arrangement of semiconductor elements and terminals.

[0027] Fig.16 It is a plan view showing the current circulation of the reference example.

[0028] Fig.17 It is a plane diagram showing the current circulation.

[0029] Fig.18 is a side view showing the current circulation.

[0030] Fig.19 This is a graph showing the current density with respect to the reference example.

[0031] Fig. 20 This is a graph showing the current density in this embodiment.

[0032] Fig.21 It is a plan view showing a modified example.

[0033] Fig. 22 It is a plan view showing a modified example.

[0034] Fig.23 It is a plan view showing a circuit pattern of a substrate on the drain electrode side in a modified example.

[0035] Fig.24 It is a plan view showing a circuit pattern of a substrate on the source electrode side in a modified example.

[0036] Fig.25 It is a cross-sectional view showing a semiconductor device according to a second embodiment.

[0037] Fig.26 This is a diagram for explaining the effect of the inductor Ls.

[0038] Fig. 27 This is a diagram for explaining the effect of the inductor Ls.

[0039] Fig.28 It is a plan view showing a circuit pattern of a substrate on the source electrode side.

[0040] Fig.29 is a diagram showing the current path.

[0041] Fig.30 It is a cross-sectional view showing the arm connection portion.

[0042] Fig.31 It is a plan view showing a modified example of the substrate on the source electrode side.

[0043] Fig.32 It is a plan view showing a state where a semiconductor element is mounted on a substrate on the drain electrode side.

[0044] Fig.33 is a diagram showing the current path.

[0045] Fig.34 It is a plan view showing a modified example of the substrate on the drain electrode side.

[0046] Fig.35 is a diagram showing the current path.

[0047] Fig.36 It is a cross-sectional view showing a modified example of the arm connection portion.

[0048] Fig.37 It is a cross-sectional view showing a modified example of the arm connection portion.

[0049] Fig.38 It is a plan view showing a circuit pattern of a substrate on the source electrode side in a modified example.

[0050] Fig.39 It is a cross-sectional view showing warpage at high temperature.

[0051] Fig.40 It is a cross-sectional view showing a semiconductor device according to a third embodiment.

[0052] Fig.41 is a cross-sectional view showing a semiconductor device at room temperature.

[0053] Fig.42 is a cross-sectional view showing a semiconductor device at a high temperature.

[0054] Fig.43This is a graph showing the relationship between the ratio of the thicknesses T1 and T2 and the amount of warping.

[0055] Fig.44 It is a cross-sectional view showing a modified example.

[0056] Fig.45 It is a cross-sectional view showing a modified example.

[0057] Fig.46 This is an enlarged plan view of the signal terminal and its surroundings in the semiconductor device according to the fourth embodiment.

[0058] Fig.47 It is along Fig.46 Cross-sectional view of line XLVII-XLVII.

[0059] Fig.48 This is a diagram illustrating wire bonding.

[0060] Fig.49 It is a cross-sectional view showing a modified example.

[0061] Fig.50 It is a cross-sectional view showing a modified example.

[0062] Fig.51 It is a cross-sectional view showing a modified example.

[0063] Fig.52 It is a cross-sectional view showing a modified example.

[0064] Fig.53 It is a plan view showing a modified example.

[0065] Fig.54 It is a cross-sectional view showing a relay substrate.

[0066] Fig.55 It is along Fig.53 Cross-sectional view of the LV-LV line.

[0067] Fig.56 It is a cross-sectional view showing a modified example.

[0068] Fig.57 It is a cross-sectional view showing a semiconductor device according to a fifth embodiment.

[0069] Fig.58 is from Fig.57 The plan view viewed from the LVIII direction is shown.

[0070] Fig.59 Yes Fig.57 The region LVIX is shown in an enlarged view.

[0071] Fig.60 is relative to Fig.59 The drawings of the bonding materials are omitted.

[0072] Fig.61 It is a plan view showing a modified example.

[0073] Fig.62 is from Fig.61 The plan view viewed from the LXII direction is shown.

[0074] Fig.63 It is a plan view showing a modified example.

[0075] Fig.64 It is a cross-sectional view showing a modified example.

[0076] Fig.65 Yes Fig.64 The area LXV is shown as an enlarged view.

[0077] Fig.66 It is a cross-sectional view showing a modified example.

[0078] Fig.67 Yes Fig.66 Region LXVII is shown as an enlarged view.

[0079] Fig.68 It is a cross-sectional view showing a modified example.

[0080] Fig.69 It is a cross-sectional view showing a semiconductor device according to a sixth embodiment.

[0081] Fig.70 This is a diagram showing the relationship between the glass transition temperature and the linear expansion coefficient of the sealing body and the insulating base material.

[0082] Fig.71 It is a figure which shows the warpage of a reference example.

[0083] Fig.72 This is a diagram showing warpage at high temperatures.

[0084] Fig.73 It is a cross-sectional view showing a semiconductor device according to a seventh embodiment.

[0085] Fig.74 Yes Fig.73 Region LXXIV is enlarged in the figure.

[0086] Fig.75 It is a figure which shows the formation method of a roughened part.

[0087] Fig.76 It is a cross-sectional view showing a modified example.

[0088] Fig.77 It is a cross-sectional view showing a modified example.

[0089] Fig.78 It is a cross-sectional view showing a modified example.

[0090] Fig.79 It is a cross-sectional view showing a semiconductor device according to an eighth embodiment.

[0091] Fig.80 Yes Fig.79 The area LXXX is enlarged in the figure.

[0092] Fig.81 This is a graph showing the relationship between spacing, thickness, and inductance.

[0093] Fig.82 It is a diagram showing the simulation results in the case of interval<thickness.

[0094] Fig.83 It is a diagram showing the simulation results in the case of interval>thickness.

[0095] Fig.84 It is a cross-sectional view showing a semiconductor device according to a ninth embodiment.

[0096] Fig.85 It is a plan view showing the center of the substrate.

[0097] Fig.86 Yes Fig.84 Region LXXXVI is enlarged in the figure.

[0098] Fig.87 This is a diagram showing dimensions and angles.

[0099] Fig.88 is a side view of the stacked body.

[0100] Fig.89 It is a cross-sectional view showing a semiconductor device according to a tenth embodiment.

[0101] Fig.90 It is a plan view showing a semiconductor element.

[0102] Fig.91 Yes Fig.89 Figure 1. The XCI region is enlarged.

[0103] Fig.92 It is a cross-sectional view showing the arrangement of a sintered component.

[0104] Fig.93 It is a cross-sectional view showing the joining method.

[0105] Fig.94 This is a diagram showing the relationship between the distance between the inner peripheral surface of the protective film and the sintered component and the strain amplitude of the base electrode.

[0106] Fig.95It is a cross-sectional view showing the arrangement of solder as a bonding material.

[0107] Fig.96 It is a cross-sectional view showing a semiconductor device according to the eleventh embodiment.

[0108] Fig.97 Yes Fig.96 Region XCVII is enlarged in the figure.

[0109] Fig.98 It is a plan view showing the arrangement of a semiconductor element, a sintered component, and a concavo-convex oxide film.

[0110] Fig.99 Yes Fig.97 The area XCIX is enlarged in the figure.

[0111] Fig.100 It is a cross-sectional view showing a modified example.

[0112] Fig.101 It is a plan view showing the arrangement of a semiconductor element, a sintered component, and a concavo-convex oxide film.

[0113] Fig.102 It is a cross-sectional view showing a modified example.

[0114] Fig.103 It is a plan view showing the arrangement of a semiconductor element, a sintered component, and a concavo-convex oxide film.

[0115] Fig.104 It is a cross-sectional view showing a modified example.

[0116] Fig.105 It is a cross-sectional view showing a semiconductor device according to a twelfth embodiment.

[0117] Fig.106 Yes Fig.105 Figure 3. CVI magnified area of ​​the image.

[0118] Fig.107 This is a diagram showing the relationship between the Young's modulus and the yield stress of the base electrode, the sintered layer, and the fragile layer.

[0119] Fig.108 It is a cross-sectional view showing a modified example.

[0120] Fig.109 It is a cross-sectional view showing a modified example.

[0121] Fig.110 It is a cross-sectional view showing a modified example.

[0122] Fig.111 This is a diagram showing a circuit configuration of a power conversion device to which a semiconductor device according to the thirteenth embodiment is applied.

[0123] Fig.112 It is a perspective view showing a semiconductor device.

[0124] Fig.113 is a plan view showing a semiconductor device.

[0125] Fig.114 It is a plan view showing a state where a semiconductor element is mounted on a substrate on the drain electrode side.

[0126] Fig.115 It is a plan view showing a circuit pattern of a substrate on the drain electrode side.

[0127] Fig.116 It is a plan view showing a circuit pattern of a substrate on the source electrode side.

[0128] Fig.117 It is along Fig.113 Cross-sectional view of line CXVII-CXVII.

[0129] Fig.118 It is along Fig.113 Cross-sectional view of the CXVIII-CXVIII line.

[0130] Fig.119 It is along Fig.113 Cross-sectional view of the CXIX-CXIX line.

[0131] Fig.120 It is along Fig.113 Cross-sectional view of the CXX-CXX line.

[0132] Fig.121 Yes Fig.120 The area CXXI ​​is enlarged in the figure. DETAILED DESCRIPTION

[0133] Hereinafter, a plurality of embodiments are described based on the accompanying drawings. In addition, there is a case where repeated descriptions are omitted by assigning the same reference numerals to corresponding constituent elements in each embodiment. In the case where only a part of the structure is described in each embodiment, the structure of other embodiments previously described can be applied to the other parts of the structure. In addition, not only the combination of structures explicitly described in the description of each embodiment, but also the structures of a plurality of embodiments can be partially combined with each other even if not explicitly described, as long as no obstacles occur in the combination.

[0134] The semiconductor device of this embodiment is applied to, for example, a power conversion device of a mobile body using a rotating electric machine as a driving source. The mobile body is, for example, an electric vehicle such as an electric vehicle (EV), a hybrid electric vehicle (HV), a plug-in hybrid electric vehicle (PHV), an aerial vehicle such as an unmanned aerial vehicle, a ship, a construction machine, and an agricultural machine. The following describes an example of application to a vehicle.

[0135] (First embodiment)

[0136] First, based on Figure 1 , a schematic structure of a vehicle drive system 1 is described.

[0137] <Vehicle drive system>

[0138] like Figure 1 As shown, a vehicle drive system 1 includes a DC power supply 2 , a motor generator 3 , and a power conversion device 4 .

[0139] The DC power supply 2 is a DC voltage source composed of a secondary battery that can be charged and discharged. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as a driving source for the vehicle, i.e., an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 performs power conversion between the DC power supply 2 and the motor generator 3.

[0140] <Power conversion device>

[0141] Next, based on Figure 1 The circuit configuration of the power conversion device 4 will be described. The power conversion device 4 includes a power conversion circuit. The power conversion device 4 of the present embodiment includes a smoothing capacitor 5 and an inverter 6 as a power conversion circuit.

[0142] The smoothing capacitor 5 mainly smoothes the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to a P line 7 as a power line on the high potential side and an N line 8 as a power line on the low potential side. The P line 7 is connected to the positive electrode of the DC power supply 2, and the N line 8 is connected to the negative electrode of the DC power supply 2. The positive electrode of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. The negative electrode of the smoothing capacitor 5 is connected to the N line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel with the DC power supply 2.

[0143] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts the DC voltage into a three-phase AC voltage according to the switching control of the control circuit (not shown), and outputs it to the motor generator 3. As a result, the motor generator 3 is driven to generate a predetermined torque. During the regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 receiving the rotational force from the wheels into a DC voltage according to the switching control of the control circuit, and outputs it to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power supply 2 and the motor generator 3.

[0144] The inverter 6 is configured to include a three-phase upper and lower arm circuit 9. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 include an upper arm 9H and a lower arm 9L, respectively. The upper arm 9H and the lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H serving as the P line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase of the motor generator 3 via the output line 10. The inverter 6 has six arms. Each arm is configured to include a switching element. At least a portion of each of the P line 7, the N line 8, and the output line 10 is formed of a conductive component such as a bus bar.

[0145] In this embodiment, n-channel MOSFET 11 is used as a switching element constituting each arm. The number of switching elements constituting each arm is not particularly limited. It can be one or more. MOSFET is the abbreviation of Metal Oxide Semiconductor Field Effect Transistor.

[0146] As an example, in the present embodiment, each arm has two MOSFETs 11. The two MOSFETs 11 constituting one arm are connected in parallel. In the upper arm 9H, the drains of the two MOSFETs 11 connected in parallel are connected to the P line 7. In the lower arm 9L, the sources of the two MOSFETs 11 connected in parallel are connected to the N line 8. The sources of the two MOSFETs 11 connected in parallel in the upper arm 9H and the drains of the two MOSFETs 11 connected in parallel in the lower arm 9L are connected to each other. The two MOSFETs 11 connected in parallel are turned on and off at the same timing by a common gate drive signal (drive voltage).

[0147] A diode 12 for freewheeling is connected in anti-parallel to each MOSFET 11. The diode 12 may be a parasitic diode (body diode) of the MOSFET 11, or may be provided separately from the parasitic diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11, and the cathode is connected to the drain. A semiconductor device 20 provides a single-phase upper and lower arm circuit 9. The details of the semiconductor device 20 will be described later.

[0148] The power conversion device 4 may also include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into a DC voltage of a different value. The converter is provided between the DC power supply 2 and the smoothing capacitor 5. The converter is configured, for example, to include a reactor and the upper and lower arm circuits 9 described above. According to this structure, voltage can be increased or decreased. The power conversion device 4 may also include a filter capacitor that removes power supply noise from the DC power supply 2. The filter capacitor is provided between the DC power supply 2 and the converter.

[0149] The power conversion device 4 may also include a drive circuit for a switching element constituting the inverter 6 or the like. The drive circuit supplies a drive voltage to the gate of the MOSFET 11 of the corresponding arm based on a drive instruction from the control circuit. The drive circuit drives the corresponding MOSFET 11 by applying the drive voltage, i.e., turns it on or off. The drive circuit is sometimes referred to as a driver.

[0150] The power conversion device 4 may also include a control circuit for the switching element. The control circuit generates a drive instruction for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive instruction based on, for example, a torque request input from a higher-level ECU (not shown) or signals detected by various sensors. ECU is the abbreviation of Electronic Control Unit.

[0151] As various sensors, there are, for example, current sensors, rotation angle sensors, and voltage sensors. The current sensor detects the phase current flowing in the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the electric generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as a drive instruction. The control circuit is configured to include, for example, a processor and a memory. PWM is the abbreviation of Pulse Width Modulation.

[0152] <Semiconductor Device>

[0153] Next, based on Figure 2 to Figure 13 A semiconductor device will be described. Figure 2 It is a perspective view of the semiconductor device 20 . Figure 3 and Figure 2 It is also a perspective view of the semiconductor device 20 . Figure 3 This is a perspective view showing the internal structure. Figure 4 is a plan view of the semiconductor device 20 . Figure 4 This is a perspective view showing the internal structure. Figure 5 It is along Figure 4 Cross-sectional view of the V-V line. Figure 6 It is along Figure 4 Cross-sectional view of line VI-VI. Figure 7 It is along Figure 4 Cross-sectional view along line VII-VII. Figure 8 It is along Figure 4 Cross-sectional view along line VIII-VIII. Fig. 9 It will be Figure 8 The region IX indicated by the single-dot chain line is an enlarged view.

[0154] Fig.10 2 is an exploded perspective view for explaining the semiconductor device 20. Fig.10, the lead frame 94 is shown for convenience. Fig.11 It is a plan view showing a state where the semiconductor element 40 is mounted on the substrate 50 . Fig.12 It is a plan view showing a circuit pattern of the surface metal body 52 in the substrate 50 . Fig.13 It is a plan view showing a circuit pattern of the surface metal body 62 in the substrate 60 .

[0155] In the following, the thickness direction of the semiconductor element (semiconductor substrate) is set as the Z direction. The arrangement direction of the semiconductor elements constituting the upper arm 9H and the semiconductor elements constituting the lower arm 9L, which is orthogonal to the Z direction, is set as the Y direction. The direction orthogonal to both the Z direction and the Y direction is set as the X direction. Unless otherwise stated, the shape seen in a planar observation from the Z direction, in other words, the shape along the XY plane defined by the X direction and the Y direction is set as a plane shape. Sometimes a planar observation from the Z direction is simply expressed as a planar observation. In addition, the configuration is not limited to the mounting surface, and is sometimes expressed as a configuration when it is in an overlapping positional relationship in a planar observation.

[0156] like Figure 2 to Figure 13 As shown, the semiconductor device 20 constitutes one of the upper and lower arm circuits 9, that is, a one-phase upper and lower arm circuit 9. The semiconductor device 20 includes a sealing body 30, a semiconductor element 40, substrates 50, 60, a conductive spacer 70, an arm connection portion 80, and an external connection terminal 90.

[0157] The sealing body 30 seals a part of other elements constituting the semiconductor device 20. The rest of the other elements are exposed outside the sealing body 30. The sealing body 30 is made of, for example, resin. An example of a resin is an epoxy resin. The sealing body 30 is made of resin and is formed, for example, by a transfer molding method. Such a sealing body 30 is sometimes referred to as a sealing resin body, a molding resin, or a resin molded body. The sealing body 30 can also be formed using, for example, a gel. The gel is filled (arranged) in, for example, opposing areas of a pair of substrates 50, 60.

[0158] like Figure 2 to Figure 4 As shown, the sealing body 30 is in a roughly rectangular plane shape. As the surface forming the outer contour, the sealing body 30 has a surface 30a and a back surface 30b opposite to the surface 30a in the Z direction. The surface 30a and the back surface 30b are, for example, flat surfaces. In addition, there is a side surface that is a surface connecting the surface 30a and the back surface 30b. The side surface includes two side surfaces 30c and 30d from which the external connection terminal 90 protrudes. The side surface 30d is the surface opposite to the side surface 30c in the X direction.

[0159] A semiconductor element 40 is formed by forming a switching element on a semiconductor substrate made of silicon (Si) or a wide-bandgap semiconductor having a wider bandgap than silicon. Examples of wide-bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor element 40 is sometimes referred to as a power element or a semiconductor chip.

[0160] The semiconductor element 40 of this embodiment is formed by forming the above-mentioned n-channel MOSFET 11 on a semiconductor substrate made of SiC. The MOSFET 11 is of a vertical structure so that the main current flows in the plate thickness direction of the semiconductor element 40 (semiconductor substrate), that is, in the Z direction. The semiconductor element 40 has main electrodes of the switching element on both sides in the plate thickness direction, that is, in the Z direction. Specifically, as the main electrode, a drain electrode 40D is provided on one side, and a source electrode 40S is provided on the back side, which is opposite to the one side in the Z direction.

[0161] When the diode 12 is a parasitic diode, the source electrode 40S also serves as an anode electrode, and the drain electrode 40D also serves as a cathode electrode. The diode 12 may also be formed in a chip other than the MOSFET 11. The drain electrode 40D is a main electrode on the high potential side (first main electrode), and the source electrode 40S is a main electrode on the low potential side (second main electrode). Hereinafter, the drain electrode 40D and the source electrode 40S may be referred to as main electrodes 40D and 40S.

[0162] The semiconductor element 40 has a substantially rectangular planar shape. Fig.11 As shown in FIG. 1 , the semiconductor element 40 has a pad 40P formed at a position different from the source electrode 40S on the back side. The source electrode 40S and the pad 40P are exposed from a protective film (not shown) formed on the back side of the semiconductor substrate. The drain electrode 40D is formed on substantially the entire surface of one side. The source electrode 40S is formed on a portion of the back side of the semiconductor element 40. In a planar view, the drain electrode 40D has a larger area than the source electrode 40S.

[0163] The pad 40P is a signal electrode. The pad 40P is electrically isolated from the source electrode 40S. The pad 40P is formed at an end portion on the opposite side of the formation region of the source electrode 40S in the Y direction. The pad 40P includes a pad for a gate electrode.

[0164] The semiconductor device 20 includes a plurality of semiconductor elements 40 of the above-described structure. The structures of the semiconductor elements 40 are common to each other. The plurality of semiconductor elements 40 include a semiconductor element 40H constituting an upper arm 9H and a semiconductor element 40L constituting a lower arm 9L. The semiconductor element 40H is sometimes referred to as an upper arm element, and the semiconductor element 40L is sometimes referred to as a lower arm element. The semiconductor elements 40H and 40L are arm elements constituting one arm, respectively. The semiconductor device 20 of the present embodiment includes two semiconductor elements 40H and two semiconductor elements 40L. The two semiconductor elements 40H are arranged in the X direction. Similarly, the two semiconductor elements 40L are arranged in the X direction. The semiconductor element 40H and the semiconductor element 40L are arranged in the Y direction. The Y direction is a first direction orthogonal to the plate thickness direction of the semiconductor element 40, that is, the Z direction. The X direction is a second direction orthogonal to the Z direction and the first direction (Y direction). The semiconductor device 20 has two columns along the Y direction formed by the semiconductor element 40H and the semiconductor element 40L.

[0165] The semiconductor elements 40 are arranged at substantially the same positions in the Z direction. The drain electrode 40D of each semiconductor element 40 faces the substrate 50 . The source electrode 40S of each semiconductor element 40 faces the substrate 60 .

[0166] The substrates 50 and 60 are arranged so as to sandwich the plurality of semiconductor elements 40 in the Z direction. The substrates 50 and 60 are arranged so as to at least partially face each other in the Z direction. The substrates 50 and 60 include all of the plurality of semiconductor elements 40 (40H, 40L) in a plan view.

[0167] The substrate 50 is arranged on the drain electrode 40D side relative to the semiconductor element 40. The substrate 60 is arranged on the source electrode 40S side relative to the semiconductor element 40. The substrate 50 is electrically connected to the drain electrode 40D as described later, and provides a wiring function. Similarly, the substrate 60 is electrically connected to the source electrode 40S, and provides a wiring function. Therefore, the substrates 50 and 60 are sometimes referred to as wiring substrates. The substrate 50 is sometimes referred to as a drain substrate, and the substrate 60 is sometimes referred to as a source substrate. The substrates 50 and 60 provide a heat dissipation function for dissipating the heat generated by the semiconductor element 40. Therefore, the substrates 50 and 60 are sometimes referred to as heat dissipation components. In a pair of substrates 50 and 60 that clamp the semiconductor element 40 in the Z direction, the substrate 50 is the first substrate, and the substrate 60 is the second substrate.

[0168] The substrate 50 has an opposing surface 50a opposed to the semiconductor element 40, and a back surface 50b which is the surface opposite to the opposing surface 50a. The substrate 50 has an insulating substrate 51, a surface metal body 52, and a back metal body 53. The substrate 50 is a substrate in which the insulating substrate 51 and the metal bodies 52 and 53 are stacked. The substrate 60 has an opposing surface 60a opposed to the semiconductor element 40, and a back surface 60b which is the surface opposite to the opposing surface 60a. The substrate 60 has an insulating substrate 61, a surface metal body 62, and a back metal body 63. The substrate 60 is a substrate in which the insulating substrate 61 and the metal bodies 62 and 63 are stacked. In the substrate 50 as the first substrate, the insulating substrate 51 is the first insulating substrate, the surface metal body 52 is the first surface metal body, and the back metal body 53 is the first back metal body. In the substrate 60 as the second substrate, the insulating base material 61 is the second insulating base material, the surface metal body 62 is the second surface metal body, and the back metal body 63 is the second back metal body. Hereinafter, the surface metal bodies 52, 62 and the back metal bodies 53, 63 are sometimes simply represented as metal bodies 52, 53, 62, 63.

[0169] The insulating substrate 51 electrically separates the surface metal body 52 from the back metal body 53. Similarly, the insulating substrate 61 electrically separates the surface metal body 62 from the back metal body 63. The insulating substrates 51 and 61 are sometimes referred to as insulating layers. The material of the insulating substrates 51 and 61 is a resin or a ceramic of an inorganic material. As a resin, for example, epoxy resins, polyimide resins, etc. can be used. As a ceramic, for example, Al2O3 (alumina), Si3N4 (silicon nitride), etc. can be used. When the insulating substrates 51 and 61 are resins, the substrates 50 and 60 are sometimes referred to as metal resin substrates. When the insulating substrates 51 and 61 are ceramics, the substrates 50 and 60 are sometimes referred to as metal ceramic substrates.

[0170] In the case of using the insulating substrate 51, 61 of a resin material, an inorganic filler (inorganic filling material) may be contained in the resin to improve heat dissipation and insulation. The linear expansion coefficient can also be adjusted by adding a filler. As fillers, for example, Al2O3, SiO2 (silicon dioxide), AlN (aluminum nitride), BN (boron nitride), etc. can be used. The insulating substrate 51, 61 may contain only one filler or may contain multiple fillers.

[0171] Considering the heat dissipation and insulation properties, in the case of resin, the thickness of each insulating substrate 51, 61, that is, the length in the Z direction is preferably about 50μm to 300μm. In the case of ceramic, the thickness of the insulating substrate 51, 61 is preferably about 200μm to 500μm. In the Z direction, the surface of the insulating substrate 51, 61 is the inner surface, that is, the surface on the semiconductor element 40 side, and the surface opposite to the surface in the Z direction, that is, the back surface, is the outer surface. The insulating substrates 51, 61 can have a common (same) material composition or can be different from each other. In the present embodiment, the insulating substrates 51, 61 of the resin type are used, and the material composition is common. The linear expansion coefficient of the insulating substrates 51, 61 is adjusted to a value substantially the same as that of the sealing body 30 by adding fillers to the resin. By adding fillers to the resin, the linear expansion coefficients of the insulating substrates 51, 61 and the sealing body 30 become values ​​close to the metal (Cu) constituting the metal bodies 52, 53, 62, 63.

[0172] The metal bodies 52, 53, 62, 63 are provided, for example, as metal plates or metal foils. The metal bodies 52, 53, 62, 63 are formed of metals such as Cu and Al that have good electrical and thermal conductivity. The thickness of each of the metal bodies 52, 53, 62, 63 is, for example, about 0.1 mm to 3 mm. The surface metal body 52 is arranged on the surface of the insulating substrate 51 in the Z direction. The back metal body 53 is arranged on the back side of the insulating substrate 51. Similarly, the surface metal body 62 is arranged on the surface of the insulating substrate 61 in the Z direction. The back metal body 63 is arranged on the back side of the insulating substrate 61. The insulating substrates 51 and 61 are opposite surfaces to the semiconductor element 40 in the Z direction. As Figures 5 to 9 As shown in the figure, in the present embodiment, the surface metal body 52 is thicker than the back metal body 53. The surface metal body 62 is thicker than the back metal body 63. The surface metal body 52 on the drain electrode 40D side is thicker than the surface metal body 62 on the source electrode 40S side. Instead of this structure, the back metal bodies 53 and 63 may be thicker than the corresponding surface metal bodies 52 and 62. The thickness of the surface metal body 52 and the back metal body 53 may be roughly equal, and the thickness of the surface metal body 62 and the back metal body 63 may be roughly equal.

[0173] The surface metal bodies 52 and 62 are patterned. The surface metal bodies 52 and 62 provide wiring, i.e., circuits. Therefore, the surface metal bodies 52 and 62 are sometimes referred to as circuit patterns, wiring layers, and circuit conductors. The surface metal bodies 52 and 62 may also have a coating of Ni, Au, etc. on the metal surface. Hereinafter, the patterns of the surface metal bodies 52 and 62 are sometimes represented as circuit patterns. The surface metal body 52 and the non-configuration area of ​​the surface metal body 52 on the surface of the insulating substrate 51 form the opposing surface 50a of the substrate 50. Similarly, the surface metal body 62 and the non-configuration area of ​​the surface metal body 62 on the surface of the insulating substrate 61 form the opposing surface 60a of the substrate 60.

[0174] For example, the surface metal bodies 52 and 62 patterned into a predetermined shape by press working, etching, etc. can be prepared and made to be in close contact with a two-layer laminate of the insulating substrate 51 and 61 and the back metal body 53 and 63 to form the substrate 50 and 60. Alternatively, after forming a three-layer laminate of the surface metal body 52 and 62, the insulating substrate 51 and 61, and the back metal body 53 and 63, the surface metal body 52 and 62 can be patterned by cutting and etching.

[0175] The surface metal body 52 is as follows Fig.11 As shown in FIG. 1 and FIG. 2 , the P wiring 54 and the relay wiring 55 are provided. The P wiring 54 and the relay wiring 55 are electrically separated by a predetermined gap. The sealing body 30 is filled in the gap.

[0176] The P wiring 54 is connected to a P terminal 91P described later and the drain electrode 40D of the semiconductor element 40H. The P wiring 54 electrically connects the P terminal 91P to the drain electrode 40D of the semiconductor element 40H. The P wiring 54 is sometimes referred to as a positive wiring or a high-potential power wiring. The relay wiring 55 is connected to the drain electrode 40D of the semiconductor element 40L, the arm connection portion 80, and the output terminal 92. The relay wiring 55 electrically connects the arm connection portion 80 to the drain electrode 40D of the semiconductor element 40L. The relay wiring 55 electrically connects the source electrode 40S of the semiconductor element 40H and the drain electrode of the semiconductor element 40L to the output terminal 92. In the surface metal body 52 (first surface metal body), the P wiring 54 is the first power wiring, and the relay wiring 55 is the first relay wiring.

[0177] The P wiring 54 and the relay wiring 55 are arranged side by side in the Y direction. In the Y direction, the P wiring 54 is arranged on the power terminal 91 side, and the relay wiring 55 is arranged on the output terminal 92 side. In other words, the P wiring 54 is arranged at a position close to the side surface 30c of the sealing body 30, and the relay wiring 55 is arranged at a position close to the side surface 30d.

[0178] The P wiring 54 has a notch 540. The notch 540 is opened in one of the four sides of the plane shape which is roughly rectangular with the X direction as the longitudinal direction. The notch 540 is provided at the roughly center in the X direction in the side facing the side surface 30c. The P wiring 54 has a base 541 and a pair of extended portions 542. The base 541 and the pair of extended portions 542 define the notch 540. The P wiring 54 has a plane shape which is roughly U-shaped (concave).

[0179] The base 541 is a portion closer to the relay wiring 55 than the notch 540 and the extension 542, and has a substantially rectangular planar shape. The base 541 overlaps the semiconductor element 40H in a planar view. That is, the semiconductor element 40H is disposed on the base 541. The drain electrode 40D of the semiconductor element 40H is connected to the base 541.

[0180] The two extension portions 542 extend from the base portion 541 in the same direction, specifically, in the Y direction toward the side 30c of the sealing body 30. One of the extension portions 542 is connected to the vicinity of one end of the base portion 541 in the X direction, and the other is connected to the vicinity of the other end of the base portion 541. The two ends of the U-shaped P wiring 54, that is, the ends of the two extension portions 542 on the opposite side of the base portion 541, are at substantially the same positions in the Y direction. The pair of extension portions 542 sandwich the notch 540 in the X direction. With respect to the length in the Y direction, the base portion 541 is longer than the depth of the notch 540 and the extension portion 542.

[0181] The relay wiring 55 also has a notch 550. The notch 550 is opened in one of the four sides of the planar shape that is roughly rectangular. The notch 550 is set at the approximate center in the X direction of the side facing the side surface 30d. That is, in the surface metal body 52, the notch 540 is provided at one end in the Y direction, and the notch 550 is provided at the other end.

[0182] The relay wiring 55 has a base 551 and a pair of extended portions 552. The base 551 and the pair of extended portions 552 define a notch 550. The relay wiring 55 has a planar shape that is approximately U-shaped (concave). The base 551 is a portion that is closer to the P wiring 54 side than the notch 550 and the extended portion 552, and has a planar shape that is approximately rectangular. The base 551 overlaps with the semiconductor element 40L in a plan view. That is, the semiconductor element 40L is disposed on the base 551. The drain electrode 40D of the semiconductor element 40L is connected to the base 551.

[0183] The two extension portions 552 extend from the base 551 in the same direction, specifically, in the Y direction toward the side 30d of the sealing body 30. One of the extension portions 552 is connected to the vicinity of one end of the base 551 in the X direction, and the other is connected to the vicinity of the other end of the base 551. The two ends of the U-shaped relay wiring 55, that is, the ends of the two extension portions 552 on the opposite side of the base 551, are at substantially the same positions in the Y direction. The pair of extension portions 552 sandwich the notch 550 in the X direction. With respect to the length in the Y direction, the base 551 is longer than the depth of the notch 550 and the extension portions 552.

[0184] On the other hand, the surface metal body 62 is as Fig.10 and Fig.13 As shown in FIG. 1 and FIG. 2 , N wiring 64 and relay wiring 65 are provided. N wiring 64 and relay wiring 65 are electrically separated by a predetermined gap. The sealing body 30 is filled in the gap.

[0185] The N wiring 64 is connected to the N terminal 91N described later and the source electrode 40S of the semiconductor element 40L. The N wiring 64 electrically connects the N terminal 91N and the source electrode 40S of the semiconductor element 40L. The N wiring 64 is sometimes referred to as the N wiring. The relay wiring 65 is connected to the source electrode 40S of the semiconductor element 40H and the arm connection portion 80. The relay wiring 65 electrically connects the source electrode 40S of the semiconductor element 40H and the arm connection portion 80. In the surface metal body 62 (second surface metal body), the N wiring 64 is the second power supply wiring, and the relay wiring 65 is the second relay wiring.

[0186] The N wiring 64 has a base 640 and a pair of extended portions 641. The planar shape of the N wiring 64 is generally U-shaped. The base 640 is arranged in the Y direction and aligned with the relay wiring 65. The base 640 is arranged on the side of the side 30d in the Y direction. The planar shape of the base 640 is generally rectangular with the X direction as the length direction. Fig.15 As shown, the base 640 overlaps with the semiconductor element 40L in a plan view. That is, the semiconductor element 40L is arranged on the base 640. The source electrode 40S of the semiconductor element 40L is connected to the base 640.

[0187] The two extension portions 641 extend from the base portion 640 in the same direction, specifically, in the Y direction toward the side surface 30c of the sealing body 30. One of the extension portions 641 is connected to the vicinity of one end of the base portion 640 in the X direction, and the other is connected to the vicinity of the other end of the base portion 640. Both ends of the U-shaped N wiring 64, that is, the ends of the two extension portions 641 on the opposite side to the base portion 640, are at substantially the same positions in the Y direction.

[0188] A pair of extended portions 641 form two ends of the surface metal body 62 in the X direction. A pair of extended portions 641 are arranged near the end of the substrate 60. In a plan view, a portion of each of the pair of extended portions 641 overlaps with the P wiring 54. Regarding the length in the Y direction, the extended portion 641 is longer than the base 640. The N wiring 64 also has a notch 642. The notch 642 opens in one of the four sides of the plane shape of a roughly rectangular shape with the Y direction as the length direction. The notch 642 is set in the approximate center of the side opposite to the side 30c in the X direction. The base 640 and the pair of extended portions 641 define the notch 642.

[0189] As described above, the relay wiring 65 is arranged in the Y direction with the N wiring 64, specifically, with the base 640. In the Y direction, the relay wiring 65 is arranged at a position close to the side 30c of the sealing body 30, and the base 640 is arranged at a position close to the side 30d. The relay wiring 65 is arranged between a pair of extended portions 641 in the X direction. The relay wiring 65 is sandwiched by a pair of extended portions 641. The relay wiring 65 is arranged in the notch 642. The relay wiring 65 is arranged to have a predetermined interval (gap) between it and the N wiring 64. In planar observation, a portion of the relay wiring 65 overlaps with the P wiring 54, and another portion overlaps with the relay wiring 55.

[0190] like Fig.15 As shown, the relay wiring 65 overlaps the semiconductor element 40H in plan view. That is, the semiconductor element 40H is arranged at the relay wiring 65. The source electrode 40S of the semiconductor element 40H is connected to the relay wiring 65. A more detailed example of the circuit pattern of the surface metal body 62 will be described later.

[0191] The back metal bodies 53 and 63 are electrically separated from the circuit including the semiconductor element 40 by the insulating substrates 51 and 61. The back metal bodies 53 and 63 are sometimes referred to as metal base substrates. The heat generated by the semiconductor element 40 is transferred to the back metal bodies 53 and 63 via the surface metal bodies 52 and 62 and the insulating substrates 51 and 61. The back metal bodies 53 and 63 provide a heat dissipation function. The planar shape of the back metal bodies 53 and 63 of the present embodiment is roughly rectangular, and its outer contour is roughly consistent with the outer contour of the surface metal bodies 52 and 62. The back metal bodies 53 and 63 are so-called conductors that are arranged in the substantially entire area of ​​the back side of the insulating substrates 51 and 61. Since the linear expansion coefficient of the insulating substrates 51 and 61 is adjusted by the addition of fillers as described above, warping can be suppressed even if the pattern is changed on the surface and back. Of course, the back metal bodies 53 and 63 can also be laid out so that they are consistent with the surface metal bodies 52 and 62 in a planar view.

[0192] The back metal bodies 53 and 63 of the present embodiment are arranged on substantially the entire area of ​​the back side of the corresponding insulating substrates 51 and 61. In order to further improve the heat dissipation effect, at least one of the back metal bodies 53 and 63 may be exposed from the sealing body 30. In the present embodiment, the back metal body 53 is exposed from one side 30a of the sealing body 30, and the back metal body 63 is exposed from the back side 30b. The exposed surface of the back metal body 53 is substantially coplanar with the one side 30a. The exposed surface of the back metal body 63 is substantially coplanar with the back side 30b. The back metal bodies 53 and 63 become the back sides 50b and 60b of the substrates 50 and 60.

[0193] The conductive spacer 70 provides a spacer function of ensuring a predetermined distance between the semiconductor element 40 and the substrate 60. For example, the conductive spacer 70 ensures a height for electrically connecting the corresponding signal terminal 93 to the pad 40P of the semiconductor element 40. The conductive spacer 70 is located in the middle of the conductive and thermal conductive path between the source electrode 40S of the semiconductor element 40 and the substrate 60, and provides a wiring function and a heat dissipation function. The conductive spacer 70 includes a metal material with good electrical and thermal conductivity such as Cu. The conductive spacer 70 may have a plated film on the surface. The conductive spacer 70 is a columnar body with a planar shape that is approximately rectangular and has a size approximately the same as the source electrode 40S when viewed in a plan view.

[0194] The conductive spacer 70 is sometimes called a terminal, a terminal block, or a metal block. The semiconductor device 20 includes the same number of conductive spacers 70 as the semiconductor elements 40. Specifically, the semiconductor device 20 includes four conductive spacers 70. The conductive spacers 70 are connected to the semiconductor elements 40 individually.

[0195] The arm connection portion 80 electrically connects the relay wirings 55 and 65. That is, the arm connection portion 80 electrically connects the upper arm 9H and the lower arm 9L. The arm connection portion 80 is provided between the semiconductor element 40H and the semiconductor element 40L in the Y direction. The arm connection portion 80 is provided in the overlapping region of the relay wiring 55 and the relay wiring 65 in plan view. The arm connection portion 80 of the present embodiment is configured to include a joint portion 81 and a bonding material 103 described later.

[0196] The joint part 81 is a metal columnar body provided with the surface metal bodies 52 and 62. Such a joint part 81 is sometimes referred to as a joint connection end. In the Z direction, a bonding material 103 exists between one end of the joint part 81 and the relay wiring 55, and a bonding material 103 exists between the other end and the relay wiring 65.

[0197] Alternatively, the joint portion 81 may be integrally connected to at least one of the surface metal bodies 52 and 62. That is, the joint portion 81 may be integrally provided with the surface metal bodies 52 and 62 as a part of the substrate 50 and 60. The arm connection portion 80 may also be a structure without the joint portion 81. That is, the arm connection portion 80 may also be a structure only having the bonding material 103.

[0198] The external connection terminal 90 is a terminal for electrically connecting the semiconductor device 20 to an external device. The external connection terminal 90 is formed of a metal material with good conductivity such as copper. The external connection terminal 90 is, for example, a plate. The external connection terminal 90 is sometimes referred to as a lead. The external connection terminal 90 includes a power terminal 91, an output terminal 92, and a signal terminal 93. The power terminal 91 includes a P terminal 91P and an N terminal 91N. The P terminal 91P, the N terminal 91N, and the output terminal 92 are main terminals electrically connected to the main electrode of the semiconductor element 40. The signal terminal 93 includes a signal terminal 93H on the upper arm 9H side and a signal terminal 93L on the lower arm 9L side.

[0199] The power terminal 91 is an external connection terminal 90 electrically connected to the above-mentioned power lines 7 and 8. The P terminal 91P is electrically connected to the positive terminal of the smoothing capacitor 5. The P terminal 91P is sometimes referred to as a positive terminal or a high-potential power terminal. The P terminal 91P is connected to the P wiring 54 of the surface metal body 52. ​​That is, the P terminal 91P is connected to the drain electrode 40D of the semiconductor element 40H constituting the upper arm 9H.

[0200] The P terminal 91P is connected to the vicinity of one end of the P wiring 54 in the Y direction. The P terminal 91P extends from the connection portion (joint portion) with the P wiring 54 in the Y direction, and protrudes from the vicinity of the center in the Z direction of the side surface 30c to the outside of the sealing body 30. The semiconductor device 20 of this embodiment has two P terminals 91P. Fig.11 As shown, one of the P terminals 91P is connected to one of the pair of extended portions 542, and the other is connected to the other of the pair of extended portions 542. The P terminal 91P is arranged at a position close to the notch 540 at each extended portion 542 so as to be adjacent to the N terminal 91N in a plan view, that is, arranged closer to the inside. The two P terminals 91P are arranged in an X-direction. The two P terminals 91P are arranged at approximately the same position in the Z-direction.

[0201] The N terminal 91N is electrically connected to the negative terminal of the smoothing capacitor 5. The N terminal 91N is sometimes referred to as a negative terminal or a low potential power supply terminal. The N terminal 91N is connected to the N wiring 64 of the surface metal body 62. That is, the N terminal 91N is connected to the source electrode 40S of the semiconductor element 40L constituting the lower arm 9L.

[0202] The N terminal 91N is connected to one end of the N wiring 64 in the Y direction. The N terminal 91N extends from the junction with the N wiring 64 in the Y direction and protrudes from the center of the side surface 30c in the Z direction to the outside of the sealing body 30. The semiconductor device 20 includes two N terminals 91N. Fig.15 As shown in FIG. 1 , one of the N terminals 91N is connected to one of the pair of extension portions 641, and the other is connected to the other of the pair of extension portions 641. The two N terminals 91N are arranged side by side in the Y direction. The two N terminals 91N are arranged at substantially the same position in the Z direction.

[0203] The two N terminals 91N are arranged outside the two P terminals 91P in the X direction. In plan view, one of the N terminals 91N is arranged near one of the P terminals 91P, and the other of the N terminals 91N is arranged near the other of the P terminals 91P. The N terminal 91N and the P terminal 91P adjacent to each other in the X direction are opposed to each other in side surfaces in a portion including a portion protruding from the sealing body 30.

[0204] The output terminal 92 is electrically connected to the winding 3a (stator coil) of the corresponding phase of the motor generator 3. The output terminal 92 is sometimes referred to as an O terminal, an AC terminal, etc. Figure 3 and Figure 7 As shown, the output terminal 92 is connected to the relay wiring 55 of the surface metal body 52 of the substrate 50. That is, the output terminal 92 is connected to the connection point between the upper arm 9H and the lower arm 9L.

[0205] The output terminal 92 is connected to the vicinity of one end of the relay wiring 55 in the Y direction. The output terminal 92 extends from the junction with the relay wiring 55 in the Y direction, and protrudes from the vicinity of the center in the Z direction in the side surface 30d to the outside of the sealing body 30. The semiconductor device 20 has two output terminals 92. One of the output terminals 92 is connected to one of the pair of extended portions 552, and the other is connected to the other of the pair of extended portions 552. The two output terminals 92 are arranged side by side in the X direction. The two output terminals 92 are arranged at approximately the same position in the Z direction.

[0206] The signal terminal 93 is electrically connected to a driving circuit (driver) not shown. The signal terminal 93H is electrically connected to the pad 40P of the semiconductor element 40H via a connecting component such as a bonding wire 110. The number of signal terminals 93H is not particularly limited. The signal terminal 93H only needs to include a terminal for applying a driving voltage to at least the gate electrode of the semiconductor element 40H. The semiconductor device 20 of this embodiment has two signal terminals 93H. One of the signal terminals 93H is a terminal for a gate electrode. The signal terminal 93H for the gate electrode is electrically connected to the pad 40P for the gate electrode of two semiconductor elements 40H. The signal terminal 93H is arranged at a position overlapping with the notch 540 of the P wiring 54 in a planar view. In the signal terminal 93H, the joint with the bonding wire 110 is not opposite to the surface metal body 52 but to the insulating substrate 51. The two signal terminals 93H are arranged to be arranged horizontally in the X direction.

[0207] The signal terminal 93H extends from the junction with the bonding wire 110 in the Y direction, and protrudes from the vicinity of the center in the Z direction to the outside of the sealing body 30 in the side surface 30c. At least a part of the protruding portion of the signal terminal 93H extends in the same direction as the power terminal 91. The signal terminal 93H is arranged between the two P terminals 91P in the X direction. That is, the external connection terminals 90 protruding from the side surface 30c are arranged in the order of the N terminal 91N, the P terminal 91P, the two signal terminals 93H, the P terminal 91P, and the N terminal 91N in the X direction.

[0208] The signal terminal 93L is electrically connected to the pad 40P of the semiconductor element 40L via a connecting component such as a bonding wire 110. The number of signal terminals 93L is not particularly limited. The signal terminal 93L only needs to include a terminal for applying a driving voltage to at least the gate electrode of the semiconductor element 40L. The semiconductor device 20 of the present embodiment has four signal terminals 93L. One of the signal terminals 93L is a terminal for a gate electrode. The signal terminal 93L for the gate electrode is electrically connected to the pad 40P for the gate electrode of two semiconductor elements 40L. The signal terminal 93L is arranged at a position overlapping with the notch 550 of the relay wiring 55 in a plan view. In the signal terminal 93L, the joint with the bonding wire 110 is not opposite to the surface metal body 52 but to the insulating substrate 51. The four signal terminals 93L are arranged to be arranged horizontally in the X direction.

[0209] The signal terminal 93L extends from the junction with the bonding wire 110 in the Y direction, and protrudes from the vicinity of the center in the Z direction to the outside of the sealing body 30 in the side surface 30d. At least a part of the protruding portion of the signal terminal 93L extends in the same direction as the output terminal 92. The signal terminal 93L is arranged between the two output terminals 92 in the X direction. That is, the external connection terminals 90 protruding from the side surface 30d are arranged in the order of the output terminal 92, the four signal terminals 93L, and the output terminal 92 in the X direction.

[0210] The drain electrode 40D of the semiconductor element 40 is bonded to the surface metal body 52 via the bonding material 100. The source electrode 40S of the semiconductor element 40 is bonded to the conductive spacer 70 via the bonding material 101. The conductive spacer 70 is bonded to the surface metal body 62 via the bonding material 102. The joint portion 81 is bonded to the metal bodies 52, 62 via the bonding material 103. The P terminal 91P, the N terminal 91N and the output terminal 92 as the main terminals in the external connection terminal 90 are bonded to the corresponding surface metal bodies 52, 62 via the bonding material 104.

[0211] The bonding materials 100 to 104 are bonding materials having electrical conductivity. For example, solder can be used as the bonding materials 100 to 104. An example of solder is a multi-element lead-free solder that contains Cu, Ni, etc. in addition to Sn. A bonding material of a sintered material such as sintered silver can also be used instead of solder. The P terminal 91P, the N terminal 91N, and the output terminal 92 can also be directly bonded to the corresponding surface metal bodies 52 and 62 without passing through the bonding material 104. The P terminal 91P, the N terminal 91N, and the output terminal 92 can be directly bonded to the surface metal bodies 52 and 62 by, for example, ultrasonic bonding, friction stir bonding, laser welding, etc. In the case where the joint portion 81 and the substrates 50 and 60 are separately provided, the joint portion 81 can be directly bonded to the surface metal bodies 52 and 62.

[0212] As described above, in the semiconductor device 20, the plurality of semiconductor elements 40 constituting the upper and lower arm circuits 9 of one phase are sealed by the sealing body 30. The sealing body 30 integrally seals the plurality of semiconductor elements 40, a portion of the substrate 50, a portion of the substrate 60, a plurality of conductive spacers 70, an arm connection portion 80, and a portion of each of the external connection terminals 90. The sealing body 30 seals the insulating base materials 51, 61 and the surface metal bodies 52, 62 in the substrates 50, 60.

[0213] The semiconductor element 40 is arranged between the substrates 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched by the substrates 50 and 60 arranged opposite to each other. As a result, the heat of the semiconductor element 40 can be dissipated to both sides in the Z direction. The semiconductor device 20 forms a double-sided heat dissipation structure. The back surface 50b of the substrate 50 is roughly coplanar with the one surface 30a of the sealing body 30. The back surface 60b of the substrate 60 is roughly coplanar with the back surface 30b of the sealing body 30. Since the back surfaces 50b and 60b are exposed surfaces, the heat dissipation can be improved.

[0214] <Manufacturing method>

[0215] Next, based on Fig.10 An example of a method for manufacturing the semiconductor device 20 is described below. Fig.10 In the figure, the substrate 50 and the substrate 60 are shown facing each other to make the subsequent assembly easier to understand.

[0216] First, the semiconductor element 40, substrates 50, 60, conductive spacer 70, connector 81 and lead frame 94 are prepared. Fig.10 As shown, the lead frame 94 is provided with external connection terminals 90. The lead frame 94 is formed by subjecting a metal plate to a process such as press working. The external connection terminals 90 are supported by an outer peripheral frame 94b via tie bars 94a.

[0217] Next, the semiconductor element 40 , the joint portion 81 , and the external connection terminal 90 are bonded (connected) to the substrate 50 . Furthermore, the conductive spacer 70 is bonded to the semiconductor element 40 .

[0218] At this time, the lead frame 94 and the semiconductor element 40 are arranged on the substrate 50. In addition, the conductive spacer 70 is arranged on the source electrode 40S of the semiconductor element 40. The lead frame 94 is arranged so that a part of each of the external connection terminals 90 overlaps with the substrate 50 in a plan view. Specifically, the P terminal 91P and the N terminal 91N are arranged so that the P wiring 54 of the surface metal body 52 overlap, and the output terminal 92 overlaps with the relay wiring 55. In addition, the signal terminal 93H is arranged so that the insulating base material 51 exposed from the notch 540 overlaps, and the signal terminal 93L is arranged so that the insulating base material 51 exposed from the notch 550 overlaps.

[0219] Next, the drain electrode 40D of the semiconductor element 40 is bonded to the surface metal body 52 by the bonding material 100. The source electrode 40S is bonded to the conductive spacer 70 by the bonding material 101. The joint portion 81 is bonded to the surface metal body 52 by the bonding material 103. The P terminal 91P and the output terminal 92 are bonded to the surface metal body 52 by the bonding material 104. For example, in the case of solder, the bonding can be performed together by reflow. Fig.10This engagement state is shown.

[0220] Next, the pad 40P of the semiconductor element 40H and the signal terminal 93H are electrically connected via the bonding wire 110. Similarly, the pad 40P of the semiconductor element 40L and the signal terminal 93L are electrically connected via the bonding wire 110.

[0221] Next, the substrate 60 is bonded (connected). The source electrode 40S of the semiconductor element 40 is bonded to the surface metal body 62 via the bonding material 102. The joint portion 81 is bonded to the surface metal body 62 via the bonding material 103. The N terminal 91N is bonded to the surface metal body 62 via the bonding material 104. For example, in the case of solder, the bonding can be performed together by reflow.

[0222] Next, the sealing body 30 is formed by transfer molding. Although not shown in the figure, in the present embodiment, the sealing body 30 is formed in a manner that completely covers the substrates 50 and 60, and is cut after forming. The sealing body 30 is cut together with a portion of the back metal bodies 53 and 63 of the substrates 50 and 60. As a result, the back sides 50b and 60b are exposed. The back side 50b is roughly coplanar with one side 30a of the sealing body 30, and the back side 60b is roughly coplanar with the back side 30b. Alternatively, the back sides 50b and 60b may be pushed against the cavity wall of the forming mold, and the sealing body 30 may be formed in a state where they are in close contact. In this case, at the point in time when the sealing body 30 is formed, the back sides 50b and 60b are exposed from the sealing body 30. Therefore, cutting after forming is not required.

[0223] Next, unnecessary portions such as the tie bars 94a and the outer peripheral frame 94b are removed from the lead frame 94. In this way, the semiconductor device 20 can be obtained.

[0224] <Position Relationship>

[0225] Next, based on Fig.14 and Fig.15 , illustrating the positional relationship among the semiconductor element 40, the circuit patterns of the surface metal bodies 52, 62, the arm connection portion 80, and the external connection terminal 90 to which the circuit patterns are connected. Fig.14 It is a diagram showing the circuit pattern of the surface metal body 52, the semiconductor element 40, and the arrangement of the terminals. Fig.15 2 is a diagram showing the circuit pattern of the surface metal body 62, the semiconductor element 40, and the arrangement of the terminals. Fig.14 and Fig.15 In FIG. 1 , only the external connection terminal 90 connected to the circuit pattern is shown for convenience. Fig.14 In FIG. 4 , the main electrode (drain electrode 40D) connected to the surface metal body 52 is indicated as D in the arrangement region of the semiconductor element 40 for easy understanding. Fig.15 In FIG. 1 , the main electrode (source electrode 40S) connected to the surface metal body 62 is represented by S in the arrangement region of the semiconductor element 40 for easy understanding.

[0226] Fig.14 The imaginary line CL1 shown is an imaginary line passing through the midpoint of the two semiconductor elements 40 constituting one arm. The imaginary line CL1 passes through the midpoint (center) of the arrangement direction of the two semiconductor elements 40 and extends in the Y direction. For example, the imaginary line CL1 is a line passing through the midpoint of the two semiconductor elements 40H. Instead of the semiconductor element 40H, it may be a line passing through the midpoint of the semiconductor element 40L.

[0227] like Fig.14 As shown, the configuration of the two semiconductor elements 40H is roughly line-symmetrical with respect to the imaginary line CL1. Similarly, the configuration of the two semiconductor elements 40L is also roughly line-symmetrical with respect to the imaginary line CL1. Here, the so-called roughly line-symmetrical means that errors of the degree of manufacturing deviation can be allowed. The circuit pattern of the surface metal body 52 is also roughly line-symmetrical with respect to the imaginary line CL1. That is, the P wiring 54 and the relay wiring 55 are respectively roughly line-symmetrical with respect to the imaginary line CL1.

[0228] The arm connection portion 80 connected to the relay wiring 55 is also arranged approximately line-symmetrically with respect to the imaginary line CL1. The external connection terminal 90 connected to the surface metal body 52 is also arranged approximately line-symmetrically with respect to the imaginary line CL1. That is, the two P terminals 91P are also arranged approximately line-symmetrically with respect to the imaginary line CL1. The two output terminals 92 are also arranged approximately line-symmetrically with respect to the imaginary line CL1.

[0229] and Fig.14 Likewise, in Fig.15 The imaginary line CL1 is also shown in FIG. The semiconductor elements 40H and 40L are arranged in the same manner as Fig.14 is the same. Fig.15 As shown in FIG. 1 , the circuit pattern of the surface metal body 62 is also substantially line-symmetrical with respect to the imaginary line CL1. That is, the N wiring 64 and the relay wiring 65 are respectively substantially line-symmetrical with respect to the imaginary line CL1. The arrangement of the arm connection portion 80 connected to the relay wiring 65 is also substantially line-symmetrical with respect to the imaginary line CL1. Fig.14 Likewise, the two N terminals 91N as the external connection terminals 90 connected to the surface metal body 62 are arranged substantially line-symmetrically with respect to the imaginary line CL1 .

[0230] <Circuit Pattern>

[0231] Next, based on Fig.15 , the circuit pattern of the surface metal body 62 is described in more detail. Fig.15 The dashed-dotted lines shown indicate the boundaries of the respective regions.

[0232] As described above, the surface metal body 62 of the substrate 60 has an N wiring 64 and a relay wiring 65. The N wiring 64 has a base portion 640 and a pair of extending portions 641. The pair of extending portions 641 extend from the base portion 640 in the Y direction toward the side surface 30c of the sealing body 30. The N wiring 64 defines the outer contour of the surface metal body 62. The relay wiring 65 is sandwiched between the pair of extending portions 641. The relay wiring 65 is disposed within the notch 642 of the N wiring 64.

[0233] As Fig.15 shown, the relay wiring 65 has an end portion 650 that is one end in the Y direction. The end portion 650 is the end portion on the base portion 640 side in the Y direction. On the other hand, the base portion 640 of the N wiring 64 has an opposing edge 640a that opposes the end portion 650. In the base portion 640, the opposing edge 640a is the portion between the pair of extending portions 641. Further, the base portion 640 has a placement region 640b for the semiconductor element 40L. The placement region 640b is defined by the outer contour of the semiconductor element 40L as shown by the double-dashed line in Fig.15 it. The placement region 640b includes the region that overlaps with the semiconductor element 40L in a plan view, and also includes the inter-element region in the case of including a plurality of semiconductor elements 40L. The inter-element region is the opposing region between the semiconductor elements 40L in the arrangement direction of the semiconductor elements 40L.

[0234] Here, the lengths L1, L2, and L3 in the X direction are defined as follows. The length L1 is the length of the end portion 650 of the relay wiring 65 as shown in Fig.15 it. The length L2 is the length of the opposing edge 640a of the base portion 640. The length L3 is the length of the placement region 640b of the base portion 640. In the present embodiment, the relationship L1 < L2 < L3 is satisfied.

[0235] The relay wiring 65 of the present embodiment has a reduced-width portion 651a. The reduced-width portion 651a includes the end portion 650. The reduced-width portion 651a is the portion within a specified range from the end portion 650 in the Y direction. The length in the X direction, i.e., the width, of the reduced-width portion 651a is the smallest at the end portion 650. In the reduced-width portion 651a, the width W1 at an arbitrary first position is less than or equal to the width W2 at a second position that is farther from the end portion 650 than the first position.

[0236] The width of the reduced-width portion 651a may also be gradually reduced in the Y direction at every specified length. That is, the X-direction end portions of the reduced-width portion 651a may change in a stepped manner. In the present embodiment, the closer to the base portion 640, the shorter the length in the X direction of the reduced-width portion 651a. That is, the width of the reduced-width portion 651a continuously decreases toward the base portion 640. The arm connection portion 80 is disposed in the reduced-width portion 651a.

[0237] The relay wiring 65 may also have only a reduced width portion 651a including an end portion 650. In this case, the semiconductor element 40H is also arranged in the reduced width portion 651a. The relay wiring 65 of this embodiment has a fixed width portion 651b. The fixed width portion 651b is connected to the reduced width portion 651a and is a portion with a fixed width within a specified range in the Y direction. In addition, the semiconductor element 40H is arranged in the fixed width portion 651b.

[0238] The relay wiring 65 of the present embodiment also has a tapered portion 651c. The tapered portion 651c includes an end portion 652 opposite to the end portion 650. The tapered portion 651c is connected to the fixed width portion 651b opposite to the tapered portion 651a. The width of the tapered portion 651c is smallest at the end portion 652. In the tapered portion 651c, the width of any first position is less than the width of the second position farther from the end portion 652 than the first position. In the present embodiment, the width of the tapered portion 651c continuously decreases toward the end portion 652. In the relay wiring 65, the farther away from the fixed width portion 651b, the narrower the width of the tapered portions 651a and 651c.

[0239] In this embodiment, the interval between the N wiring 64 and the relay wiring 65 is substantially constant in the entire area of ​​the opposing region. The extended portion 641 of the N wiring 64 is laid out so that the interval with the relay wiring 65 is substantially constant. The extended portion 641 includes a width expansion portion 641a, a width fixing portion 641b, and a width expansion portion 641c.

[0240] The expansion portion 641a is connected to the base 640 and is a portion that is within a predetermined range from the boundary with the base 640 in the Y direction. The length of the expansion portion 641a in the X direction, that is, the width, is the largest at the boundary with the base 640. In the expansion portion 641a, the width of any first position is greater than the width of the second position that is farther from the base 640 than the first position. The width of the expansion portion 641a of this embodiment continuously expands toward the base 640. The fixed width portion 641b is connected to the expansion portion 641a and is a portion whose width is fixed within a predetermined range in the Y direction. The fixed width portion 641b is opposite to the fixed width portion 651b of the relay wiring 65.

[0241] The expansion portion 641c is connected to the fixed width portion 641b opposite to the expansion portion 641a. The expansion portion 641c extends to a position closer to the side 30c than the contraction portion 651c. The expansion portion 641c includes a front end portion 641d of the extension portion 641. The width of the expansion portion 641c is the largest at the front end portion 641d. In the expansion portion 641c, the width of any first position is greater than the width of the second position farther from the front end portion 641d than the first position. In the present embodiment, the width of the expansion portion 641c continuously expands toward the front end portion 641d at the opposing portion opposite to the contraction portion 651c. In the expansion portion 641c, the portion closer to the front end portion 641d than the opposing portion is a fixed width. In the N wiring 64, the width of a part of the expansion portion 641c and the expansion portion 641a is greater the farther away from the fixed width portion 641b.

[0242] <Current Path>

[0243] Next, based on Figures 16 to 20 The current path will be described. Fig.16 2 is a diagram showing a PN current cycle of a reference example. In the reference example, the reference numerals of the elements are given by appending r to the end of the reference numerals of the elements associated with the semiconductor device 20. The structure of the reference example is substantially the same as that of the semiconductor device 20 except that the number of signal terminals 93Lr, the patterns of the N wiring 64r and the relay wiring 65r are different. Fig.17 2 is a diagram showing a PN current cycle of the semiconductor device 20 according to the present embodiment. Fig.18 This is a diagram showing a PN current loop in a side view of the semiconductor device 20 viewed from the X direction. The PN current loop refers to the loop shape of a current path from the P terminal 91P to the N terminal 91N.

[0244] When studying the inductance, the PN current loop of P terminal 91P→P wiring 54→semiconductor element 40H→relay wiring 65→arm connecting portion 80→relay wiring 55→semiconductor element 40L→N wiring 64→N terminal 91N is considered. Therefore, in order to easily understand the PN current loop, the P terminal 91P to the N terminal 91N is represented by a continuous solid line. In fact, the semiconductor elements 40H and 40L are controlled in a manner that they are not turned on at the same time. For convenience, only the current path for one of the semiconductor element 40H and one of the semiconductor element 40L is shown, but the same is true for the other semiconductor element 40H and the other semiconductor element 40L.

[0245] Fig.19 and Fig. 20 Represents the results of electromagnetic field simulation. Fig.19 express Fig.18 The current density of the reference example is shown. Fig. 20 about Fig.16The structure of the present embodiment shown in the figure shows the current density. The conditions of the electromagnetic field simulation are the same except that the circuit pattern of the surface metal body 62 is different. Fig.19 , Fig. 20 The lower the current density, the sparser it is (lighter color), and the higher the current density, the denser it is (darker color).

[0246] like Fig.16 As shown in FIG. 1 , in the semiconductor device 20r of the reference example, the planar shape of the relay wiring 65r is substantially rectangular. The length of the end 650r of the relay wiring 65r is substantially equal to the length of the configuration area 640br of the semiconductor element 40Lr in the base 640r. The length of the opposing side 640ar in the base 640r is longer than the configuration area 640br. Therefore, as shown in FIG. Fig.16 As shown by the solid arrows, for the semiconductor element 40Lr having a substantially rectangular planar shape, current enters from one side 400r and exits from the other side 401r. Side 400r is the side opposite to the relay wiring 65r. Side 401r is the side opposite to the sides of the two semiconductor elements 40Lr facing each other. In this way, since the current flows from the semiconductor element 40Lr to the outside in the X direction, the PN current circulation is large. According to Fig.19 The simulation results shown also clearly show that the current flows from the semiconductor element 40Lr to the outside in the X direction in the base portion 640r.

[0247] On the other hand, in the semiconductor device 20 of the present embodiment, as described above, the N wiring 64 and the relay wiring 65 are laid out to satisfy a predetermined positional relationship with the semiconductor element 40L. Fig.17 As shown, in the plan view, N wiring 64 (extended portion 641) also exists above one side 400 of semiconductor element 40L. Side 400 is an opposite side to relay wiring 65. Thus, current enters from side 400 of semiconductor element 40L, and current exits from the same side 400. In the current from semiconductor element 40L toward N terminal 91N, the Y direction component increases, especially near semiconductor element 40L. According to Fig. 20 It is also clear from the simulation results shown that the current flows from the semiconductor element 40L with a Y-direction component.

[0248] Thus, the current flowing through the N wiring 64 approaches the relay wiring 65, and the current path formed by the N wiring 64, that is, the current path between the semiconductor element 40L and the N terminal 91N becomes shorter. Therefore, the PN current circulation is smaller than that in the reference example. Fig.18 As shown, the PN current circulation is also small in the Z direction. The P wiring 54 and the N wiring 64 are opposed to each other in the Z direction. In addition, the relay wiring 55 and the N wiring 64 are opposed to each other in the Z direction.

[0249] <Summary of the First Embodiment>

[0250] When the inductance of the main circuit wiring is large, the surge voltage increases. If the semiconductor element is made thicker to ensure the withstand voltage, the steady-state loss increases. In order to reduce the steady-state loss, it is necessary to increase the element area. In addition, by suppressing the switching speed, the surge voltage can also be reduced. In this case, the output to the electric generator becomes smaller. In this way, if the inductance is large, the volume of the semiconductor element becomes larger or the output becomes smaller.

[0251] If the components where the current flows in opposite directions are arranged opposite to each other, the inductance can be reduced by the cancellation effect of the magnetic flux generated by the current. If the PN current loop of the main circuit wiring is smaller, the components where the current flows in opposite directions are close to each other, and the cancellation effect of the magnetic flux becomes higher, so the inductance can be reduced.

[0252] In this embodiment, the semiconductor elements 40H and 40L are arranged in the Y direction, and the arm connection portion 80 is arranged between the semiconductor elements 40H and 40L. The power terminals 91 (91P, 91N) in the main terminals are led out in the same direction. In addition, in the Y direction, the P wiring 54 is arranged on the power terminal 91 side, and the relay wiring 55 is arranged on the opposite side. In the Y direction, the relay wiring 65 is arranged on the power terminal 91 side, and the base 640 of the N wiring 64 is arranged on the opposite side. In addition, the extension portion 641 of the N wiring 64 is extended to the power terminal 91 side in a manner of sandwiching the relay wiring 65.

[0253] With such a structure, the PN current circulation becomes smaller. Thus, the inductance of the main circuit wiring can be reduced. For example, by arranging the P terminal 91P and the N terminal 91N in parallel, the inductance can be reduced. The relay wiring 65 and the N wiring 64 are also arranged with a predetermined interval (arranged in parallel). Thus, the inductance can be reduced. In addition, the extended portion 641 of the N wiring 64 is opposite to the P wiring 54. Thus, the inductance can be reduced.

[0254] In this embodiment, the surface metal body 52 of the substrate 50 and the surface metal body 62 of the substrate 60 provide a wiring function for the semiconductor element 40. The surface metal bodies 52 and 62 are sealed by the sealing body 30. Since the creepage distance is not required as in the past, the N wiring 64 and the relay wiring 65 can be arranged close to each other. As a result, the effect of magnetic flux cancellation becomes higher, and the inductance can be further reduced.

[0255] In addition, if Fig.15As shown, the length L1 of the end portion 650 of the relay wiring 65, the length L2 of the opposing side 640a of the base portion 640, and the length L3 of the arrangement region 640b of the semiconductor element 40L in the base portion 640 satisfy the relationship L1 < L2 < L3. By satisfying this dimensional relationship, as described above, current enters from one side 400 of the semiconductor element 40L and exits from the same side 400. In the current flowing from the semiconductor element 40L toward the N terminal 91N, particularly in the vicinity of the semiconductor element 40L, the Y-direction component increases. As a result, the current path formed by the N wiring 64, that is, the current path between the semiconductor element 40L and the N terminal 91N becomes shorter, and the PN current circulation becomes smaller. Thereby, the inductance of the main circuit wiring can be further reduced.

[0256] In addition, the higher the frequency of the current, the more the current is concentrated on the opposing side between the extended portion 641 of the N wiring 64 and the relay wiring 65 due to the skin effect. Thereby, the PN current circulation can be further reduced, and thus the inductance can be further reduced.

[0257] In the present embodiment, as Fig.15 shown, the relay wiring 65 has a reduced-width portion 651a. Thereby, in the extended portion 641, the width of the portion opposing the reduced-width portion 651a can be increased. Thereby, heat generation due to energization can be suppressed without changing the volume of the surface metal body 62 and the substrate 60. That is, heat generation can be suppressed while reducing the inductance.

[0258] In particular, in the present embodiment, the shorter the length of the reduced-width portion 651a in the X direction is, the closer it is to the base portion 640. That is, the width of the reduced-width portion 651a continuously decreases toward the base portion 640. The reduced-width portion 651a of the relay wiring 65 is conical. Thereby, it is easy to fix the interval between the relay wiring 65 and the extended portion 641. That is, the extended portion 641 can be made closer to the relay wiring 65 to reduce the PN current circulation. In addition, the width of the extended portion 641 can be increased to suppress heat generation.

[0259] In the present embodiment, the relay wiring 65 has a constant-width portion 651b. And the semiconductor element 40H is arranged in the constant-width portion 651b. The relay wiring 65 having the reduced-width portion 651a and the constant-width portion 651b has the same or similar shape as the home plate of a baseball in a plan view. Thereby, compared with the structure in which the semiconductor element 40H is arranged in the reduced-width portion 651a, the width of the extended portion 641 can be increased. Thereby, heat generation due to energization can be suppressed without changing the volume of the surface metal body 62 and the substrate 60. That is, heat generation can be suppressed while reducing the inductance.

[0260] In the present embodiment, the semiconductor device 20 includes two semiconductor elements 40H and two semiconductor elements 40L. The two semiconductor elements 40H are arranged in the X direction. Similarly, the two semiconductor elements 40L are arranged in the X direction. In this way, the semiconductor elements 40 constituting one arm are arranged in a direction (X direction) orthogonal to the arrangement direction (Y direction) of the semiconductor elements 40H and the semiconductor elements 40L. In the X direction, a pair of extended portions 641 sandwich the relay wiring 65. Thus, current bias can be suppressed.

[0261] The semiconductor device 20 may also include an N terminal 91N whose front end is branched into two by being connected to the pair of extension portions 641, respectively. In the present embodiment, the semiconductor device 20 includes two N terminals 91N, and the N terminals 91N are connected to the pair of extension portions 641, respectively. Thus, it is easy to arrange other external connection terminals 90 between the two N terminals 91N. Since the external connection terminals 90 arranged between them do not need to be avoided, the volume can be miniaturized.

[0262] The semiconductor device 20 may also have only one P terminal 91P. In the present embodiment, the semiconductor device 20 has two P terminals 91P. And, in the X direction, the N terminal 91N, the P terminal 91P, the signal terminal 93H, the P terminal 91P, and the N terminal 91N are arranged in this order. The P terminal 91P and the N terminal 91N are arranged on both ends of the X direction. Thus, it is easy to reduce the PN current circulation. In addition, since the external connection terminals 90 are regularly arranged in the X direction, as described above, it is easy to ensure linear symmetry with respect to the semiconductor element 40, the circuit pattern of the surface metal bodies 52 and 62, and the external connection terminals 90. Thus, current bias can be suppressed.

[0263] In this embodiment, the P terminal 91P and the N terminal 91N protrude from the side surface 30c of the sealing body 30, and the output terminal 92 protrudes from the side surface 30d. In this way, the P terminal 91P and the N terminal 91N connected to the smoothing capacitor 5 are led out in the same direction, and the output terminal 92 is led out in the opposite direction. As a result, the connectivity with the smoothing capacitor 5 and the connectivity with the motor generator 3 can be improved. In addition, by arranging the P terminal 91P and the N terminal 91N, the inductance can be reduced. By arranging the terminals in this way, it is easy to reduce the PN current circulation.

[0264] <Modification>

[0265] As an example where multiple semiconductor elements 40H and 40L are provided respectively, an example where two are provided for each is shown, but it is not limited thereto. Three or more may be provided. For example, a structure may be formed in which three semiconductor elements 40H are arranged and disposed in the X direction, and three semiconductor elements 40L are arranged and disposed in the X direction. The circuit pattern of the surface metal body 62 and the arrangement of the semiconductor elements 40 are not limited to the above examples. For example, it may be as shown in Fig.21 , Fig. 22 . In Fig.21 and Fig. 22 , for convenience, the sealing body 30 on the back surface 30b side with respect to the insulating base material 51 is omitted and illustrated. In addition, the insulating base material 61 and the back surface metal body 63 in the substrate 60 are omitted and illustrated. Similar to Fig.17 , the PN current circulation is indicated by solid arrows. In Fig.21 and Fig. 22 , the semiconductor device 20 includes two signal terminals 93L.

[0266] In Fig.21 , the semiconductor device 20 includes two arm connection portions 80. The planar shape of the relay wiring 65 is substantially rectangular. The two arm connection portions 80 are arranged and disposed in the X direction near the end portion 650. The interval between the two semiconductor elements 40L is larger than the above example (refer to Fig.17 ). The length of the arrangement region 640b of the semiconductor element 40L is longer than the above example. Thus, the relationship of L1 < L2 < L3 is satisfied. Thus, the current enters from the side 400 of the semiconductor element 40L and exits from the same side 400. In such a structure, the current path formed by the N wiring 64 also becomes shorter, and the PN current circulation can be made smaller. However, Fig.17 The structure shown can make the width of the N wiring 64, particularly the width of the extended portion 641, larger. In addition, in the case of the structure shown in Fig.17 , the arm connection portion 80 may be one.

[0267] In Fig. 22 , the semiconductor device 20 includes only one semiconductor element 40H and 40L respectively. In this example, the arrangement region 640b coincides with the outer contour of the semiconductor element 40L. The length in the X direction of one semiconductor element 40H and 40L is longer than the above example (refer to Fig.17 ). Thus, the relationship of L1 < L2 < L3 is satisfied. Thus, the current enters from the side 400 of the semiconductor element 40L and exits from the same side 400. In such a structure, the current path formed by the N wiring 64 also becomes shorter, and the PN current circulation can be made smaller.

[0268] The arrangement of the external connection terminal 90 is not limited to the above example. For example, the P terminal 91P may be arranged outside in the X direction, and the N terminal 91N may be arranged inside. Fig.23 and Fig.24 As shown, the semiconductor element 40 and the circuit pattern are also reversed. Fig.23 A substrate 50 is shown. Fig.24 A substrate 60 is shown.

[0269] like Fig.23 As shown, the circuit pattern of the surface metal body 52 of the substrate 50 is Fig.15 The circuit pattern of the surface metal body 62 of the substrate 60 shown in FIG. Fig.15 The semiconductor element 40H is arranged on the N wiring 64. The relay wiring 55 is Fig.15 The semiconductor element 40L and the arm connecting portion 80 are arranged on the relay wiring 55 .

[0270] like Fig.24 As shown, the circuit pattern of the metal body 62 on the surface of the substrate 60 is Fig.14 The circuit pattern of the surface metal body 52 of the substrate 50 shown in FIG. Fig.14 The semiconductor element 40L is arranged on the N wiring 64. The relay wiring 65 is Fig.14 The semiconductor element 40H and the arm connecting portion 80 are arranged on the relay wiring 65 .

[0271] exist Fig.23 and Fig.24 In the case of the structure shown, the above-mentioned first and second relationships are opposite. The semiconductor element 40L is the first element, and the semiconductor element 40H is the second element. The source electrode 40S is the first main electrode, and the drain electrode 40D is the second main electrode. The substrate 60 is the first substrate, and the substrate 50 is the second substrate. The insulating substrate 61 is the first insulating substrate, the surface metal body 62 is the first surface metal body, and the back metal body 63 is the first back metal body. The insulating substrate 51 is the second insulating substrate, the surface metal body 52 is the second surface metal body, and the back metal body 53 is the second back metal body.

[0272] (Second embodiment)

[0273] This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be cited. In order to suppress transient current imbalance during switching, as described in this embodiment, the surface metal body connecting a plurality of semiconductor elements in parallel can be made into a predetermined structure.

[0274] <Semiconductor Device>

[0275] First, based on Fig.25 The semiconductor device 20 according to the present embodiment will be described. Fig.25 2 is a cross-sectional view showing a semiconductor device 20 according to the present embodiment. Fig.25 Corresponds to Figure 8 .

[0276] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 15 ) has the same structure. The semiconductor device 20 constitutes the upper and lower arm circuits 9 of one phase. Fig.25 As shown, the semiconductor device 20 includes a plurality of semiconductor elements 40 including two semiconductor elements 40H as upper arm elements, substrates 50 and 60 arranged in a manner to sandwich the semiconductor elements 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D, which is the first main electrode on the high potential side of the semiconductor element 40. The surface metal body 62 of the substrate 60 is connected to the source electrode 40S, which is the second main electrode on the low potential side of the semiconductor element 40. Although not shown in the figure, the semiconductor device 20 includes two semiconductor elements 40L as lower arm elements.

[0277] The surface metal body 62 is substantially line-symmetrical with respect to the imaginary line CL1, similarly to the previous embodiment. Fig.25 As shown in FIG. 1 , in this embodiment, the relay wiring 65 of the surface metal body 62 has a slit 653. As will be described later, the N wiring 64 has a slit 643.

[0278] <Effect of suppressing transient current imbalance>

[0279] Next, based on Fig.26 and Fig. 27 , the effect of suppressing transient current imbalance during switching is explained. Fig.26 1 is an equivalent circuit diagram of two semiconductor elements 40 (MOSFET 11 ) constituting one arm. Fig. 27 This is a schematic diagram (potential diagram) that shows the potential in an easily understandable manner.

[0280] exist Fig.26 and Fig. 27In the figure, one of the MOSFETs 11 connected in parallel is represented as MOSFET1, and the other is represented as MOSFET2. The inductance of the wiring on the drain electrode side (hereinafter, represented as drain wiring) is represented as Ld, and the inductance of the wiring on the source electrode side (hereinafter, source wiring) is represented as Ls. The gate potential is represented as Vg, the potential of the source electrode of MOSFET1 is represented as Vks1, the potential of the source electrode of MOSFET2 is represented as Vks1, and the common source potential is represented as Vs. The midpoint potential between the potential Vks1 and the potential Vks2 is represented as Vm. The midpoint potential Vm is fixed. Vm=(Vks1+Vks2) / 2.

[0281] In addition, the gate voltage of MOSFET1 is represented by Vgs1, and the gate voltage of MOSFET2 is represented by Vgs2. The current flowing through MOSFET1 by turning on is represented by I1, and the voltage generated between the two ends of the inductor Ls when the current I1 flows is represented by ΔVs1. Similarly, the current flowing through MOSFET2 by turning on is represented by I2, and the voltage generated between the two ends of the inductor Ls when the current I2 flows is represented by ΔVs2. ΔVs1 = Ls × dI1 / dt. ΔVs2 = Ls × dI2 / dt.

[0282] Assume that due to the characteristic deviation of MOSFET11, such as Fig.26 As shown in FIG. 1 , a current I2 greater than the current I1 flows (I2>I1). At this time, the voltage ΔVs generated in the inductor Ls is ΔVs1<ΔVs2. That is, Fig. 27 As shown, the potential Vks2 of the source electrode rises and the potential Vks1 falls relative to the midpoint potential Vm. As a result, the gate voltage Vgs1> the gate voltage Vgs2. Since the gate voltage Vgs2 is reduced, the current I2 becomes smaller. In this way, the inductance Ls of the source wiring has the function of suppressing the transient current imbalance during switching caused by the characteristic deviation of the semiconductor element 40 (MOSFET11) connected in parallel.

[0283] However, if the inductance Ls of the source wiring is small, the above-mentioned function of suppressing transient current imbalance is impaired. As a result, a bias occurs in the switching loss, and a margin needs to be left in the thermal design.

[0284] <Circuit Pattern of Substrate>

[0285] Next, based on Fig.28 The circuit pattern of the surface metal body 62 of the semiconductor device 20 according to the present embodiment will be described. Fig.28 Corresponds to Fig.15 .exist Fig.28 In, with Fig.15Likewise, the source electrode 40S is indicated as S in order to clarify the main electrode to be connected.

[0286] The N wiring 64 and the relay wiring 65 are source wirings that connect the source electrode 40S of the semiconductor element 40. The N wiring 64 is different from the pattern of the previous embodiment in that it has a slit 643. Similarly, the relay wiring 65 is different from the pattern of the previous embodiment in that it has a slit 653. Except for the slits 643 and 653, the structure is the same as that described in the previous embodiment.

[0287] The slit 643 penetrates the N wiring 64 in the thickness direction (Z direction). The slit 643 is provided in the base 640 at a position overlapping with the opposing regions of the two semiconductor elements 40L. The opposing region is a region where the semiconductor elements 40L are opposed to each other in the arrangement direction of the semiconductor elements 40L. That is, the slit 643 is provided between the semiconductor elements 40L as the lower arm elements in a planar view in the Z direction. The slit 643 is provided in the base 640 between the electrical connection portions electrically connected to the semiconductor elements 40L. The slit 643 extends from between the semiconductor elements 40L along the Y direction which is the arrangement direction of the semiconductor elements 40H, 40L. The slit 643 opens in the opposing sides 640a of the base 640. The slit 643 is provided at a substantially central position of the N wiring 64 in the X direction.

[0288] In this way, the slit 643 extends from the source electrode 40S of the semiconductor element 40L in the Y direction to the configuration side of the N terminal 91N as the main terminal, that is, the current flow side. The slit 643 is not open at the end 640c of the base 640. The slit 643 is provided to the vicinity of the lower end of the opposing region of the semiconductor element 40L. The slit 643 divides the N wiring 64 into a region connected to one of the semiconductor elements 40L and a region connected to the other. The slit 643 separates the current path of the source electrode 40S of the semiconductor element 40L, that is, the source current path.

[0289] The slit 653 penetrates the relay wiring 65 in the thickness direction (Z direction). The slit 653 is provided in the relay wiring 65 at a position overlapping with the opposing region of the two semiconductor elements 40H. That is, the slit 653 is provided between the semiconductor elements 40H in a plan view. The slit 653 is provided in the relay wiring 65 between the electrical connection portions electrically connected to the semiconductor elements 40H. The slit 653 extends from between the semiconductor elements 40H in the Y direction. The slit 653 opens at the end 652. The slit 653 crosses between the semiconductor elements 40H (opposing region) from the end 652 and extends to the vicinity of the arm connection portion 80. The slit 653 is provided at a substantially central position of the relay wiring 65 in the X direction.

[0290] In this way, the slit 653 extends from the source electrode 40S of the semiconductor element 40H to the arm connection part 80 side in the Y direction. The slit 653 extends from the source electrode 40S of the semiconductor element 40H to the current flow side. The slit 653 is not open at the end 650. The slit 653 is provided to the front of the arm connection part 80. The slit 653 divides the relay wiring 65 into a region connected to one of the semiconductor elements 40H and a region connected to the other. The slit 653 separates the current path of the source electrode 40S of the semiconductor element 40H, that is, the source current path.

[0291] <Summary of Second Embodiment>

[0292] Fig.29 Indicates the source current path. The solid arrow indicates the source current path on the semiconductor element 40H side, and the dotted arrow indicates the source current path on the semiconductor element 40L side. As described above, in this embodiment, the surface metal body 62 connected to the source electrode 40S as the main electrode on the low potential side is provided with slits 643 and 653.

[0293] The slit 643 is provided between adjacent semiconductor elements 40L in the N wiring 64 that connects the semiconductor elements 40L in parallel. The slit 643 divides the N wiring 64 and separates the source current path of each semiconductor element 40L. Thus, it is possible to suppress the current (source current) coming out of the source electrode 40S of the semiconductor element 40L from merging near the source electrode 40S. That is, in a planar view, the confluence point of the source current is far from the source electrode 40S. Therefore, in a parallel circuit of two semiconductor elements 40L (MOSFET11), the inductance Ls of the source wiring can be made larger than that of a structure in which the slit 643 is not provided. Since the inductance Ls is large, even if there is a deviation (deviation) in the characteristics of the two semiconductor elements 40L, the transient current imbalance during switching can be suppressed. By providing the slit 643, the transient current imbalance can be suppressed while maintaining the high integration of the semiconductor element 40L.

[0294] Similarly, the relay wiring 65 has a slit 653. The slit 653 is provided between the two semiconductor elements 40H. The slit 653 divides the relay wiring 65 and separates the source current path of each semiconductor element 40H. As a result, it is possible to suppress the current (source current) coming out of the source electrode 40S of the semiconductor element 40H from merging near the source electrode 40S. That is, in a planar view, the confluence point of the source current is farther from the source electrode 40S. Therefore, in a parallel circuit of two semiconductor elements 40H, the inductance Ls of the source wiring can be made larger than that of a structure in which the slit 653 is not provided. Since the inductance Ls is large, even if there is a deviation (deviation) in the characteristics of the two semiconductor elements 40H, the transient current imbalance during switching can be suppressed. By providing the slit 653, the transient current imbalance can be suppressed while maintaining the high integration of the semiconductor element 40H.

[0295] In the present embodiment, the slit 643 extends from between adjacent semiconductor elements 40L in the Y direction toward the N terminal 91N side. The slit 643 extends from the source electrode 40S of the semiconductor element 40L toward the current flow side. Thus, the source current path of each semiconductor element 40L can be separated by a longer distance. Therefore, in the parallel circuit of the semiconductor element 40L, the inductance Ls of the source wiring can be made larger. That is, the effect of suppressing transient current imbalance can be improved.

[0296] Similarly, the slit 653 extends from between the adjacent semiconductor elements 40H to the arm connection portion 80 side in the Y direction. The slit 653 extends from the source electrode 40S of the semiconductor element 40H to the current flow side. As a result, the source current path of each semiconductor element 40L can be separated by a longer distance. Therefore, in the parallel circuit of the semiconductor element 40H, the inductance Ls of the source wiring can be made larger. That is, the effect of suppressing transient current imbalance can be improved.

[0297] Fig.30 It is along Fig.29 XXX-XXX line cross-sectional view of FIG. In the present embodiment, the joint portion 81, the bonding material 103 connecting the joint portion 81 and the relay wiring 55, the bonding material 103 connecting the joint portion 81 and the relay wiring 65, and the arm connection portion 80 electrically connecting the relay wirings 55 and 65 are constituted. The joint portion 81 is a component different from the substrates 50 and 60. The arm connection portion 80 electrically connects the relay wiring 65 connected to the source electrode 40S of the semiconductor element 40H and the relay wiring 55 connected to the drain electrode 40D of the semiconductor element 40L.

[0298] <Modification>

[0299] In the above example, an example is shown in which the plurality of semiconductor elements 40 each include two semiconductor elements 40H and 40L, but the present invention is not limited thereto. It is also possible to make a structure in which one of the semiconductor elements 40H and 40L includes two and the other includes one. In this case, a slit is provided in the wiring that connects the plurality of semiconductor elements 40 in parallel to form an arm in the two wirings (64, 65) of the surface metal body 62. For example, in the case of a structure including two semiconductor elements 40H and one semiconductor element 40L, a slit 643 is not provided in the N wiring 64, and a slit 653 is provided in the relay wiring 65 connected to the semiconductor element 40H. In this way, it is also possible that, with respect to the plurality of semiconductor elements 40, at least one of the semiconductor elements 40H and 40L includes two arm elements.

[0300] The number of semiconductor elements 40 connected in parallel is not limited to two. Three or more semiconductor elements 40 may be connected in parallel to form an arm. For example, in the case of a structure including three semiconductor elements 40H, for the three semiconductor elements 40H arranged in the X direction, slits 653 may be provided between adjacent semiconductor elements 40H in plan view. The plurality of semiconductor elements 40 may include a plurality of arm elements of at least one of the semiconductor elements 40H and 40L. The arm elements of both sides may also include a plurality of semiconductor elements 40H and a plurality of semiconductor elements 40L.

[0301] The configuration of the N terminal 91N is not limited to the above-mentioned example. For example, a structure in which the P terminal 91P protrudes from the side 30c of the sealing body 30 and the N terminal 91N protrudes from the side 30d may be used. In this case, the pattern of the N wiring 64 is, for example, similar to the P wiring 54 and the relay wiring 55. That is, the extended portion 641 extends from the base 640 to the side 30d of the sealing body 30. In the case of this structure, it is sufficient to set the slit 643 at least between the semiconductor elements 40L. In addition, by making a structure in which the slit 643 extends from the opposing region of the semiconductor element 40L to the outside of the opposing region and the N terminal 91N side, the inductance Ls can be made larger.

[0302] Although the number of the slits 643 and 653 provided between the semiconductor elements 40 is one, the present invention is not limited to this and at least one of the slits 643 and 653 may be provided in plural.

[0303] The example in which the slits 643 and 653 are opened at one end of the surface metal body 62 is shown, but the present invention is not limited to this. Fig.31 and Fig.32In the example shown, the slit 643 extends from the opposite side 640a of the base 640 to the end 640c in the Y direction. The slit 643 divides the base 640 and the N wiring 64 into two. The slit 643 crosses the opposite region of the semiconductor element 40L. One semiconductor element 40L is arranged on one of the divided N wirings 64, and the other semiconductor element 40L is arranged on the other N wiring 64. Similarly, the slit 653 extends from the end 652 of the relay wiring 65 to the end 650 in the Y direction. The slit 653 divides the relay wiring 65 into two. One semiconductor element 40H is arranged on one of the divided relay wirings 65, and the other semiconductor element 40H is arranged on the other relay wiring 65.

[0304] The slits 643 and 653 are connected to each other to form a single slit extending in the Y direction. The surface metal body 62 is substantially line-symmetrical with respect to the imaginary line CL1. Fig.33 Indicates the source current path. The solid arrow indicates the source current path of the semiconductor element 40H, and the dotted arrow indicates the source current path of the semiconductor element 40L. As described above, the slit 643 divides the N wiring 64 into two. As a result, the source current of one semiconductor element 40L and the source current of the other do not merge on the substrate 60. Since the confluence point of the source current is further away, the inductance Ls of the source wiring can be made larger.

[0305] Similarly, the slit 653 divides the relay wiring 65 into two. As a result, the source current of the semiconductor element 40H and the other source current do not merge on the substrate 60. Since the confluence point of the source current is further away, the inductance Ls of the source wiring can be made larger. In this way, the effect of suppressing transient current imbalance can be improved. Fig.31 , Fig.32 and Fig.33 It is a figure which shows a modification example. Fig.31 Corresponds to Fig.28 . Fig.32 Corresponds to Fig.11 . Fig.33 Corresponds to Fig.29 .

[0306] exist Figure 31 to Figure 33 In the example shown, the arm connection portion 80 is divided into the same number as the relay wiring 65 in accordance with the division of the relay wiring 65. The arm connection portion 80 is connected to each of the relay wirings 65. Thus, the source currents do not merge at the arm connection portion 80, so the inductance Ls can be made larger.

[0307] In the above-mentioned modified example, slits may also be provided on the surface metal body 52 of the substrate 50. Fig.34 and Fig.35As shown, in the surface metal body 52, the relay wiring 55 has a slit 553. The slit 553 opens at the end 551a of the relay wiring 55. The end 551a is opposite to the P wiring 54 in the Y direction. The slit 553 extends in the Y direction, crosses the arm connection portion 80 divided into two, and reaches the opposing region (between) of the semiconductor element 40L. The slit 553 is provided near the lower end of the opposing region of the semiconductor element 40L.

[0308] By adopting such a structure, Fig.35 As shown, the first current path formed by one set of semiconductor elements 40H and 40L and the second current path formed by the other set of semiconductor elements 40H and 40L are almost completely separated in the semiconductor device 20. The current confluence point is set outside the N terminal 91N. Therefore, the inductance Ls of the source wiring can be made larger. Fig.34 and Fig.35 It is a figure which shows a modification example. Fig.34 Corresponds to Fig.32 . Fig.35 Corresponds to Fig.33 In addition, the semiconductor device 20 may include an N bus bar that connects a plurality of N terminals 91N. In this case, the currents merge in the N bus bar. For example, the smoothing capacitor 5 may include an N bus bar that connects the N terminals 91N.

[0309] Although the arm connection part 80 includes the joint part 81 and the bonding material 103 arranged on both ends of the joint part 81, the present invention is not limited to this. Fig.36 In the example shown, the joint portion 81 is provided integrally with the substrate 60. The joint portion 81 is provided as a protrusion extending in the Z direction from the relay wiring 65. The conductive spacer 70 is also provided integrally with the surface metal body 62 as a protrusion, similarly to the joint portion 81.

[0310] The surface metal body 62 with the protrusion can be formed by, for example, patterning a metal plate of a profiled strip by press working and pasting it to the insulating substrate 61. The surface metal body 62 with the protrusion can also be formed by etching thick Cu. It can also be formed by directly bonding a metal body that is a component independent of the substrate 60 to the surface metal body 62. Fig.36 In the illustrated structure, the arm connecting portion 80 is constituted by the joint portion 81 which is a protruding portion of the relay wiring 65 and the bonding material 103 interposed between the front end of the joint portion 81 and the relay wiring 55 . Fig.36 is corresponding to Fig.30 .

[0311] exist Fig.37In the example shown, the joint portion 81 is excluded. The bonding material 103 electrically connects the relay wirings 55 and 65. The bonding material 103 constitutes the arm connection portion 80. Fig.37 In the embodiment, the conductive spacer 70 is also excluded, and the source electrode 40S of the semiconductor element 40 is connected to the surface metal body 62 via the bonding material 101. Although not shown in the figure, the arm connection part 80 may be configured to have only the joint part 81 without the bonding material 103. In this case, the joint part 81 is directly bonded to the relay wirings 55 and 65.

[0312] The circuit patterns of the substrates 50 and 60 are not limited to the above-mentioned examples. Fig.38 The substrate 60 shown represents the Fig.24 The circuit pattern shown is an example of applying slits 643 and 653. Fig.38 In the example shown, the slit 643 is provided between adjacent semiconductor elements 40L. The slit 643 extends from between the semiconductor elements 40L in the Y direction toward the N terminal 91N side, i.e., the side where the source current flows. The slit 653 is provided between adjacent semiconductor elements 40H. The slit 653 extends from between the semiconductor elements 40H in the Y direction toward the arm connection portion 80 side.

[0313] In the present embodiment, the configuration of the external connection terminal 90 is not limited to the example shown in the figure. The P terminal 91P may be connected to the P wiring 54 at both ends in the X direction, for example. The N terminal 91N may be connected to the N wiring 64 at both ends in the X direction, for example. In this case, the N terminal 91N may be connected to the extended portion 641. The extended portion 641 may be excluded from the N wiring 64 and connected to the base 640. The output terminal 92 may be connected to the relay wiring 55 at both ends in the X direction, for example.

[0314] The configuration described in this embodiment may be combined with any of the configurations described in the first embodiment and its modified examples.

[0315] (Third embodiment)

[0316] This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be cited. In order to effectively dissipate the heat of the semiconductor element, as described in this embodiment, the thickness above the semiconductor element and the thickness below the semiconductor element can satisfy a predetermined relationship.

[0317] <Warping at high temperatures>

[0318] Through special research, it is clear that even if the insulating base material 51, 61 is made of resin and the linear expansion coefficient is made close to that of the metal body 52, 53, 62, 63 by adding filler, Fig.39As shown, warping may occur in the semiconductor device 20 . Fig.39 The state of the semiconductor device 20 when the semiconductor element 40 is operating, that is, at a high temperature is shown. The dashed line in the figure is a reference line indicating the direction of the warping.

[0319] Fig.39 The structure shown is similar to that of the previous embodiment (see Figure 5 ) is the same as the structure described in. Fig.39 In the figure, for convenience, the external connection terminal 90 is omitted. Fig.39 In the figure, the semiconductor device 20 and the heat exchange part 121 of the cooler 120 are arranged in the Z direction as a predetermined direction. The heat exchange part 121 is arranged on both sides of the semiconductor device 20 in the Z direction in a manner of sandwiching the semiconductor device. A heat conductive component 130 such as silicone gel is arranged between each heat exchange part 121 and the semiconductor device 20. The cooler 120 cools the semiconductor device 20 by circulating a refrigerant in the flow path of the heat exchange part 121. As the refrigerant flowing in the flow path, a phase change refrigerant such as water, ammonia, or a refrigerant that does not undergo a phase change such as ethylene glycol can be used. The heat conductive component 130 is sometimes called a thermal interface material (TIM). The heat conductive component 130 follows the opposing surfaces of the heat exchange part 121 and the semiconductor device 20 and fills the gap between the opposing surfaces.

[0320] As described above, in the semiconductor element 40, the drain electrode 40D, which is the main electrode on the high potential side, has a larger electrode area than the source electrode 40S, which is the main electrode on the low potential side. In addition, there is a conductive spacer 70 between the source electrode 40S and the substrate 60, but there is no conductive spacer 70 between the drain electrode 40D and the substrate 50. That is, the heat conduction path from the semiconductor element 40 to the substrate 50 has a smaller thermal resistance than the heat conduction path from the semiconductor element 40 to the substrate 60. In the semiconductor device 20 having such a structure, it is required to effectively dissipate heat to the substrate 50 side.

[0321] In such Fig.39 When the substrate 50 is warped so that the substrate 60 is convex and the substrate 50 is concave, the distance between the back surface 50b of the exposed surface of the substrate 50 and the heat exchange portion 121 becomes longer, and the heat conductive member 130 between them becomes thicker. As a result, the thermal resistance between the substrate 50 and the heat exchange portion 121 increases, and it becomes difficult to conduct heat (exchange heat) between the semiconductor device 20 and the cooler 120 (heat exchange portion 121). In order to effectively dissipate the heat of the semiconductor element 40, that is, in order to efficiently cool the semiconductor device 20, Fig.39 The warped state shown is not ideal. Fig.39, an example of a double-sided cooling structure in which coolers 120 (heat exchange units 121) are arranged on both sides of the semiconductor device 20. However, a single-sided cooling structure in which the cooler 120 is arranged only on the substrate 50 side in the Z direction also has the same problem.

[0322] <Structure of Semiconductor Device>

[0323] Through special research, it has been found that the warping of the semiconductor device 20 can be controlled by the relationship between the thickness of the portion closer to the substrate 50 and the thickness of the portion closer to the substrate 60 than the semiconductor element 40. The semiconductor device 20 of this embodiment has a structure based on this knowledge. Fig.40 2 is a cross-sectional view showing a semiconductor device 20 according to the present embodiment. Fig.40 , an ideal state in which there is no warping in the semiconductor device 20 is shown.

[0324] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 13 ) has the same structure. Fig.40 In, with Fig.39 Likewise, the heat exchange portion 121 and the heat transfer member 130 of the cooler 120 are shown together with the semiconductor device 20. That is, Fig.40 The semiconductor module 140 including the semiconductor device 20, the cooler 120 and the heat transfer member 130 is shown. As an example, the semiconductor module 140 has a double-sided cooling structure in which the semiconductor device 20 is sandwiched by a pair of heat exchange parts 121. The semiconductor device 20 is arranged in a row with the cooler 120 (heat exchange part 121) in the Z direction as a predetermined direction. The cooler 120 is arranged on both sides of the semiconductor device 20.

[0325] The back metal bodies 53 and 63 are exposed from the sealing body 30 as the back surfaces 50b and 60b of the substrates 50 and 60. One of the heat exchange parts 121 of the cooler 120 is arranged opposite to the one surface 30a and the back surface 50b of the sealing body 30, and the other heat exchange part 121 is arranged opposite to the back surface 30b and the back surface 60b of the sealing body 30. Between the facing surfaces of the semiconductor device 20 and the heat exchange part 121, a heat conduction component 130 is arranged respectively. The heat conduction component 130 is in close contact with the semiconductor device 20 and the heat exchange part 121.

[0326] The semiconductor device 20 is configured such that a thickness T1 on the substrate 50 side of the semiconductor element 40 and a thickness T2 on the substrate 60 side of the semiconductor element 40 satisfy the relationship T1 ≥ T2. Figure 5) is the same as the structure described in the first embodiment. Thickness T2 is the total thickness of the thicknesses of the bonding material 101, the conductive spacer 70, the bonding material 102 and the substrate 60. Thickness T1 is the total thickness of the thicknesses of the bonding material 100 and the substrate 50. In order to satisfy the relationship T1 ≥ T2, the substrate 50 is thicker than the substrate 60. The substrate 50 is thicker than the conductive spacer 70. In the substrate 50, the metal bodies 52 and 53 are thicker than the insulating substrate 51. In the substrate 60, the metal bodies 62 and 63 are thicker than the insulating substrate 61. The structure of the parts other than the thickness relationship is the same as the structure described in the first embodiment.

[0327] <Simulation results>

[0328] Figure 41 to Figure 43 Represents the results of thermal stress simulation. Fig.41 express Fig.40 The state of the semiconductor device 20 at room temperature (RT) is shown. Fig.42 express Fig.40 The semiconductor device 20 shown in FIG. 2 is in a high temperature state. The high temperature state is when the semiconductor element 40 is heated by power supply, that is, when the semiconductor element 40 is in operation. Fig.41 and Fig.42 As shown in FIG. 1 , warping occurs in the semiconductor device 20 at high temperatures. In the present embodiment, since the relationship T1 ≥ T2 is satisfied as described above, Fig.42 As shown by the dotted arrow, the expansion amount on the substrate 50 side is greater than the expansion amount on the substrate 60 side. This is because the linear expansion coefficient of Cu constituting the metal bodies 52, 53, 62, 63 is the largest, and the substrate 50 is thick. As a result, convex warping occurs on the substrate 50 side as the first substrate, and concave warping occurs on the substrate 60 side as the second substrate. Fig.42 The single-dot chain line in is a reference line indicating the direction of the warping.

[0329] Fig.43 The relationship between the ratio of thickness T1 and T2 and the warpage at high temperature is shown. In this simulation, the semiconductor element 40, the conductive spacer 70, and the bonding materials 100, 101, and 102 are set to be the same (common), and the thickness of the substrate 50 and the substrate 60 are adjusted so that the thickness ratio T1:T2 becomes a predetermined value. The material composition is set to be the same (common). Fig.43 The vertical axis shown represents the warpage amount, which is an arbitrary unit (au). When the warpage amount is above 0 (zero), it means that the warpage is convex toward the substrate 50 side and concave toward the substrate 60 side, and when it is below 0 (zero), it means that the warpage is concave toward the substrate 50 side and convex toward the substrate 60 side. T1:T2 is set to four levels of 1:2, 1:1.3, 1:1, and 1.5:1.

[0330] like Fig.43As shown, when T1:T2 = 1:2, warping occurs concave toward substrate 50 and convex toward substrate 60, and the warping amount convex toward substrate 60 is the largest among the four levels. When T1:T2 = 1:1.3, warping occurs concave toward substrate 50 and convex toward substrate 60, and the warping amount convex toward substrate 60 is smaller than when T1:T2 = 1:2. If T1:T2 = 1:1, the warping changes to convex toward substrate 50 and concave toward substrate 60. If T1:T2 = 1.5:1, warping occurs convex toward substrate 50 and concave toward substrate 60, and the warping amount convex toward substrate 50 is the largest among the four levels.

[0331] In this way, it is clear that: when T1 < T2, warping occurs concave toward substrate 50 and convex toward substrate 60, and when T1 ≥ T2, warping occurs convex toward substrate 50 and concave toward substrate 60. That is, it is clear that: by satisfying the relationship of T1 ≥ T2, the warping that occurs at high temperature can be controlled to be convex toward substrate 50 and concave toward substrate 60. In addition, it is clear that: the larger T2 is relative to T1, the larger the warping amount convex toward substrate 60, and the larger T1 is relative to T2, the larger the warping amount convex toward substrate 50.

[0332] <Summary of the Third Embodiment>

[0333] In this embodiment, the semiconductor device 20 satisfies the above relationship of thickness T1 ≥ thickness T2. The thickness T1 on the side where there is no conductive spacer 70 between the semiconductor element 40 and the substrate 50 is equal to or greater than the thickness T2 on the side where there is a conductive spacer 70 between the semiconductor element 40 and the substrate 60. Thus, when the semiconductor element 40 operates (at high temperature), warping occurs convex toward substrate 50 and concave toward substrate 60 in the semiconductor device 20. Thus, compared with a structure that satisfies the relationship of thickness T1 < thickness T2, the facing distance between the semiconductor device 20 on the substrate 50 side, which has a high contribution rate to heat dissipation, and the cooler 120 (heat exchange part 121) can be made narrower. Since the facing distance becomes narrower, the thermal resistance between the semiconductor device 20 and the cooler 120 becomes smaller. Thus, the heat generated by the semiconductor element 40 can be efficiently dissipated to the outside of the semiconductor device 20. In other words, the cooling efficiency of the semiconductor device 20 can be improved.

[0334] Specifically, compared with a structure that satisfies the relationship of thickness T1 < thickness T2, the thickness of the heat conductive member 130 between the semiconductor device 20 and the cooler 120 becomes thinner. Thus, the thermal resistance between the semiconductor device 20 and the cooler 120 becomes smaller, and heat exchange is likely to occur between the semiconductor device 20 and the cooler 120. Thus, the heat generated by the semiconductor element 40 can be efficiently dissipated to the outside of the semiconductor device 20.

[0335] In this embodiment, the back metal body 53 is exposed from the sealing body 30. Compared with the structure in which the back metal body 53 is covered by the sealing body 30, the heat dissipation can be improved. Similarly, the back metal body 63 is exposed from the sealing body 30. Compared with the structure in which the back metal body 63 is covered by the sealing body 30, the heat dissipation can be improved.

[0336] <Modification>

[0337] An example of a two-sided heat dissipation structure is shown, but it is not limited to this. The semiconductor device 20 is expected to dissipate heat efficiently mainly from the substrate 50 side. Therefore, for the semiconductor device 20, the cooler 120 (heat exchange unit 121) can be configured only on the substrate 50 side in the Z direction. In such a single-sided heat dissipation structure, the relationship T1 ≥ T2 is satisfied, so that the warp becomes convex toward the substrate 50 side at high temperatures. As a result, the thermal resistance between the semiconductor device 20 and the cooler 120 becomes smaller. As a result, the heat generated by the semiconductor element 40 can be dissipated efficiently.

[0338] Although the example in which both the back metal bodies 53 and 63 are exposed from the sealing body 30 is shown, the present invention is not limited to this. For example, only the back metal body 53 may be exposed.

[0339] The semiconductor device 20 is shown as an example in which the semiconductor element 40H constituting the upper arm 9H and the semiconductor element 40L constituting the lower arm 9L are provided, but the present invention is not limited thereto. It is also possible to have only one semiconductor element 40 constituting the arm. The semiconductor device 20 may also have only one semiconductor element 40, for example. The semiconductor device 20 may include a semiconductor element 40, a pair of substrates 50 and 60 disposed so as to sandwich the semiconductor element 40, and a conductive spacer 70 interposed between the semiconductor element 40 and the substrate 60.

[0340] In the substrate 50, there is no particular mention about the thickness relationship of the metal bodies 52 and 53. Fig.44 As shown, the surface metal body 52 is made thicker than the back metal body 53. The first main electrode of the semiconductor element 40, that is, the drain electrode 40D, is bonded to the surface metal body 52. ​​The thermal resistance between the surface metal body 52 and the semiconductor element 40 is small. By making the surface metal body 52 closer to the semiconductor element 40 thicker, the heat generated by the semiconductor element 40 can be effectively diffused. That is, the heat of the semiconductor element 40 can be dissipated efficiently. Fig.44 It is a cross-sectional view showing a modified example. Fig.44 Corresponds to Fig.41 .

[0341] like Fig.44As shown, the surface metal body 62 may be made thicker than the back metal body 63. By making the surface metal body 62 closer to the semiconductor element 40 thicker, the heat generated by the semiconductor element 40 can be efficiently diffused.

[0342] As described above, the heat of the semiconductor element 40 having the main electrodes on both surfaces is mainly conducted to the substrate 50 side having a smaller thermal resistance. Fig.45 As shown, the surface metal body 62 may be made thinner than the back metal body 63. This can reduce the thickness of the substrate 60 and further reduce the size of the semiconductor device 20. Since a thick metal body is not required, the cost can also be reduced. Fig.45 It is a cross-sectional view showing a modified example. Fig.45 Corresponds to Fig.44 .exist Fig.45 In the embodiment, the surface metal body 52 is thicker than the back metal body 53, and the surface metal body 62 is thinner than the back metal body 63. Thus, it is possible to efficiently dissipate the heat of the semiconductor element 40 while achieving miniaturization and cost reduction.

[0343] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, the second embodiment, and the modified example.

[0344] (Fourth embodiment)

[0345] This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be cited. In order to improve the connection reliability, as described in this embodiment, the substrate and the signal terminal can meet a predetermined positional relationship.

[0346] <Semiconductor Device>

[0347] First, based on Fig.46 and Fig.47 The semiconductor device 20 according to the present embodiment will be described. Fig.46 The semiconductor device 20 of this embodiment shows the periphery of the signal terminal 93. Fig.46 In order to show the positional relationship between the substrate 50 and the signal terminal 93 , some elements of the semiconductor device 20 are omitted in the figure. Fig.47 It is along Fig.46 A cross-sectional view of the line XLVII-XLVII. Fig.46 and Fig.47 In the description, the signal terminal 93L on the lower arm 9L side is described as an example.

[0348] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 13 ) has the same structure. Fig.46As shown in FIG. 1 , the semiconductor device 20 includes two semiconductor elements 40L. The semiconductor element 40L includes a drain electrode 40D as a first main electrode on one side, and a source electrode 40S as a second main electrode and a pad 40P for a signal on the back side. The semiconductor device 20 includes four signal terminals 93L. Each signal terminal 93L is extended in the Y direction and protrudes to the outside from the side surface 30d of the sealing body 30. In a planar view in the Z direction, the four signal terminals 93L are arranged in the X direction between the output terminals 92.

[0349] <Shape and arrangement of signal terminals>

[0350] Next, based on Fig.46 and Fig.47 The shape, arrangement, etc. of the signal terminal 93 will be described.

[0351] like Fig.46 As shown, each signal terminal 93L has an overlapping portion 930 overlapping with the substrate 50 in plan view and a non-overlapping portion 931 not overlapping with the substrate 50. The overlapping portion 930 faces the substrate 50 in the Z direction.

[0352] The overlapping portion 930 is a portion of the signal terminal 93L that is within a predetermined range from the end portion on the semiconductor element 40L side. The non-overlapping portion 931 is a portion other than the overlapping portion 930. The overlapping portion 930 overlaps with the insulating base material 51 in the substrate 50 that is electrically connected to the drain electrode 40D. The entire area of ​​the overlapping portion 930 overlaps with the insulating base material 51. The overlapping portion 930 overlaps with the exposed portion 510 of the insulating base material 51 that is exposed from the surface metal body 52. ​​In this way, the signal terminal 93L is extended onto the substrate 50. That is, the signal terminal 93L is inserted and configured to overlap with the substrate 50 in a planar view.

[0353] The overlapping portion 930 of two of the four signal terminals 93L has a main portion 930a and a protruding portion 930b. The other two signal terminals 93L do not have the protruding portion 930b. The main portion 930a extends in the Y direction, which is the main extension direction of the signal terminal 93L. The protruding portion 930b is connected to the main portion 930a and protrudes from the main portion 930a. The protruding portion 930b extends in a direction different from that of the main portion 930a. The protruding portion 930b is sometimes referred to as a branch portion. The planar shape of the main portion 930a can take a variety of shapes such as roughly L-shaped, roughly Y-shaped, and roughly T-shaped. Fig.46 In the illustrated example, one of the signal terminals 93L has a substantially L-shaped planar shape, and the other of the signal terminals 93L has a substantially T-shaped planar shape.

[0354] As in the previous implementation method (refer to Fig.11) as described in the embodiment, the relay wiring 55 of the surface metal body 52 has a notch 550. The overlapping portion 930 of the signal terminal 93L overlaps with the portion of the insulating substrate 51 exposed from the notch 550. The four signal terminals 93L are arranged in the X direction between the output terminals 92 in a plan view. Each signal terminal 93L has a tie bar mark 93a. The tie bar mark 93a is as described in the previous embodiment (refer to Fig.10 ) is a mark left on the side of the signal terminal 93L when the tie bar 94a of the lead frame 94 is cut off. The tie bar mark 93a is sometimes called a cut mark. Each signal terminal 93L has a tie bar mark 93a on both sides in the X direction. The tie bar mark 93a is provided at an outer position of the sealing body 30 in the non-overlapping portion 931.

[0355] Each signal terminal 93L is as follows Fig.47 As shown, it has a joint portion 93b, a front end portion 93c, a bent portion 93d and an extended portion 93e. The joint portion 93b is a portion joined to the bonding wire 110 as a connecting component. The joint portion 93b preferably includes a portion substantially parallel to the XY plane. The joint portion 93b is the portion of the signal terminal 93L that is closest to the surface of the insulating substrate 51 (exposed portion 510). The joint portion 93b of the present embodiment floats relative to the surface of the insulating substrate 51. The joint portion 93b does not contact the insulating substrate 51, and the sealing body 30 enters the gap between the lower surface of the joint portion 93b and the surface of the insulating substrate 51 to fill the gap. The bonding wire 110 electrically connects the pad 40P formed on the same surface as the source electrode 40S and the signal terminal 93L.

[0356] The front end portion 93c is a portion closer to the front end side than the joint portion 93b, that is, closer to the semiconductor element 40 (40L). The front end portion 93c is arranged above the joint portion 93b, that is, at a position farther from the surface of the insulating substrate 51 in the Z direction. The further away the front end portion 93c is from the joint portion 93b, the more it rises upward. The front end portion 93c has an R shape (a shape with an arc) in the ZY cross section. The bent portion 93d is provided between the joint portion 93b and the portion closer to the rear end side than the joint portion 93b, that is, the extended portion 93e. The bent portion 93d is bent so that the extended portion 93e is located above the joint portion 93b, that is, at a position farther away from the surface of the insulating substrate 51. By bending, the bent portion 93d has a smaller cross-sectional area than other portions of the signal terminal 93, specifically, the joint portion 93b, the front end portion 93c and the extended portion 93e, that is, it is thinner. The extended portion 93e is a portion closer to the rear end side than the joint portion 93b. The extended portion 93 e extends in the Y direction, and is arranged across the inside and outside of the sealing body 30 .

[0357] At least a portion of the joint portion 93b, the front end portion 93c, and the bent portion 93d are included in the above-mentioned overlapping portion 930. At least a portion of the extended portion 93e is included in the non-overlapping portion 931. In the present embodiment, the entire area of ​​the extended portion 93e is included in the non-overlapping portion 931. Each signal terminal 93L is formed by stamping. In the signal terminal 93L, the surface facing the insulating substrate 51 is a pressurized R surface 93f, and the back surface of the facing surface is a burr surface 93g on which burrs are generated by punching. The structure other than the above is the same as the structure described in the first embodiment.

[0358] <Connection method of bonding wire>

[0359] Next, based on Fig.48 A method of connecting the signal terminal 93 having the above structure and the bonding wire 110 will be described. Fig.48 This is a diagram illustrating wire bonding. Fig.48 Reference numeral 111 is a jig for pressing the signal terminal 93L. Reference numeral 112 is a tool for ultrasonic bonding. The tool 112 is sometimes referred to as an ultrasonic bonding device. Fig.48 The dashed line shown indicates the position of the signal terminal 93L that is pressed and bent by the jig 111 .

[0360] like Fig.48 As shown in FIG. 1 , first, the signal terminal 93L is positioned so that the overlapping portion 930 overlaps the insulating substrate 51 and is set to the portion where the wire 110a is joined. Next, the signal terminal 93L is elastically deformed by applying pressure in the Z direction with the jig 111 so that the overlapping portion 930 contacts the surface of the insulating substrate 51. The jig 111 presses the overlapping portion 930 of the signal terminal 93L or its vicinity.

[0361] Next, ultrasonic bonding is performed by the tool 112 while the signal terminal 93L is in contact with the insulating substrate 51. Since the signal terminal 93L is received by the insulating substrate 51, it is not necessary to prepare a receiving jig separately. When the ultrasonic bonding is completed and the tool 112 and the jig 111 are separated from the signal terminal 93L, the signal terminal 93L is released from the elastic deformation state and returns to the position before the pressure is applied. The signal terminal 93L is a part of the lead frame 94. Since the signal terminal 93L is supported by the tie rod 94a on the peripheral frame 94b, it returns to the original position when the pressure is released.

[0362] The above description is made by taking the signal terminal 93L as an example. However, the above structure may also be applied to the signal terminal 93H on the upper arm 9H side. Alternatively, both the signal terminals 93H and 93L may have the above structure. Fig.11), the signal terminals 93H and 93L overlap with the exposed portion of the insulating substrate 51. The P wiring 54 of the surface metal body 52 has a notch 540, and the signal terminal 93H overlaps with the surface of the insulating substrate 51 exposed from the notch 540.

[0363] <Summary of the Fourth Embodiment>

[0364] In the present embodiment, the signal terminal 93 (93L) overlaps with the exposed portion 510 of the insulating substrate 51. However, the signal terminal 93 is not bonded to the exposed portion 510. That is, the signal terminal 93 is not fixed to the insulating substrate 51 and the substrate 50. Thus, the signal terminal 93 can absorb the dimensional deviation within the tolerance of each element constituting the semiconductor device 20, the assembly deviation when assembling each element, and the like. Therefore, when the sealing body 30 is formed, it is possible to suppress the stress concentration on the electrical connection portion (bonding portion) of the signal terminal 93 and the semiconductor element 40. As a result, it is possible to provide a semiconductor device 20 with high connection reliability.

[0365] In the present embodiment, the signal terminal 93 is inserted and arranged at a position overlapping with the substrate 50, that is, on the substrate 50. By adopting such an arrangement, the signal terminal 93 is close to the pad 40P of the semiconductor element 40 (40L) in the Y direction. As a result, the length of the bonding wire 110 as a connecting member can be shortened compared to a structure in which the signal terminal 93 is arranged only at a position not overlapping with the substrate 50. Since the length of the bonding wire 110 can be shortened, when the sealing body 30 is formed by transfer molding or the like, the occurrence of wire deviation, short circuit caused by wire deviation, wire disconnection, etc. can be suppressed.

[0366] In this embodiment, the overlapping portion 930 of the signal terminal 93 floats relative to the surface of the exposed portion 510 of the insulating substrate 51. In addition, the sealing body 30 exists between the lower surface of the overlapping portion 930 and the surface of the exposed portion 510. The sealing body 30 also exists between the bonding portion 93b and the exposed portion 510. Thus, even if the manufacturing deviation in the plate thickness direction is large, the deviation can be absorbed. In addition, since the signal terminal 93 is located above the insulating substrate 51, it is easy to ensure the insulation distance from the back metal body 53.

[0367] In the present embodiment, the surface metal body 52 has a notch 550 (540). The notch 550 is open at the end of the Y direction, which is a direction orthogonal to the Z direction. In addition, the overlapping portion 930 of the signal terminal 93 overlaps with the surface of the exposed portion 510 exposed from the notch 550. In this way, by providing the notch 550 in the surface metal body 52 of the substrate 50, it is possible to suppress the increase in the volume of the substrate 50 while ensuring the insulation distance between the surface metal body 52 and the signal terminal 93.

[0368] In this embodiment, the non-overlapping portion 931 of the signal terminal 93 has a tie bar mark 93a. As described above, the signal terminal 93L is a part of the lead frame 94 and is supported by the tie bar 94a on the peripheral frame 94b. Therefore, the signal terminal 93 is bent by pressure and contacts the exposed portion 510 of the insulating substrate 51. In this contact state, the bonding wire 110 can be bonded by ultrasonic bonding. And, after the bonding is completed, the pressure is released to return to the original position.

[0369] In this embodiment, the signal terminal 93 has a bent portion 93d between the joint portion 93b and the extended portion 93e. The extended portion 93e is arranged at a position farther from the exposed portion 510 (insulating substrate 51) than the joint portion 93b in the Z direction due to the bent portion 93d. By having the bent portion 93d, the insulation distance between the signal terminal 93 and the back metal body 53 can be ensured while suppressing the increase in volume in the Z direction.

[0370] In the present embodiment, the signal terminal 93 has a front end portion 93c. The front end portion 93c is farther from the exposed portion 510 (insulating substrate 51) in the Z direction than the joint portion 93b. Thus, during the above-mentioned joining (ultrasonic joining), etc., it is possible to suppress the front end of the signal terminal 93 from causing damage to the insulating substrate 51. That is, it is possible to suppress the reduction in insulation performance. In particular, in the present embodiment, since the front end portion 93c rises upward as it moves away from the joint portion 93b, it is more difficult for the front end portion 93c to contact the insulating substrate 51. In addition, since the front end portion 93c has an R shape in the ZY cross section, it is possible to suppress damage to the insulating substrate 51 even if it contacts.

[0371] If the facing surface is a burred surface 93g, the insulating substrate 51 may be damaged and the insulation performance may be reduced. In this embodiment, the signal terminal 93 is configured such that the facing surface side of the exposed portion 510 is a pressurized R surface 93f and the back side of the facing surface is a burred surface 93g. This can suppress the reduction of the insulation performance of the insulating substrate 51.

[0372] <Modification>

[0373] The non-bonding structure between the signal terminal 93 and the exposed portion 510 is not limited to the above example. Fig.49 In the embodiment, the overlapped portion 930 of the signal terminal 93 has a gap of a small height between the overlapped portion 930 and the surface of the exposed portion 510, so that the sealing body cannot enter, and the signal terminal 93 floats on the insulating substrate 51. The sealing body 30 has a gap 31 between the lower surface of the overlapped portion 930 and the surface of the exposed portion 510. The signal terminal 93 is not fixed to the insulating substrate 51 (exposed portion 510). Therefore, the signal terminal 93 can play a role in the insulating substrate 51. Fig.47 The structures shown have the same effect. Fig.49is a cross-sectional view showing a modified example, corresponding to Fig.47 .

[0374] exist Fig.50 In the embodiment, the overlapping portion 930 of the signal terminal 93 contacts the surface of the exposed portion 510. Although the signal terminal 93 contacts the insulating substrate 51 (exposed portion 510), it is not fixed. Fig.47 The structures shown have the same effect. Fig.50 is a cross-sectional view showing a modified example, corresponding to Fig.47 Alternatively, a configuration may be adopted in which a portion of the lower surface of the bonding portion 93 b is in contact with the insulating base material 51 and another portion is not in contact with the insulating base material 51 .

[0375] exist Fig.47 In the example shown, the substrate 60 is arranged so as not to overlap with the signal terminal 93 in a plan view. That is, the substrate 60 is not arranged above the signal terminal 93. By adopting such an arrangement, the volume of the substrate 60 can be reduced. In addition, it is easy to ensure the insulation distance between the surface metal body 62 and the signal terminal 93. However, the positional relationship between the signal terminal 93 and the substrate 60 is not limited to Fig.47 For example, Fig.51 As shown, the overlapping portion 930 of the signal terminal 93 also overlaps with the substrate 60. The surface metal body 62 of the substrate 60 overlaps with the overlapping portion 930 and the exposed portion 510 of the insulating base material 51 in plan view. This can improve heat dissipation. Fig.51 is a cross-sectional view showing a modified example, corresponding to Fig.47 .

[0376] exist Fig.52 In, relative to Fig.51 The surface metal body 62 is patterned so as not to overlap with the overlapping portion 930 of the signal terminal 93. The insulating substrate 61 and the back metal body 63 are located above the overlapping portion 930. Thus, by making the surface metal body 62 smaller, it is easy to ensure the insulation distance between the surface metal body 62 and the signal terminal 93. Since the back metal body 63 is larger, the heat dissipation can be improved. Fig.52 is a cross-sectional view showing a modified example, corresponding to Fig.47 .

[0377] The example in which the length of the bonding wire 110 (connection member) can be shortened by inserting the signal terminal 93 on the substrate 50 is shown. Figure 53 to Figure 55 The relay substrate 150 shown makes the length of the bonding wire 110 shorter. Fig.53 is a plan view showing a modified example, corresponding to Fig.46 .exist Fig.53In order to show the positional relationship among the substrate 50 , the signal terminals 93 , and the relay substrate 150 , some elements of the semiconductor device 20 are omitted in the figure. Fig.54 It is a cross-sectional view showing a relay substrate. Fig.55 It is along Fig.53 Here, although the relay wiring 55 and the signal terminal 93L are shown as an example, the same structure can be adopted for the P wiring 54 and the signal terminal 93H.

[0378] The semiconductor device 20 further includes a relay substrate 150. Fig.53 and Fig.55 As shown, the relay substrate 150 is arranged on the surface metal body 52 (relay wiring 55) of the substrate 50. Fig.54 As shown, the relay substrate 150 includes an insulating base 151 and a conductor portion 152 disposed on the insulating base 151. A portion of the conductor portion 152 provides a wiring function. The relay substrate 150 is sometimes referred to as a printed circuit board or a wiring board.

[0379] The conductor portion 152 has lands 152a and 152b. The lands 152a and 152b are exposed on one side of the relay substrate 150. Specifically, they are exposed from the solder resist 153 provided on one side 151a of the insulating substrate 151. The land 152a is electrically connected to the pad 40P via the bonding wire 110. The signal terminal 93 overlaps with the substrate 50 in a plan view. The signal terminal 93 is connected to the land 152b.

[0380] The conductor portion 152 includes wiring 152c and a through-hole conductor 152d other than the welding areas 152a and 152b. At least a portion of the wiring 152c is an inner layer wiring arranged inside the insulating substrate 151. The welding area 152a and the welding area 152b are electrically connected via the wiring 152c and the through-hole conductor 152d. The plurality of welding areas 152a include two welding areas 152a connected to the pads 40P for the gate electrodes of the two semiconductor elements 40, respectively. The two welding areas 152a for the gate electrode are electrically connected to one welding area 152b for the gate electrode via the wiring 152c and the through-hole conductor 152d.

[0381] Thus, by using the relay substrate 150, the connection object (welding area 152a) of the bonding wire 110 can be brought close to the pad 40P. Thus, the length of the bonding wire 110 that electrically connects the pad 40P to the signal terminal 93 can be shortened. In addition, the wiring 152c can be freely routed within the relay substrate 150. Thus, in a structure in which the semiconductor elements 40 are connected in parallel, the crossing of the bonding wires 110 can be avoided. Therefore, it is possible to suppress the contact between the wires when the sealing body 30 is formed. In addition, by using the fine wiring technology of the printed circuit board, it is possible to achieve the same Fig.47 The structure shown has the same degree of miniaturization.

[0382] The conductor part 152 further includes a fixing welding area 152e. The fixing welding area 152e is a welding area for fixing the relay substrate 150 to the substrate 50. The fixing welding area 152e does not provide an electrical connection function, that is, a wiring function. The fixing welding area 152e is arranged on the back surface 151b of the insulating substrate 151. The fixing welding area 152e (relay substrate 150) is bonded to the surface metal body 52 via a bonding material 154. As the bonding material 154, for example, solder can be used.

[0383] In this way, since the relay substrate 150 is fixed to the surface metal body 52, wire bonding can be performed stably. As the bonding material 154, a solder containing Ni balls can also be used. In this case, the thickness of the bonding material 154 can be controlled by the Ni balls. In addition, the inclination of the relay substrate 150 can be suppressed.

[0384] The wiring function provided by the conductor part 152 is electrically separated from the surface metal body 52 through the insulating substrate 151. For example, the insulating substrate 151 may have a non-configuration area 151c in the Z direction where the conductor part 152 is not configured and a configuration area 151d in which the conductor part 152 is configured. In the Z direction, the non-configuration area 151c is arranged in the center of the insulating substrate 151, and the configuration area 151d is provided on the surface layer of both sides. The non-configuration area 151c is sometimes referred to as a core layer. In this way, the insulating substrate 151 has the non-configuration area 151c, so that the conductor part 152 that provides the wiring function and is configured on the side of one side 151a can be electrically separated from the fixing welding area 152e and the surface metal body 52.

[0385] The solder resist 153 has low adhesion to the sealing body 30. In addition, the peeling of the sealing body 30 caused by thermal stress develops from the peripheral end of the relay substrate 150. For example, the insulating substrate 151 may have an exposed portion 151e exposed from the solder resist 153. The exposed portion 151e is arranged at the peripheral edge portion in one side 151a of the insulating substrate 151. The insulating substrate 151 has high adhesion to the sealing body 30 compared with the solder resist 153. In the exposed portion 151e, the sealing body 30 is in close contact with the relay substrate 150. Thus, the peeling of the sealing body 30 relative to the relay substrate 150 can be suppressed. Since the sealing body 30 is in close contact at the peripheral edge portion, the conductor portion 152 such as the welding area 152a, 152b exposed from the solder resist 153 can be protected.

[0386] like Fig.55As shown, the signal terminal 93 (93L) has a first extension portion 93h, a second extension portion 93i and a bent portion 93j. The first extension portion 93h and the second extension portion 93i extend in the Y direction. The first extension portion 93h is arranged inside the sealing body 30. The second extension portion 93i is arranged across the inside and outside of the sealing body 30. The bent portion 93j is arranged between the first extension portion 93h and the second extension portion 93i. The first extension portion 93h is a portion closer to the front end side than the bent portion 93j, and the second extension portion 93i is a portion closer to the rear end side than the bent portion 93j.

[0387] The signal terminal 93 may have a protrusion 93k. The protrusion 93k is provided near the front end of the signal terminal 93. The protrusion 93k protrudes from the first extended portion 93h toward the welding area 152b in the Z direction. The protrusion 93k is engaged with the welding area 152b. In the signal terminal 93, the front end of the first extended portion 93h and the protrusion 93k overlap with the welding area 152b in a planar view in the Z direction. The portion where the front end of the first extended portion 93h and the protrusion 93k are connected is a thick-walled portion, and the other portion of the signal terminal 93 is a thin-walled portion. By providing the protrusion 93k in this way, the signal terminal 93 (first extended portion 93h) is farther away from the surface metal body 52, so it is easy to ensure an insulation distance between the signal terminal 93 and the surface metal body 52.

[0388] Fig.56 Representation and Fig.54 Different examples. Fig.56 Corresponds to Fig.54 .exist Fig.56 In the embodiment, the relay substrate 150 is fixed to the exposed portion 510 of the insulating substrate 51. In this case, the insulation distance between the signal terminal 93 and the back metal body 53 can be ensured according to the thickness of the bonding material 154 and the relay substrate 150. If the solder containing Ni balls is used as the bonding material 154, the prescribed thickness can be ensured, so it is easy to ensure the insulation distance. In addition, the inclination of the relay substrate 150 can be suppressed.

[0389] The surface metal body 52 (relay wiring 55) is connected by, for example, Fig.46 As shown in the figure, the surface metal body 52 has a notch 550, so that the insulating substrate 51 is exposed. For example, the surface metal body 52 may also have a chamfered portion 554. The chamfered portion 554 is provided at least on the surface where the imaginary straight line connecting the semiconductor element 40 and the relay substrate 150 intersects in the end surface defining the notch 550. The chamfered portion 554 is provided at the upper end of the end surface. Thus, the insulation distance between the bonding wire 110 and the surface metal body 52 can be ensured.

[0390] The example in which the semiconductor device 20 includes a substrate 60 electrically connected to the source electrode 40S is shown. That is, the example in which the semiconductor device 20 includes a double-sided heat dissipation structure of a pair of substrates 50 and 60 is shown. However, it is not limited to this example. It can also be applied to a semiconductor device 20 with a single-sided heat dissipation structure including only a substrate 50 connected to the drain electrode 40D (first main electrode). The example in which both the back metal bodies 53 and 63 are exposed from the sealing body 30 is shown, but it is not limited to this.

[0391] Although the semiconductor device 20 includes the semiconductor element 40H constituting the upper arm 9H and the semiconductor element 40L constituting the lower arm 9L, the present invention is not limited thereto. The semiconductor device 20 may include only one semiconductor element 40 constituting the arm. For example, the semiconductor device 20 may include only one semiconductor element 40 .

[0392] The configuration described in this embodiment may be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, and the modified examples.

[0393] (Fifth embodiment)

[0394] This embodiment is a modification of the previous embodiment, and the description of the previous embodiment can be cited. In order to ensure both insulation reliability and volume miniaturization, as described in this embodiment, the connection between the metal component and the surface metal body via the bonding material can be made into a predetermined structure.

[0395] <Semiconductor Device>

[0396] First, based on Fig.57 The semiconductor device 20 according to the present embodiment will be described. Fig.57 Corresponds to Figure 5 .

[0397] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 13 ) has the same structure. Fig.57As shown, the semiconductor device 20 includes a semiconductor element 40 (40H, 40L), substrates 50, 60 arranged to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D as the main electrode of the semiconductor element 40. The surface metal body 52 is connected to the P terminal 91P and the output terminal 92 as the main terminal via the bonding material 104. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S as the main electrode of the semiconductor element 40. The surface metal body 62 is connected to the N terminal 91N (not shown) as the main terminal via the bonding material 104. The sealing body 30 seals the semiconductor element 40, the substrates 50, 60, a part of each of the main terminals, and the bonding material 104.

[0398] <Joint structure of main terminal>

[0399] Next, based on Figures 57 to 60 The joining structure of the main terminal will be described. Fig.58 Yes Fig.57 A plan view of the periphery of the output terminal 92 as viewed from the LVIII direction. Fig.58 In the figure, some parts are shaded for clarity. Fig.59 It will be Fig.57 The region LVIX indicated by the single-dot chain line in the figure is enlarged. Fig.60 It means that the bonding material 104 is Fig.59 A diagram of the states that are excluded from . Fig.59 and Fig.60 In the figure, the sealing body 30 is omitted for convenience.

[0400] like Fig.57 As shown, the bonding structure of the P terminal 91P as the main terminal and the output terminal 92 with the substrate 50 is similar to the structure described in the previous embodiment (see Figure 5 ) is different. Although not shown in the figure, the bonding structure of the N terminal 91N as the main terminal is also different. The other structures are the same as those described in the previous embodiment. The following is an example of the output terminal 92. The bonding material 104 infiltrates and diffuses on the metal surface during bonding. As an example, the bonding material 104 is solder.

[0401] like Fig.57 As shown, the substrate 50 has ends 50c and 50d in the Y direction. The end 50c is the end on the side 30c of the sealing body 30, and the end 50d is the end on the side 30d. The output terminal 92 extends in the Y direction across the end 50d of the substrate 50. In the plane observation in the Z direction, a part of the output terminal 92 overlaps with the surface metal body 52 (relay wiring 55), and another part does not overlap. Figures 58 to 60As shown, the output terminal 92 has an opposing surface 920 and a receiving portion 921 .

[0402] The opposing surface 920 is a portion of the lower surface of the output terminal 92 that is opposite to the surface metal body 52 (relay wiring 55) of the substrate 50 in the Z direction. The opposing surface 920 is a flat surface macroscopically, and is ideally in contact with the upper surface 52a of the surface metal body 52 with its entire surface. The opposing surface 920 has tiny bumps on the surface microscopically, and at least a portion is in contact with the upper surface 52a. The opposing surface 920 is sometimes referred to as a metal contact surface. In a planar view, the opposing surface 920 is a portion that is within a specified range from the position overlapping with the end 52b of the surface metal body 52 in the Y direction. The end 52b is an end face (side face) on the side 30d of the sealing body 30 in the Y direction, and is connected to the upper surface 52a. The end 52b forms a part of the end 50d. The planar shape of the opposing surface 920 is roughly rectangular.

[0403] The receiving portion 921 is disposed adjacent to the opposing surface 920, and provides a receiving space for the bonding material 104. For example, the receiving portion 921 is a recessed portion that is recessed relative to the opposing surface 920 in a direction away from the upper surface 52a. The receiving portion 921 as a recessed portion is a surface including a Z-direction component, and has a side surface 921a connected to the opposing surface 920 and a bottom surface 921b connected to the side surface 921a. The side surface 921a is, for example, a surface that is substantially parallel to the Z direction. The receiving portion 921 opens in the side surface of the front end side of the output terminal 92, that is, the front end surface 922 in the Y direction. The receiving portion 921 opens in the side surfaces 923 and 924 on both sides of the output terminal 92 in the X direction. The receiving portion 921 is disposed in a predetermined range from the front end surface 922 of the output terminal 92 in the Y direction. The planar shape of the receiving portion 921 is substantially rectangular. The receiving portions 921 are arranged in the X direction.

[0404] The output terminal 92 contains the bonding material 104 in the housing portion 921 in a state where the facing surface 920 is in contact with the surface metal body 52. ​​The bonding material 104 may be disposed only in the housing portion 921 or may be disposed in a Fig.59 As shown in FIG. 9A , a portion of the bonding material 104 is disposed outside the receiving portion 921. Fig.59 In the embodiment, the bonding material 104 forms a fillet with respect to the front end surface 922. The output terminal 92 is connected (bonded) to the surface metal body 52 via the bonding material 104 arranged in the housing portion 921.

[0405] <Main terminal joining method>

[0406] The bonding structure between the output terminal 92 and the surface metal body 52 is formed, for example, as follows. In a state where the bonding material 104 (solder) is arranged in the receiving portion 921, the upper portion of the opposing surface 920 of the output terminal 92 is pressed toward the substrate 50 side in the Z direction so that the opposing surface 920 is in strong contact with the upper surface 52a. Reflow is performed in a state where the opposing surface 920 is in strong contact with the upper surface 52a. Therefore, during reflow, the bonding material 104 does not infiltrate and diffuse toward the opposing surface 920 side, and even if it infiltrates and diffuses, it is to the extent of entering into the concave portions of the micro-concave and convex surfaces of the surface of the opposing surface 920.

[0407] <Summary of the Fifth Embodiment>

[0408] In the present embodiment, the opposing surface 920 of the output terminal 92 as a metal component is in contact with the upper surface 52a of the surface metal body 52 (metal contact). As a result, it is possible to suppress the overflow of the bonding material 104 from the receiving portion 921 to the opposing surface 920 side. As a result, it is possible to suppress the wetting and diffusion of the bonding material 104 in an undesirable direction, thereby ensuring insulation reliability. In addition, the output terminal 92 as a single component has both the receiving portion 921 and the opposing surface 920. As a result, it is possible to provide a semiconductor device 20 that can take into account both insulation reliability and miniaturization.

[0409] In the structure with the substrate 50, if the bonding material 104 infiltrates and diffuses to the end 52b (end face) of the surface metal body 52 and then infiltrates and diffuses to the insulating substrate 51, the portion having the same potential as the surface metal body 52 expands and the distance to the back metal body 53 becomes closer. The bonding material 104 may also contact the back metal body 53. In the present embodiment, the opposing surface 920 is arranged at a position closer to the end 50d of the substrate 50, that is, the end 52b of the surface metal body 52, than the accommodating portion 921. By arranging the opposing surface 920 on the end 52b side, it is possible to suppress the bonding material 104 from infiltrating and diffusing on the surface of the output terminal 92 and / or the surface metal body 52 to reach the end 52b and then reach the insulating substrate 51. Thus, the insulation reliability can be improved without increasing the volume.

[0410] As described above, the metal component having the opposing surface and the receiving portion can also be applied to the P terminal 91P and the N terminal 91N as other main terminals. The P terminal 91P is connected to the surface metal body 52 (P wiring 54) of the substrate 50 via the bonding material 104. Since the opposing surface of the P terminal 91P is in contact with the surface metal body 52, it is possible to suppress the bonding material 104 from overflowing from the receiving portion of the P terminal 91P to the opposing surface side. Fig.57 As shown, by providing the opposing surface on the end portion 50 c side of the substrate 50 , it is possible to suppress the bonding material 104 from wetting and diffusing onto the end portion of the surface metal body 52 and the insulating base material 51 .

[0411] The N terminal 91N is connected to the surface metal body 62 (N wiring 64) of the substrate 60 via the bonding material 104. Since the facing surface of the N terminal 91N is in contact with the surface metal body 62, it is possible to suppress the bonding material 104 from overflowing from the receiving portion of the N terminal 91N to the facing surface side. Fig.57 The end 60c side of the substrate 60 shown can suppress the bonding material 104 from wetting and diffusing onto the end of the surface metal body 62 and the insulating base 61. The end 60c is an end surface (side surface) on the side surface 30c side of the sealing body 30 in the Y direction.

[0412] <Modification>

[0413] The arrangement of the facing surface 920 and the receiving portion 921 is not limited to the above example. Fig.61 and Fig.62 The structure shown. Fig.61 is a plan view showing a modified example, corresponding to Fig.58 . Fig.62 is from Fig.61 The plan view as viewed from the LXII direction is shown. In this example, the housing portion 921 has no openings at the side surfaces 923 and 924, and is opened only at the front end surface 922. The housing portion 921 has an opening 921c at the front end surface 922 serving as a side surface.

[0414] The opposing surface 920 has a first opposing portion 920a and a second opposing portion 920b. The first opposing portion 920a is provided on the opposite side of the opening 921c relative to the receiving portion 921. The first opposing portion 920a is adjacent to the receiving portion 921 in the Y direction, which is the extending direction of the output terminal 92. The second opposing portion 920b is adjacent to the receiving portion in the X direction. Fig.61 and Fig.62 In the example shown, the opposing surface 920 has a pair of second opposing portions 920b. The pair of second opposing portions 920b sandwich the receiving portion 921 in the X direction. The planar shape of the opposing surface 920 is roughly U-shaped (roughly U-shaped). Since the opposing surface 920 is arranged in three directions relative to the receiving portion 921, the overflow direction of the bonding material 104 from the receiving portion 921 can be limited to one direction on the side of the opening 921c. As a result, the insulation reliability can be further improved.

[0415] In addition, the facing surface 920 may be configured to have only one second facing portion 920b. In this case, the planar shape of the facing surface 920 is substantially L-shaped. Since the facing surface 920 is arranged in two directions relative to the receiving portion 921, Fig.58 The configuration can limit the overflow direction of the bonding material 104 from the receiving portion 921. Thus, the insulation reliability can be improved.

[0416] The example in which the receiving portion 921 opens on the side of the output terminal 92 is shown, but the present invention is not limited to this. In addition, the planar shape of the receiving portion 921 is not limited to a substantially rectangular shape. Fig.63 As shown, a receiving portion 921 having no opening on the side surface may be provided. Fig.63 is a plan view showing a modified example, corresponding to Fig.58 .exist Fig.63 In the embodiment, the receiving portion 921 has a substantially circular planar shape. The receiving portion 921 is a hole opened on the lower surface of the output terminal 92 . Fig.63 The housing portion 921 shown is a non-through hole. The housing portion 921 as a non-through hole has a side surface 921a and a bottom surface 921b connected to the opposing surface 920, similarly to the housing portion 921 described above. Alternatively, a through hole opening on the upper surface of the output terminal 92 may be used. The housing portion 921 as a through hole does not have a bottom surface 921b, but has a side surface 921a.

[0417] The metal component having the facing surface and the receiving portion is not limited to the main terminal. Fig.64 and Fig.65 As shown, in the semiconductor device 20 constituting the upper and lower arm circuits 9 , the facing surface and the housing portion are provided at the joint portion 81 . Fig.64 is a cross-sectional view showing a modified example, corresponding to Fig.57 . Fig.65 Yes Fig.64 The area LXV indicated by the dashed line in FIG. Fig.65 In the figure, the sealing body 30 is omitted for convenience.

[0418] As described in the previous embodiment, the semiconductor device 20 includes a semiconductor element 40H as a first semiconductor element constituting an upper arm 9H and a semiconductor element 40L as a second semiconductor element constituting a lower arm 9L. The joint portion 81 electrically connects the source electrode 40S of the semiconductor element 40H to the drain electrode 40D of the semiconductor element 40L. The joint portion 81 is a metal column extending in the Z direction. The end 81a of the joint portion 81 is connected to the first wiring, namely the relay wiring 55, of the substrate 50 via the bonding material 103. The end 81b opposite to the end 81a is connected to the third wiring, namely the relay wiring 65, of the substrate 60 via the bonding material 103. The surface metal body 52 has the second wiring, namely the P wiring 54, which is provided at a predetermined interval with the relay wiring 55. The surface metal body 62 has the fourth wiring, namely the N wiring 64, which is provided at a predetermined interval with the relay wiring 65.

[0419] exist Fig.64 and Fig.65In the example shown, an opposing surface 810 and a receiving portion 811 are provided at each of the end portions 81a and 81b of the joint portion 81. The structures of the opposing surface 810 and the receiving portion 811 are the same as those of the opposing surface 920 and the receiving portion 921 described above. In the end portion 81a, the opposing surface 810 is opposed to the upper surface 52a of the surface metal body 52 (relay wiring 55). The opposing surface 810 is in contact with the upper surface 52a. The receiving portion 811 is a recessed portion that is recessed relative to the opposing surface 810. The receiving portion 811 has a side surface 811a connected to the opposing surface 810, and a bottom surface 811b. The receiving portion 811 receives the bonding material 103.

[0420] The facing surface 810 and the receiving portion 811 are arranged side by side in the Y direction. The facing surface 810 is provided on the side of the inter-wire gap 52G separating the relay wire 55 from the P wire 54, that is, provided at a position closer to the P wire 54, which is a wire other than the relay wire 55 connected to the joint portion 81. The receiving portion 811 is open at the side surface 812 of the joint portion 81 in the Y direction, and is not open at the side surface 813 opposite to the side surface 812. The receiving portion 811 may be open only at the side surface 812, or may be open at three side surfaces including two side surfaces adjacent to the side surface 812.

[0421] Thus, the facing surface 810 of the joint portion 81 is in contact (metal contact) with the surface metal body 52. ​​This can suppress the bonding material 103 from overflowing from the housing portion 811 to the facing surface 810. This can provide a semiconductor device 20 that can achieve both insulation reliability and miniaturization.

[0422] In addition, if the bonding material 103 infiltrates and diffuses into the inter-wiring gap 52G of the surface metal body 52, the portion having the same potential as the relay wiring 55 expands, and the distance to the P wiring 54 becomes closer. The bonding material 103 may also contact the P wiring 54. In contrast, in the above example, the opposing surface 810 is arranged at a position closer to the P wiring 54, i.e., the inter-wiring gap 52G, than the accommodating portion 811. Thus, it is possible to suppress the bonding material 103 from reaching the inter-wiring gap 52G. Thus, it is possible to improve the insulation reliability without increasing the volume.

[0423] The structure of the end 81b is the same as that of the end 81a. In the end 81b, the opposing surface 810 is opposed to the upper surface 62a of the surface metal body 62 (relay wiring 65). The opposing surface 810 is in contact with the upper surface 52a. The receiving portion 811 is a recessed portion. The receiving portion 811 receives the bonding material 103. The opposing surface 810 and the receiving portion 811 are arranged in the Y direction. The opposing surface 810 is arranged on the side of the inter-wiring gap 62G that separates the relay wiring 65 from the N wiring 64, that is, it is arranged at a position closer to the wiring other than the relay wiring 65 connected to the joint portion 81, that is, the N wiring 64. The receiving portion 811 is open at the side 813 of the joint portion 81 in the Y direction, and is not open at the side 812. The receiving portion 811 may be open only at the side 813, or may be open at three side surfaces including two side surfaces adjacent to the side 813.

[0424] In this way, the opposing surface 810 of the joint portion 81 is in contact with the surface metal body 62 (metal contact). Thus, it is possible to suppress the bonding material 103 from overflowing from the receiving portion 811 to the opposing surface 810 side. Thus, it is possible to provide a semiconductor device 20 that can take into account both insulation reliability and volume miniaturization. In addition, the opposing surface 810 is arranged at a position closer to the N wiring 64, i.e., the inter-wiring gap 62G, than the receiving portion 811. Thus, it is possible to suppress the bonding material 103 from reaching the inter-wiring gap 62G. Thus, it is possible to improve the insulation reliability without increasing the volume.

[0425] In the above example, the contact between the opposing surface of the metal component and the surface metal body suppresses the overflow of the bonding material. The function of suppressing overflow can also be improved by further adding a concave-convex oxide film formed by laser irradiation to the structure. Fig.66 and Fig.67 An example is shown in . Fig.66 is with Fig.65 In the corresponding cross-sectional view, the sealing body 30 is omitted for the sake of convenience. Fig.67 Yes Fig.66 The region LXVII indicated by the dashed line is enlarged in the figure, and only the surface metal body 52 is shown.

[0426] exist Fig.66 In the example shown, the concave-convex oxide films 520 and 620 are provided on the surface metal bodies 52 and 62, respectively, corresponding to the joint portion 81. The concave-convex oxide film 520 is used as an example for explanation. Fig.67As shown, the surface metal body 52 has a base material 521 and a metal film 522 and a concave-convex oxide film 520 provided on the surface of the base material 521. The base material 521 forms a main part of the surface metal body 52. ​​The base material 521 is formed using, for example, a Cu-based material. The metal film 522 is formed by including a material having higher wettability to solder than the base material 521. The metal film 522 is formed over the entire area of ​​the upper surface 52a. The metal film 522 of this embodiment is formed over the entire area of ​​the surface of the base material 521. The concave-convex oxide film 520 is formed locally in the upper surface 52a.

[0427] The uneven oxide film 520 is formed locally on the metal film 522 in the upper surface 52a by irradiating the metal film 522 with a laser. The metal film 522 has a base film with Ni (nickel) as the main component and an upper film with Au (gold) as the main component. In this embodiment, a non-electrolytic Ni plating film containing P (phosphorus) is used as the base film. When the bonding material 103 is solder, the upper film (Au) of the part of the metal film 522 exposed from the uneven oxide film 520 that contacts the bonding material 103 diffuses into the solder during reflow. The upper film (Au) of the part of the metal film 522 that forms the uneven oxide film 520 is removed by irradiation with laser when the uneven oxide film 520 is formed. The uneven oxide film 520 is a film of an oxide with Ni as the main component. For example, among the components constituting the uneven oxide film 520, 80% is Ni2O3, 10% is NiO, and 10% is Ni.

[0428] The concave portion 523 on the surface of the metal film 522 is formed by irradiation of a pulsed laser. One concave portion 523 is formed for each pulse. By irradiation of the laser, the surface layer of the metal film 522 is partially melted, vaporized, and evaporated, thereby forming a concave-convex oxide film 520. The concave-convex oxide film 520 is an oxide film derived from the metal film 522. The concave-convex oxide film 520 is a film of an oxide of the metal (Ni) which is the main component of the metal film 522. The concave-convex oxide film 520 is formed by imitating the concave-convex on the surface of the metal film 522 having the concave portion 523. On the surface of the concave-convex oxide film 520, concave-convex is formed at a pitch finer than the width of the concave portion 523. That is, very fine concave-convex (roughened portion) is formed.

[0429] Such a concave-convex oxide film 520 can be formed by the following steps. First, the upper surface 52a of the surface metal body 52 on which the metal film 522 is formed on the base material 521 is irradiated with a pulsed laser to melt and evaporate the surface of the metal film 522. The pulsed laser is adjusted so that its energy density is less than 0 J / cm 2 Large and under 100J / cm 2The pulse width is less than 1 μ second. To meet this condition, YAG laser, YVO4 laser, fiber laser, etc. can be used. For example, in the case of YAG laser, the energy density is 1 J / cm 2 In the case of electroless Ni plating, for example, 5 J / cm 2 The metal film 522 can also be processed on the left and right sides.

[0430] At this time, by moving the laser light source and the surface metal body 52 relatively, the laser is scanned and irradiated to multiple positions in sequence. By irradiating the laser, the surface of the metal film 522 is melted and vaporized, thereby forming a concave portion 523 on the surface of the metal film 522. In the metal film 522, the average thickness of the portion irradiated with the laser is thinner than the average thickness of the portion not irradiated with the laser. In addition, the multiple concave portions 523 formed corresponding to the laser spot are connected, for example, in a scale-like shape. The spot is the irradiation range of a pulse. For example, the laser is scanned in such a way that the spots of adjacent lasers in the X direction overlap partially, and the spots of adjacent lasers in the Y direction overlap partially.

[0431] Next, the melted metal film 522 is partially solidified. Specifically, the melted and vaporized metal film 522 is vapor-deposited on the portion irradiated with the laser and its surrounding portion. In this way, the melted and vaporized metal film 522 is vapor-deposited to form the concavo-convex oxide film 520 on the surface of the metal film 522.

[0432] exist Fig.66 In the figure, the uneven oxide film 520 is not provided in the first region 524 of the upper surface 52a of the surface metal body 52, which overlaps with the receiving portion 811 of the joint portion 81 in plan view. The uneven oxide film 520 is selectively provided in the second region 525 overlapping with the opposing surface 810. The structure of the surface metal body 62 and the uneven oxide film 620 is the same as that of the surface metal body 52 and the uneven oxide film 520. The uneven oxide film 620 is not provided in the first region 624 of the upper surface 62a of the surface metal body 62, which overlaps with the receiving portion 811 of the joint portion 81 in plan view. The uneven oxide film 620 is selectively provided in the second region 625 overlapping with the opposing surface 810.

[0433] The oxide film (concavoconvex oxide film 520, 620) has lower wettability to the bonding material 103 than the metal film. Since the concavoconvex oxide film 520, 620 has fine concavoconvexity on the surface, the contact area with the bonding material 103 becomes smaller, and a part of the bonding material 103 becomes spherical due to surface tension. That is, the contact angle becomes larger. As a result, the wettability to the bonding material 103 is low. Therefore, due to the effect of reduced wettability brought about by the concavoconvex oxide film 520, 620 and the effect of contact brought about by the opposing surface 810, it is difficult for the bonding material 103 to pass between the opposing surface 810 and the second region 525, 625. As a result, the overflow of the bonding material 103 can be more effectively suppressed. In the formation of the concavoconvex oxide film 520, 620, a laser is used as described above, so the layout is easy.

[0434] like Fig.68 As shown, the concave-convex oxide films 520 and 620 can also be set in peripheral areas 526 and 626. The peripheral area 526 is the area around the second area 525 in plane observation, and is the area excluding the first area 524. The peripheral area 626 is the area around the second area 625 in plane observation, and is the area excluding the first area 624. Even if the bonding material 103 passes directly below the opposing surface 810 of the joint part 81, it can be stopped by the concave-convex oxide films 520 and 620. In addition, since very fine concave and convex are formed on the surface of the concave-convex oxide films 520 and 620, the sealing body 30 is entangled, producing an anchoring effect. In addition, the contact area with the sealing body 30 is increased. As a result, the adhesion of the surface metal bodies 52 and 62 to the sealing body 30 can be improved.

[0435] In addition, the uneven oxide film 520, 620 may be provided in the second region 525, 625 and the peripheral region 526, 626. Only one of the uneven oxide films 520, 620 may be provided. The uneven oxide film 520, 620 may be used for the joint with the main terminals, i.e., the P terminal 91P, the N terminal 91N, and the output terminal 92, which are metal parts.

[0436] An example is shown in which the semiconductor device 20 includes a substrate 60 electrically connected to the source electrode 40S (second main electrode). That is, an example is shown in which the semiconductor device 20 includes a double-sided heat dissipation structure of a pair of substrates 50 and 60. However, it is not limited to this example. It can also be applied to a semiconductor device 20 with a single-sided heat dissipation structure that only includes a substrate 50 connected to the drain electrode 40D (first main electrode). In the semiconductor device 20 including a pair of substrates 50 and 60, the above-mentioned structure can also be applied only to the joint between one of the substrates 50 and 60 and the metal component. An example is shown in which both the back metal bodies 53 and 63 are exposed from the sealing body 30, but it is not limited to this.

[0437] Although the semiconductor device 20 is shown as an example including the semiconductor elements 40H and 40L, the present invention is not limited thereto and may include only the semiconductor element 40 constituting one arm. The semiconductor device 20 may include, for example, only one semiconductor element 40 .

[0438] The configuration described in this embodiment may be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, and the modified examples.

[0439] (Sixth embodiment)

[0440] This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be cited. In order to improve the reliability of the semiconductor device, as described in this embodiment, the physical properties of the sealing body and the physical properties of the insulating base material can satisfy a predetermined relationship.

[0441] <Semiconductor device and heat dissipation structure>

[0442] based on Fig.69 A semiconductor device 20 and its heat dissipation structure according to the present embodiment will be described. Fig.69 2 is a cross-sectional view showing a semiconductor device 20 according to the present embodiment. Fig.69 Yes Figure 5 A magnified view of a portion of the Fig.69 In the figure, for convenience, the external connection terminal 90 is omitted.

[0443] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 13 ) has the same structure. Fig.69 As shown, the semiconductor device 20 includes a semiconductor element 40 (40H), substrates 50 and 60 arranged in a manner to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D as the main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 is connected to the source electrode 40S as the main electrode of the semiconductor element 40. The back metal bodies 53 and 63 are exposed from the sealing body 30. The insulating substrates 51 and 61 contain resin. The sealing body 30 contains resin. Although not shown in the figure, the semiconductor device 20 includes a semiconductor element 40L.

[0444] exist Fig.69 , the heat exchange portion 121 of the cooler 120 and the heat conducting member 130 such as the heat dissipation gel are shown together with the semiconductor device 20. That is, Fig.69The semiconductor module 140 is shown to include a semiconductor device 20, a cooler 120, and a heat transfer member 130. As an example, the semiconductor module 140 has a double-sided cooling structure in which the semiconductor device 20 is sandwiched between a pair of heat exchange parts 121. The semiconductor device 20 and the cooler 120 (heat exchange part 121) are arranged side by side in the Z direction, which is a predetermined direction. The cooler 120 is arranged on both sides of the semiconductor device 20.

[0445] The back metal bodies 53 and 63 are exposed from the sealing body 30 as the back surfaces 50b and 60b of the substrates 50 and 60. One of the heat exchange parts 121 of the cooler 120 is arranged opposite to the one surface 30a and the back surface 50b of the sealing body 30, and the other heat exchange part 121 is arranged opposite to the back surface 30b and the back surface 60b of the sealing body 30. Between the facing surfaces of the semiconductor device 20 and the heat exchange part 121, a heat conduction member 130 is arranged respectively. The heat conduction member 130 is in close contact with the semiconductor device 20 and the heat exchange part 121.

[0446] <Relationship of Glass Transition Temperature>

[0447] Next, based on Fig.69 and Fig.70 , describing the relationship between the glass transition temperatures of the sealing body 30 and the insulating base materials 51 , 61 .

[0448] Fig.70 This is a diagram showing an example of the relationship between the glass transition temperature Tgs and the linear expansion coefficient αs of the sealing body 30 and the glass transition temperature Tgi and the linear expansion coefficient αi of the insulating base materials 51 and 61 . Fig.70 In the figure, the vertical axis represents the linear expansion coefficient α, and the horizontal axis represents the temperature. Fig.70 In FIG. 1 , the solid line represents the linear expansion coefficient αs of the sealing body 30, and the dotted line represents the linear expansion coefficient αi of the insulating substrates 51 and 61. In the linear expansion coefficient αs, α1s represents the linear expansion coefficient at a temperature lower than the glass transition temperature Tgs, that is, the linear expansion coefficient of the α1 region. α2s represents the linear expansion coefficient at a temperature higher than the glass transition temperature Tgs, that is, the linear expansion coefficient of the α2 region. The same is true for the linear expansion coefficient αi, α1i represents the linear expansion coefficient of the α1 region, and α2s represents the linear expansion coefficient of the α2 region.

[0449] like Fig.69As shown, the sealing body 30 is in close contact with the semiconductor element 40. The insulating substrates 51 and 61 are thermally connected to the semiconductor element 40 via the bonding materials 100, 101 and 102 and the surface metal bodies 52 and 62. Therefore, when the semiconductor element 40 is in operation (when generating heat), the temperature of the peripheral position MP1 of the semiconductor element 40 in the sealing body 30 is higher than the temperature of the positions MP2 and MP3 of the insulating substrates 51 and 61 overlapping with the semiconductor element 40. In this way, the sealing body 30 is higher in temperature than the insulating substrates 51 and 61.

[0450] When the temperature of the sealing body 30 exceeds the glass transition temperature Tgs, the Young's modulus decreases, and the sealing function of the sealing body 30 decreases. Due to the decrease in the sealing function, thermal stress may be concentrated on the drain electrode 40D, the source electrode 40S, and their joints, causing cracks. In other words, the connection reliability may decrease. In contrast, in this embodiment, if Fig.70 As shown, the relationship Tgs>Tgi is satisfied.

[0451] <Relationship of Linear Expansion Coefficient>

[0452] Next, based on Figure 70 to Figure 72 , describing the relationship between the linear expansion coefficients of the sealing body 30 and the insulating base materials 51 , 61 . Fig.71 and Fig.72 Schematic diagram showing the warpage of the semiconductor device 20. Fig.71 and Fig.72 In FIG. 1 , only the resin elements constituting the semiconductor device 20 , that is, only the sealing body 30 and the insulating base materials 51 , 61 are shown.

[0453] When the semiconductor element 40 is in operation (heating), if the linear expansion coefficient αs of the sealing body 30 is larger than the linear expansion coefficient αi of the insulating base materials 51 and 61, Fig.71 As shown by the dotted arrows, the amount of expansion of the sealing body 30 becomes larger than that of the insulating substrates 51 and 61. That is, the amount of expansion becomes larger in the center in the Z direction and becomes smaller at both ends. Therefore, both ends in the Z direction have a concave shape.

[0454] In this embodiment, if Fig.70 As shown in FIG. 1 , the relationship αi>αs is satisfied. Specifically, the relationship α1i>α1s is satisfied in the α1 region, and the relationship α2i>α2s is satisfied in the α2 region. As described above, since the relationship Tgs>Tgi is satisfied, the relationship αi>αs is satisfied in the entire region of the operating temperature range. Therefore, when the semiconductor element 40 is operating (heating), as shown in FIG. Fig.72 As shown by the dotted arrows, the expansion amount of the insulating substrates 51 and 61 becomes larger than the expansion amount of the sealing body 30. That is, the expansion amount in the center of the Z direction becomes smaller, and the expansion amount at both ends becomes larger. Fig.72As shown, the shape of the semiconductor device 20 is convex at both ends in the Z direction.

[0455] <Summary of the Sixth Embodiment>

[0456] According to this embodiment, the glass transition temperature Tgs of the encapsulant 30 is higher than the glass transition temperature Tgi of the insulating substrates 51 and 61. Thus, when the semiconductor element 40 operates, it is difficult for the temperature of the encapsulant 30, which reaches a higher temperature, to exceed the glass transition temperature Tgs. The temperature of the encapsulant 30 does not exceed the glass transition temperature Tgs, or if it does, the excess is very small. Therefore, it is possible to suppress the reduction of the Young's modulus of the encapsulant 30 and the decline of the encapsulation function. Since the decline of the encapsulation function can be suppressed, stress concentration at the drain electrode 40D, source electrode 40S, and their joints, which are the main electrodes, can be suppressed. That is, the connection reliability can be improved.

[0457] It is also possible to make the glass transition temperature Tgs of the encapsulant 30 approximately equal to the glass transition temperature Tgi of the insulating substrates 51 and 61. Compared with Tgs < Tgi, it is difficult for the temperature of the encapsulant 30, which reaches a higher temperature during heating, to exceed the glass transition temperature Tgs.

[0458] In addition, the coefficient of linear expansion αi of the insulating substrates 51 and 61 is larger than the coefficient of linear expansion αs of the encapsulant 30. Thus, when the semiconductor element 40 operates, the expansion amount of the insulating substrates 51 and 61 is larger than that of the encapsulant 30. That is, the expansion amount becomes smaller at the center in the Z direction and larger at both ends. As a result, the semiconductor device 20 warps convex outward in the Z direction. As a result, the facing distance between the semiconductor device 20 and the cooler 120 (121) becomes narrower, and the thermal resistance between the semiconductor device 20 and the cooler 120 becomes smaller. Specifically, the thickness of the heat conducting member 130 becomes thinner, and the thermal resistance becomes smaller. Since the heat of the semiconductor element 40 can be dissipated with good efficiency, it is possible to suppress the semiconductor element 40 from becoming overheated. That is, the heat dissipation performance can be improved.

[0459] It is also possible to make the coefficient of linear expansion αi of the insulating substrates 51 and 61 approximately equal to the coefficient of linear expansion αs of the encapsulant 30. In this case, the expansion amounts are approximately equal at the center and both ends in the Z direction, and it is possible to suppress the concave shape where both ends in the Z direction become concave. That is, it is possible to suppress the increase in the thermal resistance between the semiconductor device 20 and the cooler 120 due to the concave shape.

[0460] In this way, by satisfying the relationship of Tgs ≥ Tgi and αi ≥ αs, a highly reliable semiconductor device 20 can be provided.

[0461] <Modification Example>

[0462] The semiconductor device 20 of the double-sided heat dissipation structure including a pair of substrates 50 and 60 is shown as an example, but the present invention is not limited thereto and can also be applied to the semiconductor device 20 of the single-sided heat dissipation structure including only the substrate 50 connected to the drain electrode 40D (first main electrode).

[0463] Although the semiconductor device 20 is shown as an example including the semiconductor elements 40H and 40L, the present invention is not limited thereto and may include only the semiconductor element 40 constituting one arm. The semiconductor device 20 may include, for example, only one semiconductor element 40 .

[0464] The configuration described in this embodiment may be combined with any of the configurations described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, and the modified examples.

[0465] (Seventh Implementation Method)

[0466] This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be cited. In order to suppress the peeling of the sealing body, as described in this embodiment, the surface metal body can be made into a predetermined structure.

[0467] <Semiconductor Device>

[0468] Fig.73 2 is a cross-sectional view showing a semiconductor device 20 according to the present embodiment. Fig.73 Corresponds to Figure 8 .

[0469] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 13 ) has the same structure. Fig.73 As shown, the semiconductor device 20 includes two semiconductor elements 40 (40H), substrates 50 and 60 arranged in a manner to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D as the main electrode of the semiconductor element 40 via the bonding material 100. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S as the main electrode of the semiconductor element 40 via the bonding material 102. The sealing body 30 seals the semiconductor element 40, the substrates 50 and 60, and the bonding materials 100 and 102. The back metal bodies 53 and 63 in the substrates 50 and 60 are exposed from the sealing body 30. Although not shown in the figure, the semiconductor device 20 includes two semiconductor elements 40L.

[0470] like Fig.73 As shown, the surface metal bodies 52 , 62 have roughened portions 527 , 627 and non-roughened portions 528 , 628 .

[0471] <Concave-convex oxide film>

[0472] Next, based on Fig.74 and Fig.75 The uneven oxide film 520 constituting the roughened portion 527 will be described in detail. Fig.74 Yes Fig.73 Region LXXIV is enlarged in the figure. Fig.75 It is a figure which shows the formation method of a roughened part.

[0473] The surface metal bodies 52 and 62 are different from the structure described in the modification of the fifth embodiment (see Fig.66 and Fig.67 ) Similarly, there are concave-convex oxide films 520, 620. The concave-convex oxide films 520, 620 provide roughened portions 527, 627 in the surface of the surface metal bodies 52, 62. The portions of the surface of the surface metal bodies 52, 62 where the concave-convex oxide films 520, 620 are not formed provide non-roughened portions 528, 628. The following description will be made by taking the surface metal body 52 as an example.

[0474] like Fig.74 As shown, the surface metal body 52 has a base material 521 and a coating 522p and a concavo-convex oxide film 520 arranged on the surface of the base material 521. The base material 521 forms the main part of the surface metal body 52. ​​The base material 521 is formed using, for example, a Cu-based material. The coating 522p is formed by including a material having a higher wettability than the base material 521 for a bonding material 100 such as solder. The coating 522p is formed on the entire area of ​​the upper surface 52a of the surface metal body 52 and the entire area of ​​the side 52c. The side 52c is a surface in the surface metal body 52 that connects the upper surface 52a with the lower surface 52d opposite to the insulating substrate 51.

[0475] The uneven oxide film 520 is formed by irradiating the plated film 522p with laser as described in the modified example of the fifth embodiment. In this embodiment, the upper surface 52a and the side 52c of the surface metal body 52 are irradiated with laser. The roughened portion 527 provided by the uneven oxide film 520 is the portion of the upper surface 52a except the non-roughened portion 528. As an example, the roughened portion 527 is formed in the entire area of ​​the side 52c. At the end of the surface metal body 52, the roughened portion 527 is continuously arranged from the side 52c to the upper surface 52a. The roughened portion 527 is arranged on a portion of the upper surface 52a and the side 52c. The roughened portion 527 can also be arranged only on the edge of the upper surface 52a. The non-roughened portion 528 is arranged on a portion of the upper surface 52a, including at least the configuration area (joining area) of the bonding material 100. The non-roughened portion 528 can be arranged only in the joining area, or can include an area outside the joining area. The roughened portion 527 is arranged on at least a portion of the side 52c. The roughened portion 527 may be provided only on a portion of the side surface 52 c . For example, the roughened portion 527 may be provided only on a portion of the side surface 52 c so that the concavo-convex oxide film 520 does not contact the insulating substrate 51 .

[0476] The plating film 522p of the present embodiment has a base film with Ni (nickel) as the main component and an upper film with Au (gold) as the main component. Specifically, a non-electrolytic Ni plating film containing P (phosphorus) is used as the base film. In the case where the bonding material 100 is solder, in the plating film 522p exposed from the uneven oxide film 520, the upper film (Au) of the portion in contact with the bonding material 100 diffuses into the solder during reflow. In the plating film 522p, the upper film (Au) of the portion forming the uneven oxide film 520 is removed by laser irradiation when the uneven oxide film 520 is formed. The uneven oxide film 520 is a film of an oxide with Ni as the main component. The uneven oxide film 520 is continuously provided at the end of the surface metal body 52 from the side 52c to the upper surface 52a.

[0477] As described in the modification of the fifth embodiment, by irradiation of laser, the surface layer of the plating film 522p is partially melted, vaporized, and evaporated, thereby forming the uneven oxide film 520. The uneven oxide film 520 is an oxide film derived from the plating film 522p. The uneven oxide film 520 is a film of an oxide of the metal (Ni) which is the main component of the plating film 522p. On the surface of the uneven oxide film 520, fine unevenness (roughening portion) is always formed. The surface of the uneven oxide film 520 is continuous and uneven.

[0478] In this embodiment, the area of ​​the lower surface 52d of the surface metal body 52 is larger than the area of ​​the upper surface 52a. Fig.74As shown in FIG. 5 , the lower surface 52d protrudes relative to the upper surface 52a. That is, in the plane observation in the Z direction, at least a portion of the side surface 52c is located outside the upper surface 52a. Fig.75 As shown, by irradiating the laser in the Z direction, the uneven oxide film 520 can be formed on the upper surface 52a and the side surface 52c.

[0479] <Summary of the Seventh Implementation Method>

[0480] In the structure in which the plating film 522p is provided on the upper surface 52a and the side surface 52c of the surface metal body 52, the sealing body 30 is easily peeled off from the end of the surface metal body 52, that is, the side surface 52c, due to thermal stress. In contrast, in the present embodiment, a roughened portion 527 is provided in the portion of the upper surface 52a and the side surface 52c other than the non-roughened portion 528. Thus, the adhesion force between the side surface 52c of the surface metal body 52 and the sealing body 30 is higher than that of the structure in which the roughened portion 527 is not provided. Therefore, in the side surface 52c of the surface metal body 52, the peeling of the sealing body 30 can be suppressed. By suppressing the peeling, it is possible to suppress the concentration of thermal stress on the bonding portion of the bonding material 100 and the like in the surface metal body 52. ​​As a result, a semiconductor device 20 with high reliability can be provided.

[0481] The surface metal body 62 has the same structure as the surface metal body 52. ​​The surface metal body 62 has a roughened portion 627 on the upper surface 62a and the side surface 62c except for the non-roughened portion 628. Thus, peeling of the sealing body 30 on the side surface 62c of the surface metal body 62 can be suppressed.

[0482] In the present embodiment, the roughened portions 527 and 627 are provided continuously from the side surfaces 52c and 62c to the upper surfaces 52a and 62a. This can suppress the peeling of the sealing body 30 near the end of the surface metal bodies 52 and 62.

[0483] The roughening treatment for forming the roughening portion 527, 627 may be roughening plating, sandblasting, chemical treatment, etc. In this embodiment, laser roughening is used. The concave-convex oxide film 520, 620 is formed by irradiating the plated film with laser. The surface metal body 52, 62 has the concave-convex oxide film 520, 620 at the roughening portion 527, 627.

[0484] The surface of the concave-convex oxide film 520, 620 is continuous and concave, and the sealing body 30 is entangled to produce an anchoring effect. In addition, the contact area with the sealing body 30 is increased. As a result, the adhesion to the sealing body 30 can be improved in the roughened portion 527, 627. In addition, the concave-convex oxide film 520, 620 has low wettability to the bonding material 100, 102 compared with the plating film (plating film 522p). Since the concave-convex oxide film 520, 620 has fine concave-convex on the surface, the contact area with the bonding material 100, 102 becomes smaller, and a part of the bonding material 100, 102 becomes spherical due to surface tension. That is, the contact angle becomes larger. Therefore, the overflow of the bonding material 100, 102 can be suppressed. In this way, by adopting the concave-convex oxide film 520, 620, the adhesion to the sealing body 30 can be improved, and the overflow of the bonding material 100, 102 from the bonding portion can be suppressed.

[0485] In this embodiment, the area of ​​the surface metal body 52, 62 is larger at the lower surface 52d, 62d than the upper surface 52a, 62a. The lower surface 52d, 62d protrudes relative to the upper surface 52a, 62a. As a result, it is easy to physically roughen the side surface 52c, 62c from the Z direction. In the case of the above-mentioned laser roughening, by irradiating the laser in the Z direction, the concave-convex oxide film 520, 620 can be formed not only on the upper surface 52a, 62a, but also on the side surface 52c, 62c.

[0486] <Modification>

[0487] The side surface shape of the surface metal bodies 52 and 62 is not limited to the above-mentioned example. When the surface metal bodies 52 and 62 are patterned by press working, etching, cutting, etc., the side surface can be processed into a predetermined shape. Fig.76 2 is a cross-sectional view showing a modified example of the side shape. Fig.76 In the figure, the surface metal body 52 is shown as an example, and the plating film 522p is omitted for convenience. Although the illustration is omitted, the surface metal body 62 can also adopt the same structure.

[0488] exist Fig.76 In the example shown, the surface metal body 52 has a side surface 52c that is roughly parallel to the Z direction. That is, the area of ​​the surface metal body 52 is roughly constant in the Z direction. In order to physically roughen such a surface metal body 52, for example, the upper surface 52a and the side surface 52c are separately roughened. In the case of laser roughening, the side surface 52c is irradiated with laser from a direction different from the irradiation direction of the laser to the upper surface 52a, for example, a direction inclined relative to the Z direction. Thus, a concave-convex oxide film 520 can be provided on the side surface 52c.

[0489] Fig.77is a cross-sectional view showing a modified example of the side shape, corresponding to Fig.76 .exist Fig.77 In the example shown, the area of ​​the surface metal body 52 perpendicular to the Z direction increases as it approaches the lower surface 52d. The side surface 52c is R-shaped. In this case, the entire area of ​​the side surface 52c is located outside the upper surface 52a in a plan view. Fig.75 Compared with the structure shown, it is easier to physically roughen the side surface 52 c from the Z direction, for example, by laser roughening.

[0490] Fig.78 is a cross-sectional view showing a modified example of the side shape, corresponding to Fig.76 .exist Fig.78 In the example shown, the area of ​​the surface metal body 52 perpendicular to the Z direction also increases as it approaches the lower surface 52d. The surface metal body 52 is, for example, roughly trapezoidal in the ZY plane. In this case, since the entire area of ​​the side surface 52c is located outside the upper surface 52a in the plane observation, it is easy to physically roughen the side surface 52c from the Z direction.

[0491] The example of the semiconductor device 20 having a double-sided heat dissipation structure including a pair of substrates 50 and 60 is shown, but the present invention is not limited thereto. The present invention can also be applied to a semiconductor device 20 having a single-sided heat dissipation structure including only a substrate 50 connected to the drain electrode 40D (first main electrode). In the structure including a pair of substrates 50 and 60, the structure including the roughened portion of the side surface described above can also be applied to only one of the substrates 50 and 60.

[0492] Although the semiconductor device 20 is shown as an example including the semiconductor elements 40H and 40L, the present invention is not limited thereto and may include only the semiconductor element 40 constituting one arm. The semiconductor device 20 may include, for example, only one semiconductor element 40 .

[0493] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, the sixth embodiment, and the modified examples.

[0494] (Eighth Implementation Method)

[0495] This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be cited. In order to reduce the inductance, as described in this embodiment, the thickness of the surface metal body and the spacing of the wiring can satisfy a predetermined relationship.

[0496] <Semiconductor Device>

[0497] First, based on Fig.79, the semiconductor device 20 of the present embodiment, particularly the circuit patterns of the surface metal bodies 52 and 62, will be described. Fig.79 FIG. 2 is a cross-sectional view showing a semiconductor device 20 according to the present embodiment. Fig.79 In the figure, the structure described in the previous embodiment is shown (refer to Figure 8 ) part.

[0498] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 13 ) has the same structure. Fig.79 As shown, the semiconductor device 20 includes a semiconductor element 40 (40H), substrates 50 and 60 arranged in a manner to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is electrically connected to the drain electrode 40D as the main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S as the main electrode of the semiconductor element 40. The sealing body 30 seals the semiconductor element 40, the substrates 50 and 60, and the bonding materials 100 and 102. In the substrates 50 and 60, the back metal bodies 53 and 63 are exposed from the sealing body 30. Although not shown in the figure, the semiconductor device 20 includes a semiconductor element 40L constituting the lower arm 9L.

[0499] <Relationship between wiring spacing and thickness>

[0500] Next, based on Fig.79 and Fig.80 The relationship between the wiring interval and the thickness is described. Fig.80 Yes Fig.79 The area LXXX is enlarged. Fig.80 Only the substrate 60 is shown in the figure.

[0501] The surface metal bodies 52 and 62 are different from the structures described in the previous embodiment (see Fig.65 ) Similarly, there are gaps 52G and 62G between wirings. Fig.79 and Fig.80 As shown, the inter-wiring gap 62G separates the adjacent N wirings 64 and relay wirings 65. The inter-wiring gap 62G is a predetermined gap provided in the surface metal body 62 between wirings having different potentials.

[0502] like Fig.80 As shown, in this embodiment, the interval L10 between the N wiring 64 and the relay wiring 65 is less than the thickness T10 of the surface metal body 62 (L10≤T10). The interval L10 is the length of the inter-wiring gap 62G, that is, the distance between the patterns of the N wiring 64 and the relay wiring 65. Fig.79 and Fig.80In this case, the interval L10 and the thickness T10 of the surface metal body 62 satisfy the relationship L10 < T10. Although the illustration is omitted, the substrate 50 having the surface metal body 52 has the same structure as the substrate 60. In the surface metal body 52, the interval L10 between the P wiring 54 and the relay wiring 55 is less than or equal to the thickness T10 of the surface metal body 52 (L10 ≤ T10).

[0503] <Simulation results>

[0504] Figure 81 to Figure 83 Indicates the results of electromagnetic field simulation. Fig.81 It is a graph summarizing the simulation results as the relationship between length (interval, thickness) and inductance. The circular (○) measurement points represent the results of three levels of thickness T10 (0.3 mm, 1.5 mm, 2.5 mm) when the interval L10 is fixed at 1.5 mm. The solid line in the figure represents the change in inductance with the change in thickness T10 when the interval L10 is fixed. The square (□) measurement points represent the results of three levels of interval L10 (0.5 mm, 1.5 mm, 2.5 mm) when the thickness T10 is fixed at 1.5 mm. The dashed line in the figure represents the change in inductance with the change in interval L10 when the thickness T10 is fixed. Fig.81 The length on the horizontal axis shown represents the length of the thickness T10 when the interval L10 is fixed, and represents the length of the interval L10 when the thickness T10 is fixed.

[0505] Fig.82 It is a graph showing the simulation results in the case of L10 > T10. Fig.82 Represents Fig.81 The simulation results under the first condition C1 shown, specifically when the interval L10 = 1.5 mm and the thickness T10 = 0.3 mm. Fig.83 It is a graph showing the simulation results in the case of L10 < T10. Fig.83 Represents Fig.81 The simulation results under the second condition C2 shown, specifically when the interval L10 = 1.5 mm and the thickness T10 = 2.5 mm. In the simulation, the conditions other than the interval L10 and the thickness T10 are common.

[0506] According to Fig.81 It is clearly known from the results shown that the inductance can be reduced in the range where the relationship L10 ≤ T10 is satisfied. In particular, it is clearly known that the inductance can be effectively reduced in the range where the relationship L10 < T10 is satisfied.

[0507] As Fig.82As shown, when L10 > T10, although the current is dispersed in the width direction in the extended portion 641 of the N wiring 64, it flows while being biased toward the end side of the surface metal body 62 (substrate 60). Therefore, the PN current circulation described in the prior embodiment (refer to Fig.17 ) is large. Since the current path flowing in the extended portion 421 is far from the relay wiring 65, the cancellation effect of the magnetic flux caused by the current of the reverse component becomes weak. Fig.82 shows a case where the inductance becomes larger compared to the case where the relationship L10 ≤ T10 is satisfied.

[0508] As Fig.83 shown, when L10 < T10, the current flows while being biased toward the end on the relay wiring 65 side in the width direction of the extended portion 641. Therefore, the PN current circulation is small. Since the current path flowing in the extended portion 421 is close to the relay wiring 65, the cancellation effect of the magnetic flux caused by the current of the reverse component becomes strong. Fig.83 shows a case where the inductance becomes smaller compared to the case where the relationship L10 > T10 is satisfied.

[0509] <Summary of the Eighth Embodiment>

[0510] In the present embodiment, the surface metal body 52 has a P wiring 54 as the first wiring and a relay wiring 55 as the second wiring having a potential different from that of the first wiring. And the interval L10 between the P wiring 54 and the relay wiring 55 and the thickness T10 of the surface metal body 52 satisfy the relationship L10 ≤ T10. Similarly, the surface metal body 62 has an N wiring 64 as the first wiring and a relay wiring 65 as the second wiring having a potential different from that of the first wiring. And the interval L10 between the N wiring 64 and the relay wiring 65 and the thickness T10 of the surface metal body 62 satisfy the relationship L10 ≤ T10.

[0511] If the relationship L10 ≤ T10 is satisfied, since the interval between adjacent wirings is narrow, the cancellation effect of the magnetic flux caused by the current flowing through the first wiring and the magnetic flux caused by the current flowing through the second wiring becomes high, and the inductance can be reduced. In addition, since the surface metal body is thick, the cross-sectional area of the current path becomes large, and the inductance can be reduced. Thus, the semiconductor device 20 of the present embodiment can reduce the inductance. In particular, if the relationship L10 < T10 is satisfied, the above effect becomes high, and the inductance can be reduced more effectively.

[0512] <Modification Example>

[0513] An example of a semiconductor device 20 having a double-sided heat dissipation structure with a pair of substrates 50 and 60 is shown, but it is not limited to this. It can also be applied to a semiconductor device 20 having a single-sided heat dissipation structure with only a substrate 50 connected to the drain electrode 40D (first main electrode). In a structure having a pair of substrates 50 and 60, only one of the surface metal bodies 52 and 62 can also satisfy the above-mentioned relationship of L10≤T10. That is, in at least one substrate electrically connected to the main electrode of the semiconductor element, the surface metal body has a first wiring and a second wiring, and the relationship of L10≤T10 can be satisfied. In addition, an example of satisfying the relationship of L10≤T10 in all opposing regions of the N wiring 64 as the first wiring and the relay wiring 65 as the second wiring whose potential is different from that of the first wiring is shown, but it is not limited to this. The relationship of L10≤T10 can be satisfied in at least a part of the opposing region. The same is true for the opposing regions of the P wiring 54 as the first wiring and the relay wiring 55 as the second wiring whose potential is different from that of the first wiring.

[0514] Although the semiconductor device 20 is shown as an example including the semiconductor elements 40H and 40L, the present invention is not limited thereto and may include only the semiconductor element 40 constituting one arm. The semiconductor device 20 may include, for example, only one semiconductor element 40 .

[0515] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, the sixth embodiment, the seventh embodiment and the modified examples.

[0516] (Ninth Implementation Method)

[0517] This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be cited. In order to improve heat dissipation and reliability, as described in this embodiment, the side shape of the substrate can be made into a predetermined shape.

[0518] <Semiconductor Device>

[0519] First, based on Fig.84 The semiconductor device 20 according to the present embodiment will be described. Fig.84 is with Figure 5 The corresponding cross-sectional view. Fig.84 In the figure, for convenience, the external connection terminal 90 is omitted.

[0520] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 13 ) has the same structure. Fig.84As shown, the semiconductor device 20 includes a semiconductor element 40 (40H, 40L), substrates 50, 60 arranged in a manner sandwiching the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is electrically connected to the drain electrode 40D as the main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 is electrically connected to the source electrode 40S as the main electrode of the semiconductor element 40. The sealing body 30 seals the semiconductor element 40, the substrates 50, 60 and the bonding materials 100, 102.

[0521] <Substrate>

[0522] Next, based on Figure 84 to Figure 86 The substrates 50 and 60 will be described. Fig.85 It is a plan view showing the center of the substrate. Fig.85 Corresponds to Fig.12 . Fig.86 Yes Fig.84 The area LXXXVI shown by the dashed line in the figure is enlarged. Hereinafter, "inside" and "outside" represent the relative positional relationship with the center 50sc, 60sc of the substrate 50, 60 as the reference position in the plane observation of the Z direction. The side closer to the center is the inside, and the side farther from the center is the outside. Fig.85 , the center 50sc of the substrate 50 is shown as an example. Fig.84 It is a cross-sectional view, but for the convenience of explanation, the center 50sc and 60sc are shown.

[0523] In the substrates 50 and 60 of the present embodiment, the insulating substrates 51 and 61 contain resin. The surface metal bodies 52 and 62 are arranged on the surfaces 51a and 61a of the insulating substrates 51 and 61. The surface metal bodies 52 and 62 are patterned as described in the previous embodiment. Thus, the insulating substrates 51 and 61 have exposed portions 510 and 610 exposed from the surface metal bodies 52 and 62. The exposed portion 510 of the insulating substrate 51 as the first exposed portion and the exposed portion 610 of the insulating substrate 61 as the second exposed portion overlap each other at least partially in a planar view in the Z direction. The exposed portions 510 and 610 overlap. That is, at least a portion of the exposed portion 510 is opposite to the exposed portion 610 in the Z direction.

[0524] The back metal bodies 53 and 63 are arranged on the back sides 51b and 61b of the insulating substrates 51 and 61. The back metal bodies 53 and 63 are exposed from the sealing body 30. In the back metal bodies 53 and 63, the opposite surface of the opposing surfaces 53a and 63a opposing the insulating substrate 51 becomes the exposed surface 53b and 63b. The exposed surface 53b is exposed roughly coplanar with respect to the one side 30a of the sealing body 30. The exposed surface 63b is exposed roughly coplanar with respect to the back side 30b of the sealing body 30. The exposed surface 53b and 63b become the back sides 50b and 60b of the substrate 50 and 60. The sealing body 30 has a side surface 30e as a second surface connected to the first surface, that is, the one side 30a and the back side 30b. The side surface 30e includes the side surfaces 30c and 30d in the Y direction, and also includes the side surface in the X direction. The side surface 30e includes all the side surfaces. For demolding during molding, the side surface 30e, which is the second surface, is a tapered surface inclined relative to the Z direction. The side surface 30e has a draft angle. In the previous embodiment, for convenience, the draft angle was omitted and illustrated. The side surface 30e has a curved portion near the approximate center of the Z direction, and from the curved portion, the closer to the one side 30a and the back side 30b, the closer to the semiconductor element 40 in the plane observation in the Z direction. That is, in the plane observation, the positional relationship is that the curved portion is the outside, and the one side 30a and the back side 30b are the inside. Hereinafter, the one side 30a and the back side 30b of the sealing body 30 are sometimes referred to as the first surface 30a and 30b.

[0525] like Fig.84 and Fig.86 As shown, the substrates 50 and 60 have laminated bodies 500 and 600. The laminated body 500 is a laminated body having a two-layer structure of an insulating substrate 51 and a back metal body 53. Similarly, the laminated body 600 is a laminated body having a two-layer structure of an insulating substrate 61 and a back metal body 63. In the laminated bodies 500 and 600, the side surface connecting the surface 51a and 61a of the insulating substrate 51 and 61 and the exposed surface 53b and 63b of the back metal body 53 and 63 is a so-called V-shaped cut shape. The side surface of the laminated bodies 500 and 600 is in a shape in which the central portion is convex to the outside relative to the surface 51a and 61a as the upper end and the exposed surface 53b and 63b as the lower end.

[0526] The side surfaces of the stacked bodies 500 and 600 include first inclined portions 501 and 601, second inclined portions 502 and 602, and intermediate portions 503 and 603. First, the stacked body 500 will be described.

[0527] The first inclined portion 501 is a portion that is within a predetermined range from the surface 51a. The first inclined portion 501 has an inclination such that the distance from the center 50sc is closest at the upper end on the surface 51a side and is farther from the upper end at the lower end. That is, in the first inclined portion 501, the lower end is located outside the upper end. Fig.85As shown, the first inclined portion 501 is provided at the edge of the substrate 50. The first inclined portion 501 has a ring shape so as to surround the surface metal body 52.

[0528] In the present embodiment, the first inclined portion 501 has an inclination such that the farther it is from the surface 51a in the Z direction, the farther it is from the center 50sc in a planar view. That is, the area of ​​the stacked body 500 orthogonal to the Z direction at the surface 51a in the upper portion including the first inclined portion 501 is the smallest, and the farther it is from the surface 51a, the larger the area. The inclination of the first inclined portion 501 can tolerate manufacturing deviations. The first inclined portion 501 has the above-mentioned inclination macroscopically. The first inclined portion 501 is a tapered surface.

[0529] The second inclined portion 502 is a portion that is within a predetermined range from the exposed surface 53b. The second inclined portion 502 has an inclination such that the distance from the center 50sc is closest at the lower end on the exposed surface 53b side and is farther from the lower end side at the upper end when viewed in a plane. That is, in the second inclined portion 502, the upper end is located outside the lower end. The second inclined portion 502 is provided at the edge of the substrate 50 in the same manner as the first inclined portion 501. The second inclined portion 502 is annular in shape so as to surround the back metal body 53.

[0530] In the present embodiment, the second inclined portion 502 has an inclination such that the further away from the exposed surface 53b in the Z direction, the further away from the center 50sc in the plane observation. That is, the area of ​​the laminate 500 is the smallest at the exposed surface 53b in the lower part including the second inclined portion 502, and the farther away from the exposed surface 53b, the larger the area. The inclination of the second inclined portion 502 can allow for manufacturing deviations. The second inclined portion 502 has the above-mentioned inclination macroscopically. The second inclined portion 502 is a conical surface. If the first inclined portion 501 is a positive cone, the second inclined portion 502 is a negative cone.

[0531] The middle portion 503 is connected to the first inclined portion 501 and the second inclined portion 502. The middle portion 503 is a portion connecting the first inclined portion 501 and the second inclined portion 502, and has a predetermined length in the Z direction. The middle portion 503 is the vertex portion of the side surface of the stack 500. The side surface of the stack 500 is farthest from the center 50sc at the middle portion 503. The middle portion 503 is the outermost portion of the stack 500 in planar observation. The area of ​​the stack 500 orthogonal to the Z direction at the middle portion 503 is the largest. In the middle portion 503, the area of ​​the stack 500 is approximately constant. The farther the first inclined portion 501 is from the middle portion 503, the shorter the distance from the center 50sc in planar observation. The farther the second inclined portion 502 is from the middle portion 503, the shorter the distance from the center 50sc in planar observation.

[0532] The stacked body 600 has the same structure as the stacked body 500. The first inclined portion 601 is a portion that is within a predetermined range from the surface 61a. The first inclined portion 601 has an inclination such that the distance from the center 60sc is closest at the upper end on the surface 61a side and is farther from the upper end at the lower end in planar observation. That is, in the first inclined portion 601, the lower end is located outside the upper end. The first inclined portion 601 is provided at the edge of the substrate 60. The first inclined portion 601 is annular in a manner that surrounds the surface metal body 62.

[0533] In this embodiment, the first inclined portion 601 has an inclination such that the farther it is from the surface 61a in the Z direction, the farther it is from the center 60sc in a planar view. That is, the area of ​​the stacked body 600 orthogonal to the Z direction at the surface 61a in the upper part including the first inclined portion 601 is the smallest, and the area becomes larger as it is farther from the surface 61a. The inclination of the first inclined portion 601 can tolerate manufacturing deviations. The first inclined portion 601 has the above-mentioned inclination macroscopically. The first inclined portion 601 is a tapered surface.

[0534] The second inclined portion 602 is a portion that is within a predetermined range from the exposed surface 63b. The second inclined portion 602 has an inclination such that the distance from the center 60sc is closest at the lower end on the exposed surface 63b side and is farther from the lower end at the upper end than at the lower end in a planar view. That is, in the second inclined portion 602, the upper end is located outside the lower end. The second inclined portion 602 is provided at the edge of the substrate 60 in the same manner as the first inclined portion 501. The second inclined portion 602 is annular in shape so as to surround the back metal body 63.

[0535] In the present embodiment, the second inclined portion 602 has an inclination such that the further away from the exposed surface 63b in the Z direction, the further away from the center 60sc in the plane observation. That is, the area of ​​the laminate 600 is the smallest at the exposed surface 63b in the lower part including the second inclined portion 602, and the farther away from the exposed surface 63b, the larger the area. The inclination of the second inclined portion 602 can allow for manufacturing deviations. The second inclined portion 602 has the above-mentioned inclination in a macroscopic sense. The second inclined portion 602 is a conical surface. If the first inclined portion 601 is a positive cone, the second inclined portion 602 is a negative cone.

[0536] The middle portion 603 is connected to the first inclined portion 601 and the second inclined portion 602. The middle portion 603 is a portion connecting the first inclined portion 601 and the second inclined portion 602, and has a predetermined length in the Z direction. The middle portion 603 is the vertex portion of the side surface of the stack 600. The side surface of the stack 600 is farthest from the center 60sc at the middle portion 603. The middle portion 603 is the outermost portion of the stack 600 in planar observation. The stack 600 has the largest area at the middle portion 603. In the middle portion 603, the area of ​​the stack 600 is approximately constant. The farther the first inclined portion 601 is from the middle portion 603, the shorter the distance from the center 60sc in planar observation. The farther the second inclined portion 602 is from the middle portion 603, the shorter the distance from the center 60sc in planar observation.

[0537] <Size and angle>

[0538] Next, based on Fig.87 The dimensions and angles of the stacked bodies 500 and 600 will be described. Fig.87 is with Fig.86 The corresponding figures show the dimensions and angles. The following description will be made by taking the stacked body 500 as an example.

[0539] Fig.87 The length L11 shown is the length of the first inclined portion 501 in plan view, that is, the width of the first inclined portion 501 in a ring shape. The length L12 is the length of the second inclined portion 502 in plan view, that is, the width of the second inclined portion 502 in a ring shape. The length L21 is the length of the first inclined portion 501 in the Z direction, that is, the height of the first inclined portion 501. The length L22 is the length of the second inclined portion 502 in the Z direction, that is, the height of the second inclined portion 502. The length L23 is the length of the middle portion 503 in the Z direction, that is, the height of the middle portion 503. The length L24 is the length of the insulating substrate 51 in the Z direction, that is, the thickness of the insulating substrate 51. The length L25 is the length of the back metal body 53 in the Z direction, that is, the thickness of the back metal body 53.

[0540] Angle R1 is the inclination angle of the back metal body 53 in the first inclined portion 501 with respect to the plate thickness direction of the semiconductor element 40, that is, the Z direction. Angle R2 is the inclination angle of the back metal body 53 in the second inclined portion 502 with respect to the Z direction. Angle R3 is the inclination angle of the insulating substrate 51 in the first inclined portion 501 with respect to the Z direction. Angle R4 is the inclination angle of the second inclined portion 502 with respect to the exposed surface 53b of the back metal body 53. Angle R5 is the inclination angle of the side surface 30e with respect to the one surface 30a of the sealing body 30.

[0541] like Fig.87As shown, in this embodiment, the length of the second inclined portion 502 is shorter than that of the first inclined portion 501. That is, the relationship L11 > L12 is satisfied. The angle R1 satisfies the relationship 0° < R1 ≤ 45°, and the angle R2 satisfies the relationship 0° < R2 < 45°. The closer the angle R1 is to 45°, the more effectively the heat generated by the semiconductor element 40 can be diffused. The closer the angle R2 is to 45°, the smaller the thermal resistance can be, as will be described later.

[0542] Furthermore, the first inclined portion 501 is provided from the insulating substrate 51 to the back metal body 53, and the second inclined portion 502 is provided on the back metal body 53. That is, the relationships L21 > L24 and L22 < L25 are satisfied. In the structure having the intermediate portion 503, the intermediate portion 503 is provided on the back metal body 53. That is, the relationship L24 < (L24 + L25 - L23) / 2 is satisfied.

[0543] Furthermore, in the structure where the first inclined portion 501 is provided from the insulating substrate 51 to the back metal body 53, the inclination angle of the back metal body 53 is substantially equal to the inclination angle of the insulating substrate 51. That is, the relationship R1 = R3 is satisfied.

[0544] Furthermore, the inclination angle of the second inclined portion 502 with respect to the exposed surface 53b of the back metal body 53 is smaller than the inclination angle of the side surface 30e (second surface) with respect to the one surface 30a (first surface) of the encapsulating body 30. That is, the relationship R4 < R5 is satisfied. Although the description is omitted, the laminate 600 also has the same structure as the laminate 500.

[0545] <Manufacturing method of laminate>

[0546] Next, an example of the manufacturing method of the above laminate 500 will be described. First, a mother substrate having a two-layer structure including a resin-containing insulating substrate 51 and a back metal body 53 is formed. Next, by using a blade, cutting is performed simultaneously from both sides of the surface 51a of the insulating substrate 51 and the exposed surface 53b (V-shaped cutting). In this cutting, the mother substrate is not completely cut off, and the first inclined portion 501 and the second inclined portion 502 are formed. In the mother substrate, adjacent laminates 500 are in a state of being connected at the intermediate portion 503. And by separating (cutting off) the adjacent laminates 500 at the intermediate portion 503, a laminate 500 having a side surface with a V-shaped cutting shape can be obtained.

[0547] Fig.88: is a side view of the stacked body 500 obtained by the above-mentioned manufacturing method. By cutting (cutting) using a blade, the first inclined portion 501 has a cutting mark 501a along the circumferential direction. Similarly, the second inclined portion 502 has a cutting mark 502a along the circumferential direction. Since the adjacent stacked bodies 500 are separated at the middle portion 503, the middle portion 503 has a concave-convex portion 503a. Although the description is omitted, the stacked body 600 is also formed by the same method as the stacked body 500.

[0548] <Summary of the Ninth Embodiment>

[0549] In the present embodiment, the side of the stacked body 500, 600 has a first inclined portion 501, 601 and a second inclined portion 502, 602. That is, the side is in a curved shape (roughly V-shaped). Thus, even if the peeling generated in the sealing body 30 progresses along the second inclined portion 502, 602 starting from the interface with the exposed surface 53b, 63b, the progress toward the first inclined portion 501, 601 can be suppressed by the curved shape. Therefore, the progress of the peeling toward the surface metal body 52, 62, the semiconductor element 40, the joint between the surface metal body 52, 62 and the semiconductor element 40, etc. can be suppressed. That is, the situation in which the thermal stress is concentrated on the above-mentioned surface metal body 52, 62, the semiconductor element 40, etc. and the connection reliability is reduced can be suppressed. Thus, reliability can be ensured.

[0550] Since the second inclined portions 502 and 602 are provided, it is possible to suppress the rear metal bodies 53 and 63 from falling off (dropping off) from the sealing body 30 when the above-mentioned peeling occurs.

[0551] Ideally, heat diffuses at an angle of 45 degrees. In the present embodiment, the stacked bodies 500 and 600 have first inclined portions 501 and 601 on the semiconductor element 40 side in the Z direction. As a result, the heat generated by the semiconductor element 40 diffuses in the portion above the bent portion, that is, in the portion corresponding to the first inclined portions 501 and 601. On the other hand, by having the second inclined portions 502 and 602, the heat conduction path of the portion corresponding to the second inclined portions 502 and 602 is narrower than the heat conduction path of the portion corresponding to the first inclined portions 501 and 601. The narrow heat conduction path increases the thermal resistance. In the present embodiment, the length L12 of the second inclined portions 502 and 602 is made shorter than the length L11 of the first inclined portions 501 and 601 (L11>L12). As a result, compared with the structure satisfying L11≤L12, the length L22 of the second inclined portions 502 and 602 in the Z direction can be shortened, thereby reducing the thermal resistance below the bent portion. That is, the heat diffused in the upper portion of the stacked bodies 500 and 600 can be efficiently dissipated from the exposed surfaces 53b and 63b. In this way, the semiconductor device 20 of the present embodiment can improve the heat dissipation performance while ensuring reliability.

[0552] The first inclined portion 501, 601 may be provided on the insulating substrate 51, 61, and the second inclined portion 502, 602 may be provided on the back metal body 53, 63. The first inclined portion 501, 601 may be provided on the insulating substrate 51, 61, and the second inclined portion 502, 602 may be provided across the insulating substrate 51, 61 and the back metal body 53, 63. In the present embodiment, the first inclined portion 501, 601 is provided across the insulating substrate 51, 61 and the back metal body 53, 63, and the second inclined portion 502, 602 is provided on the back metal body 53, 63. That is, the curved portion exists in the back metal body 53, 63. Therefore, even if the peeling occurring in the sealing body 30 progresses along the second inclined portion 502, 602 starting from the interface with the exposed surface 53b, 63b, the peeling can be suppressed from progressing to the interface with the insulating substrate 51, 61. This can suppress the concentration of thermal stress on the insulating base materials 51 and 61 and the reduction in insulation reliability. That is, the reliability can be further improved.

[0553] It is also possible to make a structure in which the first inclined portion 501, 601 is connected to the second inclined portion 502, 602. In the present embodiment, an intermediate portion 503, 603 is provided between the first inclined portion 501, 601 and the second inclined portion 502, 602. In this structure, the intermediate portion 503, 603 is a curved portion. By providing the intermediate portion 503, 603, as described above, even if both sides of the surface 51a, 61a of the insulating substrate 51, 61 and the exposed surface 53b, 63b of the back metal body 53, 63 are cut (cut) at the same time, the contact of the blades with each other can be avoided. In addition, since the intermediate portion 503, 603 is provided on the back metal body 53, 63, it is possible to suppress the peeling from progressing to the interface with the insulating substrate 51, 61 in the same manner as described above.

[0554] In the structure where the first inclined portions 501 and 601 are provided across the back metal bodies 53 and 63 from the insulating substrates 51 and 61, the inclination angles R1 of the back metal bodies 53 and 63 and the inclination angles R3 of the insulating substrates 51 and 61 can also be different. For example, when R1 < R3, the thermal stress concentrates on the ends of the insulating substrates 51 and 61 containing resin, so the insulation performance may deteriorate. When R1 > R3, the thermal stress may concentrate on the interface between the insulating substrates 51 and 61 and the back metal bodies 53 and 63, resulting in interface peeling. In the present embodiment, the inclination angle R1 and the inclination angle R3 are set to be substantially equal angles (R1 = R3). That is, in the first inclined portions 501 and 601, the inclined surfaces of the insulating substrates 51 and 61 are connected to the inclined surfaces of the back metal bodies 53 and 63 substantially coplanarly. The inclined surfaces of the insulating substrates 51 and 61 and the inclined surfaces of the back metal bodies 53 and 63 are continuously formed into a flat surface. Thereby, it is possible to suppress the concentration of thermal stress at the triple point of the sealed body 30, the insulating substrates 51 and 61, and the back metal bodies 53 and 63.

[0555] The inclination angle R4 of the second inclined portions 502 and 602 with respect to the exposed surfaces 53b and 63b can also be set to be equal to or greater than the inclination angle R5 of the side surface 30e (the second surface) with respect to the first surfaces 30a and 30b of the sealed body 30. In the present embodiment, the inclination angle R4 is made smaller than the inclination angle R5 (R4 < R5). As described in the prior embodiment (for example, refer to Fig.72 ), when the semiconductor element 40 generates heat, warping occurs in the semiconductor device 20. As described above, if a structure having a warped shape with high heat dissipation is adopted, peeling is likely to occur at the interface between the back metal bodies 53 and 63 and the sealed body 30 due to the warping convex in the Z direction. By adopting a structure that satisfies the relationship R4 < R5, even if peeling occurs, it is possible to suppress the back metal bodies 53 and 63 from detaching from the sealed body 30.

[0556] In the present embodiment, the exposed portion 510 of the insulating substrate 51 as the first exposed portion and the exposed portion 610 of the insulating substrate 61 as the second exposed portion overlap each other in a plan view in the Z direction. Thereby, it is possible to suppress the imbalance in the arrangement of the surface metal body 52 of the substrate 50 as the first substrate and the surface metal body 62 of the substrate 60 as the second substrate, and further suppress the imbalance in the warping of the semiconductor device 20. It is possible to suppress the case where peeling is likely to occur at the interface between the back metal bodies 53 and 63 and the sealed body 30 on the side where the deformation is large due to warping bias.

[0557] In the present embodiment, the first inclined portion 501 and the second inclined portion 502 have cutting marks 501a and 502a along the circumferential direction. The cutting marks 501a and 502a cause an anchoring effect, and the close contact with the sealing body 30 becomes higher. Thus, it is possible to suppress the sealing body 30 from peeling off from the stacked bodies 500 and 600. In addition, it is also possible to provide a cutting mark along the circumferential direction only on one side of the first inclined portion 501 and the second inclined portion 502. In the present embodiment, since the middle portion 503 also has a concave-convex portion 503a, it is possible to expect the peeling suppression brought about by the anchoring effect.

[0558] <Modification>

[0559] The example of the semiconductor device 20 having a double-sided heat dissipation structure including a pair of substrates 50 and 60 is shown, but the present invention is not limited thereto. The present invention can also be applied to a semiconductor device 20 having a single-sided heat dissipation structure including only a substrate 50 connected to the drain electrode 40D (first main electrode). In the structure including a pair of substrates 50 and 60, the above-mentioned structure (V-cut shape) can also be applied to only one of the substrates 50 and 60.

[0560] Although the semiconductor device 20 is shown as an example including the semiconductor elements 40H and 40L, the present invention is not limited thereto and may include only the semiconductor element 40 constituting one arm. The semiconductor device 20 may include, for example, only one semiconductor element 40 .

[0561] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, the sixth embodiment, the seventh embodiment, the eighth embodiment and the modified examples.

[0562] (10th embodiment)

[0563] This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be cited. In order to improve the connection reliability, as described in this embodiment, the sintered components as the bonding material may be arranged in a predetermined manner.

[0564] <Semiconductor Device>

[0565] First, based on Fig.89 The semiconductor device 20 according to the present embodiment will be described. Fig.89 is with Figure 5 The corresponding cross-sectional view. Fig.89 In the figure, for convenience, the external connection terminal 90 is omitted.

[0566] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 13 ) has the same structure. Fig.89 As shown, the semiconductor device 20 includes a semiconductor element 40 (40H, 40L), substrates 50, 60 as wiring components arranged in a manner to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 as the first wiring component is connected to the drain electrode 40D as the first main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 as the second wiring component is connected to the source electrode 40S as the second main electrode of the semiconductor element 40 via the conductive spacer 70 as the second wiring component. The sealing body 30 seals the semiconductor element 40, the substrates 50, 60 and the conductive spacer 70. The source electrode 40S and the conductive spacer 70 are bonded by the sintered component 101A as the bonding material 101.

[0567] <Semiconductor Components>

[0568] Next, based on Fig.90 and Fig.91 The semiconductor element 40 will be described. Fig.90 It is a plan view showing the semiconductor element 40 (40H). Fig.91 Yes Fig.89 Figure 1. The XCI region is enlarged.

[0569] Fig.91 is with Fig.90 The cross-sectional view corresponding to the XCI-XCI line. Fig.91 In FIG. 4 , the semiconductor element 40H is illustrated, but the semiconductor element 40L also has the same structure, so the semiconductor element 40 will be described below.

[0570] As described above, the semiconductor element 40 has a semiconductor substrate 41 on which a switching element is formed. The planar shape of the semiconductor substrate 41 is approximately rectangular. The drain electrode is provided on one side of the semiconductor substrate 41, and the source electrode 40S and the pad 40P are provided on the back side of the semiconductor substrate 41. The source electrode 40S has a multilayer structure. The source electrode 40S has a base electrode 42 and a connection electrode 43. The pad 40P also has the same structure as the source electrode 40S.

[0571] The semiconductor element 40 also has a protective film 44. The protective film 44 is an insulating film provided on the back side of the semiconductor substrate 41 in a manner that covers the peripheral portion of the source electrode 40S. As a material of the insulating film, for example, polyimide, silicon nitride film, etc. can be used. The protective film 44 has an opening 440 that defines a connection region in the source electrode 40S. The opening 440 exposes the source electrode 40S so that it can be bonded. The protective film 44 has an opening 441 that defines a connection region in the pad 40P. The openings 440 and 441 are both through holes that penetrate the protective film 44 in the Z direction. In the source electrode 40S (connection electrode 43), the portion exposed from the opening 440 of the protective film 44 forms a bonding portion with the sintered component 101A.

[0572] The protective film 44 of this embodiment is made of polyimide. The protective film 44 covers the peripheral edge portion 420 of the base electrode 42, which will be described later. The protective film 44 is not provided in, for example, a dicing region within a predetermined range from the outer peripheral end of the semiconductor substrate 41. The opening shape of the opening 440, that is, the inner peripheral surface 442 of the protective film 44 defining the opening 440, is roughly rectangular in plan shape. The inner peripheral surface 442 is sometimes referred to as an inner peripheral end or an opening end.

[0573] The base electrode 42 is a metal layer formed adjacent to the semiconductor substrate 41 in the source electrode 40S of the multilayer structure. The base electrode 42 is sometimes referred to as a lower electrode, a lower electrode, a wiring electrode, a base layer, a first metal layer, etc. The base electrode 42 is connected to the back surface of the semiconductor substrate 41. The base electrode 42 is formed using a material having Al (aluminum) as a main component, for example. In the present embodiment, an AlSi-based alloy such as AlSi and AlSiCu is used as the material.

[0574] In plan view, the base electrode 42 encloses the element region (active region) (not shown) of the semiconductor substrate 41 and extends to the peripheral region surrounding the element region. The peripheral portion 420 of the base electrode 42 has a substantially rectangular ring shape in plan view. The peripheral portion 420 is covered by a protective film 44.

[0575] The connection electrode 43 is stacked on the base electrode 42. The connection electrode 43 is also called an upper electrode, an upper electrode, an upper layer electrode, an upper layer, or a second metal layer. The connection electrode 43 contains at least a noble metal such as Au (gold), Ag (silver), Pt (platinum), or Pd (palladium) in order to be bonded to the sintered component 101A. The connection electrode 43 may contain a base metal together with the noble metal.

[0576] The connection electrode 43 of the present embodiment includes Ni (nickel). Ni is harder than the Al alloy constituting the base electrode 42. The connection electrode 43 includes Ni and a noble metal such as Au or Ag. The connection electrode 43 is formed into multiple layers by plating, for example. At least a portion of the noble metal of the connection electrode 43 diffuses into the sintered component 101A during bonding.

[0577] The connection electrode 43 is stacked on the base electrode 42 in the opening 440 of the protection film 44 . The entire periphery of the outer peripheral end of the connection electrode 43 is in contact with the inner peripheral surface 442 of the protection film 44 .

[0578] <Joint structure>

[0579] Next, based on Figure 90 to Figure 92 The bonding structure of the semiconductor element 40 will be described. Fig.90 In FIG. 1 , the outer peripheral end of the sintered component 101A is indicated by a dotted line, and the outer peripheral end of the conductive spacer 70 is indicated by a two-dot chain line. Fig.92 It is a cross-sectional view showing the arrangement of the sintered component 101A. Fig.92 Corresponds to Fig.91 Hereinafter, "inner side" and "outer side" represent relative positional relationships with the center of the semiconductor element 40 as a reference position. The side closer to the center is the inner side, and the side farther from the center is the outer side.

[0580] In the present embodiment, the substrate 60 and the conductive spacer 70 are wiring members (second wiring members) electrically connected to the source electrode 40S. Fig.90 and Fig.91 As shown, the sintered component 101A is interposed between the source electrode 40S of the semiconductor element 40 and the conductive spacer 70. The sintered component 101A bonds the source electrode 40S and the conductive spacer 70.

[0581] The sintered component 101A is made of Ag or Cu. The sintered component 101A is a sintered body formed of Ag particles or Cu particles. The sintered component 101A can be joined at a lower temperature than solder. Fig.92 As shown in FIG. 1 , the sintered component 101A is arranged at a predetermined distance L30 from the inner peripheral surface 442 of the protective film 44. Figure 90 to Figure 92 As shown, the sintered component 101A is arranged inside the inner peripheral surface 442. The planar shape of the sintered component 101A is, for example, substantially rectangular. The entire periphery of the outer peripheral end of the sintered component 101A is not in contact with the protective film 44. That is, the inner peripheral surface 442 of the protective film 44 encloses the sintered component 101A in plan view.

[0582] The conductive spacer 70 has a metal film (not shown) on the bonding surface with the sintered component 101A. The metal film contains at least a noble metal, similarly to the connection electrode 43. In the present embodiment, the metal film is a plated film containing Ni and a noble metal, such as Au or Ag.

[0583] like Figure 90 to Figure 92 As shown, the conductive spacer 70 is arranged on the inner side of the inner peripheral surface 442. The plane shape of the conductive spacer 70 is, for example, roughly rectangular. The outer peripheral end of the conductive spacer 70 is arranged on the outer side of the outer peripheral end of the sintered component 101A or roughly coincides with it when viewed in a plane. That is, the conductive spacer 70 is arranged in a manner that wraps the sintered component 101A or roughly coincides with the sintered component 101A when viewed in a plane. In this embodiment, the conductive spacer 70 wraps the sintered component 101A.

[0584] <Joining method>

[0585] Next, based on Fig.93 A method of forming the above-mentioned joint structure, that is, a joining method will be described. Fig.93 It is a cross-sectional view showing the joining method. Fig.93 Corresponds to Fig.91 .

[0586] In this embodiment, a sintered sheet 105 is used to form the sintered component 101A. The sintered sheet 105 is sometimes referred to as a sintered film. The sintered sheet 105 contains Ag or Cu. Fig.93 As shown, the sintered sheet 105 is disposed on the source electrode 40S (connection electrode 43) of the semiconductor element 40. The sintered sheet 105 has a predetermined size so as not to be in contact with the protective film 44 in plan view.

[0587] Next, the conductive spacer 70 is placed on the sintered sheet 105. And, while heating, pressure is applied from the conductive spacer 70 side by a pressurizing device (not shown). As a result, the sintered sheet 105 is compressed and expanded between the opposing surfaces of the connection electrode 43 and the conductive spacer 70 to become thinner, and is sintered to become a sintered component 101A. The size of the sintered sheet 105 is determined so that the sintered component 101A is in the above-mentioned predetermined positional relationship with respect to the inner peripheral surface 442 of the protective film 44 and the conductive spacer 70.

[0588] <Simulation results>

[0589] Fig.94 The results of thermal stress simulation are shown in FIG. 1. In this simulation, the strain amplitude generated in the base electrode 42 was measured in a power cycle test in which room temperature and 150° C. were alternately repeated. Fig.94 It shows the relationship between the distance L30 and the strain amplitude. Fig.94In FIG. 1 , the distance L30 is 0 (zero) and corresponds to the position that coincides with the inner peripheral surface 442 of the protective film 44 in plan view. A negative value of the distance L30 indicates the distance inward from the inner peripheral surface 442, and a positive value indicates the distance outward.

[0590] like Fig.94 As shown in FIG. 1 , it is clear that when the distance L30 is 5 μm or more, the strain amplitude generated in the base electrode 42 is substantially 0 (zero). In the present embodiment, based on this finding, the predetermined distance L30 is set to 5 μm.

[0591] <Summary of the Tenth Embodiment>

[0592] Fig.95 A connection structure using solder 101B as the bonding material 101 is shown. Fig.95 Corresponds to Fig.93 In the case of solder 101B, solder 101B is reflowed to perform bonding. During bonding, molten solder 101B wets and diffuses on the surface of connection electrode 43. Fig.95 As shown by the single-dot chain line in FIG. 1 , a triple point of the sealing body 30, the source electrode 40S (connection electrode 43), and the solder 101B (joining material 101) is formed. The thermal stress due to the difference in linear expansion coefficients is concentrated on the triple point. The thermal stress is concentrated on the portion directly below the outer peripheral end of the connection electrode 43 in the base electrode 42. As a result, cracks may be generated in the base electrode 42, and further damage may be generated in the semiconductor substrate 41.

[0593] In this embodiment, a sintered component 101A is used instead of the solder 101B. The sintered component 101A is formed by heating at a temperature lower than the melting point. The sintered component 101A does not become molten when joined, as does the solder 101B. The sintered component 101A has lower wettability to the connection electrode 43 and the conductive spacer 70 than the solder 101B. Therefore, the sintered component 101A does not wet and diffuse on the surface of the connection electrode 43 and the surface of the conductive spacer 70 when joined, as does the solder 101B.

[0594] Since the sintered component 101A is easily held at a predetermined position, it can be arranged at a predetermined distance L30 from the inner peripheral surface 442 of the protective film 44. Thus, a triple point of the sealing body 30, the source electrode 40S (connection electrode 43), and the sintered component 101A (joining material 101) is not formed. Therefore, it is possible to provide a semiconductor device 20 that suppresses the concentration of thermal stress and has high connection reliability. In addition, the sintered component 101A has a higher thermal conductivity than the solder 101B. Thus, the heat dissipation can also be improved.

[0595] The distance L30 is not particularly limited. The sintered component 101A may be at least spaced apart from the inner peripheral surface 442. In the present embodiment, the distance L30 between the sintered component 101A and the inner peripheral surface 442 of the protective film 44 is set to be 5 μm or more. This can effectively reduce the strain amplitude of the base electrode 42 caused by thermal stress. That is, the connection reliability can be further improved.

[0596] The positional relationship between the conductive spacer 70 and the sintered component 101A in plan view is not particularly limited. For example, the sintered component 101A may extend from the conductive spacer 70 in plan view. As described above, the sintered component 101A is formed by sintering Ag particles or Cu particles by heating / pressurizing. The portion extending from the conductive spacer 70 is not pressurized, so it is not sintered and remains, and there is a possibility that it will fall off as a conductive foreign matter. That is, a short circuit may occur.

[0597] In the present embodiment, in a planar view, the inner peripheral surface 442 of the protective film 44 encloses the conductive spacer 70, and the conductive spacer 70 is aligned with the sintered component 101A or encloses the sintered component 101A. Thus, the entire area of ​​the sintered component 101A (sintered sheet 105) before sintering can be pressurized through the conductive spacer 70. Therefore, the generation of sintering residue can be suppressed while avoiding contact between the sintered component 101A and the protective film 44.

[0598] <Modification>

[0599] Although the example of using the sintered sheet 105 to form the sintered component 101A is shown, the present invention is not limited thereto. For example, a sintered paste in which Ag particles or Cu particles are dispersed in a solvent may be used. The sintered sheet 105 is easier to hold at a predetermined position than a sintered paste.

[0600] The example in which the second wiring component connected to the source electrode 40S includes the substrate 60 as a wiring board and the conductive spacer 70 is shown, but the present invention is not limited to this. Instead of the conductive spacer 70, a convex portion may be provided on the surface metal body 62. That is, the second wiring component may be configured to include only the substrate 60 without the conductive spacer 70. In this case, the sintered component 101A is interposed between the front end surface of the convex portion of the surface metal body 62 and the source electrode 40S (connection electrode 43).

[0601] Although the example of the substrate 50 is shown as the first wiring component, the present invention is not limited thereto. A metal plate (lead frame) may be used instead of the substrate 50. Although the example of the substrate 60 is shown as the second wiring component, the present invention is not limited thereto. A metal plate (lead frame) may be used instead of the substrate 60. The second wiring component may also include a metal plate and a conductive spacer 70, and a convex portion may be provided on the metal plate instead of the conductive spacer 70.

[0602] Although the semiconductor device 20 is shown as an example including the semiconductor elements 40H and 40L, the present invention is not limited thereto and may include only the semiconductor element 40 constituting one arm. The semiconductor device 20 may include, for example, only one semiconductor element 40 .

[0603] The structure described in this embodiment can be combined with any of the structures described in the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, the fifth embodiment, the sixth embodiment, the seventh embodiment, the eighth embodiment, the ninth embodiment and the modified examples.

[0604] (11th embodiment)

[0605] This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be cited. In order to improve heat dissipation, as described in this embodiment, a sintered member can be used in the joint between the main electrode and the wiring member.

[0606] <Semiconductor Device>

[0607] First, based on Fig.96 The semiconductor device 20 according to the present embodiment will be described. Fig.96 is with Figure 5 The corresponding cross-sectional view. Fig.96 In the figure, for convenience, the external connection terminal 90 is omitted.

[0608] The semiconductor device 20 of this embodiment has the same structure as described in the previous embodiment (see Figure 2 to Figure 13 ) has the same structure. Fig.96 As shown, the semiconductor device 20 includes a semiconductor element 40 (40H, 40L), substrates 50, 60 as wiring components arranged in a manner to sandwich the semiconductor element 40 in the Z direction, and a sealing body 30. The surface metal body 52 of the substrate 50 is connected to the drain electrode 40D as the first main electrode of the semiconductor element 40. The surface metal body 62 of the substrate 60 is connected to the source electrode 40S as the second main electrode of the semiconductor element 40 via a conductive spacer 70. The sealing body 30 seals the semiconductor element 40, the substrates 50, 60 and the conductive spacer 70. The drain electrode 40D and the surface metal body 52 of the substrate 50 are bonded by a sintered component 100A as a bonding material 100.

[0609] <Configuration of sintered parts and uneven oxide films>

[0610] Next, based on Figure 97 to Figure 99 The arrangement of the sintered component 100A and the uneven oxide film 520 with respect to the semiconductor element 40 will be described. Fig.97 Yes Fig.96Region XCVII is enlarged in the figure. Fig.98 It is a plan view showing the positional relationship among the semiconductor element 40 , the sintered component 100A, and the uneven oxide film 520 . Fig.99 Yes Fig.97 Region XCVIX is enlarged in the figure.

[0611] like Fig.97 and Fig.98 As shown, the upper surface 52a of the surface metal body 52 has a mounting portion 529a, an outer peripheral portion 529b, and an intermediate portion 529c. The concavo-convex oxide film 520 is not provided on the mounting portion 529a, but is provided on the outer peripheral portion 529b and the intermediate portion 529c.

[0612] The mounting portion 529a includes a portion overlapping with the semiconductor element 40 (drain electrode 40D) in a planar view in the Z direction, and is a portion joined to the drain electrode 40D via the sintered component 100A. The peripheral portion 529b includes a portion that is closer to the outside than the peripheral end 402 of the semiconductor element 40 in a planar view, and is a portion that surrounds the semiconductor element 40. The middle portion 529c is a portion between the mounting portion 529a and the peripheral portion 529b, and surrounds the mounting portion 529a. In the present embodiment, the mounting portion 529a is roughly consistent with the semiconductor element 40 (drain electrode 40D) in a planar view. The planar shape of the middle portion 529c is roughly rectangular ring-shaped, and the inner peripheral end of the middle portion 529c is roughly consistent with the peripheral end 402 of the semiconductor element 40. The entire area of ​​the middle portion 529c is located outside the semiconductor element 40 in a planar view.

[0613] like Figure 97 to Figure 99 As shown, the surface metal body 52 of the substrate 50 is different from the structure described in the previous embodiment (refer to Fig.67 and Fig.74 ) Similarly, it has a concave-convex oxide film 520. Fig.99 As shown, the surface metal body 52 includes a base material 521 , a metal film 522 and a concavo-convex oxide film 520 provided on the surface of the base material 521 .

[0614] The metal film 522 of this embodiment has a base film mainly composed of Ni, and an upper film mainly composed of a noble metal such as Au or Ag that can be bonded to the sintered component 100A. Specifically, a Ni-plated film and an Au-plated film containing P are used as the base film. A plurality of recesses 523 are formed in the peripheral portion 529b of the upper surface 52a of the metal film 522. No recess 523 is formed in the mounting portion 529a and the middle portion 529c. In the portion where the recess 523 is not formed, the film thickness of the metal film 522 is, for example, about 10 μm. That is, the film thickness before laser irradiation is about 10 μm. The recess 523 is formed by irradiation of a pulsed laser. One recess 523 is formed for each pulse. In the peripheral portion 529b, the surface of the metal film 522 is scaly due to the plurality of recesses 523. The peripheral portion 529b is the irradiation area of ​​the laser, and the mounting portion 529a and the middle portion 529c are the non-irradiation areas.

[0615] The concave-convex oxide film 520 is formed on the metal film 522. The concave-convex oxide film 520 is not formed on the mounting portion 529a, but is formed on the peripheral portion 529b and the middle portion 529c of the mounting portion 529a. As described in the previous embodiment, the concave-convex oxide film 520 is formed by irradiating the metal film 522 with laser. The concave-convex oxide film 520 is a laser irradiated film formed by irradiation of laser. The main component of the concave-convex oxide film 520 is the oxide of the main component metal of the metal film 522.

[0616] In the peripheral portion 529b, i.e., the laser irradiation area, the average film thickness of the concave-convex oxide film 520 is 10nm to several hundred nm. The concave-convex oxide film 520 is formed by imitating the concave-convex surface of the metal film 522 having the concave portion 523. In addition, on the surface of the concave-convex oxide film 520, concave-convexities are formed at a pitch finer than the width of the concave portion 523. That is, very fine concave-convexities (roughened portions) are formed. In other words, a plurality of convex portions 520a (columnar bodies) are formed at finer pitches. For example, the average width of the convex portions 520a is 1nm to 300nm, and the average spacing between the convex portions 520a is 1nm to 300nm. In addition, the average height of the convex portions 520a is 10nm to several hundred nm.

[0617] Since the concavoconvex oxide film 520 is formed by irradiating the metal film 522 with laser light and melting and evaporating the surface layer of the metal film 522, it is formed not only in the outer peripheral portion 529b which is the irradiation area of ​​the laser light, but also in the periphery (near) of the outer peripheral portion 529b. In this embodiment, the concavoconvex oxide film 520 is formed in the entire area of ​​the middle portion 529c in the non-irradiation area of ​​the laser light, and the concavoconvex oxide film 520 is not formed in the mounting portion 529a. The width of the middle portion 529c having the concavoconvex oxide film 520 in the entire area is, for example, 0.2 mm to 0.3 mm.

[0618] The average film thickness of the concave-convex oxide film 520 in the middle portion 529c is thinner than the average film thickness of the concave-convex oxide film 520 in the peripheral portion 529b, and thicker than the natural oxide film, because it is not directly irradiated with laser. Specifically, it is 0.1nm to 10nm. In addition, the height of the convex portion 520a on the surface of the concave-convex oxide film 520 is also lower than that of the peripheral portion 529b. Specifically, it is 0.1nm to 10nm. In addition, the average width and average spacing of the convex portion 520a are the same as those of the peripheral portion 529b.

[0619] In this way, the concave-convex oxide film 520 has a thick film portion 520X and a thin film portion 520Y. The thick film portion 520X is a portion of the concave-convex oxide film 520 that is arranged in the laser irradiation area, that is, the peripheral portion 529b. The thin film portion 520Y is a portion of the concave-convex oxide film 520 that is arranged in the laser non-irradiation area, that is, the middle portion 529c. Compared with the thick film portion 520X, the film thickness of the concave-convex oxide film 520 is thinner in the thin film portion 520Y, and the height of the convex portion 520a is lower. The thick film portion 520X is arranged in the peripheral portion 529b. The thin film portion 520Y is arranged in the middle portion 529c.

[0620] Since the height of the convex portion 520a of the thick film portion 520X is higher than that of the thin film portion 520Y, the sealing body 30 is entangled and an anchoring effect is generated. In addition, the contact area with the sealing body 30 is increased. As a result, the sealing body 30 is in close contact with the outer peripheral portion 529b. The thick film portion 520X is sometimes referred to as a roughened portion or a close contact portion.

[0621] The sintered component 100A is made of Ag or Cu, similar to the sintered component 101A described in the previous embodiment. The sintered component 100A is a sintered body formed of Ag particles or Cu particles. The sintered component 100A can be joined at a low temperature compared to solder. The sintered component 100A is formed by heating / pressurizing a sintered sheet or a sintered paste. The sintered component 100A extends outward from the outer peripheral end 402 of the semiconductor element 40 in plan view. The sintered component 100A is configured in a manner overlapping with the mounting portion 529a and the middle portion 529c in plan view. In the present embodiment, the outer peripheral end of the sintered component 100A is substantially consistent with the outer peripheral end of the middle portion 529c. The sintered component 100A overlaps with the entire area of ​​the mounting portion 529a and the entire area of ​​the middle portion 529c in plan view.

[0622] <Summary of 11th Implementation Method>

[0623] As described above, the middle portion 529c has the thin film portion 520Y of the uneven oxide film 520. The thin film portion 520Y makes the wettability of the middle portion 529c to solder lower than that of the mounting portion 529a. As a result, the solder is less likely to wet and spread from the mounting portion 529a to the middle portion 529c.

[0624] In this embodiment, a sintered component 100A is used instead of solder. The sintered component 100A is formed by heating at a temperature lower than the melting point. The sintered component 100A does not become molten like solder during joining. The sintered component 100A does not wet and diffuse on the surface of the surface metal body 52 like solder during joining.

[0625] The sintered component 100A is compressed and expanded between the opposing surfaces of the drain electrode 40D and the surface metal body 52 during pressure sintering. By being compressed and expanded, the sintered component 100A is arranged not only on the mounting portion 529a, but also on the middle portion 529c. The sintered component 100A is compressed and expanded by pressurization rather than by wetting and diffusion, so as to contact the thin film portion 520Y. Thus, not only the joint between the sintered component 100A and the mounting portion 529a functions as a heat dissipation path, but also the contact portion between the sintered component 100A and the middle portion 529c functions as a heat dissipation path. As a result, a semiconductor device 20 with high heat dissipation can be provided. In addition, the sintered component 100A has a higher thermal conductivity than solder. Thus, the heat dissipation can also be improved.

[0626] In addition, the height of the convex portion 520a of the thin film portion 520Y is lower than that of the thick film portion 520X. That is, the middle portion 529c has a lower adhesion to the sealing body 30 than the peripheral portion 529b. As a result, it is difficult for the sealing body 30 to be in close contact with the middle portion 529c. In the present embodiment, the sintered component 100A is in contact with the middle portion 529c. The sintered component 100A covers the portion with low adhesion in the upper surface 52a. Therefore, it is possible to suppress the sealing body 30 from peeling off from the upper surface 52a around (near) the semiconductor element 40. As a result, it is possible to suppress the thermal stress from being concentrated on the joint or drain electrode 40D of the sintered component 100A, thereby improving the connection reliability.

[0627] In this embodiment, the entire middle portion 529c is located outside the semiconductor element 40. As a result, the joint between the sintered component 100A and the mounting portion 529a can be enlarged. In addition, the contact portion between the sintered component 100A and the middle portion 529c located outside the semiconductor element 40 also functions as a heat dissipation path. Therefore, the heat dissipation can be further improved.

[0628] <Modification>

[0629] The example in which the sintered component 100A overlaps the entire area of ​​the middle portion 529c is shown, but the present invention is not limited thereto. The sintered component 100A may overlap at least a portion of the middle portion 529c. That is, the sintered component 100A may contact at least a portion of the thin film portion 520Y of the concave-convex oxide film 520. Thus, the heat dissipation path can be expanded and the heat dissipation performance can be improved.

[0630] The configuration of the middle portion 529c is not limited to the above example. The middle portion 529c may also have only a portion in the width direction outside the semiconductor element 40. If at least a portion in the width direction of the middle portion 529c is disposed outside the semiconductor element 40, the joint portion can be enlarged and the heat dissipation path can be enlarged. Thus, heat dissipation can be improved.

[0631] In addition, at least a portion of the middle portion 529c in the width direction may be located inside the outer peripheral end 402 of the semiconductor element 40. Thus, the heat dissipation can be improved by the contact between the sintered component 100A and the thin film portion 520Y (middle portion 529c), and the position of the outer peripheral portion 529b can be brought closer to the semiconductor element 40. That is, the peeling of the sealing body 30 around the semiconductor element 40 can be suppressed.

[0632] exist Fig.100 and Fig.101 In the example shown, the middle portion 529c straddles the outer peripheral end 402 of the semiconductor element 40 in a plan view. That is, a portion of the middle portion 529c in the width direction is located outside the outer peripheral end 402, and another portion is located inside the outer peripheral end 402. The sintered component 100A overlaps the entire area of ​​the mounting portion 529a and the entire area of ​​the middle portion 529c in a plan view. As described above, it is possible to improve heat dissipation while suppressing the peeling of the sealing body 30 around the semiconductor element 40. Fig.100 and Fig.101 It is a figure which shows a modification example. Fig.100 Corresponds to Fig.97 , Fig.101 Corresponds to Fig.98 .

[0633] exist Fig.102 and Fig.103 In the example shown, the outer peripheral end of the middle portion 529c is substantially consistent with the outer peripheral end 402 of the semiconductor element 40 in plan view. The outer peripheral end of the sintered component 100A is also substantially consistent with the outer peripheral end 402 of the semiconductor element 40 in plan view. Thus, in plan view, the outer peripheral portion 529b (thick film portion 520X) is adjacent to the semiconductor element 40. Thus, the heat dissipation can be improved by the contact between the sintered component 100A and the middle portion 529c, and the peeling of the sealing body 30 around the semiconductor element 40 can be more effectively suppressed. Fig.102 and Fig.103 It is a figure which shows a modification example. Fig.102 Corresponds to Fig.97 , Fig.103 Corresponds to Fig.98 .

[0634] exist Fig.104In the example shown, a part of the outer peripheral portion 529b overlaps with the semiconductor element 40 in plan view. The intermediate portion 529c is located on the inner side than the outer peripheral end 402 of the semiconductor element 40. Fig.104 It is a figure which shows a modification example. Fig.104 Corresponds to Fig.98 In this case, the sintered component 100A may be in contact with only the thin film portion 520Y. The sintered component 100A may be in contact with the thin film portion 520Y and the portion of the thick film portion 520X directly below the semiconductor element 40 .

[0635] An example in which the concavo-convex oxide film 520 is pr...

Claims

1. A semiconductor device, characterized in that: have: A semiconductor element comprising a semiconductor substrate, a first main electrode provided on a high potential side of one surface of the semiconductor substrate, and a second main electrode provided on a low potential side of a back surface opposite to the one surface in a thickness direction; a first wiring member electrically connected to the first main electrode; a second wiring member disposed between the first wiring member and the semiconductor element in the plate thickness direction and connected to the second main electrode; as well as a bonding material interposed between the second main electrode and the second wiring member to bond the second main electrode to the second wiring member; The bonding material is a multilayer structure including a sintered layer and a fragile layer, the Young's modulus and / or yield stress of the sintered layer is greater than that of the second main electrode, the fragile layer is adjacent to the sintered layer in the plate thickness direction, and the Young's modulus and / or yield stress of the fragile layer is less than that of the second main electrode; The fragile layer is a sintered body of particles of the same type as the sintered layer, and the intervals between the particles are larger than those in the sintered layer; The bonding material has a three-layer structure including the sintered layers at both ends in the plate thickness direction and the fragile layer between the sintered layers.

2. The semiconductor device according to claim 1, wherein The second main electrode includes a base electrode formed on the back surface of the semiconductor substrate and a connection electrode formed on the base electrode; The base electrode contains aluminum and silicon.

3. The semiconductor device according to claim 1 or 2, wherein: The second wiring component comprises a wiring board and a conductive spacer interposed between the semiconductor element and the wiring board; The bonding material bonds the second main electrode and the conductive spacer.

Citation Information

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