Neutral-point balance control circuit and method for three-level direct-current converter with bidirectional energy flow

Abstract

According to the neutral-point balance control circuit and method for the three-level direct-current converter, the phenomenon of neutral-point drift can be prevented in the working process of the converter, and the neutral-point potential is stabilized to be one half of the bus voltage. The circuit comprises a bus voltage source (UH) arranged on a high-voltage side, an upper bridge arm voltage dividing capacitor (C1), a lower bridge arm voltage dividing capacitor (C2), a first switching tube (S1), a second switching tube (S2), a third switching tube (S3), a fourth switching tube (S4) and an LC filter, wherein the first switching tube (S1), the second switching tube (S2), the third switching tube (S3) and the fourth switching tube (S4) are connected in series; the method comprises the following steps: respectively collecting the output current IL of the output end of the LC filter and the voltage of the first voltage-dividing capacitor (C1) and the voltage of the second voltage-dividing capacitor (C2), calculating the compensation amount through a PID regulator, compensating the PWM duty ratio of the upper and lower bridge arms of the converter, and stabilizing the neutral-point voltage to be half of the high-voltage side voltage. The invention can be applied to the technical field of power electronics.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and in particular to a midpoint balance control circuit and method for a three-level DC converter with bidirectional energy flow. Background Art

[0002] Compared with the two-level DCDC converter, the three-level DCDC converter has made innovations in the circuit structure, reducing the voltage stress on the inductor and the switching device, reducing the loss on the switching device, and improving the overall efficiency of the system. At the same switching frequency, the voltage switching frequency of the three-level DCDC converter is twice that of the two-level DCDC converter, and the voltage pulsation amplitude is reduced to half of the two-level DCDC converter. The use of the three-level DCDC structure can reduce the volume of the filter, which is conducive to the miniaturization of the equipment and can greatly reduce the ripple of the output current. Therefore, the three-level DCDC converter is more suitable for high-voltage and high-power applications. However, due to the problem of circuit structure, during the operation of the three-level DCDC converter, the midpoint potential of the voltage divider capacitor may drift with the switching action and load changes, which will cause uneven voltage stress on the switching device and increase the output voltage ripple, affecting the reliability of the converter. Summary of the invention

[0003] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and provide a midpoint balance control circuit and method for a three-level DC converter with bidirectional energy flow, which can prevent midpoint drift during converter operation and stabilize the midpoint potential at half of the bus voltage.

[0004] The technical solution adopted by the midpoint balance control circuit of the three-level DC converter with bidirectional energy flow described in the present invention is that the circuit includes a bus voltage source arranged on the high voltage side, an upper bridge arm voltage-dividing capacitor, a lower bridge arm voltage-dividing capacitor, four first switching tubes, a second switching tube, a third switching tube, a fourth switching tube and an LC filter connected in series, the upper bridge arm voltage-dividing capacitor and the lower bridge arm voltage-dividing capacitor are connected in series to the bus voltage source, the drain of the first switching tube is connected to the positive electrode of the bus voltage source, the source of the second switching tube is connected to the midpoint of the voltage-dividing capacitor, the source of the first switching tube and the drain of the second switching tube are both connected to the positive electrode of the input end of the LC filter, the drain of the third switching tube is connected to the midpoint of the voltage-dividing capacitor, the source of the fourth switching tube is connected to the negative electrode of the bus voltage source, the source of the third switching tube and the drain of the fourth switching tube are both connected to the negative electrode of the input end of the LC filter, and the output end of the LC filter is connected to the load.

[0005] The LC filter includes an inductor and a filter capacitor.

[0006] The control method of the midpoint balance control circuit of the three-level DC converter with bidirectional energy flow as described above comprises the following steps: respectively collecting the output current I of the output end of the LC filter L The voltages of the first voltage-dividing capacitor and the second voltage-dividing capacitor are used to compensate the PWM duty cycle of the upper and lower bridge arms of the converter after the compensation amount is calculated by the PID regulator, so that the midpoint voltage is stabilized at half of the high-voltage side voltage.

[0007] The specific steps of this method are:

[0008] Step 1: Collect the output current I of the output end of the LC filter respectively L , the voltage of the upper bridge arm voltage-dividing capacitor and the voltage of the lower bridge arm voltage-dividing capacitor, respectively obtain the output current I L , the voltage U1 of the upper bridge arm voltage-dividing capacitor and the voltage U2 of the lower bridge arm voltage-dividing capacitor, then the error ΔU of the midpoint voltage of the two voltage-dividing capacitors is:

[0009] ΔU=U1-U2 (1);

[0010] Step 2: After inputting the obtained error value ΔU between the upper bridge arm voltage-dividing capacitor and the lower bridge arm voltage-dividing capacitor into the PID regulator, a compensation value ΔD of the duty cycle is obtained. The calculation formula of the compensation value ΔD is as follows:

[0011]

[0012] Where t is time, Kp represents the proportional coefficient, Ki represents the integral coefficient, Kd represents the differential coefficient, ΔU(t) represents the current error, dt represents the integral variable is t, and dΔU(t) represents the error change rate;

[0013] Step 3: Calculate the upper bridge arm duty cycle D based on the duty cycle D set at power-on and the compensation value ΔD calculated in step 2 P and the lower bridge arm duty cycle D N :

[0014] When I L >=0:

[0015]

[0016] When I L <0 hours:

[0017]

[0018] Step 4: According to D P Generate PWM1, according to D NGenerate PWM4, in which PWM1 and PWM4 have a phase difference of 180°, and continue to generate PWM2 complementary to PWM1 and PWM3 complementary to PWM4. The corresponding first switch tube, second switch tube, third switch tube and fourth switch tube are controlled by PWM1, PWM2, PWM3 and PWM4 to perform switching actions, so that the midpoint potential is stabilized at half of the bus voltage.

[0019] The beneficial effect of the present invention is that, in the present invention, the midpoint voltage drift of the voltage-dividing capacitor is prevented by compensating the duty cycle of the upper bridge arm and the lower bridge arm, so that the voltage stress borne by the switching device is more uniform, the service life of the switching device is extended, the switching loss is reduced, and the ripple of the output voltage can be reduced, thereby improving the stability and reliability of the converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A circuit topology diagram of a midpoint balance control circuit of a three-level DC converter with bidirectional energy flow;

[0021] Figure 2 is a schematic diagram of a working state 1 of the converter;

[0022] Figure 3 is a schematic diagram of a working state 2 of the converter;

[0023] Figure 4 is a schematic diagram of a working state 3 of the converter;

[0024] Figure 5 is a schematic diagram of a working state 4 of the converter;

[0025] Figure 6 It is a control flow chart of the method of the present invention;

[0026] Figure 7 is a voltage waveform diagram of the voltage divider capacitor when the duty cycle of the upper and lower bridge arms is not compensated;

[0027] Figure 8 The voltage waveform of the voltage divider capacitor after compensating the duty cycle of the upper and lower bridge arms;

[0028] Fig. 9 This is the waveform of PWM when the duty cycle is 25%;

[0029] Fig.10 This is the waveform of PWM when the duty cycle is 75%. DETAILED DESCRIPTION

[0030] like Figures 1 to 10 As shown, in the present invention, the midpoint balance control circuit of the three-level DC converter with bidirectional energy flow includes a bus voltage source U arranged on the high voltage side.H , an upper bridge arm voltage-dividing capacitor C1, a lower bridge arm voltage-dividing capacitor C2, four series-connected first switch tubes S1, second switch tubes S2, third switch tubes S3, fourth switch tubes S4 and an LC filter, wherein the LC filter comprises an inductor L and a filter capacitor C3. The upper bridge arm voltage-dividing capacitor C1 and the lower bridge arm voltage-dividing capacitor C2 are connected in series to the bus voltage source U H The drain of the first switch tube S1 is connected to the bus voltage source U H The source of the second switch tube S2 is connected to the midpoint of the voltage-dividing capacitor, the source of the first switch tube S1 and the drain of the second switch tube are both connected to the positive electrode of the input end of the LC filter, the drain of the third switch tube S3 is connected to the midpoint of the voltage-dividing capacitor, and the source of the fourth switch tube S4 is connected to the bus voltage source U H The source of the third switch tube S3 and the drain of the fourth switch tube S4 are both connected to the negative electrode of the input end of the LC filter, and the output end of the LC filter is connected to the load.

[0031] In addition, the control method of the midpoint balance control circuit of the three-level DC converter with bidirectional energy flow as described above comprises the following steps: respectively collecting the output current I of the output end of the LC filter L The voltages of the first voltage-dividing capacitor C1 and the second voltage-dividing capacitor C2 are used to compensate the PWM duty cycle of the upper and lower bridge arms of the converter after the compensation amount is calculated by the PID regulator, so that the midpoint voltage is stabilized at half of the high-voltage side voltage. The specific steps of the method are:

[0032] Step 1: Collect the output current I of the output end of the LC filter respectively L , the voltage of the upper bridge arm voltage-dividing capacitor C1 and the voltage of the lower bridge arm voltage-dividing capacitor C2, respectively obtain the output current I L , the voltage U1 of the upper bridge arm voltage-dividing capacitor C1 and the voltage U2 of the lower bridge arm voltage-dividing capacitor C2, then the error ΔU of the midpoint voltage of the two voltage-dividing capacitors is:

[0033] ΔU=U1-U2 (1);

[0034] Step 2: After inputting the obtained error value ΔU between the upper bridge arm voltage-dividing capacitor C1 and the lower bridge arm voltage-dividing capacitor C2 into the PID regulator, a compensation value ΔD of the duty cycle is obtained. The calculation formula of the compensation value ΔD is as follows:

[0035]

[0036] Where t is time, Kp represents the proportional coefficient, Ki represents the integral coefficient, Kd represents the differential coefficient, ΔU(t) represents the current error, dt represents the integral variable is t, and dΔU(t) represents the error change rate;

[0037] Step 3: Calculate the upper bridge arm duty cycle D based on the duty cycle D set at power-on and the compensation value ΔD calculated in step 2 P and the lower bridge arm duty cycle D N :

[0038] When I L >=0:

[0039]

[0040] When I L <0 hours:

[0041]

[0042] Step 4: According to D P Generate PWM1, according to D N Generate PWM4, in which the phase difference between PWM1 and PWM4 is 180°, and continue to generate PWM2 complementary to PWM1 and PWM3 complementary to PWM4. The corresponding first switch tube S1, second switch tube S2, third switch tube S3 and fourth switch tube S4 are controlled by PWM1, PWM2, PWM3 and PWM4 respectively to perform switching actions, so that the midpoint potential is stabilized at half of the bus voltage.

[0043] During specific operation, when the first switch tube S1 and the fourth switch tube S4 are turned on, and the second switch tube S2 and the third switch tube S3 are turned off, or when the second switch tube S2 and the third switch tube S3 are turned on, and the first switch tube S1 and the fourth switch tube S4 are turned off, the working state of the circuit is as follows: Figure 3 and Figure 5 As shown, at this time, the midpoint voltage of the voltage divider capacitor remains unchanged.

[0044] When the first switch tube S1 and the third switch tube S3 are turned on, and the second switch tube S2 and the fourth switch tube S4 are turned off, the working state of the circuit is as follows: Figure 2 As shown, at this time, when I L >0, the voltage value of the upper bridge arm capacitor C1 decreases, and the voltage value of the lower bridge arm capacitor C2 increases. L When <0, the voltage value of the upper bridge arm capacitor C1 increases and the voltage value of the lower bridge arm capacitor C2 decreases.

[0045] When the second switch tube S2 and the fourth switch tube S4 are turned on, and the first switch tube S1 and the third switch tube S3 are turned off, the working state of the circuit is as follows: Figure 4 As shown, at this time, when IL >0, the voltage value of the upper bridge arm capacitor C1 increases, and the voltage value of the lower bridge arm capacitor C2 decreases. L When <0, the voltage value of the upper bridge arm capacitor C1 decreases and the voltage value of the lower bridge arm capacitor C2 increases.

[0046] Therefore, the midpoint potential of the voltage divider capacitor can be adjusted by compensating the duty cycle. L >0, increasing the duty cycle of the upper bridge arm and reducing the duty cycle of the lower bridge arm can increase the midpoint potential; increasing the duty cycle of the lower bridge arm and reducing the duty cycle of the upper bridge arm can decrease the midpoint potential. L When <0, the opposite is true.

[0047] like Figure 7 , Figure 8 As shown, when the duty cycle of the upper and lower bridge arms is not compensated, the midpoint voltage of the voltage-dividing capacitor will gradually shift. After compensating the duty cycle of the upper and lower bridge arms, the midpoint voltage can be stabilized at half of the high-voltage side voltage to ensure the normal operation of the converter.

[0048] When the duty cycle is 25%, the PWM waveform is as follows: Fig. 9 As shown, when the duty cycle is 75%, the PWM waveform is as follows Fig.10 shown.

[0049] The present invention provides a midpoint balance control method for a three-level DC converter with bidirectional energy flow applicable to the technical field of power battery performance detection. The method adopts a PID control strategy. Aiming at the phenomenon of midpoint voltage drift of a voltage-dividing capacitor on the high-voltage side during converter operation, the output current of the converter and the voltage of two voltage-dividing capacitors are collected. After the compensation amount is calculated through a PID loop, the PWM duty cycle of the upper and lower bridge arms of the converter is compensated to stabilize the midpoint voltage at half of the high-voltage side voltage, thereby improving the stability of the output voltage.

[0050] Finally, it should be emphasized that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various changes and modifications. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A three-level DC converter midpoint balance control circuit with bidirectional energy flow, characterized in that: The circuit includes a bus voltage source (U H ), an upper bridge arm voltage-dividing capacitor (C1), a lower bridge arm voltage-dividing capacitor (C2), four series-connected first switch tubes (S1), second switch tubes (S2), third switch tubes (S3), fourth switch tubes (S4) and an LC filter, wherein the upper bridge arm voltage-dividing capacitor (C1) and the lower bridge arm voltage-dividing capacitor (C2) are connected in series to the bus voltage source (U H ) is connected, and the drain of the first switch tube (S1) is connected to the bus voltage source (U H ), the source of the second switch tube (S2) is connected to the midpoint of the voltage-dividing capacitor, the source of the first switch tube (S1) and the drain of the second switch tube are both connected to the positive electrode of the input end of the LC filter, the drain of the third switch tube (S3) is connected to the midpoint of the voltage-dividing capacitor, the source of the fourth switch tube (S4) is connected to the bus voltage source (U H ), the source of the third switch tube (S3) and the drain of the fourth switch tube (S4) are both connected to the negative electrode of the input end of the LC filter, and the output end of the LC filter is connected to the load.

2. The midpoint balance control circuit of a three-level DC converter with bidirectional energy flow according to claim 1, characterized in that: The LC filter includes an inductor (L) and a filter capacitor (C3).

3. A control method for a midpoint balance control circuit of a three-level DC converter with bidirectional energy flow as claimed in claim 1, characterized in that: The method comprises the following steps: respectively collecting the output current I of the output end of the LC filter L The voltages of the first voltage-dividing capacitor (C1) and the second voltage-dividing capacitor (C2) are used to compensate the PWM duty cycle of the upper and lower bridge arms of the converter after the compensation amount is calculated by the PID regulator, so as to stabilize the midpoint voltage at half of the high-voltage side voltage.

4. The midpoint balance control method for a three-level DC converter with bidirectional energy flow according to claim 3, characterized in that: The specific steps of this method are: Step 1: Collect the output current I of the output end of the LC filter respectively L , the voltage of the upper bridge arm voltage-dividing capacitor (C1) and the voltage of the lower bridge arm voltage-dividing capacitor (C2), respectively obtain the output current I L , the voltage U1 of the upper bridge arm voltage-dividing capacitor (C1) and the voltage U2 of the lower bridge arm voltage-dividing capacitor (C2), then the error ΔU of the midpoint voltage of the two voltage-dividing capacitors is: ΔU=U1-U2 (1); Step 2: After inputting the obtained error value ΔU between the upper bridge arm voltage-dividing capacitor (C1) and the lower bridge arm voltage-dividing capacitor (C2) into the PID regulator, a compensation value ΔD of the duty cycle is obtained. The calculation formula of the compensation value ΔD is as follows: Where t is time, Kp represents the proportional coefficient, Ki represents the integral coefficient, Kd represents the differential coefficient, ΔU(t) represents the current error, dt represents the integral variable is t, and dΔU(t) represents the error change rate; Step 3: Calculate the upper bridge arm duty cycle D based on the duty cycle D set at power-on and the compensation value ΔD calculated in step 2 P and the lower bridge arm duty cycle D N : When I L >=0: When I L <0 hours: Step 4: According to D P Generate PWM1, according to D N Generate PWM4, where PWM1 and PWM4 have a phase difference of 180°, and continue to generate PWM2 complementary to PWM1 and PWM3 complementary to PWM4. PWM1, PWM2, PWM3, and PWM4 respectively control the corresponding first switch tube (S1), second switch tube (S2), third switch tube (S3), and fourth switch tube (S4) to perform switching actions, so that the midpoint potential is stabilized at half of the bus voltage.

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