A control method, control device and switching power supply
By constructing a frequency conversion control signal to adjust the frequency of the PFC circuit, the problems of high light-load loss and high power consumption near zero input voltage in the traditional CCM PFC control strategy are solved, and efficiency is improved under all operating conditions.
Patent Information
- Application Number
- CN202411882224.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-19
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2044-12-19
AI Technical Summary
Traditional CCM PFC control strategies result in high losses under light loads and high power consumption near zero input voltage.
By acquiring input voltage and output voltage feedback signals, a frequency conversion control signal is constructed to adjust the operating frequency of the PFC circuit, enabling multi-mode operation and adjusting the frequency according to changes in input voltage and load.
It improves the efficiency and power factor of PFC under all operating conditions, and reduces losses and power consumption under light loads.
Smart Images

Figure CN119675414B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to frequency conversion control, and particularly to a control method, control device, and switching power supply. Background Technology
[0002] Traditional CCM (Continuous On-Mode) PFC (Power Factor Correction) employs a fixed-frequency control strategy, where the frequency remains constant across the entire input voltage and output power range. However, the PFC input current exhibits a sinusoidal variation within one power frequency cycle, with higher input current under heavy load and lower input current under light load. This control strategy leads to two problems: firstly, under light load, the PFC circuit's frequency is the same as under heavy load, resulting in higher losses; secondly, near zero input voltage, where both current and input voltage are low, excessively high frequencies increase the PFC circuit's power consumption. Summary of the Invention
[0003] In view of this, the technical problem to be solved by the present invention is to provide a control method, control device and switching power supply, which at least to some extent solves one of the technical problems existing in the prior art.
[0004] As a first aspect of the present invention, the technical solution of the provided control method is as follows:
[0005] A control method applied to a power factor corrector, comprising:
[0006] The reference signal generation step generates a sinusoidal full-wave rectified signal with a fixed amplitude.
[0007] The input voltage detection step involves acquiring an input voltage sampling signal that characterizes the peak or effective value of the input voltage of the power factor corrector.
[0008] The output voltage feedback step involves acquiring an output voltage loop feedback signal that characterizes the magnitude of the output voltage of the power factor corrector.
[0009] The first signal acquisition step involves using the fixed-amplitude sinusoidal full-wave rectified signal as the first signal, or dividing the fixed-amplitude sinusoidal full-wave rectified signal by the input voltage sampling signal to obtain the first signal.
[0010] The second signal acquisition step involves multiplying the first coefficient by the first signal, multiplying the second coefficient by the output voltage loop feedback signal, and then adding the products of the two to obtain the second signal.
[0011] The third signal acquisition step involves multiplying the third coefficient by the output voltage loop feedback signal, and then dividing the resulting product by the input voltage sampling signal to obtain the third signal.
[0012] The frequency conversion function signal generation step involves generating a frequency conversion control signal based on the second signal and the third signal, and then generating a clock signal of a corresponding frequency based on the frequency conversion control signal. The clock signal is used to control the operating frequency of the main power switching transistor in the power factor corrector.
[0013] Wherein: when the second signal is greater than the third signal, the third signal is used as the frequency conversion control signal; when the second signal is less than or equal to the third signal, the second signal is used as the frequency conversion control signal.
[0014] Furthermore, the fixed-amplitude sinusoidal full-wave rectified signal is in the same frequency and phase as the input voltage sampling signal.
[0015] Furthermore, the fixed-amplitude sinusoidal full-wave rectified signal is obtained by one of the following means:
[0016] It is obtained by dividing the full-wave rectified signal of the instantaneous input voltage of the power factor corrector by the peak sampling signal of the input voltage of the power factor corrector;
[0017] It is obtained by dividing the full-wave rectified signal of the instantaneous input voltage of the power factor corrector by the sampled signal of the effective value of the input voltage of the power factor corrector;
[0018] It is generated by a fixed amplitude sinusoidal full-wave rectified signal generating circuit, and then phase-locked with the full-wave rectified signal of the input instantaneous voltage of the power factor corrector.
[0019] Furthermore, the second coefficient is set to 0.
[0020] Furthermore, the minimum frequency of the clock signal is greater than 20kHz.
[0021] As a second aspect of the present invention, the technical solution of the provided control device embodiment is as follows:
[0022] A control device for use in a power factor corrector, comprising:
[0023] The reference signal generation module is used to generate a fixed-amplitude sinusoidal full-wave rectified signal;
[0024] An input voltage detection module is used to acquire an input voltage sampling signal that characterizes the peak or effective value of the input voltage of the power factor corrector.
[0025] The output voltage feedback module is used to acquire the output voltage loop feedback signal that characterizes the magnitude of the output voltage of the power factor corrector;
[0026] The first signal acquisition module is used to take the fixed amplitude sinusoidal full-wave rectified signal as the first signal, or to divide the fixed amplitude sinusoidal full-wave rectified signal by the input voltage sampling signal as the first signal.
[0027] The second signal acquisition module is used to multiply the first coefficient by the first signal, multiply the second coefficient by the output voltage loop feedback signal, and then add the products of the two to obtain the second signal.
[0028] The third signal acquisition module is used to multiply the third coefficient by the output voltage loop feedback signal, and then divide the product by the input voltage sampling signal to obtain the third signal.
[0029] The frequency conversion function signal generation module is used to generate a frequency conversion control signal based on the second signal and the third signal, and then generate a clock signal of a corresponding frequency based on the frequency conversion control signal. The clock signal is used to control the operating frequency of the main power switching transistor in the power factor corrector.
[0030] Wherein: when the second signal is greater than the third signal, the third signal is used as the frequency conversion control signal; when the second signal is less than or equal to the third signal, the second signal is used as the frequency conversion control signal.
[0031] As a third aspect of the present invention, the technical solution of the provided switching power supply embodiment is as follows:
[0032] A switching power supply includes a power factor corrector, wherein: it further includes the control device described in any of the second aspects above.
[0033] The control method, device, and switching power supply of this invention first obtain a first signal through the input voltage of a power factor corrector (PFC), and then obtain a second and third signal through the output voltage of the PFC using different algorithms, thereby generating a corresponding frequency conversion control signal. That is, by constructing a curve that varies with the input voltage and load, the operating frequency of the PFC is controlled, achieving multi-mode operation within one power frequency cycle. The detailed working principle will be analyzed in conjunction with specific implementation methods. The beneficial effects of this invention compared to the prior art are as follows:
[0034] (1) The control method, device and switching power supply of the present invention can enable the switching frequency of CCM mode PFC to increase with the increase of input current or load within one power frequency cycle, and to work at a higher operating frequency when the input voltage is at its peak or under heavy load.
[0035] (2) The control method, device and switching power supply of the present invention operate at a lower frequency under light load and near zero input voltage, thereby improving the THD, efficiency and PF value of PFC under light load;
[0036] (3) The control method, device and switching power supply of the present invention can improve the efficiency of the switching power supply under all operating conditions. Attached Figure Description
[0037] Figure 1 The control block diagram for the existing CCM PFC average current type;
[0038] Figure 2 This is a schematic diagram illustrating a preferred frequency conversion control strategy of the present invention.
[0039] Figure 3a is Figure 2 Waveform of the first signal V1;
[0040] Figure 3b for Figure 2 Waveform of the first signal V1;
[0041] Figure 3c for Figure 2 Waveform of the second signal V2
[0042] Figure 3d for Figure 2 Chinese V fb A graph showing the relationship between load and load;
[0043] Figure 3e for Figure 2 Chinese V in-sense Waveforms at high and low input voltages;
[0044] Figure 3f for Figure 2 Waveform of the frequency converter control signal when K2=0;
[0045] Figure 3g for Figure 2 Waveform of the frequency converter control signal when K2≠0;
[0046] Figure 4 This is a schematic diagram of another preferred frequency conversion control strategy of the present invention;
[0047] Figure 5 is Figure 4 Waveform diagram of frequency converter control signal generation. Detailed Implementation
[0048] The present invention will now be described in further detail with reference to specific embodiments and accompanying drawings. In the following embodiments, many details are described to facilitate a better understanding of this application. However, those skilled in the art will readily recognize that some features may be omitted in different circumstances, or may be replaced by other elements, materials, or methods.
[0049] Furthermore, it should be understood that this disclosure can have various variations in different embodiments, all of which do not depart from the scope of this disclosure, and the descriptions and drawings herein are intended to illustrate these variations and not to limit this disclosure.
[0050] Furthermore, the serial numbers assigned to components in this document, such as "first" and "second," are merely for distinguishing the described objects and have no sequential or technical meaning. The terms "connection" and "linkage" used in this application, unless otherwise specified, include both direct and indirect connections (linkages).
[0051] like Figure 1 The diagram shows a CCM PFC implementation based on average current control. 101 is the average current loop, and 102 is the average current loop reference, obtained by multiplying the input voltage sample by the voltage loop output 104. 103 is the output voltage loop reference. The average inductor current is sampled via 105 and integrated with the average current loop reference to obtain the average current loop output. A fixed-frequency sawtooth wave is compared with the average current loop output and used as the turn-off trigger signal for the switching transistor, connected to the R terminal of the RS flip-flop. Simultaneously, 106 is a fixed-frequency clock signal, used as the turn-on trigger signal for the switching transistor, connected to the S terminal of the RS flip-flop to achieve CCM PFC control.
[0052] Because the frequency of this control remains constant across the entire input voltage and output power range, while the PFC input current varies sinusoidally within one power frequency cycle, with a large input current under heavy load and a small input current under light load, this control strategy leads to two problems. First, under light load, the PFC circuit's frequency is the same as under heavy load, resulting in higher losses in the PFC circuit under light load. Second, near zero input voltage, when both current and input voltage are low, an excessively high frequency will increase the PFC circuit's power consumption.
[0053] Given the above reasons, Figure 2 A better variable frequency control strategy is proposed; please refer to [link / reference]. Figure 2Wherein: 205 is a fixed-amplitude sinusoidal full-wave rectified signal, which can be obtained by dividing the instantaneous input voltage signal of the power factor corrector by the peak input voltage sampling signal, or by dividing the instantaneous input voltage signal of the power factor corrector by the effective input voltage sampling signal, or by generating a sinusoidal full-wave rectified signal generator circuit and then phase-locking it with the full-wave rectified signal of the power factor corrector's input instantaneous voltage. Its characteristic is that it is in phase and frequency with the signal after full-wave rectification of the input voltage; 204 is the peak input voltage sampling signal or the effective input voltage sampling signal V. in-sense Dividing 205 by 204 yields 201, which is the first signal V1. Since 205 is a fixed-amplitude sinusoidal full-wave rectified signal, the amplitude of V1 will decrease as the input voltage increases. 207 is the output V of the PFC voltage loop. fb Set coefficients K1 and K2, and add V to the product of K1 and V1. fb The product of K2 and V2 is used as the second signal V2; set a coefficient K3, and multiply K3 by V2. fb Divide by V in-sense The result is 203, which is the third signal V3. V3 is smaller under high voltage or light load, and larger under low voltage or heavy load. Finally, the second signal V2 and the third signal V3 are input to the frequency conversion function signal generation module. When the second signal V2 > the third signal V3, the frequency conversion function signal generation module outputs the third signal V3 as the frequency conversion control signal. When the second signal V2 ≤ the third signal V3, the frequency conversion function signal generation module outputs the second signal V2 as the frequency conversion control signal. Then, the frequency conversion clock generation module generates a clock signal of the corresponding frequency according to the frequency conversion control signal and the amplitude change of the frequency conversion control signal.
[0054] Figure 3 is Figure 2 Key waveforms during the process, such as Figure 3a As shown: 301 is a sinusoidal full-wave rectified signal with a fixed amplitude; Figure 3b This represents 301 divided by the peak value or RMS value of the input voltage sampling signal V. in-sense The first signal V1 obtained, Figure 3e For V in-sense The voltage signals corresponding to high and low input voltages. Here, an input voltage can be set, and the peak sampling signal or RMS value signal of the input voltage corresponds to V. in-sense When the input voltage is equal to 1, the 303 signal is the same as the 301 signal. When the input voltage is less than the set input voltage, the 302 signal corresponds to the first signal V1 waveform at this time. When the input voltage is greater than the set input voltage, the 304 signal corresponds to the first signal V1 waveform at this time.
[0055] Additionally, set coefficients K1 and K2, and add V to the product of K1 and V1. fbThe product of K2 and K2 is used as the second signal V2, where Figure 3d V was shown fb The relationship between V and load: under heavy load, V fb When the load is large and the load is small, V fb Small. Therefore, there are two possibilities for the second signal V2 at this point.
[0056] When K2=0, the second signal V2 differs from the first signal V1 by only one coefficient, K1, and its waveform is equivalent to... Figure 3b Multiply the waveform in the data by K1;
[0057] When K2≠0, such as Figure 3c As shown, the second signal V2 has a bias, which is higher under low voltage or heavy load as shown in 305, and lower under high voltage or light load as shown in 307. 306 is the second signal V2 when K2=0.
[0058] Set a coefficient K3, and multiply K3 by V. fb Divide by V in-sense The third signal V3 is obtained, according to V fb With V in-sense The waveform shows that V3 is smaller under high voltage or light load, and larger under low voltage or heavy load. The second signal V2 is compared with the third signal V3, and the third signal V3 is used to limit the second signal V2. When the second signal V2 > the third signal V3, the third signal V3 is used as the frequency converter control signal. When the second signal V2 ≤ the third signal V3, the second signal V2 is used as the frequency converter control signal. At this time, depending on whether K2 is equal to 0, there are two cases for the frequency converter control signal.
[0059] When K2=0, the frequency converter control signal is as follows: Figure 3f As shown, 308 is the frequency converter control signal when inputting low voltage or heavy load, and 309 is the frequency converter control signal when inputting high voltage or light load.
[0060] When K2≠0, the frequency converter control signal is as follows: Figure 3g As shown, 310 is the frequency converter control signal when inputting low voltage or heavy load, and 311 is the frequency converter control signal when inputting high voltage or light load.
[0061] The final controller generates a corresponding frequency clock signal based on the frequency conversion control signal. It should be noted that the minimum operating frequency is generally set above 20KHz. Therefore, this control strategy achieves a situation where the operating frequency of the CCM mode PFC circuit is high in the middle and low at both ends within one power frequency cycle. At the same time, the circuit operates at a high frequency under heavy load and a low frequency under light load.
[0062] besides, Figure 4Another better variable frequency control strategy is proposed; please refer to [link / reference]. Figure 4 Wherein: 401 is a fixed-amplitude sinusoidal full-wave rectified signal, which can be obtained by dividing the instantaneous input voltage signal of the power factor corrector by the peak input voltage sampling signal, or by dividing the instantaneous input voltage signal of the power factor corrector by the effective input voltage sampling signal, or by generating a sinusoidal full-wave rectified signal generator circuit and then phase-locking it with the full-wave rectified signal of the power factor corrector's input instantaneous voltage. Its characteristic is that it is in phase and frequency with the signal after full-wave rectification of the input voltage; 401 is directly used as the first signal V1, and 405 is the output V of the PFC voltage loop. fb Set coefficients K1 and K2, and add V to the product of K1 and V1. fb The product of K2 and V2 is 402, which is the second signal V2; set a coefficient K3, and multiply K3 by V2. fb The result is 403, which is the third signal V3. V3 is smaller under high voltage or light load, and larger under low voltage or heavy load. Finally, the second signal V2 and the third signal V3 are input to the frequency conversion function signal generation module: when the second signal V2 > the third signal V3, the frequency conversion function signal generation module outputs the third signal V3 as the frequency conversion control signal; when the second signal V2 ≤ the third signal V3, the frequency conversion function signal generation module outputs the second signal V2 as the frequency conversion control signal. Then, the frequency conversion clock generation module generates a clock signal of the corresponding frequency according to the amplitude change of the frequency conversion control signal 404.
[0063] Figure 5 is Figure 4 Key waveforms during the process, such as Figure 5a As shown, 501 is a fixed-amplitude sinusoidal full-wave rectified signal. Here, 501 is directly used as the first signal V1. Figure 5d V was shown fb Depending on the load, V increases under heavy load. fb When the load is large and the load is small, V fb Small. At the same time Figure 5e This demonstrates V under the same load. fb Depending on the input voltage, when the input voltage is low, V fb When the input voltage is large and small, V fb Small. Additionally, set coefficients K1 and K2, and add V to the product of K1 and V1. fb The product of K2 and K2 is used as the second signal V2.
[0064] Therefore, there are two possibilities for the second signal V2.
[0065] When K2=0, such as Figure 5b As shown, the second signal V2 differs from the first signal V1 by only one coefficient, K1, and its waveform is equivalent to... Figure 5a The waveform is multiplied by K1. When K1=1, it corresponds to 503; when K1>1, it corresponds to 502; and when K1<1, it corresponds to 503.
[0066] When K2≠0, such as Figure 5c As shown, the second signal V2 has a bias, which is higher under low voltage or heavy load as shown in 505, and lower under high voltage or light load as shown in 507. 506 is the second signal V2 when K2=0.
[0067] Set a coefficient K3, and multiply K3 by V. fb The third signal V3 is obtained, according to V fb With V in-sense The waveform shows that V3 is smaller under high voltage or light load, and larger under low voltage or heavy load. The second signal V2 is compared with the third signal V3, and the third signal V3 is used to limit the second signal V2. When the second signal V2 > the third signal V3, the third signal V3 is used as the frequency converter control signal. When the second signal V2 ≤ the third signal V3, the second signal V2 is used as the frequency converter control signal. At this time, depending on whether K2 is equal to 0, there are two cases for the frequency converter control signal.
[0068] When K2=0, the frequency converter control signal is as follows: Figure 5f As shown, 508 is the frequency converter control signal when inputting low voltage or heavy load, and 509 is the frequency converter control signal when inputting high voltage or light load.
[0069] When K2≠0, the frequency converter control signal is as follows: Figure 5g As shown, 510 is the frequency converter control signal when inputting low voltage or heavy load, and 511 is the frequency converter control signal when inputting high voltage or light load.
[0070] The final controller generates a corresponding frequency clock signal based on the frequency conversion control signal. It should be noted that the minimum operating frequency is generally set above 20KHz. Therefore, this control strategy achieves a situation where the operating frequency of the CCM mode PFC circuit is high in the middle and low at both ends within one power frequency cycle. At the same time, the circuit operates at a high frequency under heavy load and a low frequency under light load.
[0071] Based on the frequency conversion control method, control device and switching power supply provided by the present invention, it is possible to realize that CCM PFC operates at different frequencies within one power frequency cycle, and the operating frequency is changed accordingly according to the change of input voltage and output load, which can greatly improve the working efficiency of the circuit.
[0072] Although the invention has been described with reference to several exemplary embodiments, it should be understood that the terminology used is descriptive and exemplary, and not restrictive. Since the invention can be embodied in many forms without departing from the spirit or nature of the invention, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims. Therefore, all variations and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.
Claims
1. A control method applied to a power factor corrector, characterized in that, include: The reference signal generation step generates a sinusoidal full-wave rectified signal with a fixed amplitude. The input voltage detection step involves acquiring an input voltage sampling signal that characterizes the peak or effective value of the input voltage of the power factor corrector. The output voltage feedback step involves acquiring an output voltage loop feedback signal that characterizes the magnitude of the output voltage of the power factor corrector. The first signal acquisition step involves using the fixed-amplitude sinusoidal full-wave rectified signal as the first signal, or dividing the fixed-amplitude sinusoidal full-wave rectified signal by the input voltage sampling signal to obtain the first signal. The second signal acquisition step involves multiplying the first coefficient by the first signal, multiplying the second coefficient by the output voltage loop feedback signal, and then adding the products of the two to obtain the second signal. In the third signal acquisition step, when the first signal is the fixed-amplitude sinusoidal full-wave rectified signal, the third coefficient is multiplied by the output voltage loop feedback signal to obtain the third signal; when the first signal is the fixed-amplitude sinusoidal full-wave rectified signal divided by the input voltage sampling signal, the third coefficient is multiplied by the output voltage loop feedback signal, and the resulting product is then divided by the input voltage sampling signal to obtain the third signal. The frequency conversion function signal generation step involves generating a frequency conversion control signal based on the second signal and the third signal, and then generating a clock signal of a corresponding frequency based on the frequency conversion control signal. The clock signal is used to control the operating frequency of the main power switching transistor in the power factor corrector. Wherein: when the second signal is greater than the third signal, the third signal is used as the frequency conversion control signal; when the second signal is less than or equal to the third signal, the second signal is used as the frequency conversion control signal.
2. The control method according to claim 1, characterized in that: The fixed-amplitude sinusoidal full-wave rectified signal is in the same frequency and phase as the input voltage sampling signal.
3. The control method according to claim 1, characterized in that, The fixed-amplitude sinusoidal full-wave rectified signal is obtained by one of the following means: It is obtained by dividing the full-wave rectified signal of the instantaneous input voltage of the power factor corrector by the peak sampling signal of the input voltage of the power factor corrector; It is obtained by dividing the full-wave rectified signal of the instantaneous input voltage of the power factor corrector by the sampled signal of the effective value of the input voltage of the power factor corrector; It is generated by a fixed amplitude sinusoidal full-wave rectified signal generating circuit, and then phase-locked with the full-wave rectified signal of the input instantaneous voltage of the power factor corrector.
4. The control method according to claim 1, characterized in that: The second coefficient is set to 0.
5. The control method according to claim 1, characterized in that: The minimum frequency of the clock signal is greater than 20kHz.
6. A control device applied to a power factor corrector, characterized in that, include: The reference signal generation module is used to generate a fixed-amplitude sinusoidal full-wave rectified signal; An input voltage detection module is used to acquire an input voltage sampling signal that characterizes the peak or effective value of the input voltage of the power factor corrector. The output voltage feedback module is used to acquire the output voltage loop feedback signal that characterizes the magnitude of the output voltage of the power factor corrector; The first signal acquisition module is used to take the fixed amplitude sinusoidal full-wave rectified signal as the first signal, or to divide the fixed amplitude sinusoidal full-wave rectified signal by the input voltage sampling signal as the first signal. The second signal acquisition module is used to multiply the first coefficient by the first signal, multiply the second coefficient by the output voltage loop feedback signal, and then add the products of the two to obtain the second signal. The third signal acquisition module is used to multiply the third coefficient by the output voltage loop feedback signal to obtain the third signal when the first signal is the fixed amplitude sinusoidal full-wave rectified signal; and to multiply the third coefficient by the output voltage loop feedback signal and divide the resulting product by the input voltage sampling signal to obtain the third signal when the first signal is the fixed amplitude sinusoidal full-wave rectified signal divided by the input voltage sampling signal. The frequency conversion function signal generation module is used to generate a frequency conversion control signal based on the second signal and the third signal, and then generate a clock signal of a corresponding frequency based on the frequency conversion control signal. The clock signal is used to control the operating frequency of the main power switching transistor in the power factor corrector. Wherein: when the second signal is greater than the third signal, the third signal is used as the frequency conversion control signal; when the second signal is less than or equal to the third signal, the second signal is used as the frequency conversion control signal.
7. A switching power supply, comprising a power factor corrector, characterized in that: It also includes the control device as described in claim 6.
Citation Information
Patent Citations
High-efficiency wide-limit programmable inverter power supply device and control method thereof
CN107425735A
Improved VMC LLC resonant PFC converter control system and design method thereof
CN115566907A