A gold-free ohmic contact electrode and its preparation method

Abstract

This invention provides a gold-free ohmic contact electrode and its fabrication method. It includes, from bottom to top, a substrate layer, a buffer layer, an insertion layer, a barrier layer, a GaN cap layer, and a passivation layer. The passivation layer includes a first passivation layer and a second passivation layer. The first and second passivation layers are symmetrically disposed on both sides of the upper surface of the GaN cap layer. A gate is disposed on the upper surface of the passivation layer and partially covers the first and second passivation layers. A first n+-InGaN layer and a second n+-InGaN layer are symmetrically disposed on both sides of the upper surface of the buffer layer, and the first and second n+-InGaN layers are in contact with the sides of the insertion layer, barrier layer, and GaN cap layer. A source electrode is disposed inside the first n+-InGaN layer. A drain electrode is disposed inside the second n+-InGaN layer. Both the drain and source electrodes include a metal Ti layer and a metal TiN layer. The metal Ti layer is disposed close to the substrate layer.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to a gold-free ohmic contact electrode and its preparation method. Background Technology

[0002] With the rapid development of semiconductor technology, third-generation semiconductor materials such as gallium nitride (GaN) have shown great application potential in the field of power devices due to their excellent electrical properties. In particular, high electron mobility transistors (HEMTs) based on aluminum gallium nitride / gallium nitride (AlGaN / GaN) heterojunction structures have become a research hotspot in the fields of solid-state microwave power devices and power electronic devices due to their high frequency, high power density, and high operating temperature. For high-performance GaN devices, good ohmic contact is an indispensable key factor, directly affecting the device's conductivity and reliability. In current production practices, silicon (Si) has become the mainstream choice for GaN epitaxial growth substrates to improve manufacturing efficiency and reduce costs. However, integrating GaN HEMT fabrication processes with mature Si-CMOS process lines presents a series of technical challenges.

[0003] To construct high-quality ohmic contacts, a high-temperature gold ohmic contact process based on a titanium / aluminum / nickel / gold (Ti / Al / Ni / Au) multilayer structure is traditionally employed. This process, through specific metal stacking and subsequent high-temperature annealing, effectively reduces ohmic contact resistance and forms a stable electrical contact interface. However, this technical approach has encountered significant obstacles in achieving compatibility with Si-CMOS process lines. The maturity and efficiency of Si-CMOS process lines require that any introduced materials and steps strictly adhere to established process specifications to avoid adversely affecting the overall process.

[0004] While the Ti / Al / Ni / Au high-temperature gold ohmic contact process has performed well in the fabrication of GaN HEMTs, its inherent limitations restrict compatibility with Si-CMOS process lines. Specifically, the introduction of the heavy metal gold (Au) not only increases production costs, but more importantly, it can lead to the formation of deep-level doping, causing Au contamination, which seriously threatens the device's performance and long-term stability. Furthermore, although the high-temperature annealing step helps form good ohmic contacts, it also promotes the formation of O and N defects on the GaN material surface, introducing deep-level interface states, further affecting the device's electrical performance and reliability. Therefore, how to maintain the performance of the ohmic contact electrode while avoiding the negative effects of the introduction of heavy metal Au and high-temperature annealing has become a key technical challenge in achieving compatibility between Si-based GaN HEMT device fabrication processes and Si-CMOS process lines. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention provides a gold-free ohmic contact electrode and its preparation method.

[0006] The technical problem to be solved by this invention is achieved through the following technical solution:

[0007] In a first aspect, the present invention provides a gold-free ohmic contact electrode, which has a bilaterally symmetrical structure and includes:

[0008] The layers arranged from bottom to top are: substrate layer, buffer layer, insertion layer, barrier layer, GaN cap layer, and passivation layer.

[0009] The passivation layer includes: a first passivation layer and a second passivation layer; the first passivation layer and the second passivation layer are symmetrically disposed on both sides of the upper surface of the GaN cap layer; the gate is disposed on the upper surface of the passivation layer and partially covers the first passivation layer and the second passivation layer;

[0010] The upper surface of the buffer layer is symmetrically provided with a first n+-InGaN layer and a second n+-InGaN layer, and the first n+-InGaN layer and the second n+-InGaN layer are in contact with the side of the insertion layer, the barrier layer and the GaN cap layer; the first n+-InGaN layer has a source electrode (9) inside; the second n+-InGaN layer has a drain electrode inside.

[0011] Both the drain and the source include: a first metal Ti layer and a second metal TiN layer; the first metal Ti layer is disposed close to the substrate layer (1); the first n+-InGaN layer and the second n+-InGaN layer are grown based on the ohmic regeneration process.

[0012] Optionally, the thickness of the first n+-InGaN layer and the second n+-InGaN layer is 50 nm.

[0013] Optionally, the first n+-InGaN layer has N sources internally;

[0014] N source electrodes are evenly distributed on the upper surface of the first n+-InGaN layer; N is a positive integer greater than or equal to 3.

[0015] Optionally, the second n+-InGaN layer has N drains inside;

[0016] N drain electrodes are evenly distributed on the upper surface of the second n+-InGaN layer; N is a positive integer greater than or equal to 3.

[0017] Optionally, the substrate layer is a Si substrate; the buffer layer is a GaN buffer layer.

[0018] Optionally, the insertion layer, barrier layer, and GaN cap layer have the same width;

[0019] The heights of the first n+-InGaN layer and the second n+-InGaN layer are the total heights of the insertion layer, the barrier layer, and the GaN cap layer.

[0020] In a second aspect, the present invention provides a method for preparing a gold-free ohmic contact electrode, corresponding to the gold-free ohmic contact electrode of the first aspect above, comprising:

[0021] S101. Obtain a substrate, and grow a buffer layer, an insertion layer, a barrier layer and a GaN cap layer sequentially on the substrate.

[0022] S102. A 20nm passivation layer is grown on the GaN cap layer using PECVD deposition process.

[0023] S103. Use photolithography to define the source and drain etch pattern area above the GaN cap layer;

[0024] S104. The SiN and nitride in the source and drain etched pattern area are completely etched away using the ICP slow etching process.

[0025] S105. Grow an n+-InGaN layer in the source / drain etched pattern region;

[0026] S106. Define comb-shaped patterned etching regions in the n+-InGaN layer using photolithography;

[0027] S107, etch the n+-InGaN layer to 50nm;

[0028] S108. A gate metal is deposited on the upper surface of the passivation layer to form a gate, and a source metal and a drain metal are deposited in the comb-patterned etching region to form a source and a drain. The source metal and the drain metal both include: a first metal Ti layer and a second metal TiN layer. The first metal Ti layer is disposed close to the substrate layer. The n+-InGaN layer is grown based on an ohmic regrowth process.

[0029] Optionally, the n+-InGaN layer in S105 is 100nm;

[0030] In S107, the n+-InGaN layer is etched to 50nm using the ICP slow etching process.

[0031] This invention provides a gold-free ohmic contact electrode and its fabrication method. The gold-free ohmic contact electrode has a symmetrical structure, comprising, from bottom to top: a substrate layer, a buffer layer, an insertion layer, a barrier layer, a GaN cap layer, and a passivation layer; the passivation layer includes a first passivation layer and a second passivation layer; the first and second passivation layers are symmetrically disposed on both sides of the upper surface of the GaN cap layer; a gate is disposed on the upper surface of the passivation layer and partially covers the first and second passivation layers; a first n+-InGaN layer and a second n+-InGaN layer are symmetrically disposed on both sides of the upper surface of the buffer layer, and the first and second n+-InGaN layers are in contact with the sides of the insertion layer, barrier layer, and GaN cap layer; a source electrode is disposed inside the first n+-InGaN layer; a drain electrode is disposed inside the second n+-InGaN layer; both the drain and the source electrode include a first metal Ti layer and a second metal TiN layer; the first metal Ti layer is disposed close to the substrate layer. In this invention, by introducing a Ti / TiN metal stack structure as the ohmic contact electrode for the drain and source, the deep-level doping contamination caused by the introduction of the heavy metal Au is avoided. Secondly, an ohmic regeneration process is proposed to grow N-type InGaN to form ohmic contacts. Since high-temperature annealing is not required, the adverse effects of conventional high-temperature annealing process on the reliability of GaN HEMT devices are avoided.

[0032] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the structure of a gold-free ohmic contact electrode provided in an embodiment of the present invention;

[0034] Figure 2 This is a schematic flowchart illustrating a method for preparing a gold-free ohmic contact electrode according to an embodiment of the present invention. Detailed Implementation

[0035] The contact between a metal and a semiconductor forms a non-rectified contact, known as an ohmic contact. It does not generate significant additional impedance, nor does it significantly alter the equilibrium carrier concentration within the semiconductor. Ohmic contacts have crucial practical applications. Semiconductor devices typically utilize metal electrodes to input or output current, requiring excellent ohmic contact between the metal electrode and the semiconductor device. In ultra-high frequency and high-power devices, ohmic contact is one of the key design and manufacturing issues.

[0036] This invention investigates a gold-free ohmic contact electrode based on MOCVD ohmic regrowth and patterned etching, and its fabrication method. By introducing a Ti / TiN metal stack structure as the ohmic contact electrode for the drain and source, the deep-level doping contamination caused by the introduction of the heavy metal Au is avoided. Secondly, an ohmic regrowth process is proposed to grow N-type InGaN to form ohmic contacts. Since high-temperature annealing is not required, the adverse effects of conventional high-temperature annealing processes on device reliability are avoided.

[0037] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0038] To avoid deep-level doping contamination caused by the introduction of heavy metal Au and the adverse effects of conventional high-temperature annealing processes on the reliability of ohmic contact electrodes, this invention provides a gold-free ohmic contact electrode. Figure 1 This is a schematic diagram of a gold-free ohmic contact electrode provided in an embodiment of the present invention, as shown below. Figure 1 As shown, it includes, from bottom to top, the following layers: substrate layer 1, buffer layer 2, insertion layer 3, barrier layer 4, GaN cap layer 5, and passivation layer 6.

[0039] The passivation layer 6 includes: a first passivation layer and a second passivation layer; the first passivation layer and the second passivation layer are symmetrically disposed on both sides of the upper surface of the GaN cap layer 5; the gate 10 is disposed on the upper surface of the passivation layer 6 and partially covers the first passivation layer and the second passivation layer.

[0040] The upper surface of the buffer layer 2 is symmetrically provided with a first n+-InGaN layer and a second n+-InGaN layer on both sides, and the first n+-InGaN layer and the second n+-InGaN layer are in contact with the side of the insertion layer 3, the barrier layer 4 and the GaN cap layer 5; a source electrode 9 is provided inside the first n+-InGaN layer; and a drain electrode 8 is provided inside the second n+-InGaN layer.

[0041] Both the drain 8 and the source 9 include: a first metal Ti layer and a second metal TiN layer; the first metal Ti layer is disposed close to the substrate layer 1; the first n+-InGaN layer and the second n+-InGaN layer are grown based on an ohmic regrowth process.

[0042] It should be noted that, for ease of representation, in Figure 1 In the diagram, source 9 is represented as S, and drain 8 is represented as D.

[0043] Preferably, in this embodiment, a Ti / TiN metal layer can be deposited sequentially using magnetron sputtering. The barrier layer 4 can generally be AlGaN, the insertion layer can be AlN, and the buffer layer 2 can be GaN. The gate 10 can be nickel-gold, and a two-dimensional electron gas channel is formed between the buffer layer 2 and the AlN insertion layer.

[0044] This invention provides a gold-free ohmic contact electrode. By introducing a Ti / TiN metal stack structure as the ohmic contact electrode for the drain and source, the deep-level doping contamination caused by the introduction of the heavy metal Au is avoided. Secondly, an ohmic regeneration process is proposed to grow N-type InGaN to form ohmic contacts. Since high-temperature annealing is not required, the adverse effects of conventional high-temperature annealing processes on device reliability are avoided.

[0045] Furthermore, the fabrication of ohmic contact electrodes is a crucial step in the GaN HEMT device manufacturing process. Conventional gold ohmic electrode processes and high-temperature annealing ohmic processes can cause Au contamination on the GaN HEMT device fabrication line, and the high-temperature environment can adversely affect the reliability of GaN HEMT devices. Therefore, introducing a Ti / TiN metal stack structure as the ohmic contact electrode and proposing an ohmic regeneration process can avoid the contamination caused by gold processes and form good ohmic contact characteristics without annealing.

[0046] Optionally, the thickness of the first n+-InGaN layer and the second n+-InGaN layer is 50 nm.

[0047] Optionally, the first n+-InGaN layer has N source electrodes 9 internally;

[0048] N source electrodes 9 are evenly distributed on the upper surface of the first n+-InGaN layer; N is a positive integer greater than or equal to 3.

[0049] Optionally, the second n+-InGaN layer has N drains 8 inside;

[0050] N drain electrodes are evenly distributed on the upper surface of the second n+-InGaN layer; N is a positive integer greater than or equal to 3.

[0051] Optionally, substrate 1 is a Si substrate; buffer layer 2 is a GaN buffer layer.

[0052] In addition, in some other possible implementations, the substrate layer 1 can also be made of SiC, SiGe, GeAs, InAs, InP or other III-V or II-VI compound semiconductors.

[0053] Optionally, the insertion layer 3, the barrier layer 4, and the GaN cap layer 5 have the same width;

[0054] The heights of the first n+-InGaN layer and the second n+-InGaN layer are the total heights of the insertion layer 3, the barrier layer 4, and the GaN cap layer 5.

[0055] In summary, the advantages of the gold-free ohmic contact electrode provided by the embodiments of the present invention are mainly reflected in the following aspects:

[0056] 1. Avoid heavy metal contamination, improve contact resistivity, and enhance process compatibility.

[0057] In existing GaN HEMT device fabrication processes, multilayer metal structures such as Ti / Al / Ni / Au are typically used to form ohmic contacts. However, this process containing the heavy metal Au has two main problems: first, Au diffuses into the GaN material during high-temperature annealing, forming deep-level doping and leading to a decrease in material performance; second, high-temperature annealing can cause oxygen and nitrogen defects on the GaN surface, introducing deep-level interface states and affecting device reliability. This invention proposes using a Ti / TiN metal stack structure as the ohmic contact electrode, completely avoiding the introduction of the heavy metal Au, eliminating the risk of deep-level doping caused by Au diffusion, and improving the long-term stability and reliability of the device. Furthermore, the Ti / TiN structure can achieve good ohmic contact at lower temperatures, reducing the need for high-temperature processing and thus reducing the possibility of surface defects in the GaN material, helping to maintain a low ohmic contact resistivity. Moreover, the Ti / TiN metal stack structure is highly compatible with existing Si-CMOS process lines, allowing GaN HEMT devices to be manufactured on standard CMOS production lines, greatly simplifying the manufacturing process, reducing production costs, and increasing yield.

[0058] 2. No high-temperature annealing is required, which enhances carrier injection efficiency and improves the overall performance of the device.

[0059] Traditional ohmic contact fabrication methods rely on high-temperature annealing to reduce contact resistance, but this often causes irreversible damage to the GaN material. To address this, this invention proposes an ohmic regeneration process, which involves growing an n+-InGaN layer in the source / drain region to form the ohmic contact. The n+-InGaN layer can achieve low-resistance ohmic contacts without high-temperature annealing, effectively avoiding the material damage and performance degradation problems caused by high-temperature processing in traditional methods. Furthermore, the introduction of the n+-InGaN layer not only provides more free electrons but also promotes the efficient injection of charge carriers from the metal electrode to the GaN channel, further optimizing the device's operating characteristics. Moreover, the application of the ohmic regeneration process not only improves the quality of the ohmic contact but also enhances the overall electrical performance of the ohmic contact electrode, such as higher current gain, lower on-resistance, and better switching characteristics.

[0060] Based on the same inventive concept, this invention also provides a method for preparing a gold-free ohmic contact electrode. Figure 2 This is a schematic flowchart illustrating a method for fabricating a gold-free ohmic contact electrode according to an embodiment of the present invention. Figure 2 As shown, the method includes:

[0061] S101. Obtain a substrate and grow a buffer layer 2, an insertion layer 3, a barrier layer 4, and a GaN cap layer 5 sequentially on the substrate.

[0062] S102. Using PECVD deposition process, a 20nm passivation layer 6 is grown on the GaN cap layer 5.

[0063] In this embodiment, the passivation layer 6 can be SiN.

[0064] S103. Use photolithography to define the source and drain etch pattern area above the GaN cap layer 5.

[0065] It should be noted that, specifically, the MA6 lithography machine can also be used to define the source and drain etching pattern areas on the surface of the GaN cap layer 5.

[0066] S104. The SiN and nitride in the source and drain etched pattern area are completely etched away using the ICP slow etching process.

[0067] It should be noted that, in this embodiment, the ICP slow etching process parameters can be set to 1.4 nm / min. Furthermore, after S104, the source and drain regions can be acid-washed to completely etch away the SiN and nitrides in the source and drain etched pattern regions.

[0068] S105, Grow an n+-InGaN layer in the source / drain etched pattern area 7.

[0069] S106. Use photolithography to define a comb-shaped patterned etching region in the n+-InGaN layer 7.

[0070] S107, etch n+-InGaN layer 7 to 50 nm.

[0071] In this embodiment of the invention, ohmic regrowth is performed using metal-organic chemical vapor deposition (MOCVD) technology, and a gold-free ohmic contact electrode prepared by patterned etching can form a good ohmic contact morphology. The n-type ohmic contact is then further etched using an ICP dry etching process. + - The InGaN layer was etched to 50nm, increasing the ohmic contact between the metal and the n + - The contact area of ​​the InGaN layer improves the contact performance of the gold-free ohmic contact electrode.

[0072] In this embodiment of the invention, after S107, the comb-shaped patterned etching area can be cleaned using acid and alkali solutions to remove etching residues and oxides, improve the 2DEG leakage problem caused by etching, increase the current when forming ohmic contacts, and reduce the difficulty of forming ohmic contacts.

[0073] S108. Deposit gate metal on the upper surface of passivation layer 6 to form gate 10, and deposit source metal and drain metal in comb-patterned etched region to form source 9 and drain 8.

[0074] The source metal and drain metal both include: a first metal Ti layer and a second metal TiN layer; the first metal Ti layer is disposed close to the substrate layer 1; the n+-InGaN layer 7 is grown based on an ohmic regeneration process.

[0075] Optionally, in S105, the n+-InGaN layer 7 is 100nm; in S107, the n+-InGaN layer 7 is etched to 50nm using an ICP slow etching process.

[0076] The beneficial effects of the gold-free ohmic contact electrode provided in this embodiment of the invention are as follows:

[0077] Using ICP slow etching technology, 100nm n + - The InGaN regrown layer was etched down to the remaining 50nm. A method for fabricating gold-free ohmic contact electrodes based on ohmic regrowing and patterned etching was developed, producing electrodes with excellent contact characteristics without the need for high-temperature annealing. This method was applied to GaN HEMTs, effectively improving the contact characteristics of the source and drain ohmic contacts and the device characteristics of GaN HEMTs. The source and drain ohmic electrodes of Si-based GaNHEMT electronic devices fabricated using this technology exhibited good surface morphology and low ohmic contact resistance, resulting in significantly improved stability. This also improved compatibility with Si-based CMOS process lines, avoiding contamination by heavy metal Au and the adverse effects of high-temperature annealing.

[0078] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0079] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings and the disclosure, will understand and implement other variations of the disclosed embodiments in carrying out the claimed invention. In the description of the invention, the word "comprising" does not exclude other components or steps, "a" or "an" does not exclude a plurality, and "a plurality" means two or more, unless otherwise explicitly specified. Furthermore, while different embodiments may describe certain measures, this does not mean that these measures cannot be combined to produce good results.

[0080] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the inventive concept, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A gold-free ohmic contact electrode, characterized in that, The gold-free ohmic contact electrode has a symmetrical structure and includes: The following layers are arranged from bottom to top: substrate layer (1), buffer layer (2), insertion layer (3), barrier layer (4), GaN cap layer (5), and passivation layer (6); The passivation layer (6) includes: a first passivation layer and a second passivation layer; the first passivation layer and the second passivation layer are symmetrically disposed on both sides of the upper surface of the GaN cap layer (5); the gate (10) is disposed on the upper surface of the passivation layer (6) and partially covers the first passivation layer and the second passivation layer; The upper surface of the buffer layer (2) is symmetrically provided with a first n+-InGaN layer and a second n+-InGaN layer, and the first n+-InGaN layer and the second n+-InGaN layer are in contact with the side of the insertion layer (3), the barrier layer (4) and the GaN cap layer (5); a source electrode (9) is provided inside the first n+-InGaN layer; a drain electrode (8) is provided inside the second n+-InGaN layer. Both the drain (8) and the source (9) include: a first metal Ti layer and a second metal TiN layer; the first metal Ti layer is disposed close to the substrate layer (1); the first n+-InGaN layer and the second n+-InGaN layer are grown based on an ohmic regeneration process.

2. The gold-free ohmic contact electrode according to claim 1, characterized in that, The thickness of the first n+-InGaN layer and the second n+-InGaN layer is 50 nm.

3. The gold-free ohmic contact electrode according to claim 1, characterized in that, The first n+-InGaN layer has N sources (9) inside; The N source electrodes (9) are uniformly arranged on the upper surface of the first n+-InGaN layer; N is a positive integer greater than or equal to 3.

4. The gold-free ohmic contact electrode according to claim 1, characterized in that, The second n+-InGaN layer has N drains (8) inside; The N drain electrodes (8) are uniformly arranged on the upper surface of the second n+-InGaN layer; N is a positive integer greater than or equal to 3.

5. The gold-free ohmic contact electrode according to claim 1, characterized in that, The substrate layer (1) is a Si substrate; the buffer layer (2) is a GaN buffer layer.

6. The gold-free ohmic contact electrode according to claim 1, characterized in that, The insertion layer (3), the barrier layer (4), and the GaN cap layer (5) have the same width; The heights of the first n+-InGaN layer and the second n+-InGaN layer are the total heights of the insertion layer (3), the barrier layer (4), and the GaN cap layer (5).

7. A method for preparing a gold-free ohmic contact electrode, characterized in that, The method for preparing the gold-free ohmic contact electrode according to any one of claims 1-6 comprises: S101. Obtain a substrate layer, and grow a buffer layer (2), an insertion layer (3), a barrier layer (4) and a GaN cap layer (5) sequentially on the substrate layer. S102. Using PECVD deposition growth process, a 20nm passivation layer (6) is grown on the GaN cap layer (5); S103. The source and drain etch pattern area is defined above the GaN cap layer (5) using photolithography. S104. The SiN and nitride in the source and drain etched pattern area are completely etched away using the ICP slow etching process. S105, An n+-InGaN layer (7) is grown in the source and drain etched pattern region; S106. Using photolithography, a comb-shaped patterned etching region is defined in the n+-InGaN layer (7); S107, Etch the n+-InGaN layer (7) to 50nm; S108. A gate metal is deposited on the upper surface of the passivation layer (6) to form a gate (10), and a source metal and a drain metal are deposited in the comb-patterned etched region to form a source (9) and a drain (8); the source metal and the drain metal both include: a first metal Ti layer and a second metal TiN layer; the first metal Ti layer is disposed close to the substrate layer (1); the n+-InGaN layer (7) is grown based on an ohmic regeneration process.

8. The method for preparing a gold-free ohmic contact electrode according to claim 7, characterized in that, The n+-InGaN layer (7) described in S105 is 100 nm; In S107, the n+-InGaN layer (7) is etched to 50nm using the ICP slow etching process.

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