Display device

Abstract

A display device is provided. The display device includes a display panel, a cover window on the display panel, and an optical film on the cover window, in which the optical film includes a base layer, a hard coating layer on the base layer, a low refractive layer on the hard coating layer, and an anti-fingerprint layer on the low refractive layer, and the optical film has a hardness of 35 Hv or more and has a crack strain of 2% or more.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to a display device. Background Art

[0002] As the information society further develops, the uses of display devices for displaying images are increasing and diversifying. For example, display devices have been applied to various electronic devices such as smart phones, digital cameras, laptop computers, navigation devices, and smart TVs.

[0003] The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device and / or a light emitting display device. The light emitting display device includes an organic light emitting display device including an organic light emitting element, an inorganic light emitting display device including an inorganic light emitting element such as an inorganic semiconductor, and a micro light emitting display device including a micro light emitting element.

[0004] The organic light emitting element may include two electrodes facing each other and a light emitting layer between the two electrodes. The light emitting layer receives electrons and holes from the two electrodes, recombines the electrons and holes with each other to generate excitons, and may emit light during the period when the generated excitons change from an excited state to a ground state.

[0005] Since an organic light emitting display device including an organic light emitting element does not require a light source such as a backlight unit, the organic light emitting display device has low power consumption, can be configured to be lightweight and thin, and has high-quality characteristics such as a wide viewing angle, high brightness and contrast, and a fast response speed, and accordingly, has attracted attention as a next-generation display device. Summary of the invention

[0006] Aspects of embodiments of the present disclosure provide a display device including an optical film capable of reducing reflectivity of external light and improving durability.

[0007] However, aspects of the embodiments of the present disclosure are not limited to the aspects set forth herein. The above and other aspects of the embodiments of the present disclosure will become more apparent to those skilled in the art by referring to the detailed description of the present disclosure given below.

[0008] According to one aspect of an embodiment of the present disclosure, a display device includes a display panel, a cover window on the display panel, and an optical film on the cover window, wherein the optical film includes a base layer, a hard coating layer on the base layer, a low refractive layer on the hard coating layer, and an anti-fingerprint layer on the low refractive layer, and the optical film has a hardness of 35 Hv or greater and has a crack strain of 2% or greater.

[0009] In an embodiment, the hard coating layer includes an acrylate-based compound and a urethane-based compound.

[0010] In an embodiment, the percentage of the acrylate-based compound is 70% to 99.9%, and the percentage of the urethane-based compound is 0.1% to 30%.

[0011] In an embodiment, the hard coating layer includes an acrylate-based compound.

[0012] In an embodiment, the hard coating layer has a thickness of 2 μm to 10 μm.

[0013] In an embodiment, the hard coating layer has a refractive index of 1.48 to 1.53.

[0014] In an embodiment, the refractive index of the low refractive layer is smaller than the refractive index of the hard coating layer by 0.05 or more.

[0015] In an embodiment, the refractive index of the low refractive layer is 1.3 to 1.43.

[0016] In an embodiment, the crack strain of the optical film is the crack strain of the optical film in a machine direction or a transverse direction.

[0017] In an embodiment, the display device further includes a primer layer between the low-refractive layer and the anti-fingerprint layer.

[0018] In an embodiment, the display device further includes a high refractive layer between the low refractive layer and the hard coating layer.

[0019] In an embodiment, the refractive index of the high refractive layer is greater than the refractive index of the low refractive layer by 0.05 or more.

[0020] In an embodiment, the refractive index of the high refractive layer is 1.53 to 1.7.

[0021] According to one aspect of an embodiment of the present disclosure, a display device includes a display panel, a cover window on the display panel, and an optical film on the cover window, wherein the optical film includes a base layer, a hard coating layer on the base layer and containing an acrylate-based compound, a low-refractive layer on the hard coating layer, and an anti-fingerprint layer on the low-refractive layer, and the optical film has a hardness of 35 Hv or greater.

[0022] In an embodiment, the hard coating layer further includes a urethane-based compound, and the percentage of the acrylate-based compound is 70% or more.

[0023] In an embodiment, the hard coating layer has a thickness of 2 μm to 10 μm.

[0024] In an embodiment, the hard coating layer has a refractive index of 1.48 to 1.53.

[0025] In an embodiment, the refractive index of the low refractive layer is smaller than the refractive index of the hard coating layer by 0.05 or more.

[0026] In an embodiment, the refractive index of the low refractive layer is 1.3 to 1.43.

[0027] In an embodiment, the crack strain of the optical film in the transverse direction is 2% or more.

[0028] The display device according to the embodiment may reduce reflectivity of external light by including an optical film including a low-refractive layer.

[0029] The display device according to the embodiment may improve the hardness and wear resistance of the optical film by including a hard coating layer.

[0030] The effects of the embodiments of the present disclosure are not limited to the above-described effects, and various other effects are included in this specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and other aspects and features of the present disclosure will become more apparent by describing in detail embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0032] Figure 1 is a schematic perspective view of an electronic device according to an embodiment;

[0033] Figure 2 is a perspective view showing a folded state of a foldable electronic device according to an embodiment;

[0034] Figure 3 It is shown Figure 2 A perspective view of a foldable electronic device in an unfolded state;

[0035] Figure 4 is a perspective view showing a display device included in an electronic device according to an embodiment;

[0036] Figure 5 Observed from the side Figure 4 A cross-sectional view of a display device;

[0037] Figure 6 is a plan view showing a display layer of a display device according to an embodiment;

[0038] Figure 7 is a plan view showing a touch sensing layer of a display device according to an embodiment;

[0039] Figure 8 is a plan view showing the arrangement of emission areas in a display area of ​​a display device according to an embodiment;

[0040] Fig. 9 is along Figure 8 A cross-sectional view taken along the line X-X';

[0041] Fig.10is a schematic cross-sectional view showing an optical film of a display device according to an embodiment;

[0042] Fig.11 is a cross-sectional view showing destructive interference of external light in an embodiment of an optical film;

[0043] Fig.12 is a cross-sectional view showing an optical film according to an embodiment;

[0044] Fig.13 is a cross-sectional view showing an optical film according to an embodiment;

[0045] Fig.14 is a cross-sectional view showing an optical film according to an embodiment;

[0046] Fig.15 is a front black image of a display device manufactured according to Example 7;

[0047] Fig.16 is a front black image of a display device manufactured according to #1 of Example 8; and

[0048] Fig.17 This is a front black image of a display device manufactured according to #1 of Example 9. DETAILED DESCRIPTION

[0049] Now the subject matter of the present disclosure will be described more fully below with reference to the accompanying drawings in which exemplary embodiments of the present disclosure are shown. However, the subject matter of the present disclosure can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0050] It will also be understood that when a layer is referred to as being 'on' another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Like reference numerals refer to like components throughout the specification.

[0051] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the spirit and scope of the present disclosure, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element.

[0052] Each of the features of the various embodiments of the present disclosure can be combined or combined with each other in part or in whole, and various interlocks and drives are technically possible. Each embodiment can be implemented independently of each other, or can be implemented in association together.

[0053] Hereinafter, embodiments will be described with reference to the accompanying drawings.

[0054] Figure 1 is a schematic plan view of an electronic device according to an embodiment.

[0055] Reference Figure 1 , the electronic device 1 displays a moving image and / or a still image. The electronic device 1 may refer to any appropriate electronic device that provides a display screen. For example, a television, a notebook computer, a monitor, a billboard, an Internet of Things (IoT) device, a mobile phone, a smart phone, a tablet personal computer (PC), an electronic watch, a smart watch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic notepad, an electronic book, a portable multimedia player (PMP), a navigation device, a game console, a digital camera, a video camera, etc. that provide a display screen may be included in the electronic device 1.

[0056] The electronic device 1 may include a display device 10 (see Figure 4 ). Examples of display devices may include inorganic light emitting diode display devices, organic light emitting display devices, quantum dot light emitting display devices, plasma display devices, field emission display devices, etc. Hereinafter, a case where an organic light emitting diode display device is applied as an example of a display device will be described by way of example, but the present disclosure is not limited thereto, and the same technical spirit may be applied to other display devices (if applicable).

[0057] The shape of the electronic device 1 may be variously modified. For example, the electronic device 1 may have a shape such as a rectangular shape having a width greater than a length, a rectangular shape having a length greater than a width, a square shape, a quadrilateral shape having rounded corners (vertices), other polygonal shapes, or a circular shape. The shape of the display area DA of the electronic device 1 may also be similar to the overall shape of the electronic device 1. Figure 1 , the electronic device 1 having a rectangular shape having a greater length in the second direction DR2 has been illustrated.

[0058] The electronic device 1 may include a display area DA and a non-display area NDA. The display area DA is an area in which a picture can be displayed, and the non-display area NDA is an area in which a picture is not displayed. The display area DA may also be referred to as an active area, and the non-display area NDA may also be referred to as a non-active area. The display area DA may substantially occupy the center of the electronic device 1.

[0059] Figure 2 is a perspective view illustrating a folded state of a foldable electronic device according to an embodiment. Figure 3 It is shown Figure 2 A perspective view of a foldable electronic device in an unfolded state.

[0060] Reference Figure 2 and Figure 3 The electronic device 1 according to the embodiment may be a foldable electronic device. The foldable electronic device 1 may be folded around a folding axis FL. The display area DA may be on the outside and / or inside of the foldable electronic device 1. Figure 2 and Figure 3 4. It has been shown in FIG. 4 that the display area DA is on each of the inner side and the outer side of the foldable electronic device 1. FIG.

[0061] The display area DA may be on the outside of the electronic device 1. The outside surface of the folded electronic device 1 may include the display area DA, and the inside surface of the unfolded electronic device 1 may include the display area DA.

[0062] Figure 4 is a perspective view showing a display device included in an electronic device according to an embodiment.

[0063] Reference Figure 4 , the electronic device 1 according to the embodiment may include a display device 10. The display device 10 may provide a screen displayed by the electronic device 1. The display device 10 may have a shape similar to that of the electronic device 1 in a plan view. For example, the display device 10 may have a shape similar to a rectangular shape having short sides in a first direction DR1 and long sides in a second direction DR2. Corners where the short sides in the first direction DR1 and the long sides in the second direction DR2 intersect may be rounded to have a curvature, but are not limited thereto, and may also form a right angle. The shape of the display device 10 in a plan view is not limited to a rectangular shape, and may be a shape similar to other polygonal shapes, a circular shape, or an elliptical shape.

[0064] The display device 10 may include a display panel 100 , a display driver 200 , a circuit board 300 , and a touch driver 400 .

[0065] The display panel 100 may include a main area MA and a sub area SBA.

[0066] The main area MA may include a display area DA including pixels providing an image and a non-display area NDA provided around the display area DA. The display area DA may emit light from a plurality of emission areas or a plurality of opening areas. For example, the display panel 100 may include a pixel circuit including a switching element, a pixel defining film defining an emission area or an opening area, and a self-luminous element.

[0067] For example, the self-luminous element may include at least one selected from an organic light emitting diode (LED) including an organic light emitting layer, a quantum dot LED including a quantum dot light emitting layer, an inorganic LED including an inorganic semiconductor, and a micro LED, but is not limited thereto.

[0068] The non-display area NDA may be an area outside the display area DA. The non-display area NDA may be defined as an edge area of ​​the main area MA of the display panel 100. The non-display area NDA may include a gate driver that supplies a gate signal to a gate line and a fan-out line that connects the display driver 200 and the display area DA to each other.

[0069] The sub-region SBA may be a region extending from one side of the main region MA. The sub-region SBA may include a flexible material that can be bent, folded and / or curled. For example, when the sub-region SBA is bent, the sub-region SBA may overlap with the main region MA in the thickness direction (third direction DR3). The sub-region SBA may include a display driver 200 and a pad portion connected to the circuit board 300. In an embodiment, the sub-region SBA may be omitted, and the display driver 200 and the pad portion may be provided in the non-display area NDA.

[0070] The display driver 200 may output a signal and a voltage for driving the display panel 100. The display driver 200 may supply a data voltage to a data line. The display driver 200 may supply a source voltage to a power line, and supply a gate control signal to a gate driver. The display driver 200 may be formed as an integrated circuit (IC) and mounted on the display panel 100 in a chip on glass (COG) manner, a chip on plastic (COP) manner, and / or an ultrasonic bonding manner. As an example, the display driver 200 may be provided in a sub-area SBA, and may overlap with the main area MA in a thickness direction by bending of the sub-area SBA. As an example, the display driver 200 may be mounted on a circuit board 300.

[0071] The circuit board 300 may be attached to the pad portion of the display panel 100 using an anisotropic conductive film (ACF). Leads of the circuit board 300 may be electrically connected to the pad portion of the display panel 100. The circuit board 300 may be a flexible printed circuit board, a rigid printed circuit board, and / or a flexible film such as a chip on film.

[0072] The touch driver 400 may be mounted on the circuit board 300. The touch driver 400 may be connected to the touch sensing unit of the display panel 100. The touch driver 400 may supply a touch drive signal to a plurality of touch electrodes of the touch sensing unit, and sense the amount of change in capacitance between the plurality of touch electrodes. For example, the touch drive signal may be a pulse signal having a set or predetermined frequency. The touch driver 400 may determine whether an input occurs based on the amount of change in capacitance between the plurality of touch electrodes and calculate the input coordinates. The touch driver 400 may be formed as an integrated circuit (IC).

[0073] Figure 5 Observed from the side Figure 4 A cross-sectional view of a display device.

[0074] Reference Figure 5 The display device 10 may include a display layer DU, a touch sensing layer TSU, a color filter layer CFL, a cover window CW, and an optical film OPF. The display layer DU may include a substrate SUB, a thin film transistor layer TFTL, a light emitting element layer EML, and an encapsulation layer TFEL.

[0075] The substrate SUB may be a base substrate or a base member. The substrate SUB may be a flexible substrate that can be bent, folded and / or rolled. For example, the substrate SUB may include a polymer resin such as polyimide (PI), but is not limited thereto. In an embodiment, the substrate SUB may include a glass material and / or a metal material.

[0076] The thin film transistor layer TFTL may be on the substrate SUB. The thin film transistor layer TFTL may include a plurality of thin film transistors constituting a pixel circuit of a pixel. The thin film transistor layer TFTL may also include a gate line, a data line, a power line, a gate control line, a fan-out line connecting the display driver 200 and the data line to each other, and a lead connecting the display driver 200 and the pad portion to each other. Each of the thin film transistors may include a semiconductor region, a source electrode, a drain electrode, and a gate electrode. For example, when the gate driver is on one side of the non-display area NDA of the display panel 100, the gate driver may include a thin film transistor.

[0077] The thin film transistor layer TFTL may be provided in the display area DA, the non-display area NDA, and the sub-area SBA. A thin film transistor, a gate line, a data line, and a power line of each of the pixels of the thin film transistor layer TFTL may be provided in the display area DA. A gate control line and a fan-out line of the thin film transistor layer TFTL may be provided in the non-display area NDA. A lead line of the thin film transistor layer TFTL may be provided in the sub-area SBA.

[0078] The light emitting element layer EML may be on the thin film transistor layer TFTL. The light emitting element layer EML may include: a plurality of light emitting elements each including a first electrode, a second electrode and a light emitting layer to emit light and a pixel defining film defining pixels. The plurality of light emitting elements of the light emitting element layer EML may be provided in the display area DA.

[0079] In an embodiment, the light emitting layer may be an organic light emitting layer including an organic material. The light emitting layer may include a hole transport layer, an organic light emitting layer, and an electron transport layer. When the first electrode receives a voltage through the thin film transistor of the thin film transistor layer TFTL and the second electrode receives a cathode voltage, holes and electrons may move to the organic light emitting layer through the hole transport layer and the electron transport layer, respectively, and may be combined with each other in the organic light emitting layer to emit light.

[0080] In an embodiment, the light emitting element may include a quantum dot light emitting diode including a quantum dot light emitting layer, an inorganic light emitting diode including an inorganic semiconductor, and / or a micro light emitting diode.

[0081] The encapsulation layer TFEL may cover the upper surface and the side surface of the light emitting element layer EML and may protect the light emitting element layer EML. The encapsulation layer TFEL may include at least one inorganic film and at least one organic film for encapsulating the light emitting element layer EML.

[0082] The touch sensing layer TSU may be on the encapsulation layer TFEL. The touch sensing layer TSU may include a plurality of touch electrodes for sensing a user's touch in a capacitive manner and a touch line connecting the plurality of touch electrodes and the touch driver 400 to each other. For example, the touch sensing layer TSU may sense a user's touch in a mutual capacitance manner or a self-capacitance manner.

[0083] In an embodiment, the touch sensing layer TSU may be on a separate substrate on the display layer DU. In some embodiments, the substrate supporting the touch sensing layer TSU may be a base member encapsulating the display layer DU.

[0084] A plurality of touch electrodes of the touch sensing layer TSU may be provided in a touch sensor area overlapping the display area DA. A touch line of the touch sensing layer TSU may be provided in a touch peripheral area overlapping the non-display area NDA.

[0085] The color filter layer CFL may be on the touch sensing layer TSU. The color filter layer CFL may include a plurality of color filters each corresponding to a plurality of emission regions. Each of the color filters may selectively transmit light of a set or specific wavelength, and block or reduce the transmission of light of other wavelengths and / or absorb light of other wavelengths. The color filter layer CFL may absorb some of the light introduced from outside the display device 10 to reduce reflected light of external light. Accordingly, the color filter layer CFL may prevent or reduce distortion of color caused by reflection of external light.

[0086] Since the color filter layer CFL is directly on the touch sensing layer TSU, the display device 10 may not require or use a separate substrate for the color filter layer CFL. Accordingly, the thickness of the display device 10 may be relatively small.

[0087] The cover window CW may be on the color filter layer CFL. The cover window CW may be used to protect the display panel 100. The cover window CW may be made of a transparent material. The cover window CW may include, for example, glass and / or plastic.

[0088] When the cover window CW includes glass, the glass may be ultra-thin glass (UTG) and / or thin glass. The ultra-thin glass may be strengthened to have a set or predetermined stress distribution therein. Compared with before strengthening, the strengthened ultra-thin glass is more resistant to the occurrence of cracks, propagation of cracks, damage, etc. caused by external impact. The ultra-thin glass strengthened by the strengthening process may have different appropriate stresses for each area.

[0089] When the glass is ultra-thin glass and / or thin glass, the glass may have flexible properties to be bent, folded and / or curled. The thickness of the glass may be, for example, in the range of 10 μm to 300 μm, and, for example, glass with a thickness of 10 μm to 100 μm or about 50 μm may be applied. The glass of the cover window CW may include soda-lime glass, alkali aluminosilicate glass, borosilicate glass and / or lithium aluminosilicate glass. The glass of the cover window CW may include chemically strengthened and / or thermally strengthened glass to have high strength. Chemical strengthening can be achieved by an ion exchange treatment process in an alkaline salt. The ion exchange treatment process may be performed twice or more. In some embodiments, the cover window CW can be formed by coating both surfaces of a polymer film with thin glass.

[0090] The optical film OPF may be on the cover window CW. The optical film OPF may protect the cover window CW, reduce reflection of external light, and prevent fingerprint residue (or may reduce the occurrence of residual fingerprints). A further detailed description of the optical film OPF will be provided below.

[0091] In some embodiments, a barrier layer may be below the display panel 100 , and a plate may be below the barrier layer.

[0092] The barrier layer may include a polymer film. The barrier layer may include, for example, polyimide (PI), polyethylene terephthalate (PET), polycarbonate (PC), polyethylene (PE), polypropylene (PP), polysulfone (PSF), polymethyl methacrylate (PMMA), triacetyl cellulose (TAC), cycloolefin polymer (COP), etc. The barrier layer may include a functional layer on at least one surface thereof. The functional layer may include, for example, a light absorbing layer. The light absorbing layer may include a light absorbing material, such as a black pigment and / or a dye. The light absorbing layer may be made of black ink and may be formed on the polymer film by coating and / or printing methods.

[0093] The plate may be a support member for connecting the display device 10 to the housing. The plate may include a material having rigidity. In an embodiment, the plate may be made of a metal alloy such as stainless steel (SUS) and / or a single metal. A plurality of openings having a slit shape may be provided in the plate so that the display device 10 can be folded around a folding axis.

[0094] Figure 6 is a plan view showing a display layer of a display device according to an embodiment.

[0095] Reference Figure 6 , the display layer DU may include a display area DA and a non-display area NDA.

[0096] The display area DA may be provided at the center of the display panel 100. A plurality of pixels PX, a plurality of gate lines GL, a plurality of data lines DL, and a plurality of power lines VL may be provided in the display area DA. Each of the plurality of pixels PX may be defined as a minimum unit emitting light.

[0097] The plurality of gate lines GL may supply gate signals received from the gate driver 210 to the plurality of pixels PX. The plurality of gate lines GL may extend in a first direction DR1 and may be spaced apart from each other in a second direction DR2 crossing the first direction DR1.

[0098] The plurality of data lines DL may supply data voltages received from the display driver 200 to the plurality of pixels PX. The plurality of data lines DL may extend in the second direction DR2 and may be spaced apart from each other in the first direction DR1.

[0099] The plurality of power lines VL may supply a source voltage received from the display driver 200 to the plurality of pixels PX. In some embodiments, the source voltage may be at least one selected from a driving voltage, an initialization voltage, a reference voltage, and a low potential voltage. The plurality of power lines VL may extend in the second direction DR2 and may be spaced apart from each other in the first direction DR1.

[0100] The non-display area NDA may surround the display area DA. The gate driver 210, the fan-out line FOL, and the gate control line GCL may be provided in the non-display area NDA. The gate driver 210 may generate a plurality of gate signals based on the gate control signal, and may sequentially supply the plurality of gate signals to the plurality of gate lines GL according to a set order.

[0101] The fan-out line FOL may extend to the display area DA from the display driver 200. The fan-out line FOL may supply a data voltage received from the display driver 200 to the plurality of data lines DL.

[0102] The gate control line GCL may extend from the display driver 200 to the gate driver 210. The gate control line GCL may supply a gate control signal received from the display driver 200 to the gate driver 210.

[0103] The sub-area SBA may include the display driver 200 , the pad area PA, and first and second touch pad areas TPA1 and TPA2 .

[0104] The display driver 200 may output signals and voltages for driving the display panel 100 to the fan-out lines FOL. The display driver 200 may supply data voltages to the data lines DL through the fan-out lines FOL. The data voltages may be supplied to a plurality of pixels PX and may control the brightness of the plurality of pixels PX. The display driver 200 may supply gate control signals to the gate driver 210 through the gate control lines GCL.

[0105] The pad area PA, the first touch pad area TPA1, and the second touch pad area TPA2 may be provided at the edge of the sub-area SBA. The pad area PA, the first touch pad area TPA1, and the second touch pad area TPA2 may be electrically connected to the circuit board 300 using a material such as an anisotropic conductive film and / or a self-assembled anisotropic conductive paste (SAP).

[0106] The pad area PA may include a plurality of display pad parts DP. The plurality of display pad parts DP may be connected to a graphics system through the circuit board 300. The plurality of display pad parts DP may be connected to the circuit board 300 to receive digital video data, and may supply the digital video data to the display driver 200.

[0107] Figure 7 is a plan view showing a touch sensing layer of a display device according to an embodiment.

[0108] Reference Figure 7 , the touch sensing layer TSU may include a touch sensor area TSA that senses a user's touch and a touch peripheral area TOA provided around the touch sensor area TSA. The touch sensor area TSA may be provided in the display area DA of the display device 10, and the touch peripheral area TOA may be provided in the non-display area NDA of the display device 10.

[0109] The touch sensor area TSA may include a plurality of touch electrodes SEN and a plurality of dummy electrodes DME. The plurality of touch electrodes SEN may form mutual capacitance or self capacitance to sense the touch of an object and / or a person. The plurality of touch electrodes SEN may include a plurality of driving electrodes TE, a plurality of sensing electrodes RE, and a bridging electrode CE.

[0110] The plurality of driving electrodes TE may be arranged in the first direction DR1 and the second direction DR2. The plurality of driving electrodes TE may be spaced apart from each other in the first direction DR1 and the second direction DR2. The driving electrodes TE adjacent to each other in the second direction DR2 may be electrically connected to each other through the bridge electrode CE.

[0111] A plurality of driving electrodes TE may be connected to the first touch pad portion TP1 through driving lines TL. The driving lines TL may include lower driving lines TLa and upper driving lines TLb. For example, the driving electrodes TE on the lower side of the touch sensor area TSA may be connected to the first touch pad portion TP1 through the lower driving lines TLa, and the driving electrodes TE on the upper side of the touch sensor area TSA may be connected to the first touch pad portion TP1 through the upper driving lines TLb. The lower driving lines TLa may extend to the first touch pad portion TP1 via the lower side of the touch peripheral area TOA. The upper driving lines TLb may extend to the first touch pad portion TP1 via the upper side, the left side, and the lower side of the touch peripheral area TOA. The first touch pad portion TP1 may be connected to the touch driver 400 through the circuit board 300.

[0112] The bridging electrode CE may be bent at least once. For example, the bridging electrode CE may have a clip shape ("<" or ">"), but the shape of the bridging electrode CE in a plan view is not limited thereto. The driving electrodes TE adjacent to each other in the second direction DR2 may be connected to each other through a plurality of bridging electrodes CE, and even if one of the bridging electrodes CE is disconnected, the driving electrodes TE may be stably connected to each other through the other bridging electrodes CE. The driving electrodes TE adjacent to each other may be connected to each other through two bridging electrodes CE, but the number of bridging electrodes CE is not limited thereto.

[0113] The bridging electrode CE may be provided at a layer different from the layer of the plurality of driving electrodes TE and the plurality of sensing electrodes RE. The sensing electrodes RE adjacent to each other in the first direction DR1 may be electrically connected to each other through a connection portion provided at the same layer as the plurality of driving electrodes TE or the plurality of sensing electrodes RE, and the driving electrodes TE adjacent to each other in the second direction DR2 may be electrically connected to each other through a bridging electrode CE provided at a layer different from the layer of the plurality of driving electrodes TE or the plurality of sensing electrodes RE. Accordingly, even if the bridging electrode CE overlaps with the plurality of sensing electrodes RE in the third direction DR3, the plurality of driving electrodes TE and the plurality of sensing electrodes RE may be insulated from each other (e.g., electrically insulated). Mutual capacitance may be formed between the driving electrodes TE and the sensing electrodes RE.

[0114] The plurality of sensing electrodes RE may extend in the first direction DR1 and may be spaced apart from each other in the second direction DR2. The plurality of sensing electrodes RE may be arranged in the first direction DR1 and the second direction DR2, and the plurality of sensing electrodes RE adjacent to each other in the first direction DR1 may be electrically connected to each other through a connection portion.

[0115] A plurality of sensing electrodes RE may be connected to the second touch pad portion TP2 through a sensing line RL. For example, the sensing electrode RE on the right side of the touch sensor area TSA may be connected to the second touch pad portion TP2 through a sensing line RL. The sensing line RL may extend to the second touch pad portion TP2 via the right side and the lower side of the touch peripheral area TOA. The second touch pad portion TP2 may be connected to the touch driver 400 through the circuit board 300.

[0116] Each of the plurality of dummy electrodes DME may be surrounded by the driving electrode TE or the sensing electrode RE. Each of the plurality of dummy electrodes DME may be spaced apart from and insulated (eg, electrically insulated) from the driving electrode TE or the sensing electrode RE. Accordingly, the dummy electrode DME may be electrically floating.

[0117] The pad area PA, the first touch pad area TPA1, and the second touch pad area TPA2 may be provided at the edge of the sub-area SBA. The pad area PA, the first touch pad area TPA1, and the second touch pad area TPA2 may be electrically connected to the circuit board 300 using a low-resistance and high-reliability material such as an anisotropic conductive film and / or a self-assembled anisotropic conductive paste (SAP).

[0118] The first touch pad area TPA1 may be on one side of the pad area PA and may include a plurality of first touch pad parts TP1. The plurality of first touch pad parts TP1 may be electrically connected to the touch driver 400 on the circuit board 300. The plurality of first touch pad parts TP1 may supply touch drive signals to the plurality of drive electrodes TE through the plurality of drive lines TL.

[0119] The second touch pad area TPA2 may be on the other side of the pad area PA, and may include a plurality of second touch pad parts TP2. The plurality of second touch pad parts TP2 may be electrically connected to a touch driver 400 disposed on the circuit board 300. The touch driver 400 may receive a touch sensing signal through a plurality of sensing lines RL connected to the plurality of second touch pad parts TP2, and may sense a change in mutual capacitance between the driving electrode TE and the sensing electrode RE.

[0120] In an embodiment, the touch driver 400 may supply a touch drive signal to each of the plurality of drive electrodes TE and the plurality of sensing electrodes RE, and may receive a touch sensing signal from each of the plurality of drive electrodes TE and the plurality of sensing electrodes RE. The touch driver 400 may sense a change in charge of each of the plurality of drive electrodes TE and the plurality of sensing electrodes RE based on the touch sensing signal.

[0121] Figure 8 is a plan view showing the arrangement of emission regions in a display region of a display device according to an embodiment.

[0122] Reference Figure 8 , the display device 10 may include a plurality of pixels PX1, PX2, and PX3 provided in a display area DA and emission areas EA1, EA2, EA3, and EA4 and a non-emission area NEA provided in each of the pixels PX1, PX2, and PX3. The plurality of pixels PX1, PX2, and PX3 may be arranged in a fourth direction DR4 and a fifth direction DR5 between the first direction DR1 and the second direction DR2. The first pixel PX1, the second pixel PX2, and the third pixel PX3 may be arranged alternately along the fourth direction DR4 and the fifth direction DR5. For example, the second pixel PX2 and the third pixel PX3 may be arranged along the fourth direction DR4 and the fifth direction DR5 based on the first pixel PX1. The plurality of pixels PX1, PX2, and PX3 may be arranged in the display area DA. Arrangement structure (eg, RGBG matrix, RGBG structure or RGBG matrix structure) or for example DIAMOND Lay out the structure. is an officially registered trademark of Samsung Display Co., Ltd. However, the layout or arrangement of the pixels PX1, PX2 and PX3 is not limited to Figure 8 In some embodiments, the plurality of pixels PX1, PX2, and PX3 may be arranged in a linear or island pattern.

[0123] The emission areas EA1, EA2, EA3, and EA4 of each of the pixels PX1, PX2, and PX3 may include a first emission area EA1, a second emission area EA2, a third emission area EA3, and a fourth emission area EA4 that emit light of different colors. Unlike the first emission area EA1 and the second emission area EA2, the third emission area EA3 and the fourth emission area EA4 may emit light of the same color. The first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 may each emit red light, blue light, or green light, and the color of the light emitted from the corresponding emission areas EA1, EA2, EA3, and EA4 may be based on the light emitting elements ED provided in the light emitting element layer EML to be further described below (see Fig. 9 ) type (or kind). In an embodiment, the first emission area EA1 may emit the first light as red light, the second emission area EA2 may emit the second light as blue light, and the third emission area EA3 and the fourth emission area EA4 may each emit the third light as green light. However, the present disclosure is not limited thereto.

[0124] Multiple emission areas EA1, EA2, EA3 and EA4 can be provided as Arrangement structure (eg, RGBG matrix, RGBG structure or RGBG matrix structure) or for example DIAMOND Lay out the structure. is an officially registered trademark of Samsung Display Co., Ltd. For example, in each of the pixels PX1, PX2, and PX3, the first emission area EA1 and the second emission area EA2 may be spaced apart from each other in the first direction DR1, and the third emission area EA3 and the fourth emission area EA4 may be spaced apart from each other in the second direction DR2. The first emission area EA1 may be spaced apart from the third emission area EA3 in the fifth direction DR5, and may be spaced apart from the fourth emission area EA4 in the fourth direction DR4. The second emission area EA2 may be spaced apart from the third emission area EA3 in the fourth direction DR4, and may be spaced apart from the fourth emission area EA4 in the fifth direction DR5.

[0125] In the plurality of pixels PX1, PX2, and PX3, a plurality of first emission areas EA1, a plurality of second emission areas EA2, a plurality of third emission areas EA3, and a plurality of fourth emission areas EA4 may be provided alternately in the fourth direction DR4 or the fifth direction DR5. For example, the plurality of emission areas EA1, EA2, EA3, and EA4 may be provided in rows R1, R2, R3, and R4 arranged along the fourth direction DR4 and columns C1, C2, C3, and C4 arranged along the fifth direction DR5. The second emission area EA2 and the third emission area EA3 may be provided alternately in the first row R1 and the third row R3 along the fourth direction DR4. The first emission area EA1 and the fourth emission area EA4 may be provided alternately in the second row R2 and the fourth row R4 along the fourth direction DR4. The second emission area EA2 and the fourth emission area EA4 may be provided alternately in the first column C1 and the third column C3 along the fifth direction DR5. The first emission area EA1 and the third emission area EA3 may be provided alternately in the second column C2 and the fourth column C4 along the fifth direction DR5.

[0126] In some embodiments, a plurality of emission areas EA1, EA2, EA3, and EA4 may be arranged along the first direction DR1 or the second direction DR2. The first emission area EA1 and the second emission area EA2 may be provided alternately along the first direction DR1 and the second direction DR2. The third emission area EA3 and the fourth emission area EA4 may be provided alternately along the first direction DR1 and the second direction DR2.

[0127] The first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 may be formed of a pixel defining layer PDL (see Fig. 9) are defined by a plurality of openings OPE1, OPE2, OPE3 and OPE4 in the pixel defining film. For example, the first emission area EA1 may be defined by the first opening OPE1 of the pixel defining film, the second emission area EA2 may be defined by the second opening OPE2 of the pixel defining film, the third emission area EA3 may be defined by the third opening OPE3 of the pixel defining film, and the fourth emission area EA4 may be defined by the fourth opening OPE4 of the pixel defining film.

[0128] In an embodiment, the areas or sizes of the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 may be different from each other. Figure 8 In the embodiment, the area of ​​the second emission area EA2 may be larger than the area of ​​the first emission area EA1, the area of ​​the third emission area EA3, and the area of ​​the fourth emission area EA4, and the area of ​​the first emission area EA1 may be larger than the area of ​​the third emission area EA3 and the area of ​​the fourth emission area EA4. The areas of the emission areas EA1, EA2, EA3, and EA4 may vary depending on the sizes of the openings OPE1, OPE2, OPE3, and OPE4 formed in the pixel defining film. The intensity of light emitted from the emission areas EA1, EA2, EA3, and EA4 may vary depending on the areas of the emission areas EA1, EA2, EA3, and EA4, and the color sense of the picture displayed on the display device 10 or the electronic device 1 may be controlled by adjusting the areas of the emission areas EA1, EA2, EA3, and EA4. Figure 8 In the embodiment of the present disclosure, it has been shown that the second emission area EA2 has the largest area, but the present disclosure is not limited to this. The areas of the emission areas EA1, EA2, EA3 and EA4 can be freely adjusted according to the color sense of the picture required or used by the display device 10 and the electronic device 1. In some embodiments, the areas of the emission areas EA1, EA2, EA3 and EA4 may be related to light efficiency, the life of the light-emitting element ED, etc., and may have a trade-off relationship with external light reflection. The areas of the emission areas EA1, EA2, EA3 and EA4 can be adjusted considering the above and / or other factors.

[0129] It has been shown and described that the multiple openings OPE1, OPE2, OPE3 and OPE4 and each of the multiple holes OPT1, OPT2, OPT3 and OPT4 have a circular shape, but the present disclosure is not limited to this, and the multiple openings OPE1, OPE2, OPE3 and OPE4 and each of the multiple holes OPT1, OPT2, OPT3 and OPT4 may have various suitable shapes, such as an elliptical shape or a polygonal shape whose edges are formed into curves.

[0130] Each of the plurality of pixels PX1, PX2, and PX3 may include a first emission area EA1, a second emission area EA2, a third emission area EA3, and a fourth emission area EA4 provided adjacent to each other to represent a white grayscale. However, the present disclosure is not limited thereto, and the combination of the emission areas EA1, EA2, EA3, and EA4 constituting one pixel group may be variously modified depending on the arrangement of the emission areas EA1, EA2, EA3, and EA4, the color of light emitted by the emission areas EA1, EA2, EA3, and EA4, and the like.

[0131] The non-emission area NEA may be an area other than the emission areas EA1, EA2, EA3, and EA4. The non-emission area NEA may be located between the emission areas EA1, EA2, EA3, and EA4. The non-emission area NEA may overlap with the pixel defining film. For example, the non-emission area NEA may have the same area as the pixel defining film.

[0132] The display device 10 may include a plurality of color filters CF1 and CF2 (see Fig. 9 ) and a color pattern. Each of the plurality of color filters CF1 and CF2 and the color pattern may correspond to the emission areas EA1, EA2, EA3, and EA4. For example, the color filters CF1 and CF2 and the color pattern may overlap with the emission areas EA1, EA2, EA3, and EA4, the openings OPE1, OPE2, OPE3, and OPE4, or the plurality of holes OPT1, OPT2, OPT3, and OPT4. The plurality of holes OPT1, OPT2, OPT3, and OPT4 may overlap with the openings OPE1, OPE2, OPE3, and OPE4, and may form a light emitting area through which light emitted from the emission areas EA1, EA2, EA3, and EA4 is emitted. Each of the color filters CF1 and CF2 and the color pattern may have an area larger than an area of ​​each of the holes OPT1, OPT2, OPT3 and OPT4 and the openings OPE1, OPE2, OPE3 and OPE4, and may completely cover each of the light emitting regions formed by the holes OPT1, OPT2, OPT3 and OPT4.

[0133] The color filters CF1 and CF2 and the color pattern may each correspond to different emission areas EA1, EA2, EA3, and EA4. The color filters CF1 and CF2 may include a first color filter CF1 and a second color filter CF2. The color filters CF1 and CF2 and the color pattern may include a colorant such as a dye and / or a pigment that absorbs light of a wavelength band other than a set or specific wavelength band, and may correspond to the color of light emitted from the emission areas EA1, EA2, EA3, and EA4.

[0134] For example, the first color filter CF1 may be a red color filter provided to overlap with the first emission area EA1 and to transmit only the first light as red light. The second color filter CF2 may be a blue color filter provided to overlap with the second emission area EA2 and to transmit only the second light as blue light. The color pattern may be a green color filter provided to overlap with the third emission area EA3 and the fourth emission area EA4 and to transmit only the third light as green light.

[0135] The first color filter CF1 may overlap with the first emission area EA1, but may be provided so as not to overlap with the second emission area EA2, the third emission area EA3, and the fourth emission area EA4. The second color filter CF2 may overlap with the second emission area EA2, but may be provided so as not to overlap with the first emission area EA1, the third emission area EA3, and the fourth emission area EA4. The color pattern may be provided so as to overlap with the third emission area EA3 and the fourth emission area EA4, but may be provided so as not to overlap with the first emission area EA1 and the second emission area EA2. The color filters CF1 and CF2 and the color pattern may be provided so as to overlap with the non-emission area NEA.

[0136] According to an embodiment, a plurality of color filters CF1 and CF2 and color patterns may be provided to partially overlap other adjacent color filters CF1 and CF2 and color patterns. Figure 8 An arrangement of the color filters CF1 and CF2 and the color pattern viewed from above is illustrated, and the color filters CF1 and CF2 and the color pattern overlapping each other may overlap each other in the non-emission area NEA.

[0137] In the display device 10, the color filters CF1 and CF2 and the color pattern are provided to overlap each other, and accordingly, the intensity of the reflected light of the external light can be reduced. In addition, the color sense of the reflected light of the external light can be controlled by adjusting the arrangement, shape, area, etc. of the color filters CF1 and CF2 and the color pattern in a plan view.

[0138] The touch electrode SEN may be located between the emission areas EA1, EA2, EA3, and EA4. The touch electrode SEN may extend in the fourth direction DR4 and the fifth direction DR5, may not overlap with the emission areas EA1, EA2, EA3, and EA4, and may be spaced apart from the emission areas EA1, EA2, EA3, and EA4. The touch electrode SEN may be connected to a pixel definition film PDL (see FIG. 1 ) including openings OPE1, OPE2, OPE3, and OPE4, which will be further described below. Fig. 9 ) and a light blocking layer BM including a plurality of holes OPT1, OPT2, OPT3 and OPT4 (see Fig. 9 ) overlap. Figure 8 The touch electrode SEN is briefly shown in FIG. 1 , but the touch electrode SEN may be Figure 7Any one of the driving electrode TE and the sensing electrode RE.

[0139] In some embodiments, the diameter of the openings OPE1, OPE2, OPE3, and OPE4 forming the emission areas EA1, EA2, EA3, and EA4 may be smaller than the diameter of the holes OPT1, OPT2, OPT3, and OPT4. The holes OPT1, OPT2, OPT3, and OPT4 may be defined between the areas where the first color filter CF1, the second color filter CF2, and the color pattern overlap each other. The opening interval between the openings OPE1, OPE2, OPE3, and OPE4 and the holes OPT1, OPT2, OPT3, and OPT4 may be defined for each of the emission areas EA1, EA2, EA3, and EA4. The opening interval may be defined as the difference in diameter between the openings OPE1, OPE2, OPE3, and OPE4 of the pixel defining film PDL and the holes OPT1, OPT2, OPT3, and OPT4. In the display device 10, the opening intervals between the openings OPE1, OPE2, OPE3, and OPE4 and the holes OPT1, OPT2, OPT3, and OPT4 in the same emission areas EA1, EA2, EA3, and EA4 belonging to different pixels PX1, PX2, and PX3 may be different from each other. In the first pixel PX1, the second pixel PX2, and the third pixel PX3, the emission areas EA1, EA2, EA3, and EA4 emit light of the same color, but the opening intervals between the openings OPE1, OPE2, OPE3, and OPE4 in the emission areas EA1, EA2, EA3, and EA4 and the holes OPT1, OPT2, OPT3, and OPT4 may be different from each other.

[0140] For example, the first pixel PX1, the second pixel PX2, and the third pixel PX3 may respectively include a first emission area EA1 that emits red light, but the opening intervals of the first emission area EA1 in the corresponding pixels PX1, PX2, and PX3 may be different from each other. In some embodiments, in the first pixel PX1, the second pixel PX2, and the third pixel PX3, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 may also emit light of the same color, but the opening intervals of the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 in the first pixel PX1, the second pixel PX2, and the third pixel PX3 may be different from each other. In some embodiments, in the corresponding pixels PX1, PX2, and PX3, the opening intervals of the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 may be different from each other.

[0141] Fig. 9 is along Figure 8 A cross-sectional view taken along line XX'. Fig. 9A cross section through the first emission area EA1 , the third emission area EA3 and the second emission area EA2 is shown.

[0142] Apart from Figure 8 In addition, we will now refer to Fig. 9 The cross-sectional structure of the display device 10 is described. The display panel 100 of the display device 10 may include a display layer DU, a touch sensing layer TSU, and a reflection reduction layer RPL. The display layer DU may include a substrate SUB, a thin film transistor layer TFTL, a light emitting element layer EML, and an encapsulation layer TFEL. The display panel 100 may include a reflection reduction layer RPL on the touch sensing layer TSU, and the reflection reduction layer RPL may include a light blocking layer BM and a color filter layer CFL.

[0143] The substrate SUB may be a base substrate or a base member. The substrate SUB may be a flexible substrate that can be bent, folded and / or rolled. As an example, the substrate SUB may include a polymer resin such as polyimide (PI), but is not limited thereto. As another example, the substrate SUB may include a glass material and / or a metal material.

[0144] The thin film transistor layer TFTL may include a first buffer layer BF1, a bottom metal layer BML, a second buffer layer BF2, a thin film transistor TFT, a gate insulating layer GI, a first interlayer insulating layer ILD1, a capacitor electrode CPE, a second interlayer insulating layer ILD2, a first connection electrode CNE1, a first passivation layer PAS1, a second connection electrode CNE2, and a second passivation layer PAS2.

[0145] The first buffer layer BF1 may be on the substrate SUB. The first buffer layer BF1 may include an inorganic film capable of preventing or reducing penetration of air and / or moisture. For example, the first buffer layer BF1 may include a plurality of inorganic films alternately stacked.

[0146] The bottom metal layer BML may be on the first buffer layer BF1. For example, the bottom metal layer BML may be formed as a single layer or a multilayer made of any one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), tantalum (Ta), and copper (Cu), and / or alloys thereof.

[0147] The second buffer layer BF2 may cover the first buffer layer BF1 and the bottom metal layer BML. The second buffer layer BF2 may include an inorganic film capable of preventing or reducing the penetration of air and / or moisture. For example, the second buffer layer BF2 may include a plurality of inorganic films alternately stacked.

[0148] The thin film transistor TFT may be on the second buffer layer BF2 and may constitute a pixel circuit of each of the plurality of pixels. For example, the thin film transistor TFT may be a driving transistor or a switching transistor of the pixel circuit. The thin film transistor TFT may include a semiconductor layer ACT, a source electrode SE, a drain electrode DE, and a gate electrode GE.

[0149] The semiconductor layer ACT may be on the second buffer layer BF2. The semiconductor layer ACT may overlap the bottom metal layer BML and the gate electrode GE in the thickness direction, and may be insulated (e.g., electrically insulated) from the gate electrode GE by the gate insulating layer GI. The material of the semiconductor layer ACT in a portion of the semiconductor layer ACT may become a conductor (e.g., an electrical conductor) to form a source electrode SE and a drain electrode DE.

[0150] The gate electrode GE may be on the gate insulating layer GI. The gate electrode GE may overlap the semiconductor layer ACT via the gate insulating layer GI.

[0151] The gate insulating layer GI may be on the semiconductor layer ACT. For example, the gate insulating layer GI may cover the semiconductor layer ACT and the second buffer layer BF2, and may insulate (eg, electrically insulate) the semiconductor layer ACT and the gate electrode GE from each other. The gate insulating layer GI may include a contact hole through which the first connection electrode CNE1 passes.

[0152] The first interlayer insulating layer ILD1 may cover the gate electrode GE and the gate insulating layer GI. The first interlayer insulating layer ILD1 may include a contact hole through which the first connection electrode CNE1 passes. The contact hole of the first interlayer insulating layer ILD1 may be connected to the contact hole of the gate insulating layer GI and the contact hole of the second interlayer insulating layer ILD2.

[0153] The capacitor electrode CPE may be on the first interlayer insulating layer ILD1. The capacitor electrode CPE may overlap the gate electrode GE in a thickness direction. The capacitor electrode CPE and the gate electrode GE may form a capacitor.

[0154] The second interlayer insulating layer ILD2 may cover the capacitor electrode CPE and the first interlayer insulating layer ILD1. The second interlayer insulating layer ILD2 may include a contact hole through which the first connection electrode CNE1 passes. The contact hole of the second interlayer insulating layer ILD2 may be connected to the contact hole of the first interlayer insulating layer ILD1 and the contact hole of the gate insulating layer GI.

[0155] The first connection electrode CNE1 may be on the second interlayer insulating layer ILD2. The first connection electrode CNE1 may electrically connect the drain electrode DE of the thin film transistor TFT and the second connection electrode CNE2 to each other. The first connection electrode CNE1 may be inserted into a contact hole formed in the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1, and the gate insulating layer GI to contact the drain electrode DE of the thin film transistor TFT.

[0156] The first passivation layer PAS1 may cover the first connection electrode CNE1 and the second interlayer insulating layer ILD2. The first passivation layer PAS1 may protect the thin film transistor TFT. The first passivation layer PAS1 may include a contact hole through which the second connection electrode CNE2 passes.

[0157] The second connection electrode CNE2 may be on the first passivation layer PAS1. The second connection electrode CNE2 may electrically connect the first connection electrode CNE1 and the pixel electrode AE ​​of the light emitting element ED to each other. The second connection electrode CNE2 may be inserted into a contact hole formed in the first passivation layer PAS1 to contact the first connection electrode CNE1.

[0158] The second passivation layer PAS2 may cover the second connection electrode CNE2 and the first passivation layer PAS1. The second passivation layer PAS2 may include a contact hole through which the pixel electrode AE ​​of the light emitting element ED passes.

[0159] The light emitting element layer EML may be on the thin film transistor layer TFTL. The light emitting element layer EML may include a light emitting element ED and a pixel defining layer PDL. The light emitting element ED may include a pixel electrode AE, a light emitting layer EL, and a common electrode CO.

[0160] The pixel electrode AE ​​may be on the second passivation layer PAS2. The pixel electrode AE ​​may be arranged to overlap any one of the openings OPE1, OPE2, OPE3, and OPE4 of the pixel defining film PDL. The pixel electrode AE ​​may be electrically connected to the drain electrode DE of the thin film transistor TFT through the first connection electrode CNE1 and the second connection electrode CNE2.

[0161] The light emitting layer EL may be on the pixel electrode AE. For example, the light emitting layer EL may be an organic light emitting layer made of an organic material, but is not limited thereto. In an embodiment where the light emitting layer EL is an organic light emitting layer, when the thin film transistor TFT applies a set or predetermined voltage to the pixel electrode AE ​​of the light emitting element ED and the common electrode CO of the light emitting element ED receives a common voltage or a cathode voltage, holes and electrons may move to the light emitting layer EL through the hole transport layer and the electron transport layer, respectively, and may combine with each other in the light emitting layer EL to emit light.

[0162] The common electrode CO may be on the light emitting layer EL. For example, the common electrode CO is not segmented for each of the plurality of pixels, and may be implemented in the form of an electrode common to all pixels. The common electrode CO may be located on the light emitting layer EL in the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4, and may be located on the pixel defining film PDL in areas other than the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4.

[0163] The common electrode CO may receive a common voltage or a low potential voltage. When the pixel electrode AE ​​receives a voltage corresponding to the data voltage and the common electrode CO receives a low potential voltage, a potential difference is formed between the pixel electrode AE ​​and the common electrode CO so that the light emitting layer EL may emit light.

[0164] The pixel defining film PDL may include a plurality of openings OPE1, OPE2, OPE3, and OPE4 and may be on a portion of the second passivation layer PAS2 and the pixel electrode AE. The pixel defining film PDL may include a first opening OPE1, a second opening OPE2, a third opening OPE3, and a fourth opening OPE4, and the corresponding openings OPE1, OPE2, OPE3, and OPE4 may expose a portion of the pixel electrode AE. As described above, the openings OPE1, OPE2, OPE3, and OPE4 of the pixel defining film PDL may define a first emission area EA1, a second emission area EA2, a third emission area EA3, and a fourth emission area EA4, respectively, and may have different areas or sizes. The pixel defining film PDL may space and insulate (e.g., electrically insulate) the pixel electrodes AE of the plurality of light emitting elements ED from each other. The pixel defining film PDL may include a light absorbing material to prevent or reduce light reflection. For example, the pixel defining film PDL may include a polyimide (PI)-based binder and pigments in which red, green, and blue are mixed with each other. In some embodiments, the pixel defining layer PDL may include a cardo-based binder resin and a mixture of a lactam black pigment and a blue pigment. In some embodiments, the pixel defining layer PDL may include carbon black.

[0165] The encapsulation layer TFEL may be on the common electrode CO to cover the plurality of light emitting elements ED. The encapsulation layer TFEL may include at least one inorganic film to prevent or reduce oxygen and / or moisture from penetrating into the light emitting element layer EML. The encapsulation layer TFEL may include at least one organic film to protect the light emitting element layer EML from foreign matter such as dust.

[0166] In an embodiment, the encapsulation layer TFEL may include a first encapsulation layer TFE1, a second encapsulation layer TFE2, and a third encapsulation layer TFE3. The first encapsulation layer TFE1 and the third encapsulation layer TFE3 may be inorganic encapsulation layers, and the second encapsulation layer TFE2 between the first encapsulation layer TFE1 and the third encapsulation layer TFE3 may be an organic encapsulation layer.

[0167] Each of the first encapsulation layer TFE1 and the third encapsulation layer TFE3 may include one or more inorganic insulating materials (eg, inorganic electrical insulating materials). The inorganic insulating materials may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride.

[0168] The second encapsulation layer TFE2 may include a polymer-based material. The polymer-based material may include an acrylic resin, an epoxy resin, a polyimide, a polyethylene, etc. For example, the second encapsulation layer TFE2 may include an acrylic resin such as polymethyl methacrylate and / or polyacrylic acid. The second encapsulation layer TFE2 may be formed by curing a monomer and / or applying a polymer.

[0169] The touch sensing layer TSU may be on the encapsulation layer TFEL. The touch sensing layer TSU may include a first touch insulating layer SIL1, a second touch insulating layer SIL2, a touch electrode SEN, and a third touch insulating layer SIL3.

[0170] The first touch insulating layer SIL1 may be on the encapsulation layer TFEL. The first touch insulating layer SIL1 may have insulating (eg, electrical insulation) and optical functions. The first touch insulating layer SIL1 may include at least one inorganic film and / or organic film. Optionally, the first touch insulating layer SIL1 may be omitted.

[0171] The second touch insulating layer SIL2 may cover the first touch insulating layer SIL1. In some embodiments, there may be another layer of touch electrodes on the first touch insulating layer SIL1, and the second touch insulating layer SIL2 may cover such touch electrodes. The second touch insulating layer SIL2 may have insulating and optical functions. For example, the second touch insulating layer SIL2 may be an inorganic film and / or an organic film including at least one selected from a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0172] Some of the touch electrodes SEN may be on the second touch insulating layer SIL2. Each of the touch electrodes SEN may not overlap with the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4. Each of the touch electrodes SEN may be formed as a single layer made of molybdenum (Mo), titanium (Ti), copper (Cu), tantalum (Ta), aluminum (Al), and / or indium tin oxide (ITO), or formed as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, and / or a stacked structure of an APC alloy and ITO (ITO / APC / ITO).

[0173] The third touch insulating layer SIL3 may cover the touch electrode SEN and the second touch insulating layer SIL2. The third touch insulating layer SIL3 may have insulating (eg, electrical insulation) and optical functions. The third touch insulating layer SIL3 may be made of the material of the exemplary second touch insulating layer SIL2.

[0174] The reflection reduction layer RPL may be on the touch sensing layer TSU. The reflection reduction layer RPL may include a light blocking layer BM and a color filter layer CFL. The display device 10 according to the embodiment includes the reflection reduction layer RPL implemented by the light blocking layer BM and the color filter layer CFL, so that the polarization layer attached to the display layer DU by a separate bonding member such as a pressure sensitive adhesive (PSA) or an optically clear adhesive (OCA) may be omitted.

[0175] The light blocking layer BM may be on the third touch insulating layer SIL3 of the touch sensing layer TSU. The light blocking layer BM may cover the conductive lines of the touch electrodes SEN, and may include a plurality of holes OPT1, OPT2, OPT3, and OPT4 provided to overlap with the emission areas EA1, EA2, EA3, and EA4. For example, the first hole OPT1 may be provided to overlap with the first emission area EA1 or the first opening OPE1. The second hole OPT2 may be provided to overlap with the second emission area EA2 or the second opening OPE2, and the third hole OPT3 may be provided to overlap with the third emission area EA3 or the third opening OPE3. In some embodiments, the fourth hole OPT4 may be provided to overlap with the fourth emission area EA4 or the fourth opening OPE4. The area or size of the corresponding holes OPT1, OPT2, OPT3, and OPT4 may be greater than the area or size of the openings OPE1, OPE2, OPE3, and OPE4 of the pixel defining film PDL. The holes OPT1, OPT2, OPT3 and OPT4 of the light blocking layer BM are formed to be larger than the openings OPE1, OPE2, OPE3 and OPE4 of the pixel defining film PDL, and accordingly, the light emitted from the emission areas EA1, EA2, EA3 and EA4 can be observed by the user not only from the front surface of the display device 10 but also from the side surface of the display device 10.

[0176] The light-blocking layer BM may include a light-absorbing material. For example, the light-blocking layer BM may include an inorganic black pigment and / or an organic black pigment. The inorganic black pigment may be carbon black, and the organic black pigment may include at least one selected from lactam black, perylene black, and aniline black, but the present disclosure is not limited thereto. The light-blocking layer BM may prevent or reduce color mixing caused by penetration of visible light between the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 to improve the color gamut of the display device 10.

[0177] The color filters CF1, CF2, CF3, and CF4 of the color filter layer CFL may be on the light blocking layer BM. Different color filters CF1, CF2, CF3, and CF4 may correspond to different emission areas EA1, EA2, EA3, and EA4 or openings OPE1, OPE2, OPE3, and OPE4 and holes OPT1, OPT2, OPT3, and OPT4 of the light blocking layer BM, respectively. For example, the first color filter CF1 may correspond to the first emission area EA1, the second color filter CF2 may correspond to the second emission area EA2, and the third color filter CF3 may correspond to the third emission area EA3. The first color filter CF1 may be provided in the first hole OPT1 of the light blocking layer BM, the second color filter CF2 may be provided in the second hole OPT2 of the light blocking layer BM, and the third color filter CF3 may be provided in the third hole OPT3 of the light blocking layer BM. In some embodiments, the fourth color filter CF4 may be provided in the fourth hole OPT4 of the light blocking layer BM to correspond to the fourth emission area EA4. In a plan view, each of the color filters CF1, CF2, CF3 and CF4 may have an area larger than that of each of the holes OPT1, OPT2, OPT3 and OPT4 of the light blocking layer BM, and a portion of each of the color filters CF1, CF2, CF3 and CF4 may be directly on the light blocking layer BM.

[0178] The planarization layer OC may be on the color filters CF1, CF2, CF3, and CF4 to planarize the upper ends of the color filters CF1, CF2, CF3, and CF4. The planarization layer OC may be a colorless light-transmitting layer having no color in the visible light band. For example, the planarization layer OC may include a colorless light-transmitting organic material such as acrylic resin.

[0179] According to an embodiment, the color filters CF1, CF2, CF3, and CF4 of the display device 10 may overlap with other color filters CF1, CF2, CF3, and CF4 adjacent thereto on the light-blocking layer BM. The color filters CF1, CF2, CF3, and CF4 on the light-blocking layer BM may be provided so that two color filters CF1, CF2, CF3, and CF4 adjacent to each other completely cover the light-blocking layer BM. Two color filters CF1, CF2, CF3, and CF4 adjacent to each other may partially overlap on the light-blocking layer BM. Such an overlap between the color filters CF1, CF2, CF3, and CF4 may reduce external light reflection caused by the light-blocking layer BM, and the overlapping arrangement of the color filters CF1, CF2, CF3, and CF4 may be designed to further reduce external light reflection.

[0180] For example, in the display device 10, the first color filter CF1 and the third color filter CF3 adjacent to each other may overlap each other on the light blocking layer BM, and the second color filter CF2 and the third color filter CF3 may also overlap each other on the light blocking layer BM. The first color filter CF1 and the fourth color filter CF4 adjacent to each other and the second color filter CF2 and the fourth color filter CF4 adjacent to each other may also overlap each other on the light blocking layer BM.

[0181] The light-blocking layer BM may include a material that absorbs light, but some of the light incident from the outside may also be reflected by the light-blocking layer BM. The color filters CF1, CF2, CF3, and CF4 provided in the holes OPT1, OPT2, OPT3, and OPT4 of the light-blocking layer BM may be partially provided directly on the light-blocking layer BM and may completely cover the light-blocking layer BM. Two different color filters CF1, CF2, CF3, and CF4 adjacent to each other may include different colorants and may overlap each other on the light-blocking layer BM, and accordingly, the external light reflection caused by the light-blocking layer BM may be reduced. However, the transmittance of the color filters CF1, CF2, CF3, and CF4 may be changed according to the materials constituting the color filters CF1, CF2, CF3, and CF4, and the reflection of the external light may be more effectively reduced according to the overlapping order of the color filters CF1, CF2, CF3, and CF4.

[0182] Hereinafter, the optical film OPF provided on the front of the cover window CW will be further described.

[0183] Fig.10 is a schematic cross-sectional view showing an optical film of a display device according to an embodiment.

[0184] Reference Fig.10 , the optical film OPF according to the embodiment may include a base layer BFL, a hard coating layer HCL on the base layer BFL, a low refractive layer LRL on the hard coating layer HCL, and an anti-fingerprint layer AFL on the low refractive layer LRL.

[0185] The base layer BFL may include a transparent polymer film. The transparent polymer film may include at least one selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), polyimide (PI), polyarylate (PAR), polycarbonate (PC), polymethyl methacrylate (PMMA), triacetyl cellulose (TAC), cyclic olefin copolymer (COC), and polyether block amide (PEBA) resins. However, the present disclosure is not limited thereto.

[0186] In some embodiments, the base layer BFL is formed of a self-healing composition comprising an elastomeric resin based on any one selected from silicone, urethane and urethane acrylate, so that the urethane acrylate resin in the base layer BFL may have a ladder structure in which they may be supported by aromatic groups, heteroaromatic groups, or both aromatic groups and heteroaromatic groups.

[0187] The aromatic urethane acrylate resin may be a urethane acrylate resin having an average number of functional groups of 2 to 5, and may be formed by reacting a polymerizable composition including an acrylate containing a hydroxyl group with an isocyanate compound. In some embodiments, at least one selected from the acrylate containing a hydroxyl group and the isocyanate compound may include an aromatic group, a heteroaromatic group, or both an aromatic group and a heteroaromatic group, but is not limited thereto.

[0188] In an embodiment, the base layer BFL may have a single-layer structure. For example, the base layer BFL may be configured as one base layer (eg, a single or only base layer). However, the present disclosure is not limited thereto, and the base layer BFL may have a multi-layer structure.

[0189] The base layer BFL may have a thickness of 50 μm to 200 μm. The base layer BFL may have appropriate or sufficient bendability and self-healing properties by having a thickness within the above thickness range, and thus may achieve uniform (or substantially uniform) performance.

[0190] The hard coating layer HCL may be on the base layer BFL. The hard coating layer HCL may reduce distortion and / or warping phenomena of the optical film OPF under severe conditions such as high temperature or high temperature and high humidity, and thus may improve reliability issues.

[0191] The hard coating layer HCL may include an organic layer. The organic layer may include at least one selected from acrylate-based compounds, urethane-based compounds, polyimide, polycarbonate, polyethersulfone, polyethylene naphthalate, polyphenylene sulfide, liquid crystal polymer (LCP), polymethyl methacrylate, and epoxy-based polymers, or a combination thereof.

[0192] In an embodiment, the hard coating layer HCL may include an organic layer and an organic-inorganic composite layer. In this case, the organic layer may include an acrylate-based compound. For example, the organic layer may include urethane acrylate. The organic layer may be between the base layer BFL and the organic-inorganic composite layer to serve as a stress buffer layer.

[0193] The organic material in the organic-inorganic composite layer may be at least one selected from acrylate-based compounds, urethane-based compounds and epoxy-based compounds, or a combination thereof. For example, the organic material may include urethane acrylate. The inorganic material in the organic-inorganic composite layer may be selected from silicon oxide (SiO 2 ), zirconium oxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), Tantalum Oxide (Ta 2 O 5 ), niobium oxide (Nb 2 O 5 and / or NbO 2 ) and at least one of the group consisting of glass beads.

[0194] The inorganic material can be provided in the form of a single type (or species) of the inorganic oxides listed above or a mixture thereof. In some embodiments, the inorganic material can be provided in various suitable forms to form an organic-inorganic composite layer. For example, silicon oxide can be provided in the form of particles, sols and / or hollow shapes.

[0195] In the organic-inorganic composite layer, an acrylate compound and inorganic particles as organic materials may be mixed with each other and provided at a weight ratio of 5: 5 to 8: 2. The organic-inorganic composite layer may form a hard coating layer HCL that is not easily broken by including both the acrylate compound and the inorganic particles to have impact absorption against external impact while improving surface hardness.

[0196] In an embodiment, the hard coating HCL may include an acrylate-based compound and a urethane-based compound. The acrylate-based compound and the urethane-based compound may be mixed with each other and polymerized from a monomer form. The acrylate-based compound may increase the hardness and wear resistance of the optical film OPF by increasing the hardness of the hard coating HCL. The urethane-based compound may increase the elasticity of the optical film OPF by providing flexibility to the hard coating HCL. In some embodiments, the percentage of acrylate-based compounds in the hard coating HCL may be 70% to 99.9%, and the percentage of urethane-based compounds in the hard coating HCL may be 0.1% to 30%. For example, the mixing ratio of the acrylate-based compound and the urethane-based compound may be 7:3 or more, and the percentage of the acrylate-based compound may be further increased. For example, the percentage of the acrylate-based compound may be further increased by making the mixing ratio of the acrylate-based compound and the urethane-based compound 7:3, 8:2, or 9:1.

[0197] In an embodiment, the hard coating layer HCL may include an acrylate-based compound. In this case, the acrylate-based compound may be an acrylic resin. In some embodiments, the hard coating layer HCL may improve the hardness and wear resistance of the optical film OPF by including an acrylic resin.

[0198] The hard coating layer HCL may have a thickness of 2 μm to 10 μm. The hard coating layer HCL may reduce distortion and / or warpage phenomena by having a thickness within the above thickness range, and thus may improve reliability issues.

[0199] The hard coating layer HCL may have a refractive index of 1.48 to 1.53. The hard coating layer HCL has a refractive index difference at an interface between the hard coating layer HCL and a low refractive layer LRL to be further described below by having a refractive index within the above refractive index range, and thus light emitted from the light emitting element layer may be refracted upward to increase emission efficiency and reduce reflection of external light.

[0200] The low refractive layer LRL may be on the hard coating layer HCL. The low refractive layer LRL may refract light emitted from the light emitting element layer upward to increase emission efficiency and reduce reflection of external light.

[0201] The low refractive layer LRL may include particles PCP dispersed in a transparent resin PR.

[0202] The resin PR may include one or more selected from the group consisting of acrylic, polysiloxane, polyurethane, polyurethane acrylate, polyimide, polymethylsilsesquioxane (PMSSQ), and polymethylmethacrylate (PMMA).

[0203] The PCP particles may be hollow particles. For example, the PCP particles may include a material selected from silicon dioxide (SiO 2 ), magnesium fluoride (MgF 2 ) and iron oxide (Fe 3 O 4 ) In some embodiments, the particle PCP may include a shell made of one or more of the above materials and a hollow (e.g., a hole or multiple holes) positioned inside the shell. In an embodiment, the diameter of the particle PCP may be 10nm to 200nm, and the thickness of the shell and the diameter of the hollow may be determined according to the diameter of the particle PCP.

[0204] The particles PCP contained in the low refractive layer LRL may be contained in a weight ratio of 10% to 50% relative to the resin PR. When the weight ratio of the particles PCP to the resin PR is 10% or more, the refractive index of the low refractive layer LRL may be reduced, and when the weight ratio of the particles PCP to the resin PR is 50% or less, the deterioration of the adhesiveness with the adjacent layer may be prevented or reduced. The low refractive layer LRL may be formed by coating and curing a solution containing the resin PR and a solvent in which the particles PCP are dispersed.

[0205] The low refractive layer LRL may have a thickness of 10 nm to 200 nm. The low refractive layer LRL may lower the refractive index and improve adhesion with a lower layer by having a thickness within the above thickness range to appropriately or sufficiently include the particles PCP.

[0206] The refractive index of the low refractive layer LRL may be less than the refractive index of the hard coating layer HCL. For example, the refractive index of the low refractive layer LRL may be 0.05 or more less than the refractive index of the hard coating layer HCL. When the difference between the refractive index of the low refractive layer LRL and the refractive index of the hard coating layer HCL is 0.05 or more, the total reflection of external light may be increased at the interface between the low refractive layer LRL and the hard coating layer HCL, thereby causing destructive interference with the light reflected from the surface of the low refractive layer LRL. Accordingly, the reflectivity of external light of the optical film OPF may be reduced. The refractive index of the low refractive layer LRL may be in the range of 1.3 to 1.43. However, the present disclosure is not limited thereto, and a lower refractive index may be used as long as it is less than the refractive index of the hard coating layer HCL.

[0207] The anti-fingerprint layer AFL may be on the low refractive layer LRL. The optical film OPF may be exposed to the outside and touched by a user's finger or the like. For example, the surface of the optical film OPF may be used as a touch surface for a touch sensor. The anti-fingerprint layer AFL may prevent the user's fingerprint from remaining (or reduce the occurrence or amount of residual fingerprints) by including a waterproof or oil-proof material to improve anti-contamination properties.

[0208] The anti-fingerprint layer AFL may include an acrylate-based compound and a fluorine-based additive. As an example, the anti-fingerprint layer AFL may be a layer including a fluorine-containing silane compound in which a silane portion and a fluorinated carbon portion are connected to each other through an alkyl chain. As another example, the fluorine-based additive may include one selected from polytetrafluoroethylene (PTFE), polyvinylidene fluoride (PVDF), and amorphous fluorine (Teflon AF or Cytop).

[0209] The anti-fingerprint layer AFL may have a thickness of 5 nm to 30 nm. The anti-fingerprint layer AFL may maintain or improve the anti-fingerprint property by having a thickness within the above thickness range.

[0210] The display device 10 described above may perform a folding operation and an unfolding operation around the folding axis FL. When the folding and unfolding of the display device 10 are repeated, cracks may occur in the optical film OPF. In an embodiment, the crack strain of the optical film OPF in the transverse direction (TD) and the crack strain of the optical film OPF in the machine direction (MD) may be 2% or more. For example, the crack strain of the optical film OPF in the machine direction (MD) may be 2% to 10%. Crack strain refers to the degree to which an object such as a film can withstand force when a force is applied in either direction, and the greater the crack strain, the higher the resistance to the formation of cracks. The crack strain can be measured by a nanoindenter. When the crack strain of the optical film OPF in the transverse direction (TD) and the crack strain of the optical film OPF in the machine direction (MD) is 2% or more, the occurrence of cracks in the optical film OPF caused by the compressive strain generated by the folding operation and unfolding operation of the display device 10 can be suppressed or reduced. A larger strain among the crack strain of the optical film OPF in the transverse direction (TD) and the crack strain of the optical film OPF in the machine direction (MD) may be, for example, 4% or more.

[0211] The optical film OPF may be provided at the uppermost portion of the display device 10 and may be touched by a user's finger, pen, etc. and / or directly exposed to external impact. In an embodiment, the hardness of the optical film OPF may be 35 Hv or more. When the hardness of the optical film OPF is 35 Hv or more, the occurrence of damage such as cracks caused by a user's finger, pen, and / or external impact can be reduced.

[0212] In some embodiments, the display device 10 including the optical film OPF including the low refractive layer LRL and the hard coating layer HCL may have a reflectivity of 4.8% or less. Here, the reflectivity may be measured on the upper surface of the optical film OPF.

[0213] Fig.11 is a cross-sectional view showing destructive interference of external light in the optical film.

[0214] Reference Fig.11 , light reflected from the surface of the low refractive layer LRL and light reflected from the interface between the low refractive layer LRL and the hard coating layer HCL among external light incident on the low refractive layer LRL may destructively interfere with each other according to the condition of the following formula.

[0215] Mode

[0216] d LR In / 4nLR

[0217]

[0218] In the above formula, d indicates the thickness of the layer, and n indicates the refractive index. LRIndicates the refractive index of the low refractive layer LRL, n HC indicates the refractive index of the hard coating HCL, and d LR Indicates the thickness of the low refractive layer LRL.

[0219] According to an embodiment, the thickness of the low refractive layer LRL is 70nm to 140nm, the refractive index of the low refractive layer LRL is 1.38 to 1.42, and the refractive index of the hard coating layer HCL is 1.48 to 1.53. The low refractive layer LRL and the hard coating layer HCL according to an embodiment of the present disclosure can reduce the reflection of external light by having a thickness and a refractive index satisfying the above formula to cause destructive interference of external light.

[0220] Hereinafter, various embodiments of the optical film of the display device will be further described.

[0221] Fig.12 is a cross-sectional view showing an optical film according to an embodiment.

[0222] Reference Fig.12 This embodiment is similar to the above reference Fig.10 The described embodiment is different in that the optical film OPF further includes a primer layer PRI. Hereinafter, contents overlapping with those of the above-described embodiment will not be repeatedly described, and contents different from those of the above-described embodiment will be described.

[0223] The optical film OPF according to the present embodiment may include a base layer BFL, a hard coating layer HCL on the base layer BFL, a low refractive layer LRL on the hard coating layer HCL, a primer layer PRI on the low refractive layer LRL, and an anti-fingerprint layer AFL on the primer layer PRI.

[0224] The primer layer PRI may be between the low refractive layer LRL and the anti-fingerprint layer AFL. The primer layer PRI may be used to improve the coupling force between the anti-fingerprint layer AFL and the low refractive layer LRL. The primer layer PRI may be formed by a primer treatment process. The primer treatment may improve the adhesion between the polymer film and the resin by polymerizing the polymer film.

[0225] The primer layer PRI may include acrylic, ester, urethane and / or siloxane-based polymer materials. For example, the primer layer PRI may include a silane coupling agent and an isocyanate.

[0226] The primer layer PRI may have a thickness of 10 nm to 30 nm. The primer layer PRI may improve the coupling force between the anti-fingerprint layer AFL and the low refractive layer LRL within the above thickness range.

[0227] In the optical film OPF including the primer layer PRI, the coupling force between the low refractive layer LRL and the anti-fingerprint layer AFL may be improved to improve the durability of the optical film OPF.

[0228] Fig.13 is a cross-sectional view showing an optical film according to an embodiment.

[0229] Reference Fig.13 This embodiment is similar to the above reference Fig.10 The described embodiment is different in that the optical film OPF further includes a high refractive layer HRL.

[0230] The optical film OPF according to the present embodiment may include a base layer BFL, a hard coating layer HCL on the base layer BFL, a high refractive layer HRL on the hard coating layer HCL, a low refractive layer LRL on the high refractive layer HRL, and an anti-fingerprint layer AFL on the low refractive layer LRL. Fig.13 As shown in , the primer layer PRI may be between the low refractive layer LRL and the anti-fingerprint layer AFL.

[0231] The high refractive layer HRL may be between the hard coating layer HCL and the low refractive layer LRL. The high refractive layer HRL may be below the low refractive layer LRL and may serve to cause destructive interference of external light at an interface between the high refractive layer HRL and the low refractive layer LRL to reduce reflectivity.

[0232] The high refractive layer HRL may include an inorganic material, an organic material, or an inorganic material and an organic material. Therefore, the high refractive layer HRL may be formed as an inorganic film, an organic film, or an organic film including inorganic particles.

[0233] The inorganic material included in the high refractive layer HRL may be one or more selected from the group consisting of zinc oxide, titanium oxide, zirconium oxide, niobium oxide, tantalum oxide, tin oxide, nickel oxide, silicon oxide, silicon nitride, indium nitride, and gallium nitride.

[0234] The organic material contained in the high refractive layer HRL may be selected from the group consisting of poly(3,4-ethylenedioxythiophene) (PEDOT), 4,4'-bis[N-(3-methylphenyl)-N-phenylamino]biphenyl (TPD), 4,4',4"-tris[(3-methylphenyl)phenylamino]triphenylamine (m-MTDATA), 1,3,5-tris[N,N-bis(2-methylphenyl)-amino]-benzene (o-MTDAB), 1,3,5-tris[N,N-bis(3-methylphenyl)-amino]-benzene (m-MTDAB), 1,3,5-tris[N,N-bis(2-methylphenyl)-amino]-benzene (o-MTDAB), 1,3,5-tris[N,N-bis(3-methylphenyl)-amino]-benzene (m-MTDAB), 1,3,5-tris[N,N-bis( One or more of the group consisting of 4-(4-methylphenyl)-amino]-benzene (p-MTDAB), 4,4'-bis[N,N-bis(3-methylphenyl)-amino]-diphenylmethane (BPPM), 4,4'-dicarbazolyl-1,1'-biphenyl (CBP), 4,4',4"-tri(N-carbazole)triphenylamine (TCTA), 2,2',2"-(1,3,5-benzomethylphenyl)tri-[1-phenyl-1H-benzimidazole] (TPBI) and 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ).

[0235] The refractive index of the high refractive layer HRL may be greater than that of the low refractive layer LRL in order to reduce reflection of external light. For example, the refractive index of the high refractive layer HRL may be greater than that of the low refractive layer LRL by 0.05 or more. The refractive index of the high refractive layer HRL may be in the range of 1.53 to 1.7. However, the present disclosure is not limited thereto, and a larger refractive index may be used as long as it is greater than the refractive index of the low refractive layer LRL.

[0236] The high refractive layer HRL may have a thickness of 50 nm to 200 nm. The high refractive layer HRL has a thickness within the above thickness range so that an interface between the high refractive layer HRL and the low refractive layer LRL may be formed to be flat (or substantially flat), and a reduction in the coupling force between the high refractive layer HRL and the hard coating layer HCL may be prevented or reduced.

[0237] The optical film OPF further including the high refractive layer HRL may further reduce reflection of external light by increasing a difference in refractive index at an interface between the high refractive layer HRL and the low refractive layer LRL.

[0238] Fig.14 is a cross-sectional view showing an optical film according to an embodiment.

[0239] Reference Fig.14 This embodiment is similar to the above reference Fig.10 The described embodiment differs in that a composite layer CPL is provided instead of the low refractive layer LRL and the anti-fingerprint layer AFL.

[0240] The optical film OPF according to the present embodiment may include a base layer BFL, a hard coating layer HCL on the base layer BFL, and a composite layer CPL on the hard coating layer HCL.

[0241] The composite layer CPL may be on the hard coating layer HCL. The composite layer CPL may compositely perform the functions of the low refractive layer and the anti-fingerprint layer. The composite layer CPL may be arranged at the uppermost portion of the optical film OPF, and may reduce the reflectivity of external light and prevent the user's fingerprint from remaining (or reduce the appearance of residual fingerprints).

[0242] The composite layer CPL may include particles PCP and anti-fingerprint material AFM dispersed in a transparent resin PR. The resin PR and particles PCP have been described in detail in the description of the low refractive layer LRL, and therefore, their description will not be repeated here. The composite layer CPL includes the anti-fingerprint material AFM as well as the material of the low refractive layer, so that the anti-pollution property of the composite layer CPL can be improved.

[0243] The anti-fingerprint material AFM may be a fluorine-based additive, and the fluorine-based additive may include one selected from polytetrafluoroethylene (PTFE), polyvinylidene fluoride (PVDF), and amorphous fluorine (Teflon AF and / or Cytop).

[0244] The composite layer CPL may have a thickness of 10 nm to 200 nm. The composite layer CPL may have a thickness within the above thickness range to appropriately or sufficiently contain the particles PCP to reduce the refractive index and improve the adhesion between the composite layer CPL and the lower layer, and may improve anti-contamination properties by containing the anti-fingerprint material AFM.

[0245] The refractive index of the composite layer CPL may be lower than that of the hard coating layer HCL in order to reduce the reflection of external light. For example, the refractive index of the composite layer CPL may be in the range of 1.3 to 1.48. However, the present disclosure is not limited thereto, and a lower refractive index may be used as long as it is lower than that of the hard coating layer HCL.

[0246] The optical film OPF including the composite layer CPL may realize a thin display device 10 due to a reduction in the thickness of the optical film OPF.

[0247] Hereinafter, experimental examples including examples will be provided to help understand the subject matter of the present disclosure. However, it should be apparent to those skilled in the art that such examples are only examples of the present disclosure and do not limit the claims, and various appropriate modifications and changes may be made without departing from the scope and spirit of the present disclosure. In addition, these modifications and changes will fall within the appended claims and their equivalents.

[0248] Manufacturing Example 1: Manufacturing of Optical Film

[0249] A base layer having a thickness of 65 μm was formed in one direction by a machine. A hard coating layer was formed by applying a urethane acrylic resin having a thickness of 5 μm to the base layer, and a low refractive layer having a thickness of 100 nm was formed by mixing an acrylic resin and silica particles with each other on the hard coating layer. An anti-fingerprint layer having a thickness of 20 nm was formed by mixing an acrylic resin and polytetrafluoroethylene with each other on the low refractive layer, thereby manufacturing an optical film.

[0250] Example 1

[0251] In Manufacturing Example 1, an optical film was manufactured by forming a hard coating layer at a ratio of 7:3 of an acrylate-based compound and a urethane-based compound.

[0252] Example 2

[0253] An optical film was manufactured under the same conditions as in Example 1 except that the low refractive layer was omitted.

[0254] Example 3

[0255] An optical film was manufactured under the same conditions as in Example 1, except that the high refractive layer was formed by applying PEDOT with a thickness of 100 nm between the low refractive layer and the hard coating layer.

[0256] Experimental Example 1

[0257] Evaluation of crack strain in optical film samples

[0258] The crack strains of the optical film manufactured according to Example 1 in the machine direction, the transverse direction and the 45° direction were measured and shown in Table 1. The crack strain was measured using a nanoindenter.

[0259] Table 1

[0260]

[0261] Referring to Table 1, the crack strain of the optical film according to Example 1 in the transverse direction is 2% or more, and the crack strain of the optical film according to Example 1 in the transverse direction is greater than the crack strain of the optical film according to Example 1 in the machine direction.

[0262] Production Example 2: Figure 5 Manufacturing of display devices

[0263] Manufactured by attaching an optical film to a display panel with a cover window attached Figure 5 In this case, a barrier layer and a plate are also provided under the display panel.

[0264] Example 4

[0265] A display device was manufactured by attaching the optical film according to Example 1 so that the lateral direction of the optical film was perpendicular to the folding axis.

[0266] Example 5

[0267] A display device was manufactured by attaching the optical film according to Example 1 so that the lateral direction of the optical film was arranged at 45° with respect to the folding axis.

[0268] Example 6

[0269] A display device was manufactured by attaching the optical film according to Example 1 so that the machine direction of the optical film was perpendicular to the folding axis.

[0270] Example 7

[0271] A display device was manufactured by attaching the optical film according to Example 2.

[0272] Example 8

[0273] The display device was manufactured by attaching the optical film according to Example 1. In this case, in #1, the refractive index of the low refractive layer of the optical film was 1.42, and in #2, the refractive index of the low refractive layer of the optical film was 1.40.

[0274] Example 9

[0275] A display device was manufactured by attaching the optical film according to Example 3. In this case, in #1, the refractive index of the low refractive layer of the optical film was 1.42 and the refractive index of the high refractive layer of the optical film was 1.59, and in #2, the refractive index of the low refractive layer of the optical film was 1.40 and the refractive index of the high refractive layer of the optical film was 1.59.

[0276] Experimental Example 2

[0277] Low temperature folding test of display device

[0278] The display devices manufactured according to Examples 4 to 6 were subjected to a folding test at a low temperature of −20° C. in which folding and unfolding were repeated 30,000 times while observing the presence or absence of cracks in the optical film, and the test results are shown in Table 2.

[0279] Table 2

[0280] Low temperature folding test results Example 4 30000 OK Example 5 30000 OK Example 6 1000 NG

[0281] Referring to Table 2, in Examples 4 and 5, no cracks occurred in the optical film in the folding test performed 30,000 times. On the other hand, in Example 6, cracks occurred in the optical film in the folding test performed 1,000 times.

[0282] From such results, it was confirmed that the occurrence of cracks in the optical film can be suppressed or reduced by arranging the direction in which the crack strain of the optical film is 2% or more and the folding axis to intersect with each other.

[0283] Experimental Example 3

[0284] Measurement of reflectivity of display devices

[0285] The reflectances of the display devices manufactured according to Examples 7 to 9 were measured and are shown in Table 3. Figures 15 to 17 , front black images of display devices manufactured according to Example 7, #1 of Example 8, and #1 of Example 9 are shown respectively.

[0286] Fig.15 is a front black image of the display device manufactured according to Example 7. Fig.16 This is a front black image of a display device manufactured according to #1 of Example 8. Fig.17 This is a front black image of a display device manufactured according to #1 of Example 9.

[0287] The reflectance is shown with specular component included (SCI) and specular component excluded (SCE), respectively. A front black image of the display device is captured with an optical camera.

[0288] Table 3

[0289]

[0290]

[0291] Referring to Table 3, in the display device according to Example 7 that does not include a low refractive layer, the reflectivity of the regular reflected light is 6.3. On the other hand, in the display device according to Example 8 that includes a low refractive layer, the reflectivity of the regular reflected light is 4.2 and 3.8, which is relatively low. In the display device according to Example 9 that includes a low refractive layer and a high refractive layer, the reflectivity of the regular reflected light is 2.9 and 2.6, which is relatively lower.

[0292] In addition, refer to Figures 15 to 17 , the front black color sense of the display device according to Example 8 is closer to black than the front black color sense of the display device according to Example 7, and the front black color sense of the display device according to Example 9 is closer to black than the front black color sense of the display device according to Example 8.

[0293] From such results, it can be confirmed that a display device including an optical film including a low refractive layer or a low refractive layer and a high refractive layer can significantly reduce the reflectivity of external light.

[0294] Manufacturing Example 3: Manufacturing of Test Substrate

[0295] A test substrate was manufactured by attaching the optical film according to Manufacturing Example 1 to a glass substrate using a pressure-sensitive adhesive (PSA).

[0296] Example 10

[0297] An optical film was manufactured by forming a hard coating layer at a ratio of 5.5:4.5 of an acrylate-based compound and a urethane-based compound in Manufacturing Example 1. According to Manufacturing Example 3, a test substrate was manufactured by attaching such an optical film.

[0298] Example 11

[0299] A test substrate was manufactured under the same conditions as in Example 10, except that the hard coating layer was formed at a ratio of 6:4 of the acrylate-based compound and the urethane-based compound.

[0300] Example 12

[0301] A test substrate was manufactured under the same conditions as in Example 10, except that the hard coating layer was formed at a ratio of 6.5:3.5 of the acrylate-based compound and the urethane-based compound.

[0302] Example 13

[0303] A test substrate was manufactured under the same conditions as in Example 10, except that the hard coating layer was formed at a ratio of 7:3 of the acrylate-based compound and the urethane-based compound.

[0304] Example 14

[0305] A test substrate was manufactured under the same conditions as in Example 10, except that the hard coating layer was formed at a ratio of 8:2 of the acrylate-based compound and the urethane-based compound.

[0306] Example 15

[0307] A test substrate was manufactured under the same conditions as in Example 10, except that the hard coating layer was formed at a ratio of 9:1 of the acrylate-based compound and the urethane-based compound.

[0308] Example 16

[0309] A test substrate was manufactured under the same conditions as in Example 10, except that the hard coating layer was formed of an acrylate-based compound.

[0310] Experimental Example 4

[0311] Evaluation of hardness and abrasion resistance of optical films

[0312] In the test substrates manufactured according to Examples 10 to 16, the hardness and abrasion resistance of the optical films were evaluated and shown in Table 4.

[0313] The hardness of the optical film was measured using a nanoindenter and was measured at a depth of 0.5 μm.

[0314] Use the following process to measure wear resistance: the eraser of 3cm is fixed to fixture so that it protrudes 5mm from the end of fixture, with the load of 1kg, eraser is contacted with test substrate, and with the length of 15mm reciprocating once as a cycle.Deionized (DI) water is dripped on the surface of test substrate to measure contact angle through every 1000 cycles, and record the cycle number when the contact angle of DI water is less than 95 °.

[0315] Table 4

[0316]

[0317] Referring to Table 4, in Examples 10, 11, and 12 in which the percentage of the acrylate-based compound in the hard coating layer was less than 70%, the hardness of the optical film was 30 or less, and the wear resistance of the optical film was 2000 cycles or less. On the other hand, in Examples 13 to 17 in which the percentage of the acrylate-based compound in the hard coating layer was 70% or more, the hardness of the optical film was 35 or more, and the wear resistance of the optical film was 3000 cycles or more.

[0318] Through such results, it can be confirmed that when the percentage of the acrylate-based compound in the hard coating layer of the optical film is 70% or more, the hardness and wear resistance of the optical film are improved. Specifically, as the percentage of the acrylate-based compound increases, the hardness and wear resistance of the optical film are improved.

[0319] At the end of the detailed description, those skilled in the art will recognize that many changes and modifications can be made to the disclosed embodiments without departing substantially from the principles of the present disclosure. Therefore, the disclosed embodiments of the present disclosure are used only in a general and descriptive sense and not for the purpose of limitation.

Claims

1. A display device, comprising: Display panel; a cover window, wherein the cover window is located on the display panel; as well as an optical film, the optical film being located on the cover window, Wherein, the optical film comprises: Base layer; a hard coating layer, the hard coating layer being disposed on the base layer; a low-refractive layer, the low-refractive layer being located on the hard coating layer; and an anti-fingerprint layer, the anti-fingerprint layer being located on the low-refractive layer, and The optical film has a hardness of 35 Hv or more and has a crack strain of 2% or more.

2. The display device according to claim 1, wherein: The hard coating layer includes an acrylate-based compound and a urethane-based compound.

3. The display device according to claim 2, wherein: The percentage of the acrylate-based compound is 70% to 99.9%, and the percentage of the urethane-based compound is 0.1% to 30%.

4. The display device according to claim 1, wherein: The hard coating layer includes an acrylate-based compound.

5. The display device according to claim 1, wherein: The hard coating layer has a thickness of 2 μm to 10 μm.

6. The display device according to claim 1, wherein: The hard coating layer has a refractive index of 1.48 to 1.

53.

7. The display device according to claim 1, wherein: The refractive index of the low refractive layer is smaller than the refractive index of the hard coating layer by 0.05 or more.

8. The display device according to claim 7, wherein: The refractive index of the low-refractive layer is 1.3 to 1.

43.

9. The display device according to claim 1, wherein: The crack strain of the optical film is a crack strain of the optical film in a machine direction or a transverse direction.

10. The display device according to claim 1, further comprising: A primer layer is located between the low-refractive layer and the anti-fingerprint layer.

11. The display device according to claim 1, further comprising: A high refractive layer is located between the low refractive layer and the hard coating layer.

12. The display device according to claim 11, wherein: The refractive index of the high refractive layer is greater than the refractive index of the low refractive layer by 0.05 or more.

13. The display device according to claim 12, wherein: The refractive index of the high refractive layer is 1.53 to 1.

7.

14. A display device, comprising: Display panel; a cover window, wherein the cover window is located on the display panel; as well as an optical film, the optical film being located on the cover window, Wherein, the optical film comprises: Base layer; a hard coating layer disposed on the base layer and comprising an acrylate-based compound; a low-refractive layer, the low-refractive layer being located on the hard coating layer; and an anti-fingerprint layer, the anti-fingerprint layer being located on the low-refractive layer, and The optical film has a hardness of 35 Hv or more.

15. The display device according to claim 14, wherein: The hard coating layer further includes a urethane-based compound, and the percentage of the acrylate-based compound is 70% or more.

16. The display device according to claim 14, wherein: The hard coating layer has a thickness of 2 μm to 10 μm.

17. The display device according to claim 14, wherein: The hard coating layer has a refractive index of 1.48 to 1.

53.

18. The display device according to claim 14, wherein: The refractive index of the low refractive layer is smaller than the refractive index of the hard coating layer by 0.05 or more.

19. The display device according to claim 18, wherein: The refractive index of the low-refractive layer is 1.3 to 1.

43.

20. The display device according to claim 14, wherein: The optical film has a crack strain of 2% or more in a transverse direction.

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