Current reference circuit with high precision and wide output voltage range

Abstract

The invention belongs to the field of analog integrated circuits, and relates to a current reference circuit with high precision and wide output voltage range, which comprises a clamping circuit, an asymmetric operational amplifier A, an isolating tube MP1 and a sampling resistor R, one end of the clamping circuit is connected with a power supply, and the other end of the clamping circuit is connected with the in-phase end of the asymmetric operational amplifier A. The output end of the asymmetric operational amplifier A is connected with the grid electrode of the isolation tube MP1, the source electrode of the isolation tube MP1 is connected with the anti-phase end of the asymmetric operational amplifier A, and the drain electrode of the isolation tube MP1 is the output end of the current reference circuit. One end of the sampling resistor R is connected with a power supply, and the other end is connected with the source electrode of the isolation tube MP1; according to the current reference circuit, reference voltage and high-precision current generated by the resistor R can be directly output outwards, a mirror image circuit and a special band-gap reference voltage generation circuit are not needed, the structure is simple, and the output end voltage range is wide.

Description

Technical Field

[0001] The invention belongs to the field of analog integrated circuits and relates to a current reference circuit with high precision and wide output voltage range. Background Art

[0002] Current reference is widely used in analog integrated circuits such as LDO, DC / DC converter, DAC / ADC, etc., and is an indispensable part of most analog and mixed digital / analog integrated circuits. The current reference circuit can generate a stable reference current that is insensitive to power supply voltage, temperature and process changes, thereby ensuring the performance of the overall circuit.

[0003] Traditional current reference circuits such as Figure 1 As shown, it is based on the band gap reference voltage V REF , a resistor R that defines the current size, a negative feedback loop composed of a high-gain operational amplifier A and NMOS tube MN1, and a mirror circuit.

[0004] However, the above circuit requires a bandgap reference voltage generating circuit, a high-gain operational amplifier circuit and a mirror image, and has a complex structure. In addition, the output reference current is output after the bandgap reference voltage and the high-precision current mirror image generated by the resistor R. Due to the mirror tube adaptation problem, the output current accuracy cannot be guaranteed. Summary of the invention

[0005] In order to solve the above-mentioned problems in the prior art, the present invention adopts a current reference circuit with high precision and wide output voltage range, including: a clamping circuit, an asymmetric operational amplifier A, an isolation tube MP1 and a sampling resistor R; one end of the clamping circuit is connected to a power supply, and the other end is connected to the non-inverting end of the asymmetric operational amplifier A, the output end of the asymmetric operational amplifier A is connected to the gate of the isolation tube MP1, the source of the isolation tube MP1 is connected to the inverting end of the asymmetric operational amplifier A, and the drain is the output end of the current reference circuit, and one end of the sampling resistor R is connected to the power supply, and the other end is connected to the source of the isolation tube MP1.

[0006] The voltage across the clamp circuit is V C The temperature coefficient is negative, and the offset voltage V OS The temperature coefficient is positive.

[0007] The voltage V across the sampling resistor R R The temperature coefficient of is the same as the temperature coefficient of the sampling resistor R.

[0008] The asymmetric operational amplifier includes transistors Q7 to Q20, resistors R11 to R21, and capacitor C1; one end of the resistors R11 to R12 is connected to the power supply V DDThe other end of the resistor R11 is connected to the emitter of the transistor Q7, the other end of the resistor R12 is connected to the emitter of the transistor Q8, the base of the transistor Q8 is connected to the sampling resistor R, the collectors of the transistors Q7 and Q8 are connected to the emitter of the transistor Q12, the collector of the transistor Q12 is connected to the emitter of the transistor Q13, the collector of the transistor Q13 is connected to one end of the resistor R17, and the other end of the resistor R17 is grounded; the emitter of the transistor Q9 is connected to the other end of the resistor R11, and the base is connected to one end of the resistor R14, the other end of the resistor R14 is respectively connected to the collector of the transistor Q9 and one end of the resistor R15, and the other end of the resistor R15 is respectively connected to the base of the transistor Q10 , the collector of transistor Q9 is connected to the emitter of transistor Q14, the collector of transistor Q14 is connected to the emitter of transistor Q15, the collector of transistor Q15 is connected to one end of resistor R18, and the other end of resistor R18 is grounded; the emitter of transistor Q10 is connected to the other end of resistor R12, the base is connected to one end of resistor R16, and the other end of resistor R16 is connected to the upper plate of capacitor C1; the collector of transistor Q10 and the lower plate of capacitor C1 are connected to the emitter of transistor Q16, the collector of transistor Q16 is connected to the emitter of transistor Q17, the collector of transistor Q17 is connected to one end of resistor R19, and the other end of resistor R19 is grounded; one end of resistor R13 is connected to the power supply V DD The emitter of transistor Q11 is connected to the other end of resistor R13, the base is connected to the collector of transistor Q10, the collector is respectively connected to the emitter of transistor Q19 and the gate of isolation tube MP1, the collector of transistor Q19 is connected to the emitter of transistor Q20, the collector of transistor Q20 is connected to one end of resistor R20, and the other end of resistor R20 is grounded.

[0009] The transistor Q7 and the transistor Q8 are bipolar transistors, and the ratio of their emitter areas is 1:n; wherein n is any real number greater than 1.

[0010] The clamping circuit includes: a transistor Q4 and resistors R8-R9; one end of the resistor R8 is connected to the power supply V DD The other end is connected to one end of the resistor R9 and the base of the transistor Q7; the emitter of the transistor Q4 is connected to the power supply V DD The base is connected to the emitter of the transistor Q4, and the collector is connected to the other end of the resistor R9.

[0011] The current reference circuit also includes: a startup and bias circuit; the startup and bias circuit includes: resistors R1 to R7 and transistors Q1 to Q3; one end of the resistor R1 is connected to the voltage V of the inverting end of the asymmetric operational amplifier A B, the other end is connected to one end of resistor R2 and the base of transistor Q2 respectively, the other end of resistor R2 is connected to one end of resistor R3 and the base of transistor Q1 respectively, the other end of resistor R3 is grounded, the emitter of transistor Q1 is connected to resistor R11, and the emitter of transistor Q2 is connected to resistor R12; the collectors of transistors Q1 and Q2 are connected to one end of resistor R4, and the other end of resistor R4 is grounded; one end of resistor R5 is connected to the voltage V of the inverting terminal of asymmetric operational amplifier A B The other end is connected to one end of the resistor R6 and the emitter of the transistor Q3 respectively, the base of the transistor Q3 is connected to the other end of the resistor R6, the collector is connected to one end of the resistor R7, and the other end of the resistor R7 is grounded.

[0012] The current reference circuit also includes: transistors Q5~Q6 and resistor R10; the clamping circuit, transistors Q5~Q6 and resistor R10 constitute the input branch of the non-inverting end of the asymmetric operational amplifier A; the emitter of transistor Q5 is connected to the clamping circuit, the collector is connected to the emitter of transistor Q6, the collector of transistor Q6 is connected to one end of resistor R10, and the other end of resistor R10 is grounded.

[0013] The bases of transistors Q5, Q12, Q14, Q16 and Q19 are connected to the voltage V at the inverting terminal of the asymmetric operational amplifier A through resistor R16. B The bases of transistor Q6, transistor Q13, transistor Q15, transistor Q17 and transistor Q20 are connected to resistor R6.

[0014] Beneficial effects:

[0015] The current reference circuit of the present invention comprises: a clamping circuit, an asymmetric operational amplifier A, an isolation tube MP1 and a sampling resistor R for defining the current size, and can directly output a reference voltage and a high-precision current generated by the sampling resistor R, without requiring a mirror circuit and a special bandgap reference voltage generating circuit, has a simple structure and a wide output voltage range, and can be widely used in analog integrated circuits that require a current reference, such as LDO, DC / DC converter, DAC / ADC, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A circuit diagram for generating a reference current based on a bandgap reference voltage provided by an embodiment of the present invention;

[0017] Figure 2 A schematic diagram of a current reference circuit with high precision and wide output voltage range provided by an embodiment of the present invention;

[0018] Figure 3 A current reference circuit diagram with high precision and wide output voltage range provided by an embodiment of the present invention;

[0019] Figure 4 A simulation diagram showing the change of the current reference circuit with temperature provided by an embodiment of the present invention;

[0020] Figure 5 This is a simulation diagram of the current reference circuit provided by an embodiment of the present invention changing with the power supply voltage. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] like Figure 2 As shown, the embodiment of the present invention adopts a current reference circuit with high precision and wide output voltage range, including: a clamping circuit, an asymmetric operational amplifier A, an isolation tube MP1 and a sampling resistor R; one end of the clamping circuit is connected to the power supply V DD The output end of the asymmetric operational amplifier A is connected to the gate of the isolation tube MP1, the source of the isolation tube MP1 is connected to the inverting end of the asymmetric operational amplifier A, and the drain is the output end of the current reference circuit. One end of the sampling resistor R is connected to the power supply, and the other end is connected to the source of the isolation tube MP1.

[0023] The voltage V across the clamp circuit is C It has a negative temperature characteristic, that is, the temperature coefficient is negative, and the offset voltage V of the asymmetric op amp A OS The temperature coefficient is positive. After the negative feedback loop is established, the voltage V across the resistor R R It is formed by superimposing a negative temperature characteristic voltage on a positive temperature characteristic voltage, which is:

[0024]

[0025] According to the temperature coefficient of resistor R, adjust V C 、V OS The temperature coefficient of the resistor R can be used to obtain the same voltage V as the temperature coefficient of the resistor R. R , so that the current flowing through the resistor R becomes zero temperature and can be directly output through MP1. The current I flowing through the resistor R REF for:

[0026]

[0027] In one embodiment, Figure 3As shown, resistors R1-R7 and transistors Q1-Q3 constitute a startup and bias circuit, transistors Q7-Q20, resistors R11-R21, and capacitor C1 constitute an asymmetric operational amplifier, the asymmetric operational amplifier and MP1 constitute a negative feedback operational amplifier, Q4, R8, and R9 constitute a clamping circuit, and the clamping circuit, Q5, Q6, and R10 constitute the input branch of the non-inverting end of the asymmetric operational amplifier.

[0028] In the asymmetric op amp, one end of resistors R11~R12 is connected to the power supply V DD The other end of the resistor R11 is connected to the emitter of the transistor Q7, the other end of the resistor R12 is connected to the emitter of the transistor Q8, the base of the transistor Q8 is connected to the sampling resistor R, the collectors of the transistors Q7 and Q8 are connected to the emitter of the transistor Q12, the collector of the transistor Q12 is connected to the emitter of the transistor Q13, the collector of the transistor Q13 is connected to one end of the resistor R17, and the other end of the resistor R17 is grounded; the emitter of the transistor Q9 is connected to the other end of the resistor R11, and the base is connected to one end of the resistor R14, the other end of the resistor R14 is respectively connected to the collector of the transistor Q9 and one end of the resistor R15, and the other end of the resistor R15 is respectively connected to the base of the transistor Q10 , the collector of transistor Q9 is connected to the emitter of transistor Q14, the collector of transistor Q14 is connected to the emitter of transistor Q15, the collector of transistor Q15 is connected to one end of resistor R18, and the other end of resistor R18 is grounded; the emitter of transistor Q10 is connected to the other end of resistor R12, the base is connected to one end of resistor R16, and the other end of resistor R16 is connected to the upper plate of capacitor C1; the collector of transistor Q10 and the lower plate of capacitor C1 are connected to the emitter of transistor Q16, the collector of transistor Q16 is connected to the emitter of transistor Q17, the collector of transistor Q17 is connected to one end of resistor R19, and the other end of resistor R19 is grounded; one end of resistor R13 is connected to the power supply V DD The emitter of transistor Q11 is connected to the other end of resistor R13, the base is connected to the collector of transistor Q10, the collector is respectively connected to the emitter of transistor Q19 and the gate of isolation tube MP1, the collector of transistor Q19 is connected to the emitter of transistor Q20, the collector of transistor Q20 is connected to one end of resistor R20, and the other end of resistor R20 is grounded.

[0029] In the clamping circuit, one end of the resistor R8 is connected to the power supply V DD The other end is connected to one end of the resistor R9 and the base of the transistor Q7; the emitter of the transistor Q4 is connected to the power supply V DD The base is connected to the emitter of the transistor Q4, and the collector is connected to the other end of the resistor R9.

[0030] In the startup and bias circuit, one end of the resistor R1 is connected to the voltage V at the inverting terminal of the asymmetric op amp A. B , the other end is connected to one end of resistor R2 and the base of transistor Q2 respectively, the other end of resistor R2 is connected to one end of resistor R3 and the base of transistor Q1 respectively, the other end of resistor R3 is grounded, the emitter of transistor Q1 is connected to resistor R11, and the emitter of transistor Q2 is connected to resistor R12; the collectors of transistors Q1 and Q2 are connected to one end of resistor R4, and the other end of resistor R4 is grounded; one end of resistor R5 is connected to the voltage V of the inverting terminal of asymmetric operational amplifier A B The other end is connected to one end of the resistor R6 and the emitter of the transistor Q3 respectively, the base of the transistor Q3 is connected to the other end of the resistor R6, the collector is connected to one end of the resistor R7, and the other end of the resistor R7 is grounded.

[0031] The emitter of the transistor Q5 is connected to the resistor R9 of the clamp circuit, and the collector is connected to the emitter of the transistor Q6. The collector of the transistor Q6 is connected to one end of the resistor R10, and the other end of the resistor R10 is grounded.

[0032] The bases of transistors Q5, Q12, Q14, Q16 and Q19 are connected to the voltage V at the inverting terminal of the asymmetric operational amplifier A through resistor R16. B The bases of transistor Q6, transistor Q13, transistor Q15, transistor Q17 and transistor Q20 are connected to the other end of resistor R6.

[0033] Among them, the base of Q7 tube (point A) is the non-inverting terminal of the asymmetric operational amplifier, and the base of Q8 tube (point B) is the inverting terminal of the asymmetric operational amplifier; the clamp circuit, Q5~Q6, and R10 constitute the input branch of the non-inverting terminal, so the input voltage V A for:

[0034]

[0035] After the op amp negative feedback loop is established, I C7 =I C8 =I C , I C7 ,I C8 is the collector current flowing through the op amp pair Q7 and Q8. Since Q7 and Q8 are bipolar transistors of the same type (NPN transistors) and the ratio of their emitter areas is 1:n (n>1), there will be an offset voltage V at the in-phase and inverting terminals of the op amp. OS , V OS for:

[0036]

[0037] Then the voltage V across the sampling resistor R R for:

[0038]

[0039] The current I flowing through the resistor R REF for:

[0040]

[0041] R8 and R9 are the same type of resistors. From the formula, we can see that the resistance temperature coefficients can cancel each other out. By taking the derivative of the voltage across the sampling resistor R with respect to temperature T, we can get:

[0042]

[0043] Among them, V T Represents thermal voltage, E g represents the semiconductor energy gap, q represents the unit electron charge, k represents the Boltzmann constant, m represents the temperature index of mobility, n represents the ratio of the emitter area of ​​Q8 tube to that of Q7 tube, V BE,Q4 is the emitter junction voltage of transistor Q4, V BE,Q7 is the emitter junction voltage of transistor Q7, V BE,Q8 is the emitter junction voltage of transistor Q8, V B,Q7 is the base voltage of transistor Q7, V B,Q8 is the base voltage of transistor Q8, I S7 is the reverse saturation current of the emitter junction of transistor Q7, I S8 is the reverse saturation current of the emitter junction of Q8, V B is the voltage at point B.

[0044] Because the bipolar transistor BE junction voltage V BE With negative temperature coefficient, thermal voltage V T With a positive temperature coefficient, the voltage V R The temperature coefficient of is equal to the temperature coefficient of resistor R. The ratio of R8 and R9 and the bias current of Q4 can be calculated according to formula (7). At this time, the current flowing through resistor R can achieve higher accuracy. Design I REF =100uA, the simulation results of the output current of the current reference circuit changing with temperature (temp) are as follows Figure 4 As shown, within the range of -55℃~+125℃, the reference current only changes by 0.05uA, and the relative change rate is only 0.05%.

[0045] Because the voltage across the sampling resistor R is based on the power supply V DD The bandgap reference voltage is not based on ground, so the voltage at the current reference output is not limited by ground.DD As the voltage at the current reference output increases, the voltage at the current reference output can also increase. Using PMOS tube MP1 for isolation at the reference current output can avoid the influence of the base current of the transistor on the accuracy of the reference current. In order to ensure the accuracy of the reference current, MP1 tube must work in the saturation region, then:

[0046]

[0047] And the MP1 tube source voltage V S =V B =V DD ﹣V R , then:

[0048]

[0049] Among them, μ p is the carrier mobility of MP1 tube, C OX is the gate oxide capacitance of MP1, C OX and μ p is the process parameter, is the ratio of the width W and length L of the MP1 gate, which is the design parameter, V SG is the source-gate voltage of MP1 tube, V TH It is the threshold voltage of MP1 tube.

[0050] Therefore, the output voltage is Within the range, the reference power supply can output accurately; Figure 5 is the output current I of the current reference circuit of the present invention REF With the output voltage V out (ie output voltage V D ) changes, in the output voltage range of 0V to 15V, the reference current I REF The magnitude of the change was only 19 pA, a relative change of 0.19 ppm, with very high accuracy; ppm means part per million.

[0051] In summary, the present invention adopts a high-precision current reference circuit, which does not require a special bandgap reference voltage generation circuit and a mirror circuit. Through an asymmetric operational amplifier, the sampling resistor can achieve a current reference voltage V DD The reference voltage achieves good accuracy, a wide output voltage range, and a simple circuit structure.

[0052] The above embodiments further illustrate the purpose, technical solutions and advantages of the present invention in detail. It should be understood that the above embodiments are only preferred implementation modes of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made to the present invention within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A current reference circuit with high precision and wide output voltage range, characterized in that: include: A clamping circuit, an asymmetric operational amplifier A, an isolation tube MP1 and a sampling resistor R; one end of the clamping circuit is connected to a power supply, and the other end is connected to the non-inverting end of the asymmetric operational amplifier A, the output end of the asymmetric operational amplifier A is connected to the gate of the isolation tube MP1, the source of the isolation tube MP1 is connected to the inverting end of the asymmetric operational amplifier A, and the drain is the output end of the current reference circuit, and one end of the sampling resistor R is connected to the power supply, and the other end is connected to the source of the isolation tube MP1.

2. A current reference circuit with high precision and wide output voltage range according to claim 1, characterized in that: The voltage across the clamp circuit is V C The temperature coefficient is negative, and the offset voltage V OS The temperature coefficient is positive.

3. A current reference circuit with high precision and wide output voltage range according to claim 1, characterized in that: The voltage V across the sampling resistor R R The temperature coefficient of is the same as the temperature coefficient of the sampling resistor R.

4. A current reference circuit with high precision and wide output voltage range according to claim 1, characterized in that: The asymmetric operational amplifier includes transistors Q7 to Q20, resistors R11 to R20, and capacitor C1; one end of resistors R11 to R12 is connected to a power supply V DD The other end of the resistor R11 is connected to the emitter of the transistor Q7, the other end of the resistor R12 is connected to the emitter of the transistor Q8, the base of the transistor Q8 is connected to the sampling resistor R, the collectors of the transistors Q7 and Q8 are connected to the emitter of the transistor Q12, the collector of the transistor Q12 is connected to the emitter of the transistor Q13, the collector of the transistor Q13 is connected to one end of the resistor R17, and the other end of the resistor R17 is grounded; the emitter of the transistor Q9 is connected to the other end of the resistor R11, and the base is connected to one end of the resistor R14, the other end of the resistor R14 is respectively connected to the collector of the transistor Q9 and one end of the resistor R15, and the other end of the resistor R15 is connected to the base of the transistor Q10, The collector of transistor Q9 is connected to the emitter of transistor Q14, the collector of transistor Q14 is connected to the emitter of transistor Q15, the collector of transistor Q15 is connected to one end of resistor R18, and the other end of resistor R18 is grounded; the emitter of transistor Q10 is connected to the other end of resistor R12, the base is connected to one end of resistor R16, and the other end of resistor R16 is connected to the upper plate of capacitor C1; the collector of transistor Q10 and the lower plate of capacitor C1 are connected to the emitter of transistor Q16, the collector of transistor Q16 is connected to the emitter of transistor Q17, the collector of transistor Q17 is connected to one end of resistor R19, and the other end of resistor R19 is grounded; one end of resistor R13 is connected to power supply V DD The emitter of transistor Q11 is connected to the other end of resistor R13, the base is connected to the collector of transistor Q10, the collector is respectively connected to the emitter of transistor Q19 and the gate of isolation tube MP1, the collector of transistor Q19 is connected to the emitter of transistor Q20, the collector of transistor Q20 is connected to one end of resistor R20, and the other end of resistor R20 is grounded.

5. A current reference circuit with high precision and wide output voltage range according to claim 4, characterized in that: The transistor Q7 and the transistor Q8 are bipolar transistors, and the ratio of their emitter areas is 1:n; wherein n is any real number greater than 1.

6. A current reference circuit with high precision and wide output voltage range according to claim 4, characterized in that: The clamping circuit includes: a transistor Q4 and resistors R8-R9; one end of the resistor R8 is connected to the power supply V DD The other end is connected to one end of the resistor R9 and the base of the transistor Q7; the emitter of the transistor Q4 is connected to the power supply V DD The base is connected to the emitter of the transistor Q4, and the collector is connected to the other end of the resistor R9.

7. A current reference circuit with high precision and wide output voltage range according to claim 6, characterized in that: Also includes: Start-up and bias circuits; The startup and bias circuit includes: resistors R1 to R7 and transistors Q1 to Q3; One end of the resistor R1 is connected to the voltage V at the inverting terminal of the asymmetric op amp A. B , the other end is connected to one end of resistor R2 and the base of transistor Q2 respectively, the other end of resistor R2 is connected to one end of resistor R3 and the base of transistor Q1 respectively, the other end of resistor R3 is grounded, the emitter of transistor Q1 is connected to resistor R11, and the emitter of transistor Q2 is connected to resistor R12; the collectors of transistors Q1 and Q2 are connected to one end of resistor R4, and the other end of resistor R4 is grounded; one end of resistor R5 is connected to the voltage V of the inverting terminal of asymmetric operational amplifier A B The other end is connected to one end of the resistor R6 and the emitter of the transistor Q3 respectively, the base of the transistor Q3 is connected to the other end of the resistor R6, the collector is connected to one end of the resistor R7, and the other end of the resistor R7 is grounded.

8. A current reference circuit with high precision and wide output voltage range according to claim 7, characterized in that: Also includes: Transistors Q5-Q6 and resistor R10; The clamping circuit, transistors Q5-Q6 and resistor R10 form an input branch of the non-inverting terminal of the asymmetric operational amplifier A; The emitter of the transistor Q5 is connected to the clamp circuit, and the collector is connected to the emitter of the transistor Q6. The collector of the transistor Q6 is connected to one end of the resistor R10, and the other end of the resistor R10 is grounded.

9. A current reference circuit with high precision and wide output voltage range according to claim 8, characterized in that: The bases of transistors Q5, Q12, Q14, Q16 and Q19 are connected to the voltage V at the inverting terminal of the asymmetric operational amplifier A through resistor R16. B The bases of transistor Q6, transistor Q13, transistor Q15, transistor Q17 and transistor Q20 are connected to resistor R6.

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