Memory verification method and device, electronic equipment and storage medium
The memory attribute files are parsed through the scripting language and modified the initial verification platform to generate a verification platform for the memory to be verified, solving the problem of low memory verification efficiency in the existing technology and achieving fast and efficient memory verification.
Patent Information
- Application Number
- CN202411850389.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-03-25
AI Technical Summary
In the prior art, memory verification is relatively inefficient, and it is necessary to build a verification platform for each different memory, which is a huge workload.
The attribute files of the memory to be verified are parsed through the script language, obtain their attribute information, and modify the pre-built initial verification platform based on this information, generate the verification platform corresponding to the memory to be verified, and run the simulation verification command in the platform for correctness verification.
It realizes a verification platform that quickly generates different memory to be verified, reducing the verification complexity and improving the efficiency of memory verification.
Smart Images
Figure CN119690758A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a memory verification method, device, electronic device and storage medium. Background Art
[0002] In chip design, due to the different sizes of stored data, different sizes of memory are needed to splice the required memory. Due to different usage scenarios, memories with different functions such as single port, multi-port, read-only, etc. are required. Since the entire chip memory demand is large and the customization requirements of each user are different, the number of customized memories often reaches hundreds or thousands, and these memories need to be verified for completeness before they can be put into production.
[0003] In the prior art, each different memory is treated as an independent DUT (design under test, module to be verified), and a verification platform needs to be rebuilt for each memory to perform verification, which is a huge workload and has low efficiency in memory verification. Summary of the invention
[0004] In view of this, the present application provides a memory verification method, device, electronic device and storage medium to solve the problem of low efficiency of memory verification in the prior art.
[0005] The first aspect of the present application discloses a memory verification method, comprising:
[0006] Parse the attribute file of the memory to be verified by a scripting language to obtain the attribute information of the memory to be verified; wherein the attribute information includes name, type, bit width, splicing method, data verification method, check bit storage method and backdoor path;
[0007] Based on the attribute information, a private module in a pre-built initial verification platform is modified to generate a verification platform corresponding to the memory to be verified; wherein the private module is a module corresponding to a heterogeneous verification component that verifies the memory;
[0008] Running a simulation verification command of the memory to be verified in the verification platform to verify the correctness of the memory to be verified;
[0009] Generate a verification result of the memory to be verified.
[0010] Optionally, in the above method, the process of constructing the initial verification platform includes:
[0011] Obtain common verification components and heterogeneous verification components for memory verification;
[0012] Based on the common verification component and the heterogeneous verification component, generating the initial verification platform by using a preset verification method;
[0013] Identify the public modules and private modules in the initial verification platform, and mark the private modules; wherein the public modules are modules corresponding to the public verification components for verifying the memory.
[0014] Optionally, in the above method, the step of running a simulation verification command of the memory to be verified in the verification platform to verify the correctness of the memory to be verified includes:
[0015] Based on the backdoor path, obtaining a data reference value and a check bit reference value of the memory to be verified;
[0016] Obtaining a data standard value of the memory to be verified through a data interface of the memory to be verified;
[0017] Calculate the check bit standard value of the memory to be verified based on the data standard value;
[0018] Compare the data reference value with the data standard value. If the data reference value is the same as the data standard value, the data correctness verification is passed.
[0019] The check digit reference value is compared with the check digit standard value. If the check digit reference value is the same as the check digit standard value, the check digit correctness verification is passed.
[0020] Optionally, in the above method, the step of reading the data reference value and the check bit reference value of the memory to be verified based on the backdoor path includes:
[0021] Based on the backdoor path, read the data and check bits of each data block in the memory to be verified;
[0022] Splicing the read data based on the data splicing method to obtain the data reference value;
[0023] The read check digits are spliced based on the check digit splicing method to obtain the check digit reference value.
[0024] Optionally, the above method, before parsing the attribute file of the memory to be verified by using a scripting language to obtain the attribute information of the memory to be verified, further includes:
[0025] For each memory to be verified, a property file of each memory to be verified is constructed using a preset format.
[0026] A second aspect of the present application provides a memory verification device, including:
[0027] A parsing unit, used to parse the attribute file of the memory to be verified by a scripting language to obtain attribute information of the memory to be verified; wherein the attribute information includes name, type, bit width, splicing method, data verification method, check bit storage method and backdoor path;
[0028] A modification unit, configured to modify a private module in a pre-built initial verification platform based on the attribute information to generate a verification platform corresponding to the memory to be verified; wherein the private module is a module corresponding to a heterogeneous verification component that verifies the memory;
[0029] A verification unit, used for running a simulation verification command of the memory to be verified in the verification platform to verify the correctness of the memory to be verified;
[0030] The result generating unit is used to generate the verification result of the memory to be verified.
[0031] Optionally, in the above device, the modification unit includes:
[0032] An acquisition subunit, used for acquiring a common verification component and a heterogeneous verification component for memory verification;
[0033] A generating subunit, configured to generate the initial verification platform based on the common verification component and the heterogeneous verification component using a preset verification method;
[0034] The identification subunit is used to identify the public modules and private modules in the initial verification platform and to identify the private modules; wherein the public modules are modules corresponding to the public verification components for verifying the memory.
[0035] Optionally, in the above device, the verification unit includes:
[0036] The first acquisition subunit is used to acquire the data reference value and the check bit reference value of the memory to be verified based on the backdoor path.
[0037] The second acquisition subunit is used to acquire the data standard value of the memory to be verified through the data interface of the memory to be verified.
[0038] A calculation subunit is used to calculate the check bit standard value of the memory to be verified based on the data standard value.
[0039] The first comparison subunit is used to compare the data reference value with the data standard value. If the data reference value is the same as the data standard value, the data correctness verification is passed.
[0040] The second comparison subunit is used to compare the check bit reference value with the check bit standard value. If the check bit reference value is the same as the check bit standard value, the check bit correctness verification is passed.
[0041] Optionally, in the above device, the first acquisition subunit includes:
[0042] The reading subunit is used to read the data and check bits of each data block in the memory to be verified based on the backdoor path.
[0043] A first splicing subunit, configured to splice the read data based on a data splicing method to obtain the data reference value;
[0044] The second splicing subunit is used to splice the read check bits based on the check bit splicing method to obtain the check bit reference value.
[0045] Optionally, the above device further includes:
[0046] An acquisition unit, used for acquiring a verification result of each memory to be verified;
[0047] The screening unit is used to screen out the memory to be verified whose verification result is failure to pass the verification based on the verification result.
[0048] Optionally, the above device further includes:
[0049] The construction unit is used to construct the attribute file of each memory to be verified in a preset format for each memory to be verified.
[0050] The third aspect of the present application discloses an electronic device, comprising:
[0051] one or more processors;
[0052] a storage device having one or more programs stored thereon;
[0053] When the one or more programs are executed by the one or more processors, the one or more processors implement the method as described in any one of the first aspects of the present application.
[0054] A fourth aspect of the present application discloses a computer storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the method described in any one of the first aspects of the present application is implemented.
[0055] It can be seen from the above technical solution that in the memory verification method provided by the present application, the attribute file of the memory to be verified is first parsed by a scripting language to obtain the attribute information of the memory to be verified. Then, based on the attribute information, the private module in the pre-built initial verification platform is modified to generate a verification platform corresponding to the memory to be verified. Then, the simulation verification command of the memory to be verified is run in the verification platform to verify the correctness of the memory to be verified. Finally, the verification result of the memory to be verified is generated. It can be seen that, using the method of the present application, the pre-built initial verification platform is modified by the attribute information of the memory to be verified, and the verification platform corresponding to different memories to be verified can be quickly generated, and the generated verification platform is used to simulate and verify the memory to be verified, which can effectively reduce the complexity of verification and improve the efficiency of memory verification. BRIEF DESCRIPTION OF THE DRAWINGS
[0056] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.
[0057] Figure 1 A flowchart of a memory verification method disclosed in an embodiment of the present application;
[0058] Figure 2 This is a flowchart of an implementation of step S103 disclosed in another embodiment of the present application;
[0059] Figure 3 A schematic diagram of a memory verification device disclosed in another embodiment of the present application;
[0060] Figure 4 A schematic diagram of an electronic device disclosed in another embodiment of the present application. DETAILED DESCRIPTION
[0061] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0062] In this application, the terms "comprises", "comprising" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.
[0063] Furthermore, in this document, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, but do not necessarily require or imply any such actual relationship or order between these entities or operations.
[0064] As can be seen from the background technology, in the prior art, each different memory is treated as an independent DUT (design under test, module to be verified), and a verification platform needs to be rebuilt for each memory separately for verification, which is a huge workload and the efficiency of memory verification is low.
[0065] In view of this, the present application provides a memory verification method, device, electronic device and storage medium to solve the problem of low efficiency of memory verification in the prior art.
[0066] The present application embodiment provides a memory verification method, such as Figure 1 As shown, specifically including:
[0067] S101. Parse the attribute file of the memory to be verified by using a scripting language to obtain attribute information of the memory to be verified; wherein the attribute information includes name, type, bit width, splicing method, data verification method, check bit storage method and backdoor path.
[0068] It should be noted that the attribute file of the memory to be verified is first obtained, and the attribute file of the memory to be verified is parsed by a scripting language to obtain the attribute information of the memory to be verified. The scripting language can be selected according to the actual situation, for example, the python scripting language is used. The attribute information includes name, type, bit width, splicing method, data verification method, verification bit storage method and backdoor path.
[0069] Optionally, in another embodiment of the present application, before executing the above step S101, the following may also be included:
[0070] For each memory to be verified, a property file of each memory to be verified is constructed using a preset format.
[0071] It should be noted that since the scripting language is needed to parse the attribute file of the memory to be verified in order to obtain the attribute information of the memory to be verified and then modify the verification platform, the attribute file of the memory needs to have a unified format, otherwise the script cannot be parsed uniformly. For each memory to be verified, the user needs to edit it according to the unified Excel template format to generate an attribute file in a unified format.
[0072] S102. Modify the private module in the pre-built initial verification platform based on the attribute information to generate a verification platform corresponding to the memory to be verified; wherein the private module is a module corresponding to the heterogeneous verification component that verifies the memory.
[0073] It should be noted that after parsing the attribute information of the memory to be verified, the private modules in the pre-built initial verification platform are modified according to the attribute information to obtain a verification platform that meets the verification requirements of the memory to be verified, which is used to verify the memory to be verified. Among them, the verification platform includes public modules and private modules, and the private modules are modules corresponding to the heterogeneous verification components that verify the memory. In chip design, due to the different sizes of stored data, different sizes of memory are needed to splice the required memory; due to different usage scenarios, single-port, multi-port, read-only and other different functions of memory are required, so the structure of different memories is also different. For each heterogeneous part of the memory, the corresponding private module needs to be modified to build a verification platform for the memory to be verified.
[0074] Optionally, in another embodiment of the present application, an implementation of step S102 may include:
[0075] Gets common and heterogeneous validation components for memory validation.
[0076] Based on common verification components and heterogeneous verification components, an initial verification platform is generated using preset verification methods.
[0077] Identify the public modules and private modules in the initial verification platform, and mark the private modules; wherein the public modules are modules corresponding to the public verification components for verifying the memory.
[0078] It should be noted that first, a public verification component and a heterogeneous verification component for memory verification are obtained, wherein the public verification component is a component for verifying the common structure of the memory; the heterogeneous verification component is a component for verifying the heterogeneous part of the memory. Based on the acquisition of the public verification component and the heterogeneous verification component, an initial verification platform is constructed using the UVM verification method. The initial verification platform is a template-type platform, which includes public modules and private modules, wherein the public module is a module corresponding to the public verification component for memory verification. In order to facilitate the rapid identification of the private modules of the verification platform and to modify them during memory verification, the private modules are identified by reserving identification bits.
[0079] S103: Run a simulation verification command of the memory to be verified in the verification platform to verify the correctness of the memory to be verified.
[0080] It should be noted that after obtaining the verification platform corresponding to the memory to be verified, the simulation verification command is encapsulated in a python script, and the python script carrying the simulation verification command of the memory to be verified is run through the verification platform to verify the correctness of the memory to be verified.
[0081] Optionally, in another embodiment of the present application, an implementation of the above step S103 is as follows: Figure 2 As shown, it may include:
[0082] S201. Based on the backdoor path, obtain a data reference value and a check bit reference value of the memory to be verified.
[0083] It should be noted that, through the backdoor path of the memory to be verified, the data in each data block in the memory to be verified is read to obtain the data reference value and the check bit reference value of the memory to be verified.
[0084] Optionally, in another embodiment of the present application, an implementation of the above step S201 may include:
[0085] Based on the backdoor path, read the data and check bits of each data block in the memory to be verified.
[0086] The read data is spliced based on the data splicing method to obtain a data reference value.
[0087] The read check digits are spliced based on the check digit splicing method to obtain a check digit reference value.
[0088] It should be noted that a memory to be verified can contain multiple data blocks. Based on the backdoor path, the data and check bits of each data block in the memory to be verified can be read. Then, the read data is spliced based on the general data splicing method to obtain the data reference value of the memory to be verified. Then, the read check bits are spliced based on the general check bit splicing method to obtain the check bit reference value of the memory to be verified.
[0089] S202: Obtain a data standard value of the memory to be verified through a data interface of the memory to be verified.
[0090] It should be noted that the data in the data interface of the memory to be verified is read to obtain the data standard value of the memory to be verified.
[0091] S203: Calculate the check bit standard value of the memory to be verified based on the data standard value.
[0092] It should be noted that after the data standard value is obtained, the check bit standard value of the memory to be verified can be calculated based on the read data standard value.
[0093] S204: Compare the data reference value and the data standard value. If the data reference value is the same as the data standard value, the data correctness verification is passed.
[0094] It should be noted that the data reference value and the data standard value are compared. If the data reference value is the same as the data standard value, the data correctness verification is passed. Otherwise, if the data reference value is the same as the data standard value, the data correctness verification is not passed.
[0095] S205: Compare the check digit reference value with the check digit standard value. If the check digit reference value is the same as the check digit standard value, the check digit correctness verification is passed.
[0096] It should be noted that the check digit reference value and the check digit standard value are compared. If the check digit reference value is the same as the check digit standard value, the check digit correctness verification is passed. Otherwise, if the check digit reference value is different from the check digit standard value, the check digit correctness verification is not passed.
[0097] S104: Generate a verification result of the memory to be verified.
[0098] It should be noted that after the correctness verification of the memory to be verified is completed, the verification result of the memory to be verified is generated, and the verification result is saved in the system log information (recording the system operation information) for subsequent data reading.
[0099] Optionally, in another embodiment of the present application, after executing step S104, the following may also be included:
[0100] Get the verification result of each memory to be verified.
[0101] Based on the verification result, the memory to be verified whose verification result is failure is filtered out.
[0102] It should be noted that the verification result of each memory to be verified is obtained by reading the system log information. The memory to be verified with the verification result of failed verification is screened out, and the user can analyze the memory to be verified that failed verification, find out the reason for the verification failure, and make improvements.
[0103] In the memory verification method provided in the embodiment of the present application, the attribute file of the memory to be verified is first parsed by a scripting language to obtain the attribute information of the memory to be verified. Then, based on the attribute information, the private module in the pre-built initial verification platform is modified to generate a verification platform corresponding to the memory to be verified. Then, the simulation verification command of the memory to be verified is run in the verification platform to verify the correctness of the memory to be verified. Finally, the verification result of the memory to be verified is generated. It can be seen that, using the method of the present application, the pre-built initial verification platform is modified by the attribute information of the memory to be verified, and the verification platform corresponding to different memories to be verified can be quickly generated, and the generated verification platform is used to simulate and verify the memory to be verified, which can effectively reduce the verification complexity and improve the efficiency of memory verification.
[0104] Another embodiment of the present application further provides a memory verification device, such as Figure 3 As shown, including:
[0105] The parsing unit 301 is used to parse the attribute file of the memory to be verified through a scripting language to obtain attribute information of the memory to be verified; wherein the attribute information includes name, type, bit width, splicing method, data verification method, check bit storage method and backdoor path.
[0106] The modification unit 302 is used to modify the private module in the pre-built initial verification platform based on the attribute information to generate a verification platform corresponding to the memory to be verified; wherein the private module is a module corresponding to the heterogeneous verification component that verifies the memory.
[0107] The verification unit 303 is used to run the simulation verification command of the memory to be verified in the verification platform to verify the correctness of the memory to be verified.
[0108] The result generating unit 304 is used to generate a verification result of the memory to be verified.
[0109] In this embodiment, the specific execution process of the parsing unit 301, the modifying unit 302, the verifying unit 303 and the result generating unit 304 can be found in the corresponding Figure 1The content of the method embodiment will not be repeated here.
[0110] In the memory verification device provided by the embodiment of the present application, first, the parsing unit 301 parses the attribute file of the memory to be verified through a scripting language to obtain the attribute information of the memory to be verified. Then the modification unit 302 modifies the private module in the pre-built initial verification platform based on the attribute information to generate a verification platform corresponding to the memory to be verified. Then the verification unit 303 runs the simulation verification command of the memory to be verified in the verification platform to verify the correctness of the memory to be verified. Finally, the result generation unit generates the verification result of the memory to be verified. It can be seen that by using the method of the present application, the pre-built initial verification platform is modified through the attribute information of the memory to be verified, and the verification platforms corresponding to different memories to be verified can be quickly generated, and the generated verification platform is used to simulate and verify the memory to be verified, which can effectively reduce the verification complexity and improve the efficiency of memory verification.
[0111] Optionally, in another embodiment of the present application, an implementation of the modification unit 302 may include:
[0112] The acquisition subunit is used to obtain the common verification components and heterogeneous verification components for memory verification.
[0113] The generation subunit is used to generate an initial verification platform based on the common verification components and the heterogeneous verification components using a preset verification method.
[0114] The identification subunit is used to identify the public modules and private modules in the initial verification platform and to identify the private modules; wherein the public modules are modules corresponding to the public verification components for verifying the memory.
[0115] In this embodiment, the specific execution process of the acquisition subunit, the acquisition subunit and the identification subunit can refer to the corresponding method embodiment content mentioned above, which will not be repeated here.
[0116] Optionally, in another embodiment of the present application, an implementation of the verification unit 303 may include:
[0117] The first acquisition subunit is used to acquire a data reference value and a check bit reference value of the memory to be verified based on a backdoor path.
[0118] The second acquisition subunit is used to acquire the data standard value of the memory to be verified through the data interface of the memory to be verified.
[0119] The calculation subunit is used to calculate the check bit standard value of the memory to be verified based on the data standard value.
[0120] The first comparison subunit is used to compare the data reference value with the data standard value. If the data reference value is the same as the data standard value, the data correctness verification is passed.
[0121] The second comparison subunit is used to compare the check digit reference value with the check digit standard value. If the check digit reference value is the same as the check digit standard value, the check digit correctness verification is passed.
[0122] In this embodiment, the specific execution process of the first acquisition subunit, the second acquisition subunit, the calculation subunit, the first comparison subunit and the second comparison subunit can be referred to in the corresponding Figure 2 The content of the method embodiment will not be repeated here.
[0123] Optionally, in another embodiment of the present application, an implementation of the first acquisition subunit may include:
[0124] The reading subunit is used to read the data and check bits of each data block in the memory to be verified based on the backdoor path.
[0125] A first splicing subunit is used to splice the read data based on the data splicing method to obtain a data reference value;
[0126] The second splicing subunit is used to splice the read check bits based on the check bit splicing method to obtain a check bit reference value.
[0127] In this embodiment, the specific execution process of the reading subunit, the first splicing subunit and the second splicing subunit can be found in the corresponding method embodiments described above, which will not be repeated here.
[0128] Optionally, in another embodiment of the present application, the memory verification device may further include:
[0129] An acquisition unit, used for acquiring a verification result of each memory to be verified;
[0130] The screening unit is used to screen out the memory to be verified whose verification result is failure to pass the verification based on the verification result.
[0131] In this embodiment, the specific execution process of the acquisition unit and the screening unit can refer to the corresponding method embodiment content mentioned above, which will not be repeated here.
[0132] Optionally, in another embodiment of the present application, the memory verification device may further include:
[0133] The construction unit is used to construct the attribute file of each memory to be verified in a preset format for each memory to be verified.
[0134] In this embodiment, the specific execution process of the construction unit can refer to the corresponding method embodiment content mentioned above, which will not be repeated here.
[0135] Another embodiment of the application also provides an electronic device, such as Figure 4 As shown, specifically including:
[0136] One or more processors 401 .
[0137] The storage device 402 stores one or more programs.
[0138] When one or more programs are executed by one or more processors 401 , the one or more processors 401 implement any one of the methods in the above embodiments.
[0139] Another embodiment of the present application further provides a computer storage medium on which a computer program is stored, wherein when the computer program is executed by a processor, any one of the methods in the above embodiments is implemented.
[0140] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can refer to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system or system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiment. The system and system embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without creative work.
[0141] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.
[0142] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A memory verification method, characterized in that: include: Parse the attribute file of the memory to be verified by a scripting language to obtain the attribute information of the memory to be verified; wherein the attribute information includes name, type, bit width, splicing method, data verification method, check bit storage method and backdoor path; Based on the attribute information, a private module in a pre-built initial verification platform is modified to generate a verification platform corresponding to the memory to be verified; wherein the private module is a module corresponding to a heterogeneous verification component that verifies the memory; Running a simulation verification command of the memory to be verified in the verification platform to verify the correctness of the memory to be verified; Generate a verification result of the memory to be verified.
2. The method according to claim 1, characterized in that The construction process of the initial verification platform includes: Obtain common verification components and heterogeneous verification components for memory verification; Based on the common verification component and the heterogeneous verification component, generating the initial verification platform by using a preset verification method; Identify the public modules and private modules in the initial verification platform, and mark the private modules; wherein the public modules are modules corresponding to the public verification components for verifying the memory.
3. The method according to claim 1, characterized in that: The step of running the simulation verification command of the memory to be verified in the verification platform to verify the correctness of the memory to be verified includes: Based on the backdoor path, obtaining a data reference value and a check bit reference value of the memory to be verified; Obtaining a data standard value of the memory to be verified through a data interface of the memory to be verified; Calculate the check bit standard value of the memory to be verified based on the data standard value; Compare the data reference value with the data standard value. If the data reference value is the same as the data standard value, the data correctness verification is passed. The check digit reference value is compared with the check digit standard value. If the check digit reference value is the same as the check digit standard value, the check digit correctness verification is passed.
4. The method according to claim 3, characterized in that: The step of reading the data reference value and the check bit reference value of the memory to be verified based on the backdoor path includes: Based on the backdoor path, read the data and check bits of each data block in the memory to be verified; Splicing the read data based on the data splicing method to obtain the data reference value; The read check digits are spliced based on the check digit splicing method to obtain the check digit reference value.
5. The method according to claim 1, characterized in that After generating the verification result of the memory to be verified, the method further includes: Get the verification result of each memory to be verified; The memory to be verified whose verification result is failure of verification is screened out based on the verification result.
6. The method according to claim 1, characterized in that Before the property file of the memory to be verified is parsed by the scripting language to obtain the property information of the memory to be verified, the method further includes: For each memory to be verified, a property file of each memory to be verified is constructed using a preset format.
7. A memory verification device, characterized in that: include: A parsing unit, used to parse the attribute file of the memory to be verified by a scripting language to obtain attribute information of the memory to be verified; wherein the attribute information includes name, type, bit width, splicing method, data verification method, check bit storage method and backdoor path; A modification unit, configured to modify a private module in a pre-built initial verification platform based on the attribute information to generate a verification platform corresponding to the memory to be verified; wherein the private module is a module corresponding to a heterogeneous verification component that verifies the memory; A verification unit, used for running a simulation verification command of the memory to be verified in the verification platform to verify the correctness of the memory to be verified; The result generating unit is used to generate the verification result of the memory to be verified.
8. The device according to claim 7, characterized in that The modification unit comprises: An acquisition subunit, used for acquiring a common verification component and a heterogeneous verification component for memory verification; A generating subunit, configured to generate the initial verification platform based on the common verification component and the heterogeneous verification component using a preset verification method; The identification subunit is used to identify the public modules and private modules in the initial verification platform and to identify the private modules; wherein the public modules are modules corresponding to the public verification components for verifying the memory.
9. An electronic device, characterized in that: include: one or more processors; a storage device having one or more programs stored thereon; When the one or more programs are executed by the one or more processors, the one or more processors are enabled to implement the method according to any one of claims 1 to 6.
10. A computer storage medium, characterized in that: A computer program is stored thereon, wherein when the computer program is executed by a processor, the method according to any one of claims 1 to 6 is implemented.