Capacitor, preparation method thereof and radio frequency device
By using the liquid crystal layer as the dielectric layer in the capacitor and adjusting the deflection direction of the liquid crystal molecules through voltage, the problem of inability to change the glass dielectric constant and complex process in the prior art is solved, and the continuous adjustable and flexible application of the capacitor is achieved.
Patent Information
- Application Number
- CN202311235021.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-22
- Publication Date
- 2025-03-25
AI Technical Summary
The dielectric layer of the existing interdigit capacitor is glass, the dielectric constant cannot be changed, and the process of digging troughs on the glass is complicated, making it difficult to meet the application in multiple scenarios.
The liquid crystal layer is used as the dielectric layer, and the deflection direction of the liquid crystal molecules is changed by adjusting the electrode voltage of the liquid crystal layer, thereby adjusting the dielectric constant and achieving continuous adjustability of the capacitance.
It reduces the difficulty of capacitor preparation process, improves flexibility, and can meet the application needs of more scenarios.
Smart Images
Figure CN119694792A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of radio frequency technology, and specifically relates to a capacitor and a preparation method thereof, and a radio frequency device. Background Art
[0002] The existing method for preparing interdigital capacitors is to dig grooves on a glass substrate and form interdigital electrodes in the grooves through an electroplating process to form interdigital electrodes. The depth of the grooves and the length of the interdigital electrodes determine the size of the overlapping area of the capacitor. However, the dielectric layer of the existing interdigital capacitor is glass, the dielectric constant cannot be changed, and the process of digging grooves on glass is complicated, difficult, and not easy to implement, so it cannot be well applied to a variety of scenarios.
[0003] Based on the above problems, the inventors have proposed a capacitor with adjustable dielectric constant. The dielectric layer of the capacitor is a liquid crystal layer. By adjusting the electrode voltage of the liquid crystal layer, the deflection direction of the liquid crystal molecules can be changed, thereby changing the dielectric constant of the liquid crystal layer and realizing continuous adjustment of the capacitor. Compared with the prior art, the capacitor preparation process of the present invention is less difficult, easier to implement, and can meet the application of more scenarios. Summary of the invention
[0004] The present invention aims to solve at least one of the technical problems existing in the prior art, and provides a capacitor and a preparation method thereof, and a radio frequency device.
[0005] In a first aspect, the present disclosure provides a capacitor with adjustable capacitance, comprising a first substrate and a second substrate arranged opposite to each other, and an adjustable dielectric layer, a first electrode and a second electrode arranged between the first substrate and the second substrate;
[0006] The first substrate comprises a first dielectric substrate, and a third electrode and a first alignment layer which are sequentially arranged on a side of the first dielectric substrate close to the adjustable dielectric layer;
[0007] The second substrate comprises a second dielectric substrate, and a fourth electrode and a second alignment layer which are sequentially arranged on a side of the second dielectric substrate close to the adjustable dielectric layer;
[0008] The first electrode includes a first main structure and a plurality of first branch structures connected in an extension direction of the first main structure; the second electrode includes a second main structure and a plurality of second branch structures connected in an extension direction of the second main structure; the first branch structures and the second branch structures are alternately arranged in the extension direction of the first main structure.
[0009] Preferably, the third electrode and the fourth electrode are both integral electrodes.
[0010] Preferably, there is a first gap between the adjacent first branch structure and the second branch structure;
[0011] The third electrode includes a plurality of third sub-electrodes; the third sub-electrodes are arranged in a one-to-one correspondence with the first gaps; and / or the fourth electrode includes a plurality of fourth sub-electrodes; the fourth sub-electrodes are arranged in a one-to-one correspondence with the first gaps.
[0012] Preferably, the orthographic projections of the first branch structure and the second branch structure on the first dielectric substrate both include any one of a rectangle, a fold line or a wave shape.
[0013] Preferably, the tunable dielectric layer comprises a liquid crystal layer.
[0014] Preferably, the material constituting the first dielectric substrate and the second dielectric substrate includes glass.
[0015] Preferably, the material constituting the third electrode and the fourth electrode includes indium tin oxide.
[0016] In a second aspect, the present disclosure provides a method for preparing a capacitor, comprising:
[0017] Providing a first dielectric substrate, and sequentially forming a third electrode and a first alignment layer on the first dielectric substrate;
[0018] forming a first electrode and a second electrode on a side of the first alignment layer away from the first dielectric substrate;
[0019] Providing a second dielectric substrate, and sequentially forming a fourth electrode and a second alignment layer on the second dielectric substrate;
[0020] Packing the side of the first dielectric substrate having the first alignment layer and the side of the second dielectric substrate having the second alignment layer into a box;
[0021] An adjustable dielectric layer is formed between the first alignment layer and the second alignment layer; the adjustable dielectric layer covers the first electrode and the second electrode.
[0022] Preferably, when the third electrode is a whole electrode, the step of providing a first dielectric substrate and sequentially forming the third electrode and the first alignment layer on the first dielectric substrate specifically includes:
[0023] Providing a first dielectric substrate;
[0024] forming a first metal layer on the first dielectric substrate by an electroplating process, and patterning the first metal layer to form the third electrode;
[0025] A first interlayer insulating layer is formed on a side of the third electrode away from the first dielectric substrate, and the first interlayer insulating layer is transferred and rubbed for orientation to form the first alignment layer.
[0026] Preferably, when the third electrode includes a plurality of third sub-electrodes, the step of providing a first dielectric substrate and sequentially forming the third electrode and the first alignment layer on the first dielectric substrate specifically includes:
[0027] Providing a first dielectric substrate;
[0028] Forming a plurality of metal blocks on the first dielectric substrate by an electroplating process, and patterning the metal blocks to form a plurality of the third sub-electrodes;
[0029] A first interlayer insulating layer is formed on a side of the third sub-electrode away from the first dielectric substrate, and the first interlayer insulating layer is transferred and rubbed for orientation to form the first alignment layer.
[0030] Preferably, the step of forming the first electrode and the second electrode on the side of the first alignment layer away from the first dielectric substrate specifically includes:
[0031] A third metal layer is formed on a side of the first alignment layer away from the first dielectric substrate by electroplating, and the third metal layer is patterned to form the first electrode and the second electrode.
[0032] Preferably, when the fourth electrode is a whole electrode, the step of providing a second dielectric substrate and sequentially forming the fourth electrode and the second alignment layer on the second dielectric substrate specifically includes:
[0033] Providing a second dielectric substrate;
[0034] forming a second metal layer on the second dielectric substrate by an electroplating process, and patterning the second metal layer to form the fourth electrode;
[0035] A second interlayer insulating layer is formed on the side of the fourth electrode away from the second dielectric substrate, and the second interlayer insulating layer is transferred and rubbed to form the second alignment layer.
[0036] Preferably, when the fourth electrode includes a plurality of fourth sub-electrodes, the step of providing a second dielectric substrate and sequentially forming the fourth electrode and the second alignment layer on the second dielectric substrate specifically includes:
[0037] Providing a second dielectric substrate;
[0038] Forming a plurality of metal blocks on the second dielectric substrate by an electroplating process, and patterning the metal blocks to form a plurality of the fourth sub-electrodes;
[0039] A second interlayer insulating layer is formed on the side of the fourth sub-electrode away from the second dielectric substrate, and the second interlayer insulating layer is transferred and rubbed to form the second alignment layer.
[0040] Preferably, the step of forming an adjustable dielectric layer between the first alignment layer and the second alignment layer specifically includes:
[0041] The adjustable dielectric layer is formed between the first alignment layer and the second alignment layer by a dripping or pouring process.
[0042] In a third aspect, the present disclosure provides a radio frequency device, which includes the above-mentioned capacitor. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] Figure 1 It is a structural schematic diagram of an existing interdigital capacitor;
[0044] Figure 2 A schematic diagram of the structure of a capacitor provided by the present disclosure;
[0045] Figure 3 for Figure 2 A top view of the capacitor and the orientation of the first alignment layer;
[0046] Figure 4a A schematic diagram of a capacitor structure according to an example provided by the present disclosure;
[0047] Figure 4b A schematic diagram of a capacitor structure according to another example provided by the present disclosure;
[0048] Figure 5a A schematic diagram of the structure of an interdigital capacitor provided by the present disclosure;
[0049] Figure 5b A schematic diagram of the structure of another interdigital capacitor provided by the present disclosure;
[0050] Figure 5c A schematic diagram of the structure of another interdigital capacitor provided by the present disclosure;
[0051] Figure 6 A flow chart of a capacitor preparation method provided in the present invention. DETAILED DESCRIPTION
[0052] In order to enable those skilled in the art to better understand the technical solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0053] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0054] The existing interdigital capacitor is made by cutting grooves and electroplating on a glass substrate to make the capacitor in the glass slot. Figure 1 As shown in the figure, the first substrate 2 and the second plate 3 of the interdigital capacitor are directly integrated on the glass substrate 1, but the process of digging grooves on the glass is relatively complicated and difficult, and the dielectric of the capacitor is glass, the dielectric constant cannot be changed, and there are fewer applicable scenarios.
[0055] Based on the above problems, in a first aspect, the present disclosure provides a capacitor, such as Figure 2 As shown, it includes a first substrate and a second substrate arranged opposite to each other, and an adjustable dielectric layer, a first electrode 41 and a second electrode 42 arranged between the first substrate and the second substrate.
[0056] In some examples, the adjustable dielectric layer includes but is not limited to the liquid crystal layer 5. When the adjustable dielectric layer is the liquid crystal layer 5, the capacitor is a liquid crystal capacitor. The capacitance of the capacitor can be changed by adjusting the dielectric constant of the liquid crystal layer 5, thereby adapting to more scenarios. For ease of description and explanation, the following embodiments take the liquid crystal capacitor as an example to specifically explain the capacitor of the embodiment of the present disclosure.
[0057] Specifically, the first substrate includes a first dielectric substrate 11 and a third electrode 21 and a first alignment layer 31 sequentially arranged on the first dielectric substrate 11 near the liquid crystal layer 5. The second substrate includes a second dielectric substrate 12 and a fourth electrode 22 and a second alignment layer 32 sequentially arranged on the second dielectric substrate 12 near the liquid crystal layer 5. The first electrode 41 includes a first main structure 411 and a plurality of first branch structures 412 connected in the extension direction of the first main structure 411. The second electrode 42 includes a second main structure 421 and a plurality of second branch structures 422 connected in the extension direction of the second main structure 421, and each first branch structure 412 and each second branch structure 422 are alternately arranged on one side of the extension direction of the first main structure 411.
[0058] In which, by applying voltage to the first main structure 411 and the second main structure 421, the capacitor is excited to generate an electromagnetic field, and the adjacent first branch structure 412 and the second branch structure 422 serve as two plates of the capacitor. The direction of the generated electric field is perpendicular to the extension direction of the first main structure 411, and / or the direction of the electric field is perpendicular to the extension direction of the second main structure 421.
[0059] The first alignment layer 31 and the second alignment layer 32 control the liquid crystal molecules to be arranged in a specific direction in the initial state. The third electrode 21 and the fourth electrode 22 serve as control electrodes of the liquid crystal layer 5 to control the deflection angle of the liquid crystal molecules. Optionally, the initial state of the liquid crystal molecules is set to be that the long axis is parallel to the direction of the radio frequency electric field, such as Figure 3 As shown, at this time, the dielectric constant of the liquid crystal is the long axis dielectric constant of the liquid crystal. Afterwards, a voltage is applied to the third electrode 21 and the fourth electrode 22. When the voltage value reaches the threshold voltage, the liquid crystal molecules begin to deflect; when the voltage value reaches the driving voltage, the liquid crystal molecules rotate 90 degrees compared with the initial state. At this time, the short axis of the liquid crystal molecules is parallel to the direction of the radio frequency electric field, so the dielectric constant is the short axis dielectric constant of the liquid crystal.
[0060] In particular, the liquid crystal molecules may include positive liquid crystal molecules and negative liquid crystal molecules. The long axis dielectric constant of the positive liquid crystal molecules is greater than the short axis dielectric constant of the liquid crystal, and the long axis dielectric constant of the negative liquid crystal molecules is less than the short axis dielectric constant of the liquid crystal. Regardless of the type of liquid crystal molecule, when the liquid crystal molecule is in a state with a certain tilt angle, its dielectric constant is between the long axis dielectric constant of the liquid crystal and the short axis dielectric constant of the liquid crystal.
[0061] It should be understood that in the present disclosure, the initial state of the liquid crystal molecules is set so that the long axis is parallel to the RF electric field direction, and the initial state of the liquid crystal molecules can also be set so that the short axis is parallel to the RF electric field direction, and this solution also falls within the protection scope of the present disclosure.
[0062] For example, the third electrode 21 and the fourth electrode 22 of the present disclosure may be a whole piece of electrode, such as Figure 1 At this time, the dielectric constants of all sub-capacitors formed by adjacent first branch structures 412 and second branch structures 422 are equal, that is, the capacitance of the entire capacitor can be controlled by controlling the voltage on the third electrode 21 and the fourth electrode 22. Such a setting can simplify the process.
[0063] As another example, the third electrode 21 of the present disclosure may include a plurality of third sub-electrodes 201, and / or the fourth electrode 22 may include a plurality of fourth sub-electrodes 202, such as Figure 4a-4b As shown. At this time, there is a first gap 501 between the adjacent first branch structure 412 and the second branch structure 422, and the first gap 501 is arranged in a one-to-one correspondence with the third sub-electrode 201, and / or, the first gap 501 is arranged in a one-to-one correspondence with the fourth sub-electrode 202. Such an arrangement can not only save materials, but also accurately control the voltage on each third sub-electrode 201 and each fourth sub-electrode 202, thereby controlling the dielectric constant of the liquid crystal part filled in each first gap 501, and improving the control accuracy of the capacitance value within the adjustable range. Among them, the width of the first gap 501 can be designed differently as needed.
[0064] Optionally, the orthographic projections of the first branch structure 412 and the second branch structure 422 on the first dielectric substrate 11 both include any one of a rectangular shape, a folded line shape, or a wavy shape, such as Figure 5a-5c Compared with the traditional rectangular shape, the folded line shape and the wavy shape increase the relative area of the first branch structure 412 and the second branch structure 422 to a certain extent, thereby increasing the capacitance of the capacitor, but the disadvantage is that the patterning process is more complicated, and different designs can be performed as needed. At the same time, the first electrode 41 and the second electrode 42 also have a certain supporting role in the overall structure of the capacitor.
[0065] In a second aspect, the present disclosure provides a method for preparing the above capacitor, the preparation flow chart is as follows: Figure 6 As shown, the preparation method comprises:
[0066] S11 , providing a first dielectric substrate 11 , and sequentially forming a third electrode 21 and a first alignment layer 31 on the first dielectric substrate 11 .
[0067] In some examples, step S11 may specifically include:
[0068] S111 , providing a first dielectric substrate 11 , and cleaning the first dielectric substrate 11 by a standard cleaning process.
[0069] Among them, the cleaning method of the first dielectric substrate 11 may include: scrubbing, using absorbent cotton soaked in a mixture of precipitated chalk, alcohol or ammonia to scrub the substrate surface, and using solvent extraction to remove some attachments on the substrate surface; oxidation cleaning, placing the first dielectric substrate 11 in a solution containing potassium hydroxide or hydrogen peroxide and soaking it, the commonly used solution concentration is 5% to 10%, which can clean the carbon and metal elements on the surface of the first dielectric substrate 11; ultrapure water cleaning, placing the first dielectric substrate 11 in ultrapure water and soaking or spraying it, which can clean the tiny particles on the surface of the first dielectric substrate 11.
[0070] S112 , forming a third electrode 21 on the first dielectric substrate 11 and performing a patterning process.
[0071] In some examples, the material of the third electrode 21 includes indium tin oxide.
[0072] Optionally, step S112 may specifically include: forming a whole electrode plate on the first dielectric substrate 11 by a physical vapor deposition (PVD) process, and exposing, developing, and etching the electrode plate by photoresist to form the third electrode 21 .
[0073] Optionally, step S112 may specifically include: forming a plurality of electrode blocks on the first dielectric substrate 11 by a physical vapor deposition (PVD) process, and exposing, developing, and etching the electrode blocks by photoresist to form a plurality of third sub-electrodes 201 .
[0074] S123 , forming a first alignment layer 31 on a side of the third electrode 21 away from the first dielectric substrate 11 .
[0075] In some examples, the material of the first alignment layer 31 may include a PI layer (Polyimide), a high temperature resistant thermosetting engineering plastic. At this time, step S123 may specifically include: forming the first alignment layer 31 by a thermal imidization method or a chemical imidization method. Among them, the thermal imidization method is to heat the polyamic acid to a high temperature to dehydrate and close the ring imidization, thereby forming the first alignment layer 31. The chemical imidization method is to add a certain amount of dehydrating agent and catalyst to a polyamic acid solution kept at a temperature below -5°C, quickly mix them evenly, heat them to a certain temperature to dehydrate and close the ring imidization, and form the first alignment layer 31. Compared with the thermal imidization method, the alignment layer prepared by the chemical imidization method has better performance and higher yield, but the process is more complicated and the cost is higher, and it can be selected according to needs.
[0076] S12 , forming a first electrode 41 and a second electrode 42 on a side of the first alignment layer 31 away from the first dielectric substrate 11 .
[0077] In some examples, step S12 may form a metal plate on the side of the first alignment layer 31 away from the first dielectric substrate 11 by an additive electroplating process or a subtractive electroplating process, and then pattern the metal plate to form the first electrode 41 and the second electrode 42. The material of the metal plate may include molybdenum, aluminum, chromium, titanium, copper, nickel, tungsten, gold or various alloys.
[0078] Optionally, the first electrode 41 includes a first main structure 411 and a plurality of first branch structures 412 connected in the extension direction of the first main structure 411, the second electrode 42 includes a second main structure 421 and a plurality of second branch structures 422 connected in the extension direction of the second main structure 421, the first branch structures 412 and the second branch structures 422 are alternately arranged in the extension direction of the first main structure 411, and there is a first gap 501 between adjacent first branch structures 412 and second branch structures 422. When the third electrode 21 includes a plurality of third sub-electrodes 201, the first gap 501 is set to correspond to the third sub-electrodes 201 one by one.
[0079] Optionally, the orthographic projections of the first branch structure 412 and the second branch structure 422 on the first dielectric substrate 11 both include any one of a rectangle, a fold line or a wave shape.
[0080] Specifically, when the additive electroplating process is adopted, step S12 may include but is not limited to forming a first auxiliary film layer by magnetron sputtering, and then continuously sputtering the first conductive film layer, and using the first conductive film layer as the first seed layer. Next, a photoresist layer is formed on the side of the first seed layer away from the first dielectric substrate 11, and the photoresist layer is exposed, developed and etched to form the first electrode 41 and the second electrode 42. The function of the first auxiliary film layer is to increase the adhesion of the first conductive film layer. The material of the first auxiliary film layer includes but is not limited to titanium Ti, and the material of the first conductive film layer includes but is not limited to Cu. The photoresist layer can use ordinary photosensitive photoresist, and positive photoresist or negative photoresist can be selected.
[0081] S13 , providing a second dielectric substrate 12 , and sequentially forming a fourth electrode 22 and a second alignment layer 32 on the second dielectric substrate 12 .
[0082] In some examples, step S13 may specifically include:
[0083] S131 , providing a second dielectric substrate 12 , and cleaning the second dielectric substrate 12 by a standard cleaning process.
[0084] Among them, the cleaning method of the second dielectric substrate 12 may include: scrubbing, using absorbent cotton soaked in a mixture of precipitated chalk, alcohol or ammonia to scrub the surface of the substrate, and using solvent extraction to remove some attachments on the surface of the substrate; oxidation cleaning, placing the second dielectric substrate 12 in a solution containing potassium hydroxide or hydrogen peroxide and soaking it, the commonly used solution concentration is 5% to 10%, which can clean the carbon and metal elements on the surface of the second dielectric substrate 12; ultrapure water cleaning, placing the second dielectric substrate 12 in ultrapure water and soaking or spraying it, which can clean the tiny particles on the surface of the second dielectric substrate 12.
[0085] S132 , forming a fourth electrode 22 on the second dielectric substrate 12 and performing a patterning process.
[0086] In some examples, the material of the fourth electrode 22 includes indium tin oxide.
[0087] Optionally, step S132 may specifically include: forming a whole electrode plate on the second dielectric substrate 12 by a physical vapor deposition (PVD) process, and exposing, developing, and etching the electrode plate by photoresist to form the fourth electrode 22 .
[0088] Optionally, step S132 may specifically include: forming a plurality of electrode blocks on the second dielectric substrate 12 by a physical vapor deposition (PVD) process, and exposing, developing, and etching the electrode blocks by photoresist to form a plurality of fourth sub-electrodes 201 .
[0089] S133 , forming a second alignment layer 32 on a side of the fourth electrode 22 facing away from the second dielectric substrate 12 .
[0090] In some examples, the material of the second alignment layer 32 may include a PI layer (Polyimide), a high temperature resistant thermosetting engineering plastic. At this time, step S133 may specifically include: forming the second alignment layer 32 by a thermal imidization method or a chemical imidization method. Among them, the thermal imidization method is to heat the polyamic acid to a high temperature to dehydrate and close the ring imidization, thereby forming the second alignment layer 32. The chemical imidization method is to add a certain amount of dehydrating agent and catalyst to a polyamic acid solution kept at a temperature below -5°C, quickly mix it evenly, heat it to a certain temperature to dehydrate and close the ring imidization, and form the second alignment layer 32. Compared with the thermal imidization method, the alignment layer prepared by the chemical imidization method has better performance and higher yield, but the process is more complicated and the cost is higher, and it can be selected according to needs.
[0091] S14, placing the side of the first dielectric substrate 11 having the first electrode 41 and the second electrode 42 opposite to the side of the second dielectric substrate 12 having the second alignment layer 32, and sealing the box.
[0092] S15 , forming a liquid crystal layer 5 between the first electrode 41 , the layer where the second electrode 42 is located and the second alignment layer 32 .
[0093] In some examples, step S15 may specifically include: injecting liquid crystal into the packaging box after step S15 is completed by a dripping or pouring process.
[0094] In a third aspect, the present disclosure provides a radio frequency device, which includes the capacitor in any of the above embodiments, wherein the radio frequency device includes a radio frequency controller, a radio frequency oscillator, a frequency synthesizer, a waveform regulator, a power amplifier, a radio frequency signal transmitter, and a radio frequency signal receiver.
[0095] Furthermore, the above-mentioned RF device can be applied to the RF system. The RF system includes an RF pulse transmitting system and an RF signal receiving system. The RF pulse transmitting system is composed of a transmitting coil and a transmitting channel; the transmitting channel is composed of a transmitting controller, a mixer, an attenuator, a power amplifier and a transmitting / receiving switch. The function of the RF pulse transmitting system is to generate various RF pulses of arbitrary angles required for the scanning sequence under the action of the RF controller. The RF signal receiving system is composed of a receiving coil and a receiving channel; the receiving channel is composed of a low noise amplifier, an attenuator, a filter, a phase detector, a low pass filter, an A / D converter, etc. In the RF transmitting circuit, the pulse flip angle is changed by continuously adjusting the amplitude of the signal. When the RF pulse is turned off, the enhanced intensity vector will gradually return to the initial state. At this time, the RF receiving coil will receive a free induction decay (FID) signal. This signal enters the preamplifier, the receiving gate, the intermediate frequency amplifier, and the detector by the coupling circuit to obtain the magnetic resonance signal, and then low-level and filtering are performed. The detector obtains, and finally low-level and filtering are performed.
[0096] In some examples, RF coils can be divided into two categories: dual-purpose transmit and receive coils and receive coils. Dual-purpose transmit and receive coils are made by combining transmit coils and receive coils. Head coils and large body coils built into the magnet aperture are dual-purpose coil designs. When these coils are working, they must quickly switch between transmission and reception through electronic circuits. The receive coil is only responsible for receiving MR signals. Most surface soft coils are receive coils (such as: body surface soft coils). For receive coils, the work of RF pulse transmission and excitation is generally unified by the transmit / receive body coil built into the magnet.
[0097] In some examples, radio frequency coils can be divided into five categories: full volume coils, partial volume coils, surface coils, intracavitary coils and phased array coils. Among them, the full volume coil is a cylindrical coil that can completely encompass or wrap a certain imaging part, and is used for large-scale imaging of large volumes or organs, such as a head coil. The partial volume coil can only partially wrap the coil of a certain part, such as a lumbar coil. Surface coils and intracavitary coils are a type of receiving coil that can be placed close to the imaging part and are used for imaging of superficial tissues and organs. For example, intracavitary coils and intrarectal coils are used for magnetic resonance imaging and magnetic resonance spectroscopy imaging. The phased array coil is a coil array composed of two or more small coils or coil units.
[0098] RF systems are widely used in communication, radar, remote control, navigation and other fields. Among them, communication is one of the important application fields of RF systems, including mobile phone communication, satellite communication, wireless LAN, etc. In addition, RF can also be used in radar and remote sensing fields, such as weather forecasting, flight navigation, air traffic control, etc. In the medical field, RF systems are also widely used in diagnostic equipment such as MRI and physical therapy. At the same time, in industrial production, RF systems can also be used in heating, welding and drying.
[0099] In short, radio frequency refers to radio wave signals with frequencies between 3kHz and 300GHz, which are widely used in communication, radar, remote control, navigation and other fields. The radio frequency system consists of two parts: transmitter and receiver, mainly including components such as signal source, modulator, amplifier, antenna, low noise amplifier, demodulator and signal processor. According to the operating frequency, radio frequency can be divided into low frequency, medium frequency, high frequency, ultra-high frequency and extremely high frequency radio frequency.
[0100] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present invention, but the present invention is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.
Claims
1. A capacitor comprising a first substrate and a second substrate arranged opposite to each other, and an adjustable dielectric layer, a first electrode and a second electrode arranged between the first substrate and the second substrate; The first substrate comprises a first dielectric substrate, and a third electrode and a first alignment layer which are sequentially arranged on a side of the first dielectric substrate close to the adjustable dielectric layer; The second substrate comprises a second dielectric substrate, and a fourth electrode and a second alignment layer which are sequentially arranged on a side of the second dielectric substrate close to the adjustable dielectric layer; The first electrode includes a first main body structure and a plurality of first branch structures connected in an extending direction of the first main body structure; The second electrode includes a second main body structure and a plurality of second branch structures connected in an extending direction of the second main body structure; The first branch structures and the second branch structures are alternately arranged in an extending direction of the first main body structure.
2. The capacitor according to claim 1, wherein: The third electrode and the fourth electrode are both integral electrodes.
3. The capacitor according to claim 1, wherein: There is a first gap between the adjacent first branch structures and the second branch structures; The third electrode includes a plurality of third sub-electrodes; the third sub-electrodes are arranged in a one-to-one correspondence with the first gaps; and / or the fourth electrode includes a plurality of fourth sub-electrodes; the fourth sub-electrodes are arranged in a one-to-one correspondence with the first gaps.
4. The capacitor according to claim 1, wherein: The orthographic projections of the first branch structure and the second branch structure on the first dielectric substrate both include any one of a rectangle, a fold line or a wave shape.
5. The capacitor according to claim 1, wherein: The tunable dielectric layer includes a liquid crystal layer.
6. The capacitor according to claim 1, wherein: The material constituting the first dielectric substrate and the second dielectric substrate includes glass.
7. The capacitor according to claim 1, wherein: The material constituting the third electrode and the fourth electrode includes indium tin oxide.
8. A method for preparing a capacitor, comprising: Providing a first dielectric substrate, and sequentially forming a third electrode and a first alignment layer on the first dielectric substrate; forming a first electrode and a second electrode on a side of the first alignment layer away from the first dielectric substrate; Providing a second dielectric substrate, and sequentially forming a fourth electrode and a second alignment layer on the second dielectric substrate; Packing a side of the first dielectric substrate having the first electrode and the second electrode with a side of the second dielectric substrate having the second alignment layer in a box; forming an adjustable dielectric layer between the first electrode, the layer where the second electrode is located, and the second alignment layer; The adjustable dielectric layer covers the first electrode and the second electrode.
9. The preparation method according to claim 8, wherein: When the third electrode is a whole electrode, the step of providing a first dielectric substrate and sequentially forming the third electrode and the first alignment layer on the first dielectric substrate specifically includes: Providing a first dielectric substrate; forming a first metal layer on the first dielectric substrate by an electroplating process, and patterning the first metal layer to form the third electrode; A first interlayer insulating layer is formed on a side of the third electrode away from the first dielectric substrate, and the first interlayer insulating layer is transferred and rubbed for orientation to form the first alignment layer.
10. The preparation method according to claim 8, wherein: When the third electrode includes a plurality of third sub-electrodes, the step of providing a first dielectric substrate and sequentially forming the third electrode and the first alignment layer on the first dielectric substrate specifically includes: Providing a first dielectric substrate; Forming a plurality of metal blocks on the first dielectric substrate by an electroplating process, and patterning the metal blocks to form a plurality of the third sub-electrodes; A first interlayer insulating layer is formed on a side of the third sub-electrode away from the first dielectric substrate, and the first interlayer insulating layer is transferred and rubbed for orientation to form the first alignment layer.
11. The preparation method according to claim 8, wherein: The step of forming the first electrode and the second electrode on the side of the first alignment layer away from the first dielectric substrate specifically includes: A third metal layer is formed on a side of the first alignment layer away from the first dielectric substrate by electroplating, and the third metal layer is patterned to form the first electrode and the second electrode.
12. The preparation method according to claim 8, wherein: When the fourth electrode is a whole electrode, the step of providing a second dielectric substrate and sequentially forming the fourth electrode and the second alignment layer on the second dielectric substrate specifically includes: Providing a second dielectric substrate; forming a second metal layer on the second dielectric substrate by an electroplating process, and patterning the second metal layer to form the fourth electrode; A second interlayer insulating layer is formed on the side of the fourth electrode away from the second dielectric substrate, and the second interlayer insulating layer is transferred and rubbed to form the second alignment layer.
13. The preparation method according to claim 8, wherein: When the fourth electrode includes a plurality of fourth sub-electrodes, the step of providing a second dielectric substrate and sequentially forming the fourth electrode and the second alignment layer on the second dielectric substrate specifically includes: Providing a second dielectric substrate; Forming a plurality of metal blocks on the second dielectric substrate by an electroplating process, and patterning the metal blocks to form a plurality of the fourth sub-electrodes; A second interlayer insulating layer is formed on the side of the fourth sub-electrode away from the second dielectric substrate, and the second interlayer insulating layer is transferred and rubbed to form the second alignment layer.
14. The preparation method according to claim 8, wherein: The step of forming an adjustable dielectric layer between the first alignment layer and the second alignment layer specifically includes: The adjustable dielectric layer is formed between the first alignment layer and the second alignment layer by a dripping or pouring process.
15. A radio frequency device, comprising the capacitor according to any one of claims 1 to 7.