Silicon wafer carrying method and device

Abstract

The invention provides a silicon wafer carrying method and device, and relates to the technical field of semiconductors, the silicon wafer carrying method is applied to a silicon wafer cache system, and the method comprises the steps: obtaining first indication information sent by each first cache unit, the first indication information is used for indicating the corresponding relationship between the unit identifier of the first cache unit and the bearing identifier of the silicon wafer bearing device; according to the first indication information, LTO information of a silicon wafer in a silicon wafer bearing device borne on a first target cache unit is sent to the first target cache unit, and the first target cache unit is at least one cache unit in the first cache unit; and controlling a carrying mechanism to carry the silicon wafer bearing device on the first target cache unit which receives the LTO information to silicon wafer processing equipment. According to the scheme, the situation that the cache units are idle can be reduced as much as possible, the silicon wafer carrying process efficiency is improved, and then the silicon wafer machining efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a silicon wafer conveying method and device. Background Art

[0002] In the silicon wafer processing industry, before using silicon wafer cleaning equipment to clean silicon wafers or using silicon wafer etching equipment to etch silicon wafers, there are multiple cache units (or cache stations) for caching silicon wafer materials. For example, there are 3-5 cache units to cache silicon wafer materials, and materials are transported between multiple cache units according to the process sequence through automated guided vehicles (AGVs) or manually, and the silicon wafers in the cache unit corresponding to the last process sequence are transported to the silicon wafer cleaning equipment or silicon wafer etching equipment for processing.

[0003] However, when using the above process to transport and process silicon wafers, it is usually necessary to obtain the low-temperature oxide (LTO) information of the silicon wafer material carried by the cache unit corresponding to the first process sequence, and then the silicon wafer material can be transported to the next cache unit in sequence according to the process sequence, until the silicon wafer material in the cache unit corresponding to the last process sequence is transported to the silicon wafer cleaning equipment or silicon wafer etching equipment for processing. However, it takes a long time to obtain LTO information on the cache unit, resulting in at least one cache unit among multiple cache units being idle (i.e., no silicon wafer material is cached), resulting in low efficiency in the silicon wafer transport process, and then low efficiency in silicon wafer processing. Summary of the invention

[0004] The embodiment of the present invention provides a silicon wafer conveying method and device, which are used to solve the problem of low efficiency of the existing silicon wafer conveying process.

[0005] To solve the above technical problems, the embodiments of the present invention provide the following technical solutions:

[0006] An embodiment of the present invention provides a silicon wafer handling method, which is applied to a silicon wafer cache system, wherein the silicon wafer cache system includes a plurality of cache units, wherein the plurality of cache units are arranged in sequence according to a process sequence, and the cache unit corresponding to the last process sequence is connected to a silicon wafer processing device;

[0007] The method comprises:

[0008] Obtaining first indication information sent by each first cache unit, wherein the first cache unit is a cache unit carrying a silicon wafer carrying device among the multiple cache units, and the first indication information is used to indicate a corresponding relationship between a unit identifier of the first cache unit and a carrying identifier of the silicon wafer carrying device;

[0009] According to the first indication information, sending the low temperature oxide LTO information of the silicon wafer in the silicon wafer carrying device carried by the first target cache unit to the first target cache unit, wherein the first target cache unit is at least one cache unit in the first cache units;

[0010] The transport mechanism is controlled to transport the silicon wafer carrier on the first target cache unit that receives the LTO information to the silicon wafer processing equipment.

[0011] In some embodiments, obtaining the first indication information sent by each first cache unit includes:

[0012] According to the process sequence, the transport mechanism is controlled to transport the silicon wafer carrier from the first buffer unit to the subsequent buffer units in sequence;

[0013] The first indication information sent by each of the first cache units is obtained at every first preset time period.

[0014] In some embodiments, sending, according to the first indication information, the low temperature oxide (LTO) information of the silicon wafer in the silicon wafer carrying device carried by the first target cache unit to the first target cache unit includes:

[0015] Determine, according to the carrier identifier indicated by the first indication information, the low temperature oxide (LTO) information of the silicon wafer in the silicon wafer carrier device corresponding to the pre-stored carrier identifier;

[0016] Determine that the cache unit indicated by the unit identifier corresponding to the bearer identifier is the first target cache unit;

[0017] The LTO information is sent to the first target cache unit.

[0018] In some embodiments, the method further comprises:

[0019] If the pre-stored LTO information of the silicon wafer in the silicon wafer carrying device corresponding to the carrier identifier corresponding to the first indication information is not found, determining the cache unit corresponding to the first indication information as the second target cache unit;

[0020] According to the process sequence, the silicon wafer carrier on the second target cache unit is sequentially transported to the subsequent cache units.

[0021] In some embodiments, the method further comprises:

[0022] In a case where the second target cache unit is a cache unit corresponding to the last process sequence, the silicon wafer carrying device on the second target cache unit is moved away from the silicon wafer cache system.

[0023] In some embodiments, the step of moving the silicon wafer carrier on the first target cache unit that receives the LTO information to the silicon wafer processing equipment includes:

[0024] According to the process sequence, the silicon wafer carrier on the first target cache unit is sequentially moved to subsequent cache units until it is moved to the cache unit corresponding to the last process sequence;

[0025] The silicon wafer carrying device on the cache unit corresponding to the last process sequence is transported to the silicon wafer processing equipment.

[0026] In some embodiments, the method further comprises:

[0027] Obtaining a carrying time length of a silicon wafer carrying device on a second cache unit; the second cache unit is any one of the multiple cache units;

[0028] When the bearing duration is greater than the second preset duration, an alarm message is generated.

[0029] In some embodiments, after sending the LTO information to the first target cache unit, the method further includes:

[0030] The pre-stored LTO information of the silicon wafer in the silicon wafer carrying device corresponding to the carrying identifier is deleted.

[0031] In some embodiments, obtaining the first indication information sent by each first cache unit every first preset time period includes:

[0032] sending second indication information to each of the cache units at intervals of the first preset time, wherein the second indication information is used to instruct the cache unit to carry the silicon wafer carrying device within a third preset time;

[0033] Within the third preset time period, obtaining the first indication information sent by each of the first cache units;

[0034] Among them, the first preset time length is greater than the third preset time length.

[0035] An embodiment of the present invention further provides a silicon wafer transport device, the device comprising:

[0036] A first acquisition module is used to acquire first indication information sent by each first cache unit, wherein the first cache unit is a cache unit in which a silicon wafer carrier device is cached among multiple cache units, and the first indication information is used to indicate a corresponding relationship between a unit identifier of the first cache unit and a carrier identifier of the silicon wafer carrier device; the multiple cache units belong to a silicon wafer cache system, the multiple cache units are arranged according to a process sequence, and the cache unit corresponding to the last process sequence is connected to a silicon wafer processing device;

[0037] A first sending module, configured to send, according to the first indication information, the low temperature oxide (LTO) information of the silicon wafer in the silicon wafer carrying device carried by the first target cache unit to a first target cache unit, wherein the first target cache unit is at least one cache unit in the first cache units;

[0038] The first processing module is used to control the transport mechanism to transport the silicon wafer carrying device on the first target cache unit that receives the LTO information to the silicon wafer processing equipment.

[0039] The embodiments of the present invention have the following beneficial effects:

[0040] A silicon wafer transport method provided in an embodiment of the present invention is applied to a silicon wafer cache system, wherein the silicon wafer cache system includes a plurality of cache units arranged in sequence according to a process sequence. The method obtains first indication information sent by a first cache unit carrying a silicon wafer carrier among the plurality of cache units, wherein the first indication information is used to indicate the correspondence between a unit identifier of the first cache unit and a carrier identifier of the silicon wafer carrier, that is, according to the first indication information, the unit identifier of each first cache unit and the carrier identifier of the silicon wafer carrier carried thereon can be determined. After obtaining the first indication information, according to the carrier identifier of the silicon wafer carrier indicated by the first indication information, a first target cache unit in the first cache unit is determined, and according to the unit identifier indicated by the first indication information, low temperature oxide (LTO) information of the silicon wafer in the silicon wafer carrier carried thereon is sent to the first target cache unit, and a transport mechanism is controlled to transport the silicon wafer carrier on the first target cache unit that receives the LTO information to the silicon wafer processing equipment, so as to realize processing of the silicon wafer in the silicon wafer carrier. That is, in the silicon wafer transport method provided by the embodiment of the present invention, there is no need to spend a long time waiting in the first cache unit to obtain the LTO information of the silicon wafer before subsequently transporting the silicon wafer. Instead, in the process of sequentially transporting the silicon wafer in the cache unit, the first cache unit carrying the silicon wafer carrying device is determined through the first indication information, and then, according to the carrying identifier of the silicon wafer carrying device indicated by the first indication information, the LTO information of the silicon wafer carried by it is sent to the first target cache unit, so that the cache unit obtains the LTO information, that is, the process of obtaining the LTO information of the silicon wafer is carried out in parallel with the transport process of the silicon wafer, so as to minimize the situation where the cache unit is idle (that is, there is no cached silicon wafer material), improve the efficiency of the silicon wafer transport process, and then improve the processing efficiency of the silicon wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 A flow chart showing a method for transporting silicon wafers provided by an embodiment of the present invention;

[0042] Figure 2 A schematic diagram showing the layout of a silicon wafer cache system and silicon wafer processing equipment provided by an embodiment of the present invention;

[0043] Figure 3 A schematic diagram showing the structure of a silicon wafer transport device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0044] In order to make the technical problems, technical solutions and advantages to be solved by the embodiments of the present invention more clear, a detailed description will be given below with reference to the accompanying drawings and specific embodiments.

[0045] In order to make the purpose, technical solution and advantages of the embodiment of the present invention clearer, the technical solution of the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings of the embodiment of the present invention. Obviously, the described embodiment is a part of the embodiment of the present invention, not all of the embodiments. Based on the described embodiment of the present invention, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present invention.

[0046] In order to solve the problem of low efficiency in the existing silicon wafer transport process, an embodiment of the present invention provides a silicon wafer transport method and device.

[0047] An embodiment of the present invention provides a silicon wafer handling method, which is applied to a silicon wafer cache system, wherein the silicon wafer cache system includes a plurality of cache units, wherein the plurality of cache units are arranged in sequence according to a process sequence, and the cache unit corresponding to the last process sequence is connected to a silicon wafer processing device;

[0048] Wherein, the silicon wafer cache system also includes a controller (or control device, control system) and a transport mechanism;

[0049] The controller may be a manufacturing execution system (MES) or an equipment automation program (EAP), and the transport mechanism may be a robotic arm or an AGV.

[0050] It can be understood that the silicon wafer transport method provided in the embodiment of the present invention is executed by the controller in the silicon wafer cache system.

[0051] like Figure 1 As shown, the silicon wafer handling method includes:

[0052] Step 101: obtaining first indication information sent by each first buffer unit, wherein the first buffer unit is a buffer unit (Buffer) carrying a silicon wafer carrying device among the plurality of buffer units, and the first indication information is used to indicate a corresponding relationship between a unit identifier of the first buffer unit and a carrying identifier of the silicon wafer carrying device;

[0053] Here, the silicon wafer carrying device may be a silicon wafer cassette (CET), and the silicon wafer carrying device may include or carry a plurality of silicon wafers.

[0054] In this step, while the silicon wafer carrier is being transported between multiple cache units in sequence according to the process sequence, the controller obtains first indication information sent by the first cache unit carrying the silicon wafer carrier on the multiple cache units. It can be understood that one first cache unit corresponds to one first indication information, that is, one first cache unit sends one first indication information, and the first indication information includes the unit identifier of the first cache unit and the carrier identifier (Carrier ID) of the silicon wafer carrier carried on the first cache unit, as well as the correspondence between the unit identifier and the carrier identifier.

[0055] The unit identifier is used to indicate or identify the first cache unit, and the carrier identifier is used to indicate or identify the silicon wafer carrier.

[0056] Step 102: According to the first indication information, low temperature oxide (LTO) information of a silicon wafer in a silicon wafer carrying device carried by the first target cache unit is sent to a first target cache unit, wherein the first target cache unit is at least one cache unit in the first cache units.

[0057] In this step, after the controller obtains the first indication information sent by the first cache unit, based on the bearing identifier in the first indication information, in the LTO information of the silicon wafer in the silicon wafer bearing device pre-stored in the controller, it is determined that the silicon wafer bearing device corresponding to the bearing identifier is the target silicon wafer bearing device, and further, the cache unit carrying the target silicon wafer bearing device is determined to be the first target cache unit in the first cache unit.

[0058] The controller pre-stores a plurality of bearing identifiers and LTO information of the silicon wafer in the silicon wafer bearing device corresponding to each bearing identifier. The bearing identifier and the corresponding LTO information are stored in the database of the controller in the form of information stack.

[0059] It should also be noted that the first cache unit may be one cache unit, multiple cache units or all cache units among multiple cache units, and the first target cache unit may be one cache unit, multiple cache units or all cache units among the first cache unit.

[0060] Step 103: Control the transport mechanism to transport the silicon wafer carrier on the first target cache unit that has received the LTO information to the silicon wafer processing equipment.

[0061] After determining the first target buffer unit, the LTO information is sent to the register of the first target buffer unit, and the controller controls the transport mechanism to transport the silicon wafer carrier on the first target buffer unit to the silicon wafer processing equipment for processing.

[0062] The silicon wafer processing equipment may be silicon wafer cleaning equipment or silicon wafer etching equipment.

[0063] That is, in the silicon wafer transport method provided by the embodiment of the present invention, there is no need to spend a long time waiting in the first cache unit to obtain the LTO information of the silicon wafer before subsequently transporting the silicon wafer. Instead, in the process of sequentially transporting the silicon wafer in the cache unit, the first cache unit carrying the silicon wafer carrying device is determined through the first indication information, and then, according to the carrying identifier of the silicon wafer carrying device indicated by the first indication information, the LTO information of the silicon wafer carried by it is sent to the first target cache unit, so that the cache unit obtains the LTO information, that is, the process of obtaining the LTO information of the silicon wafer is carried out in parallel with the transport process of the silicon wafer, so as to minimize the situation where the cache unit is idle (that is, there is no cached silicon wafer material), improve the efficiency of the silicon wafer transport process, and then improve the processing efficiency of the silicon wafer.

[0064] After the first target cache unit obtains the LTO information, when the transporting mechanism transports the silicon wafer carrier, the transporting mechanism obtains the LTO information from the first target cache unit. After the silicon wafer carrier is transported to the silicon wafer processing equipment, the corresponding LTO information is also transmitted to the silicon wafer processing equipment, and the silicon wafer processing equipment processes the silicon wafer according to the LTO information.

[0065] In some embodiments, obtaining the first indication information sent by each first cache unit includes:

[0066] According to the process sequence, the transport mechanism is controlled to transport the silicon wafer carrier from the first buffer unit to the subsequent buffer units in sequence;

[0067] The first indication information sent by each of the first cache units is obtained at every first preset time period.

[0068] In this embodiment, after the transport mechanism receives a silicon wafer carrier, if the first cache unit (the first cache unit) is idle, that is, the first cache unit does not carry the silicon wafer carrier, the silicon wafer carrier is transported to the first cache unit and transported to the subsequent idle cache units in sequence according to the process sequence.

[0069] Every first preset time period, each cache unit determines whether it carries a silicon wafer carrying device. If it is determined to carry the device, the cache unit is a first cache unit, and the first cache unit obtains the carrying identifier of the silicon wafer carrying device carried thereon, generates first indication information based on the carrying identifier and the unit identifier of the first cache unit, sends the first indication information to the controller, and the controller obtains the first indication information sent by each first cache unit.

[0070] Optionally, the first preset duration is 30 seconds.

[0071] In some embodiments, sending, according to the first indication information, the low temperature oxide (LTO) information of the silicon wafer in the silicon wafer carrying device carried by the first target cache unit to the first target cache unit includes:

[0072] According to the bearing identifier indicated by the first indication information, determine the low temperature oxide LTO information of the silicon wafer in the silicon wafer bearing device corresponding to the bearing identifier that is pre-stored. Specifically, the bearing identifier and the LTO information of the silicon wafer in the silicon wafer bearing device corresponding to the bearing identifier are pre-stored in the controller. After the controller receives the bearing identifier in the first indication information, the silicon wafer bearing device corresponding to the bearing identifier indicated by the first indication information and the LTO information of the silicon wafer in the silicon wafer bearing device are determined according to the bearing identifier and the above information pre-stored in the controller;

[0073] Determine that the cache unit indicated by the unit identifier corresponding to the carrier identifier is the first target cache unit. Specifically, first determine the unit identifier corresponding to the carrier identifier that can find the LTO information of the silicon wafer in the silicon wafer carrier in the controller, and determine the cache unit indicated by the unit identifier as the first target cache unit;

[0074] The LTO information is sent to the first target cache unit to complete the assignment and binding of the LTO information.

[0075] In some embodiments, after the first target cache unit sends the LTO information, the method further includes:

[0076] The pre-stored LTO information of the silicon wafer in the silicon wafer carrying device corresponding to the carrying identifier is deleted.

[0077] That is, after the LTO information is sent to the cache unit and the cache unit is assigned and bound, the LTO information corresponding to the bearer identifier stored in the controller's database is deleted according to the bearer identifier. This method can prevent abnormal operations of handling materials under abnormal circumstances, thereby ensuring the real-time and accuracy of the database in the controller.

[0078] It should also be noted that when the first cache unit sends the first indication information to the controller, the silicon wafer carrier may also be located on the conveying mechanism, which is in the process of conveying the silicon wafer carrier from one cache unit to another cache unit. At this time, the conveying mechanism generates target indication information based on the mechanism identification of the conveying mechanism and the bearing identification of the silicon wafer carrier, and the conveying mechanism sends the target indication information to the controller, and the controller obtains the target indication information.

[0079] The target indication information is used to indicate the corresponding relationship between the mechanism identification of the transport mechanism and the carrying identification of the silicon wafer carrying device carried thereon.

[0080] After the controller receives the target indication information, it determines the low-temperature oxide LTO information of the silicon wafer in the silicon wafer carrier device corresponding to the pre-stored bearing identifier according to the bearing identifier in the target indication information, and then determines the silicon wafer carrier device on the transport mechanism indicated by the mechanism identifier corresponding to the bearing identifier, sends the low-temperature oxide LTO information of the silicon wafer in the silicon wafer carrier device to the transport mechanism, stores the LTO information in the information register of the transport mechanism, and completes the assignment and binding of the bearing identifier and the LTO information.

[0081] In some embodiments, the method further comprises:

[0082] In the case where the pre-stored LTO information of the silicon wafer in the silicon wafer carrying device corresponding to the bearer identifier is not found according to the bearer identifier corresponding to the first indication information, the cache unit corresponding to the first indication information is determined to be the second target cache unit, that is, the controller determines that the LTO information verification fails, that is, the cache unit corresponding to the first indication information is not the first target cache unit, and determines it as the second target cache unit;

[0083] According to the process sequence, the silicon wafer carrier on the second target cache unit is sequentially transported to the subsequent cache unit. Specifically, during transportation, the silicon wafer carrier on the second target cache unit is sequentially transported to the subsequent idle cache unit according to the process sequence.

[0084] In this case, at intervals of a first preset time, each cache unit continues to determine whether it carries a silicon wafer carrying device, and if so, continues to generate first indication information and sends the first indication information to the controller.

[0085] Furthermore, the method further comprises:

[0086] In a case where the second target cache unit is a cache unit corresponding to the last process sequence, the silicon wafer carrying device on the second target cache unit is moved away from the silicon wafer cache system.

[0087] When the second target cache unit is the cache unit corresponding to the last process sequence, or when the silicon wafer carrier indicated by the carrier identifier of the LTO information is not found in the above-mentioned controller and is transported to the cache unit corresponding to the last process sequence, it is determined that the silicon wafer carried in the silicon wafer carrier (or the silicon wafer carrier on the second target cache unit) is a non-station material or an abnormal material, and the transport mechanism is not allowed to grab this material, or because the transport mechanism transports the material to the silicon wafer transfer unit, the material is transferred out through the silicon wafer transfer unit to complete the processing of the abnormal material.

[0088] In some embodiments, the step of moving the silicon wafer carrier on the first target cache unit that receives the LTO information to the silicon wafer processing equipment includes:

[0089] According to the process sequence, the silicon wafer carrier on the first target cache unit is sequentially transported to the subsequent cache units until it is transported to the cache unit corresponding to the last process sequence, that is, in the process of transporting the silicon wafer carrier to the silicon wafer processing equipment, the silicon wafer carrier on the first target cache unit is sequentially transported to the subsequent idle cache units according to the process sequence. If there is no idle cache unit, the silicon wafer carrier is transported after the cache unit is idle, until the silicon wafer carrier is transported to the cache unit corresponding to the last process sequence;

[0090] The silicon wafer carrying device on the cache unit corresponding to the last process sequence is transported to the silicon wafer processing equipment.

[0091] In some embodiments, the method further comprises:

[0092] Obtaining a load duration of a silicon wafer carrier device on a second cache unit, where the load duration is a time duration during which a silicon wafer carrier device is located on the second cache unit, wherein the second cache unit is any one of the multiple cache units;

[0093] When the bearing duration is greater than the second preset duration, an alarm message is generated.

[0094] That is, when the carrying time is longer than the second preset time, it can be considered that the silicon wafer carrying device has not been processed for a certain period of time, and an alarm message is generated to allow the staff to perform manual processing.

[0095] In some embodiments, obtaining the first indication information sent by each first cache unit every first preset time period includes:

[0096] Every first preset time period, second indication information is sent to each of the cache units, where the second indication information is used to instruct the cache unit to carry the silicon wafer carrying device within a third preset time period.

[0097] It should be noted that when the cache unit sends the indication information to the controller, the cache unit sends it to the controller through the load photoelectric sensor. The sending time takes about several milliseconds to more than ten milliseconds. If the silicon wafer carrier is transported during this time, the subsequent LTO information will not correspond to the carrier identification. Therefore, the solution is that the controller sends the second indication information (or flag bit M0) to the cache unit every first preset time interval. After the cache unit receives the second indication information, it keeps carrying the silicon wafer carrier within a third preset time, and does not transfer the silicon wafer carrier to the transport mechanism.

[0098] Within the third preset time period, the first indication information sent by each of the first cache units is obtained, thereby preventing the failure of LTO information assignment.

[0099] Wherein, the first preset duration is greater than the third preset duration. Optionally, the third preset duration is several tens of milliseconds. Figure 2 , specifically describes the specific process of the silicon wafer handling method provided by the embodiment of the present invention, wherein: Figure 2 Schematic diagram of the layout of the silicon wafer cache system and silicon wafer processing equipment.

[0100] like Figure 2 As shown, the wafer buffer system includes four buffer units, Buffer1, Buffer2, Buffer3, and Buffer4. According to the process sequence, Buffer1 is the first buffer unit and Buffer4 is the last buffer unit. Buffer4 is connected to the wafer processing equipment (Bath) through a robot (Robot). The wafer buffer system also includes Buffer5, Buffer6, Buffer7, and Buffer8. Buffer5, Buffer6, Buffer7, and Buffer8 are used to transport the wafer carrier out of the wafer buffer system. It also includes a transport mechanism (AGV) and a controller (EAP / MES).

[0101] According to the process sequence, the transport mechanism (AGV) transports the silicon wafer carrier from Buffer1 to Buffer4 in sequence. After Buffer1 is idle, the silicon wafer carrier continues to be transported thereon. At every first preset time interval, the controller obtains the first indication information sent by each first cache unit. Taking the first cache unit as Buffer1 and the first target cache unit as Buffer1 as an example, the controller verifies the carrier identifier according to the first indication information, obtains the LTO information corresponding to the carrier identifier in the pre-stored database, sends the LTO information to the first target cache unit, completes the account binding between the carrier identifier and the LTO information, and transports the silicon wafer carrier corresponding to the carrier identifier to the processing chamber (Bath Port) of the silicon wafer processing equipment for processing.

[0102] like Figure 3 As shown, an embodiment of the present invention further provides a silicon wafer transport device, the device comprising:

[0103] A first acquisition module 301 is used to acquire first indication information sent by each first cache unit, wherein the first cache unit is a cache unit in which a silicon wafer carrier device is cached among multiple cache units, and the first indication information is used to indicate a corresponding relationship between a unit identifier of the first cache unit and a carrier identifier of the silicon wafer carrier device; the multiple cache units belong to a silicon wafer cache system, the multiple cache units are arranged according to a process sequence, and the cache unit corresponding to the last process sequence is connected to a silicon wafer processing device;

[0104] A first sending module 302 is used to send, according to the first indication information, the low temperature oxide LTO information of the silicon wafer in the silicon wafer carrying device carried by the first target cache unit to a first target cache unit, wherein the first target cache unit is at least one cache unit in the first cache units;

[0105] The first processing module 303 is used to control the transport mechanism to transport the silicon wafer carrying device on the first target cache unit that receives the LTO information to the silicon wafer processing equipment.

[0106] In some embodiments, the first acquisition module 301 includes:

[0107] A first processing unit is used to control the transport mechanism to transport the silicon wafer carrier from the first cache unit to the subsequent cache units in sequence according to the process sequence;

[0108] The first acquisition unit is used to acquire the first indication information sent by each of the first cache units every first preset time period.

[0109] In some embodiments, the first sending module 302 includes:

[0110] A first determining unit, configured to determine, according to the carrier identifier indicated by the first indication information, the pre-stored low temperature oxide (LTO) information of the silicon wafer in the silicon wafer carrying device corresponding to the carrier identifier;

[0111] A second determining unit, configured to determine that a cache unit indicated by a unit identifier corresponding to the bearer identifier is the first target cache unit;

[0112] The first sending unit is used to send the LTO information to the first target cache unit.

[0113] In some embodiments, the device further comprises:

[0114] A second processing module is configured to determine that the cache unit corresponding to the first indication information is a second target cache unit when the LTO information of the silicon wafer in the silicon wafer carrying device corresponding to the bearing identifier pre-stored is not found according to the bearing identifier corresponding to the first indication information;

[0115] The third processing module is used to sequentially transfer the silicon wafer carrier on the second target cache unit to the subsequent cache unit according to the process sequence.

[0116] In some embodiments, the device further comprises:

[0117] The fourth processing module is used to move the silicon wafer carrying device on the second target cache unit away from the silicon wafer cache system when the second target cache unit is the cache unit corresponding to the last process sequence.

[0118] In some embodiments, the first processing module 303 includes:

[0119] A second processing unit is used to sequentially move the silicon wafer carrier on the first target cache unit to subsequent cache units according to the process sequence, until it is moved to the cache unit corresponding to the last process sequence;

[0120] The third processing unit is used to transport the silicon wafer carrying device on the cache unit corresponding to the last process sequence to the silicon wafer processing equipment.

[0121] In some embodiments, the device further comprises:

[0122] A second acquisition module is used to acquire the load duration of the silicon wafer load device on the second cache unit; the second cache unit is any one of the multiple cache units;

[0123] The fifth processing module is used to generate an alarm message when the bearing duration is greater than a second preset duration.

[0124] In some embodiments, the device further comprises:

[0125] The sixth processing module is used to delete the pre-stored LTO information of the silicon wafer in the silicon wafer carrying device corresponding to the carrying identifier.

[0126] In some embodiments, the first acquisition unit is specifically configured to:

[0127] sending second indication information to each of the cache units at intervals of the first preset time, wherein the second indication information is used to instruct the cache unit to carry the silicon wafer carrying device within a third preset time;

[0128] Within the third preset time period, obtaining the first indication information sent by each of the first cache units;

[0129] Among them, the first preset time length is greater than the third preset time length.

[0130] It should be noted that the silicon wafer handling device provided in the embodiment of the present invention is a device capable of executing the above-mentioned silicon wafer handling method, and all embodiments of the above-mentioned silicon wafer handling method are applicable to the device and can achieve the same or similar technical effects.

[0131] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A silicon wafer transport method, characterized in that: Applicable to a silicon wafer cache system, the silicon wafer cache system comprises a plurality of cache units, wherein the plurality of cache units are arranged in sequence according to a process sequence, and the cache unit corresponding to the last process sequence is connected to a silicon wafer processing device; The method comprises: Obtaining first indication information sent by each first cache unit, wherein the first cache unit is a cache unit carrying a silicon wafer carrying device among the multiple cache units, and the first indication information is used to indicate a corresponding relationship between a unit identifier of the first cache unit and a carrying identifier of the silicon wafer carrying device; According to the first indication information, sending the low temperature oxide LTO information of the silicon wafer in the silicon wafer carrying device carried by the first target cache unit to the first target cache unit, wherein the first target cache unit is at least one cache unit in the first cache units; The transport mechanism is controlled to transport the silicon wafer carrier on the first target cache unit that receives the LTO information to the silicon wafer processing equipment.

2. The method according to claim 1, characterized in that Acquiring first indication information sent by each first cache unit, including: According to the process sequence, the transport mechanism is controlled to transport the silicon wafer carrier from the first buffer unit to the subsequent buffer units in sequence; The first indication information sent by each of the first cache units is obtained at every first preset time period.

3. The method according to claim 1, characterized in that According to the first indication information, sending the low temperature oxide (LTO) information of the silicon wafer in the silicon wafer carrying device carried by the first target cache unit to the first target cache unit includes: Determine, according to the carrier identifier indicated by the first indication information, the low temperature oxide (LTO) information of the silicon wafer in the silicon wafer carrier device corresponding to the pre-stored carrier identifier; Determine that the cache unit indicated by the unit identifier corresponding to the bearer identifier is the first target cache unit; The LTO information is sent to the first target cache unit.

4. The method according to claim 3, characterized in that The method further comprises: If the pre-stored LTO information of the silicon wafer in the silicon wafer carrying device corresponding to the carrier identifier corresponding to the first indication information is not found, determining the cache unit corresponding to the first indication information as the second target cache unit; According to the process sequence, the silicon wafer carrier on the second target cache unit is sequentially transported to the subsequent cache units.

5. The method according to claim 4, characterized in that The method further comprises: In a case where the second target cache unit is a cache unit corresponding to the last process sequence, the silicon wafer carrying device on the second target cache unit is moved away from the silicon wafer cache system.

6. The method according to claim 1, characterized in that The method of moving the silicon wafer carrier on the first target cache unit that receives the LTO information to the silicon wafer processing equipment includes: According to the process sequence, the silicon wafer carrier on the first target cache unit is sequentially moved to subsequent cache units until it is moved to the cache unit corresponding to the last process sequence; The silicon wafer carrying device on the cache unit corresponding to the last process sequence is transported to the silicon wafer processing equipment.

7. The method according to claim 1, characterized in that The method further comprises: Obtaining a carrying time length of a silicon wafer carrying device on a second cache unit; the second cache unit is any one of the multiple cache units; When the bearing duration is greater than the second preset duration, an alarm message is generated.

8. The method according to claim 3, characterized in that After sending the LTO information to the first target cache unit, the method further includes: The pre-stored LTO information of the silicon wafer in the silicon wafer carrying device corresponding to the carrying identifier is deleted.

9. The method according to claim 2, characterized in that: Obtaining the first indication information sent by each of the first cache units at intervals of a first preset time period includes: sending second indication information to each of the cache units at intervals of the first preset time, wherein the second indication information is used to instruct the cache unit to carry the silicon wafer carrying device within a third preset time; Within the third preset time period, obtaining the first indication information sent by each of the first cache units; Among them, the first preset time length is greater than the third preset time length.

10. A silicon wafer transport device, characterized in that: The device comprises: A first acquisition module is used to acquire first indication information sent by each first cache unit, wherein the first cache unit is a cache unit in which a silicon wafer carrier device is cached among multiple cache units, and the first indication information is used to indicate a corresponding relationship between a unit identifier of the first cache unit and a carrier identifier of the silicon wafer carrier device; the multiple cache units belong to a silicon wafer cache system, the multiple cache units are arranged according to a process sequence, and the cache unit corresponding to the last process sequence is connected to a silicon wafer processing device; A first sending module, configured to send, according to the first indication information, the low temperature oxide (LTO) information of the silicon wafer in the silicon wafer carrying device carried by the first target cache unit to a first target cache unit, wherein the first target cache unit is at least one cache unit in the first cache units; The first processing module is used to control the transport mechanism to transport the silicon wafer carrying device on the first target cache unit that receives the LTO information to the silicon wafer processing equipment.

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