Common prevention design circuit for synchronous rectification in Flyback framework
By using the time judgment mechanism of the synchronous rectification control chip in the Flyback flyback power supply, it ensures that the on-off time of the synchronous rectification is not greater than the demagnetization time of the transformer, and the problem of miscommon commonality of the synchronous rectification controller is solved, and the absolute safety of the power supply is achieved.
Patent Information
- Application Number
- CN202411858608.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-17
- Publication Date
- 2025-03-25
AI Technical Summary
In Flyback flyback power supply, the synchronous rectification controller is prone to common communication between the original and secondary sides due to mis-opening or failure to turn off normally, resulting in damage to the power supply.
A common design line for preventing synchronous rectification in Flyback flyback architecture is designed, and a synchronous rectification control chip is adopted, with the original negative voltage shutdown mechanism and a newly added synchronous rectification time judgment mechanism. By calculating the excitation and demagnetization time of the transformer, it is ensured that the on-off time of the synchronous rectification is never greater than the demagnetization time of the transformer.
Effectively prevent synchronous rectification controller from being incorrectly shared, ensure absolute safety of the power supply, and avoid power damage.
Smart Images
Figure CN119696343A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of power supply, and more specifically, relates to a common design circuit for preventing synchronous rectification in a Flyback flyback architecture. Background Art
[0002] In the circuit with synchronous rectification on the secondary side of the Flyback flyback power supply, the synchronous rectification controller often turns on by mistake or cannot be turned off normally, which causes the primary drive to be turned on after the secondary synchronous rectification drive is turned on, resulting in the common situation of the original and secondary sides. In the flyback topology, the power supply is burned, resulting in significant property losses. This article designs a circuit or method for preventing commonness of a synchronous rectification controller based on principle practice and experiments. Summary of the invention
[0003] In order to solve the above technical problems, the present invention provides a common design circuit for preventing synchronous rectification in a Flyback flyback architecture to solve the above problems.
[0004] A common design circuit for preventing synchronous rectification in a Flyback flyback architecture includes a synchronous rectification control chip, wherein the synchronous rectification control chip is provided with: an original negative voltage shutdown mechanism; a newly added synchronous rectification time judgment mechanism, wherein the time judgment mechanism includes: a calculation module for calculating the excitation time Ton and the demagnetization time Toff of the transformer according to the equality of excitation and demagnetization in the flyback converter and using the classic volt-second balance formula VINTon=nVo*Toff in the flyback converter; and a setting module for setting the maximum value of the synchronous rectification drive on time according to the calculated demagnetization time Toff, so as to ensure that the on time of the synchronous rectification is never greater than the demagnetization time of the transformer.
[0005] Preferably, the synchronous rectification control chip also includes a storage unit for storing parameters related to the volt-second balance formula, wherein the parameters include the input voltage VIN, the output voltage Vo and the transformer turns ratio n. The time judgment mechanism of the synchronous rectification control chip also includes a monitoring module for real-time monitoring of the primary side voltage and current of the transformer to obtain real-time data required for calculating the volt-second balance. An alarm module is provided in the synchronous rectification control chip, which sends an alarm signal when the calculated synchronous rectification drive turn-on time approaches or reaches the set maximum value.
[0006] Preferably, the synchronous rectification control chip also includes a calibration module for regularly calibrating the parameters in the volt-second balance formula to ensure the accuracy of the calculation. The synchronous rectification control chip is connected to an external display device for displaying the excitation time, demagnetization time and synchronous rectification drive turn-on time of the transformer. The synchronous rectification control chip adopts a low-power design and only maintains the core calculation module of the time judgment mechanism in standby mode.
[0007] Preferably, a temperature compensation module is provided in the synchronous rectification control chip for compensating for parameter deviations caused by temperature changes to ensure the accuracy of volt-second balance calculations; the driving circuit of the synchronous rectification control chip has a fast shutdown function, and when a common risk is detected, the synchronous rectification drive can be shut down in a very short time; the synchronous rectification control chip is provided with a self-diagnosis module for regularly performing self-diagnosis on each module in the chip to ensure the normal operation of common design circuits.
[0008] Compared with the prior art, the present invention has the following beneficial effects:
[0009] In the present invention, in the process of synchronous rectification control chip, a new synchronous rectification time judgment mechanism is added to the original negative voltage shutdown mechanism. According to the input voltage and the output voltage, according to the classic volt-second balance formula VIN*Ton=n*Vo*Toff in the flyback converter, the excitation time and demagnetization time of the transformer are calculated, so as to obtain the driving opening time of the synchronous rectification, and then set the maximum value of the driving time to ensure that the opening of the synchronous rectification is never greater than the demagnetization time of the transformer, so as to achieve the purpose of preventing the synchronous rectification chip from being misconnected and ensuring the absolute safety of the chip control.
[0010] In the present invention, VIN*Ton=n*Vo*Toff in the volt-second balance formula, VIN, Ton, n, Vo, can all be detected or calculated by this circuit, and Toff, that is, the demagnetization time of the transformer and the turn-on time of the synchronous rectification controller, can be calculated. After being calculated, a time threshold can be easily set, which can be 1.1 times, 1.2 times, etc. of the original demagnetization time, or a fixed time constant, collectively referred to as Tth. When the negative voltage detection of the synchronous rectification control chip is disturbed or fails due to circuit abnormality, a time threshold is obtained by using the circuit of this patent, thereby performing secondary protection on the synchronous rectification chip to ensure that the turn-on of the synchronous rectification is never greater than the demagnetization time of the transformer, thereby preventing the synchronous rectification chip from being mistakenly turned on.
[0011] In the present invention, by providing. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 This is a circuit diagram of a flyback power supply with synchronous rectification on the secondary side;
[0013] Figure 2 It is the VG (Primary / SR) circuit diagram of the present invention;
[0014] Figure 3 This is the IsD 50% SR Conduction circuit diagram of the present invention;
[0015] Figure 4 This is the VDS, VGS and synchronous rectification control circuit diagram of the present invention;
[0016] Figure 5 It is a traditional schematic diagram without circuits;
[0017] Figure 6 It is a schematic diagram of the common line prevention structure of the present invention. DETAILED DESCRIPTION
[0018] The following embodiments of the present invention are described in further detail in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.
[0019] See also Figure 1-Figure 6 The present invention provides a common design circuit for preventing synchronous rectification in a Flyback flyback architecture, including a synchronous rectification control chip, wherein the synchronous rectification control chip is provided with: an original negative voltage shutdown mechanism; a newly added synchronous rectification time judgment mechanism, the time judgment mechanism comprising: a calculation module for calculating the excitation time Ton and the demagnetization time Toff of the transformer according to the equality of excitation and demagnetization in the flyback converter and using the classic volt-second balance formula VINTon=nVo*Toff in the flyback converter; a setting module for setting the maximum value of the synchronous rectification drive opening time according to the calculated demagnetization time Toff, so as to ensure that the opening time of the synchronous rectification is never greater than the demagnetization time of the transformer.
[0020] The synchronous rectification control chip also includes a storage unit for storing parameters related to the volt-second balance formula, the parameters including the input voltage VIN, the output voltage Vo and the transformer turns ratio n. The time judgment mechanism of the synchronous rectification control chip also includes a monitoring module for real-time monitoring of the primary side voltage and current of the transformer to obtain real-time data required for calculating the volt-second balance. An alarm module is provided in the synchronous rectification control chip, which sends an alarm signal when the calculated synchronous rectification drive turn-on time approaches or reaches the set maximum value.
[0021] The synchronous rectification control chip also includes a calibration module for regularly calibrating the parameters in the volt-second balance formula to ensure the accuracy of the calculation. The synchronous rectification control chip is connected to an external display device to display the transformer's excitation time, demagnetization time and synchronous rectification drive turn-on time. The synchronous rectification control chip adopts a low-power design and only maintains the core calculation module of the time judgment mechanism in standby mode.
[0022] A temperature compensation module is provided in the synchronous rectification control chip to compensate for parameter deviations caused by temperature changes and ensure the accuracy of the volt-second balance calculation. The drive circuit of the synchronous rectification control chip has a fast shutdown function. When a common risk is detected, the synchronous rectification drive can be shut down in a very short time. A self-diagnosis module is provided in the synchronous rectification control chip to regularly perform self-diagnosis on each module in the chip to ensure the normal operation of the common design circuit.
[0023] Working principle:
[0024] In the first step, in the Flyback flyback power supply, in the process of synchronous rectification control chip, a new synchronous rectification time judgment mechanism is added to the original negative voltage shutdown mechanism. According to the input voltage and output voltage, according to the classic volt-second balance formula VIN*Ton=n*Vo*Toff in the flyback converter, the excitation time and demagnetization time of the transformer are calculated, so as to obtain the driving opening time of the synchronous rectification, and then set the maximum value of the driving time to ensure that the opening of the synchronous rectification is never greater than the demagnetization time of the transformer, so as to achieve the purpose of preventing the synchronous rectification chip from being misconnected and ensuring the absolute safety of chip control.
[0025] The second step is that in the Flyback flyback architecture, in order to improve efficiency, a synchronous rectifier control chip is used on the secondary side. Taking the most classic and commonly used chips as examples, the MP6908 of MPS Semiconductor or the NCP4303 of ONSEMI, both use two pins of the synchronous rectifier chip to detect the current flowing through the MOS, that is, the voltage across the Drain and Source of the MOS at this time, which we call VDS voltage for short. That is, the two pins VD and VSS are connected to the Drain and Source of the MOS respectively to detect the voltage drop caused by the current flowing through the MOS.
[0026] Specific process: When the primary PWM is turned on in the flyback conversion, the primary MOS is turned on, and the secondary VDS voltage is high. At this time, the secondary synchronous rectification does not flow current, and the synchronous rectification controller does not drive VGS to a low level. When the primary PMW is turned off, the primary MOS is turned off, the secondary synchronous rectification is turned on, and VGS is high. At this time, the current flows through the synchronous rectification MOSFET. Because of the internal resistance Rds_on of the MOSFET, a voltage drop V=I*Rds_on will be generated across the VDS of the MOSFET. Because the current direction is from the Source to the Drain of the MOS, a negative voltage is generated on the VDS of the MOS. Traditional synchronous rectification control chips detect this negative voltage to shut down the synchronous rectification MOS. For example, the shutdown point is usually set at -3mV. Assuming that the Rds_on of the MOS is 3mΩ, the corresponding shutdown current is -3mV / 3mΩ=1A, that is, when the current is less than 1A, the MOS is ready to be shut down. However, in the above traditional detection and control method, in the switching power supply, the MOS and ground noise are very large, which may cause the chip driving MOSFET to be turned on by mistake or delayed. The synchronous rectification control chip is turned on by mistake or delayed, which will make the primary and secondary sides common, thereby causing the flyback converter to be common, which will cause the machine to explode and damage the power supply.
[0027] The third step is that in the present patent circuit, in addition to the traditional voltage amplifier between VD and VSS, the ADC is used to detect the current of the MOS, that is, the VDS voltage of the MOS, so as to control the on and off of the MOS. A new mechanism is introduced, which introduces three new detections. The first is pulse capture, which uses the MCU to capture the pulse width of the VDS level. The second is ADC detection, which uses the MCU to measure the height of the pulse. The third is ADC detection of the VDD voltage, which is based on the excitation and demagnetization of the flyback converter. Balance, there is a classic volt-second balance formula VIN*Ton=n*Vo*Toff, VIN is the DC power after the AC input voltage is rectified by the rectifier bridge, n is the turns ratio of the flyback transformer, Vo is the output voltage, Ton is the primary turn-on time, Toff is the secondary turn-on time, and the height of the secondary VDS is VDS=VIN / n+Vo. When the MCU obtains the width and height of VDS, n can be pre-designed, that is, n is known, and the Vo voltage can be measured at the same time, so the value of VIN can be known through the above equation. The width of VDS is Ton, so the value of Ton is known, and the turns ratio n is a designed known value. In summary, in the volt-second balance formula, VIN*Ton=n*Vo*Toff, VIN, Ton, n, Vo can all be detected or calculated by this patented circuit, so Toff, that is, the demagnetization time of the transformer, and whether the turn-on time of the synchronous rectifier controller can be calculated can be easily calculated. Once calculated, a time threshold can be easily set, which can be 1.1 times, 1.2 times, etc. of the original demagnetization time, or a fixed time constant, which we collectively refer to as Tth. When the negative voltage detection of the synchronous rectifier control chip is disturbed or fails due to circuit abnormality, the circuit of this patent is used to obtain a time threshold, thereby performing secondary protection on the synchronous rectifier chip, ensuring that the opening of the synchronous rectifier is never greater than the demagnetization time of the transformer, preventing the synchronous rectifier chip from being mistakenly connected, and ensuring that the opening of the synchronous rectifier is never greater than the demagnetization time of the transformer, thereby achieving the purpose of preventing the synchronous rectifier chip from being mistakenly connected, ensuring that the chip control is absolutely safe, and avoiding the risk of power supply damage.
[0028] A LENOVO 65W laptop power supply was used to test the effect of this circuit. The domestically produced SL006R100 synchronous rectification MOS was selected. Noise interference was injected into the secondary circuit to measure whether the synchronous rectification control chip was turned off. The experimental data showed that when the noise of the injected signal exceeded 100mV, the control chip became abnormal and could not turn off the MOS drive normally, which would cause the power supply to explode and be damaged. After adding the patented control mechanism, the MOS drive could be turned off normally and the power supply was not damaged. The experiment proved that this circuit has obvious effects.
[0029] The following is the data of synchronous rectification MOS test with different interferences injected into the secondary side of the power supply:
[0030]
[0031] The following is a further elaboration based on the above data:
[0032] As shown in the above data, the synchronous rectification MOS uses the domestic SL006R100. The noise interference is injected into the secondary circuit to measure whether the synchronous rectification control chip is turned off. The experimental data shows that when the noise of the injected signal exceeds 100mV, the control chip becomes abnormal and cannot normally turn off the MOS drive, which will cause the power supply to explode and damage. When the patented control mechanism is added, the MOS drive can be turned off normally and the power supply is not damaged. The experiment proves that this circuit has a significant effect. The actual data of this circuit in the experiment is consistent with the theoretical design, which ensures that the synchronous rectification controller is normally turned off and prevents common effects.
[0033] The embodiments of the present invention are given for the purpose of illustration and description, and are not intended to be exhaustive or to limit the invention to the disclosed forms. Many modifications and variations will be apparent to those of ordinary skill in the art. The embodiments are selected and described in order to better illustrate the principles and practical applications of the present invention and to enable those of ordinary skill in the art to understand the present invention and thereby design various embodiments with various modifications suitable for specific uses.
Claims
1. A common design circuit for preventing synchronous rectification in a flyback architecture, characterized in that: It comprises a synchronous rectification control chip, wherein the synchronous rectification control chip is provided with: Original negative voltage shutdown mechanism; A newly added synchronous rectification time judgment mechanism includes: A calculation module for calculating the excitation time Ton and demagnetization time Toff of the transformer using the classic volt-second balance formula VINTon=nVo*Toff in the flyback converter according to the equality of excitation and demagnetization in the flyback converter; A setting module for setting the maximum value of the synchronous rectification drive on-time is used according to the calculated demagnetization time Toff, so as to ensure that the on-time of the synchronous rectification is never greater than the demagnetization time of the transformer.
2. The anti-common design circuit of synchronous rectification in a Flyback flyback architecture as claimed in claim 1, characterized in that: The synchronous rectification control chip also includes a storage unit for storing parameters related to the volt-second balance formula, wherein the parameters include an input voltage VIN, an output voltage Vo, and a transformer turns ratio n.
3. The anti-common design circuit of synchronous rectification in a Flyback flyback architecture as claimed in claim 1, characterized in that: The time judgment mechanism of the synchronous rectification control chip also includes a monitoring module for real-time monitoring of the voltage and current on the primary side of the transformer to obtain real-time data required for calculating the volt-second balance.
4. The anti-common design circuit of synchronous rectification in a Flyback flyback architecture as claimed in claim 1, characterized in that: The synchronous rectification control chip is provided with an alarm module, which sends out an alarm signal when the calculated synchronous rectification drive on time approaches or reaches a set maximum value.
5. The anti-common design circuit of synchronous rectification in a Flyback flyback architecture as claimed in claim 1, characterized in that: The synchronous rectification control chip also includes a calibration module for regularly calibrating the parameters in the volt-second balance formula to ensure the accuracy of the calculation.
6. The anti-common design circuit of synchronous rectification in a Flyback flyback architecture as claimed in claim 1, characterized in that: The synchronous rectification control chip is connected to an external display device and is used to display the transformer's excitation time, demagnetization time and synchronous rectification drive on time.
7. The anti-common design circuit of synchronous rectification in a Flyback flyback architecture as claimed in claim 1, characterized in that: The synchronous rectification control chip adopts a low power consumption design, and only the core calculation module of the time judgment mechanism is kept running in the standby state.
8. The anti-common design circuit of synchronous rectification in a Flyback flyback architecture as claimed in claim 1, characterized in that: The synchronous rectification control chip is provided with a temperature compensation module for compensating for parameter deviations caused by temperature changes to ensure the accuracy of volt-second balance calculations.
9. The common-connection prevention design circuit for synchronous rectification in a Flyback flyback architecture as claimed in claim 1, characterized in that: The driving circuit of the synchronous rectification control chip has a fast shut-down function, and when a common risk is detected, the synchronous rectification drive can be shut down in a very short time.
10. The common-connection prevention design circuit for synchronous rectification in a Flyback flyback architecture as claimed in claim 1, characterized in that: The synchronous rectification control chip is provided with a self-diagnosis module for periodically performing self-diagnosis on each module in the chip to ensure the normal operation of the common design circuit.