Power chip over-temperature protection control method, device, equipment and medium
By calculating the target protection control cycle number of the power chip, the temperature is judged and the current drop control is performed when the preset maximum temperature is reached, the problems of inaccurate measurement of temperature sensing elements in the prior art are solved, and effective over-temperature protection and cost-effectiveness of the power chip are achieved.
Patent Information
- Application Number
- CN202411830687.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-12
- Publication Date
- 2025-03-25
AI Technical Summary
When the prior art overtemperature protection of power chips, there are problems of inaccurate measurement of temperature sensing elements and high cost, and software control methods limit the power range of the motor operation.
By calculating the target protection control cycle number based on the relationship between the current on current of the power chip and the thermal equilibrium current, the target protection control period is calculated to judge the chip temperature and perform current drop control when the temperature reaches a preset maximum.
Effective overtemperature protection of power chips is achieved, avoiding the damage to the chip by excessive temperatures, and reducing hardware costs and motor working restrictions.
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Abstract
Description
Technical Field
[0001] The present application relates to the field of chip protection technology, and in particular to a method, device, equipment and medium for over-temperature protection control of a power chip. Background Art
[0002] With the development of the electric vehicle industry, more and more motors are being used in vehicles. These motors need to be driven by power drive circuits. The power drive circuits of the motors are mainly composed of multiple power chips such as MOS tubes or IGBTs. These power chips will generate heat when high power is output. In certain abnormal situations such as motor overload, the temperature of the power chips will rise sharply. If not protected, it will cause the chips and circuit boards to burn out, and in severe cases, it will cause safety accidents such as fire.
[0003] In the prior art, a temperature sensing element such as a thermistor is generally used to detect the temperature of a power chip, and the conduction current is controlled according to the detected temperature, or software control is used for over-temperature protection.
[0004] Regarding the method of detecting temperature using temperature-sensing elements such as thermistors, since thermistors are generally far away from the power chips, the detected temperature can only reflect the temperature of the point where the thermistor is located on the circuit substrate, and cannot accurately reflect the temperature of each power chip. If the temperature measurement of power chips at different positions on the power circuit is to be achieved, the number of thermistors needs to be increased, which will increase the cost.
[0005] For software control, this method generally sets an overcurrent point. Once this overcurrent point is reached, power reduction control is immediately performed to reduce the on-current of the chip. The disadvantage of this control method is that the motor cannot operate in a power range exceeding the overcurrent point, so it has great limitations. Summary of the invention
[0006] In view of this, the embodiments of the present application provide a power chip over-temperature protection control method, device, equipment and medium, which can effectively protect the power chip from over-temperature.
[0007] In a first aspect, an embodiment of the present application provides a power chip over-temperature protection control method, comprising:
[0008] According to the relationship between the current conduction current of the power chip and the thermal balance current, the target protection control cycle number is determined according to the preset calculation rule; wherein the target protection control cycle number is used to judge the temperature parameter of the power chip;
[0009] If the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, or the control identifier is a preset identifier value, current reduction control is performed on the power chip; wherein the control identifier is an identifier of whether the target protection control cycle number is greater than 0 when performing current reduction control.
[0010] In some embodiments, the step of determining the target number of protection control cycles according to a preset calculation rule based on the magnitude relationship between the current on-state current of the power chip and the thermal balance current includes:
[0011] If the current on-current is the first on-current, the current target protection control cycle number is determined according to the ratio of the first calibrated protection control cycle number to the first current protection control cycle number and the sum of the previous target protection control cycle number; wherein, the first on-current is an on-current greater than the thermal equilibrium current; and the first current protection control cycle number is the protection control cycle number corresponding to the first on-current.
[0012] In some embodiments, the step of determining the target number of protection control cycles according to a preset calculation rule based on the magnitude relationship between the current on-state current of the power chip and the thermal balance current includes:
[0013] If the current on-current is the second on-current, the current target protection control cycle number is determined based on the difference between the previous target protection control cycle number and the ratio of the second calibrated protection control cycle number to the second current protection control cycle number; wherein the second on-current is a on-current that is less than the thermal equilibrium current; and the second current protection control cycle number is the protection control cycle number corresponding to the second on-current.
[0014] In some embodiments, obtaining the first current protection control cycle number includes:
[0015] Determine the first calibration protection control cycle number according to the first calibration time and the preset control cycle; wherein the first calibration time is the time for the power chip to reach the preset maximum temperature from the thermal equilibrium temperature when the power chip works through the first calibration conduction current;
[0016] The target heating time is determined according to the calibrated cumulative heat and the target cumulative heat; wherein the calibrated cumulative heat is the heat accumulated when the power chip reaches the preset maximum temperature from the thermal equilibrium temperature when the power chip works at the first calibrated conduction current; the target cumulative heat is the heat accumulated when the power chip reaches the preset maximum temperature from the thermal equilibrium temperature when the power chip works at the first conduction current;
[0017] The first current protection control cycle number is determined according to the first calibrated protection control cycle number and the target heating time.
[0018] In some embodiments, obtaining the second current protection control cycle number includes:
[0019] Determine the second calibration protection control cycle number according to the second calibration time and the preset control cycle; wherein the second calibration time is the time for the power chip to drop from the preset maximum temperature to the thermal equilibrium temperature when the power chip works through the second calibration conduction current;
[0020] Determine the target heat dissipation time according to the calibrated heat dissipation and the target heat dissipation; wherein the calibrated heat dissipation is the heat dissipated when the power chip is working at the second calibrated conduction current and the power chip is cooled from the preset maximum temperature to the thermal equilibrium temperature; the target heat dissipation is the heat dissipated when the power chip is working at the second conduction current and the power chip is cooled from the preset maximum temperature to the thermal equilibrium temperature;
[0021] The second current protection control cycle number is determined according to the second calibrated protection control cycle number and the target heat dissipation time.
[0022] In some embodiments, it also includes: when it is first determined that the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, setting the control flag to a preset flag value.
[0023] In some embodiments, it also includes: when the target protection control cycle number is less than or equal to 0, clearing the control flag.
[0024] In a second aspect, an embodiment of the present application provides a power chip over-temperature protection control device, comprising:
[0025] A judgment module, used to determine the target protection control cycle number according to the relationship between the current conduction current of the power chip and the thermal balance current according to a preset calculation rule; wherein the target protection control cycle number is used to judge the temperature parameter of the power chip;
[0026] A control module, used to perform current reduction control on the power chip if the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, or the control identifier is a preset identifier value; wherein the control identifier is an identifier of whether the target protection control cycle number is greater than 0 when performing current reduction control.
[0027] In a third aspect, an embodiment of the present application provides a terminal device, which includes a processor and a memory, wherein the memory stores a computer program, and the processor is used to execute the computer program to implement the above-mentioned power chip over-temperature protection control method.
[0028] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program, which, when executed on a processor, implements the above-mentioned power chip over-temperature protection control method.
[0029] The embodiments of the present application have the following beneficial effects: the present application first determines the relationship between the current on-current and the thermal balance current of the power chip, then determines the target protection control cycle number according to the corresponding calculation rules, and then calculates the temperature of the power chip by calculating the target protection control cycle number. When the temperature of the power chip reaches the preset maximum temperature, a current reduction operation is performed to avoid the impact of excessive temperature of the power chip on the chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0031] Figure 1 A first flow chart of a power chip over-temperature protection control method according to an embodiment of the present application is shown;
[0032] Figure 2 A second flow chart of the power chip over-temperature protection control method according to an embodiment of the present application is shown;
[0033] Figure 3 A third flow chart of the power chip over-temperature protection control method according to an embodiment of the present application is shown;
[0034] Figure 4 A fourth flow chart of the power chip over-temperature protection control method according to an embodiment of the present application is shown;
[0035] Figure 5 A schematic diagram of the structure of a power chip over-temperature protection control device according to an embodiment of the present application is shown. DETAILED DESCRIPTION
[0036] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.
[0037] The components of the embodiments of the present application generally described and shown in the drawings herein may be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.
[0038] Hereinafter, the terms "including", "having" and their cognates that can be used in various embodiments of the present application are intended only to indicate specific features, numbers, steps, operations, elements, components or a combination of the foregoing items, and should not be understood as first excluding the existence of one or more other features, numbers, steps, operations, elements, components or a combination of the foregoing items or increasing the possibility of one or more features, numbers, steps, operations, elements, components or a combination of the foregoing items. In addition, the terms "first", "second", "third" and the like are only used to distinguish descriptions and cannot be understood as indicating or implying relative importance.
[0039] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meanings as those generally understood by those skilled in the art to which the various embodiments of the present application belong. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meanings as the contextual meanings in the relevant technical field and will not be interpreted as having idealized meanings or overly formal meanings unless clearly defined in the various embodiments of the present application.
[0040] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.
[0041] Since the prior art uses temperature-sensing elements such as thermistors to detect the temperature of the power chip, and then controls the on-current based on the detected temperature, it is inaccurate and will increase the hardware cost. In addition, the prior art uses pure software control, which has great limitations because the motor cannot operate in a power range that exceeds the overcurrent point. Based on this, the present application proposes a power chip over-temperature protection control method, device, equipment and medium. When the on-current of the power chip is greater than the thermal equilibrium current, the control method of the present application begins to calculate the temperature of the power chip by accumulating the target number of protection control cycles, and performs current reduction control when the calculated temperature of the power chip reaches the preset maximum temperature, and exits the control when the calculated temperature of the power chip drops to the thermal equilibrium temperature. The method of the present application can effectively implement over-temperature protection of the power chip.
[0042] The power chip over-temperature protection control method is described below in conjunction with some specific embodiments.
[0043] Figure 1 A schematic flow chart of a power chip over-temperature protection control method according to an embodiment of the present application is shown. Exemplarily, the power chip over-temperature protection control method comprises the following steps:
[0044] Step S100, determining a target number of protection control cycles according to a preset calculation rule based on a magnitude relationship between a current on-state current of a power chip and a thermal balance current.
[0045] The target protection control cycle number is a temperature parameter used to determine the power chip. The protection cycle control number is used to indicate the number of cycles that the power chip needs to reach a preset maximum temperature through several preset control cycles when the power chip is working with a certain conduction current.
[0046] Among them, the thermal balance current refers to the current of the power chip in a stable state, that is, the conduction current when the heat generation and heat dissipation of the power chip reach a balance.
[0047] The thermal equilibrium current is obtained through test calibration. Specifically, when the power chip is turned on and transmits a large current, the conduction loss is its main power loss and is also the main factor causing the power device to heat up. Therefore, since the other losses of the power chip are small, without considering other power losses, when the power chip is turned on and the heat reaches thermal equilibrium, the following formula 1 is established:
[0048] In formula 1, I b is the conduction current when the power chip reaches thermal equilibrium, that is, the thermal equilibrium current; R is the conduction internal resistance of the power chip; T b is the temperature at which the power chip reaches thermal equilibrium (i.e. the thermal equilibrium temperature described below), T amb is the ambient temperature, R th is the total thermal resistance from the power chip to the atmosphere; through experimental calibration, the thermal balance current I of the power chip can be obtained b size.
[0049] The test calibration steps can be:
[0050] 1. Prepare the experimental environment.
[0051] Including temperature control and test equipment preparation. Among them, temperature control is: select a stable ambient temperature, such as room temperature (25°C), or set a specific temperature according to actual conditions. Test equipment preparation is: prepare a power chip test platform, including power supply, load, temperature sensor, etc.
[0052] 2. Initial settings.
[0053] Install the power chip on the test platform and connect the power supply and load. Install the temperature sensor and make sure that the temperature sensor is close to the key part of the power chip to accurately measure the temperature.
[0054] 3. Gradually increase the current.
[0055] At the beginning, a small current (e.g. 1A) is applied to the power chip, and the temperature at this time is recorded. The current is gradually increased, and each time a fixed current increment (e.g. 0.1A) is added, the corresponding temperature change is recorded.
[0056] 4. Observe temperature changes.
[0057] At each current point, record the temperature change for a period of time (e.g. 1 minute) to ensure that the temperature is stable. Continue to increase the current until the temperature no longer rises significantly.
[0058] 5. Determine the thermal equilibrium current.
[0059] Find a current point where the temperature reaches a stable state and no longer rises. This current point is the thermal equilibrium current.
[0060] It can be understood that the above-mentioned process for thermal balance current test calibration is only exemplary, and the specific calibration process can be set according to the test personnel, and is not specifically limited here. In addition, since the thermal balance currents corresponding to different thermal balance temperatures may also be different, when performing thermal balance current test calibration, a thermal balance temperature can be preset first, such as the thermal balance temperature can be set to 60 degrees, 80 degrees, 40 degrees, etc., and then when performing the test calibration, the small current for the power chip can be set according to experience (the difference between the small current set at this time and the thermal balance current is usually not large), and the thermal balance current corresponding to the preset thermal balance temperature can be determined quickly in the subsequent calibration process. It should be noted that the above-mentioned preset thermal balance temperature is only exemplary and does not limit the scope of this embodiment.
[0061] In step S100, when the power chip operates with a conduction current greater than the thermal equilibrium current, the power chip generates heat faster than it dissipates heat, which causes the temperature of the power chip to become higher and higher. At this time, the temperature of the power chip is determined by calculating the target protection control cycle number.
[0062] In some embodiments, if the current on-current is the first on-current, the current target protection control cycle number is determined based on the ratio of the first calibrated protection control cycle number to the first current protection control cycle number and the sum of the previous target protection control cycle number.
[0063] Among them, the first on-current is a on-current greater than the thermal equilibrium current; the first current protection control cycle number is the protection control cycle number corresponding to the first on-current.
[0064] Exemplarily, when determining the target number of protection control cycles, it is necessary to first determine the first calibrated number of protection control cycles and the first current number of protection control cycles.
[0065] The first calibration protection period number may be determined according to the first calibration time and the preset control period.
[0066] Exemplarily, when the power chip operates with a first calibrated on-current greater than the thermal equilibrium current, the power chip generates heat faster than it dissipates heat. In this case, after the first calibration time, the temperature of the power chip will reach the preset maximum temperature allowed for normal operation. Among them, the greater the on-current of the power chip, the faster the temperature rises. A preset maximum allowable temperature is set, and through test calibration (the test calibration process is a conventional technology and is not described here), a first calibration time corresponding to the first calibrated on-current can be obtained, and after the first calibration time is obtained. In this embodiment, the first calibration time is converted into the first calibration protection cycle number, which facilitates the subsequent determination of the power chip temperature when other on-currents greater than the thermal equilibrium current are used.
[0067] Exemplarily, the first calibration time may be converted into the first calibration protection period number by using Formula 2:
[0068] In formula 2, C p is the first calibration protection cycle number, t p is the first calibration time, and T is the set control period.
[0069] In some embodiments, Figure 2 As shown, the step of obtaining the first current protection control cycle number includes:
[0070] Step S110, determining a first calibration protection control cycle number according to the first calibration time and a preset control cycle.
[0071] The first calibration time is the time it takes for the power chip to reach a preset maximum temperature from a thermal equilibrium temperature when the power chip operates with a first calibration conduction current.
[0072] The first calibration protection control cycle number has been explained above and will not be repeated here.
[0073] Step S120, determining a target heating time according to the calibrated cumulative heat and the target cumulative heat.
[0074] Among them, the calibrated cumulative heat is the heat accumulated when the power chip reaches the preset maximum temperature from the thermal equilibrium temperature when the power chip operates at the first calibrated conduction current; the target cumulative heat is the heat accumulated when the power chip reaches the preset maximum temperature from the thermal equilibrium temperature when the power chip operates at the first conduction current.
[0075] When the power chip operates with a conduction current greater than the thermal equilibrium current, when the power chip is heated from the thermal equilibrium temperature to the preset maximum temperature, its accumulated heat can be calculated by Formula 3, which is:
[0076]
[0077] In formula 3, Q1 is the accumulated heat, I1 is the conduction current greater than the thermal equilibrium current, and I b is the thermal equilibrium current, R is the on-state internal resistance of the power chip, and t1 is the time taken for the power chip to heat up from the thermal equilibrium temperature to the preset maximum temperature.
[0078] It should be noted that Formula 3 in this embodiment is to increase the safety of power chip protection, so the heat dissipation of the power chip is not considered when calculating the accumulated heat, that is, it is assumed that the heat dissipation of the power chip per unit time is constant.
[0079] According to formula 3, the calibrated cumulative heat
[0080] Target cumulative calories In this formula, I x1 is the first conduction current, t x1 is the target heating time.
[0081] Thanks to Q p and Q x1 are the accumulated heat from the thermal equilibrium temperature to the preset maximum temperature, then Q p =Q x1 Therefore,
[0082] Step S130, determining a first current protection control cycle number according to a first calibrated protection control cycle number and a target heating time.
[0083] Exemplarily, since the first current protection control cycle number Then combine formula 2 with the target heating time t x The calculation formula is
[0084] After the first current protection control cycle number is determined, the current target protection control cycle number can be determined based on the ratio of the first calibrated protection control cycle number to the first current protection control cycle number and the sum of the previous target protection control cycle number.
[0085] Exemplarily, the target number of protection control cycles may be determined by Formula 4, which is:
[0086]
[0087] In formula 4, C is the target protection control cycle number, and C1 is the target protection control cycle number of the previous control cycle.
[0088] Since the first calibrated protection control cycle number is the first calibrated protection control cycle number converted by the first calibrated time, that is, when the power chip works through the first calibrated conduction current, it passes through several preset control cycles to reach the preset maximum temperature. The first current protection control cycle number is the number of cycles when the power chip works through the first conduction current, it passes through several preset control cycles to reach the preset maximum temperature. The relationship between the first calibrated protection control cycle number and the first current protection control cycle number is proportional to the corresponding temperature increase. Therefore, when the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, it indicates that the temperature of the power chip has reached or exceeded the preset maximum temperature. At this time, current reduction control must be performed, such as by reducing the drive duty cycle to achieve so that the conduction current of the power chip is less than the thermal equilibrium current.
[0089] In step S100, when the power chip operates with a conduction current less than the thermal equilibrium current, the power chip dissipates heat faster than it generates heat, which causes the temperature of the power chip to become lower and lower. At this time, the temperature of the power chip is also determined by calculating the target protection control cycle number.
[0090] In some embodiments, if the current on-current is the second on-current, the current target protection control cycle number is determined based on the difference between the previous target protection control cycle number and the ratio of the second calibrated protection control cycle number to the second current protection control cycle number.
[0091] Among them, the second on-current is a on-current that is smaller than the thermal equilibrium current; and the second current protection control cycle number is the protection control cycle number corresponding to the second on-current.
[0092] Exemplarily, when the power chip operates with the second conduction current, when determining the target number of protection control cycles, it is necessary to first determine the second calibrated number of protection control cycles and the second current number of protection control cycles.
[0093] The second calibration protection period number may be determined according to the second calibration time and the preset control period.
[0094] Exemplarily, when the power chip operates at a second calibrated on-current that is less than the thermal equilibrium current, the power chip dissipates heat faster than it generates heat. In this case, after the second calibration time, the temperature of the power chip will drop from the preset maximum temperature to the thermal equilibrium temperature. Similarly, through test calibration (the test calibration process is a conventional technology and is not described here), the second calibration time corresponding to the second calibrated on-current can be obtained, and the second calibration time is obtained. In this embodiment, the second calibration time is converted into the second calibration protection cycle number, which facilitates the subsequent determination of the power chip temperature when other on-currents less than the thermal equilibrium current are used.
[0095] Exemplarily, the first calibration time may be converted into the first calibration protection period number by using Formula 5:
[0096] In formula 2, C n is the second calibration protection cycle number, t n is the second calibration time, and T is the set control period.
[0097] In some embodiments, Figure 3 As shown, the step of obtaining the second current protection control cycle number includes:
[0098] Step S140, determining the second calibration protection control cycle number according to the second calibration time and the preset control cycle.
[0099] The second calibration time is the time it takes for the power chip to drop from a preset maximum temperature to a thermal equilibrium temperature when the power chip operates with a second calibration conduction current.
[0100] The first calibration protection control cycle number has been explained above and will not be repeated here.
[0101] Step S150, determining a target heat dissipation time according to the calibrated heat dissipation and the target heat dissipation.
[0102] Among them, the calibrated heat dissipation is the heat dissipated by the power chip when the power chip drops from the preset maximum temperature to the thermal equilibrium temperature when the power chip operates at the second calibrated conduction current; the target heat dissipation is the heat dissipated by the power chip when the power chip drops from the preset maximum temperature to the thermal equilibrium temperature when the power chip operates at the second conduction current.
[0103] When the power chip operates with a conduction current less than the thermal equilibrium current, when the power chip is cooled from the preset maximum temperature to the thermal equilibrium temperature, the heat dissipated can be calculated by Formula 6, which is:
[0104] In formula 6, Q2 is the heat dissipation, I2 is the conduction current that is less than the thermal equilibrium current, and Ib is the thermal equilibrium current, R is the on-state internal resistance of the power chip, and t2 is the time taken for the power chip to cool down from the preset maximum temperature to the thermal equilibrium temperature.
[0105] According to formula 6, the calibrated heat dissipation In this formula, I n is the second rated on-state current, t n The second calibration time.
[0106] Target heat dissipation In this formula, I x2 is the second conduction current, t x2 Target cool down time.
[0107] Thanks to Q n and Q x2 are all the heat dissipated when cooling from the preset maximum temperature to the thermal equilibrium temperature, then Q n =Q x2 Therefore, the target cooling time
[0108] Step S160, determining a second current protection control cycle number according to a second calibrated protection control cycle number and a target heat dissipation time.
[0109] Exemplarily, since the second current protection control cycle number Then combine formula 5 with the target cooling time t x2 The calculation formula is
[0110] After determining the second current protection control cycle number t x2 Afterwards, the current target protection control cycle number may be determined based on the difference between the previous target protection control cycle number and the ratio of the second calibrated protection control cycle number to the second current protection control cycle number.
[0111] Exemplarily, at this time, the target number of protection control cycles can be determined by Formula 7, which is:
[0112] In Formula 7, C is the target protection control cycle number, and C1 is the target protection control cycle number of the previous control cycle.
[0113] At this time, when the target protection control cycle number is less than or equal to 0, it indicates that the temperature of the power chip has dropped to the thermal equilibrium temperature, and the control can be exited at this time.
[0114] Step S200: If the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, or the control flag is a preset flag value, current reduction control is performed on the power chip.
[0115] The control flag is used to indicate whether the target protection control cycle number is greater than 0 when executing current reduction control.
[0116] Exemplarily, when it is first determined that the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, the control flag is set to a preset flag value. When the target protection control cycle number is less than or equal to 0, the control flag is cleared.
[0117] Combine the following Figure 4 The overall process of this embodiment is described.
[0118] Step S10, determining whether the on-current of the power chip is greater than the thermal balance current.
[0119] If the conduction current is greater than the thermal equilibrium current, step S20 is executed to calculate the target protection control cycle number according to formula 4.
[0120] If the on-current of the power chip is less than the thermal equilibrium current in step S10, step S30 is executed to determine whether the target protection control cycle number is greater than 0. If the target protection control cycle number is greater than 0 in step S30, step S40 is executed to calculate the target protection control cycle number according to formula 7.
[0121] Among them, in the current control process, when the power chip works with a conduction current greater than the thermal equilibrium current, step S50 is executed to determine whether the current target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, or whether the control flag is 1. As long as any one of the conditions in step S50 is met, it means that the temperature of the power chip has not dropped to the thermal equilibrium temperature. At this time, it is necessary to continue to execute step S60 to perform current reduction control on the power chip. After step S60, the process of this control cycle is ended; then at the beginning of the next control cycle, the process is restarted from step S10 until the power chip is cooled to the thermal equilibrium temperature, and the entire process ends. It should be noted that the control flag is set to 1 when the target protection control cycle number is first calculated to be greater than or equal to the first calibrated protection control cycle number.
[0122] In addition, in step S30, if it is determined that the target protection control cycle number is less than or equal to 0, it means that the temperature of the power chip has dropped to the thermal equilibrium temperature. At this time, there is no need to perform current reduction control. Step S70 is executed to clear the control flag.
[0123] The present application first determines the magnitude relationship between the current on-state current of the power chip and the thermal equilibrium current, and then determines the target protection control cycle number according to the corresponding calculation rules, and then calculates the temperature of the power chip by calculating the target protection control cycle number obtained. When the temperature of the power chip reaches the preset maximum temperature, the current reduction operation is performed to avoid the influence of the excessive temperature of the power chip on the chip. In addition, the present application also sets a control mark, through which it can be determined whether the temperature of the power chip has been reduced to the thermal equilibrium temperature, and then it can be determined when the current reduction control can be stopped. Through the method of the present application, when the power chip is protected from over-temperature, no temperature sensing element is required, nor is a certain current point simply used as a threshold for control, and the power range of the motor is not limited. Therefore, compared with the prior art, the present application has the advantages of low cost and high adaptability.
[0124] Figure 5 A schematic diagram of the structure of a power chip over-temperature protection control device according to an embodiment of the present application is shown. Exemplarily, the power chip over-temperature protection control device includes:
[0125] The judgment module 100 is used to determine the target protection control cycle number according to the relationship between the current on-current of the power chip and the thermal balance current and according to a preset calculation rule.
[0126] The target protection control cycle number is used to determine the temperature parameter of the power chip.
[0127] The control module 200 is used to perform current reduction control on the power chip if the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, or the control identifier is a preset identifier value.
[0128] The control flag is a flag indicating whether the target protection control cycle number is greater than 0 when performing current reduction control.
[0129] It can be understood that the device of this embodiment corresponds to the power chip over-temperature protection control method of the above embodiment, and the options in the above embodiment are also applicable to this embodiment, so they will not be repeated here.
[0130] The present application also provides a terminal device. Exemplarily, the terminal device includes a processor and a memory, wherein the memory stores a computer program, and the processor runs the computer program to enable the terminal device to execute the functions of each module in the above-mentioned power chip over-temperature protection control method or the above-mentioned power chip over-temperature protection control device.
[0131] Among them, the processor can be an integrated circuit chip with signal processing capabilities. The processor can be a general-purpose processor, including a central processing unit (CPU), a graphics processing unit (GPU) and a network processor (NP), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or at least one of other programmable logic devices, discrete gates or transistor logic devices, and discrete hardware components. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc., which can implement or execute the disclosed methods, steps and logic block diagrams in the embodiments of the present application.
[0132] The memory may be, but is not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), etc. The memory is used to store a computer program, and the processor may execute the computer program accordingly after receiving an execution instruction.
[0133] The present application also provides a computer-readable storage medium for storing the computer program used in the above-mentioned terminal device. For example, the computer-readable storage medium may include, but is not limited to, various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.
[0134] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and structure diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in an alternative implementation, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the structure diagram and / or the flow diagram, and the combination of boxes in the structure diagram and / or the flow diagram, can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.
[0135] In addition, the functional modules or units in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
[0136] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a smart phone, a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application.
[0137] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.
Claims
1. A power chip over-temperature protection control method, characterized in that: include: According to the relationship between the current on-state current of the power chip and the thermal balance current, the target number of protection control cycles is determined according to a preset calculation rule; wherein the target number of protection control cycles is used to determine the temperature parameter of the power chip; If the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, or the control identifier is a preset identifier value, current reduction control is performed on the power chip; wherein the control identifier is an identifier of whether the target protection control cycle number is greater than 0 when performing current reduction control.
2. The power chip over-temperature protection control method according to claim 1, characterized in that: The method of determining the target number of protection control cycles according to a preset calculation rule based on the magnitude relationship between the current on-current of the power chip and the thermal balance current includes: If the current on-current is the first on-current, the current target protection control cycle number is determined according to the ratio of the first calibrated protection control cycle number to the first current protection control cycle number and the sum of the previous target protection control cycle number; wherein, the first on-current is an on-current greater than the thermal equilibrium current; and the first current protection control cycle number is the protection control cycle number corresponding to the first on-current.
3. The power chip over-temperature protection control method according to claim 1, characterized in that: The method of determining the target number of protection control cycles according to a preset calculation rule based on the magnitude relationship between the current on-current of the power chip and the thermal balance current includes: If the current on-current is the second on-current, the current target protection control cycle number is determined based on the difference between the previous target protection control cycle number and the ratio of the second calibrated protection control cycle number to the second current protection control cycle number; wherein the second on-current is a on-current that is less than the thermal equilibrium current; and the second current protection control cycle number is the protection control cycle number corresponding to the second on-current.
4. The power chip over-temperature protection control method according to claim 2, characterized in that: The acquisition of the first current protection control cycle number includes: Determine the first calibration protection control cycle number according to the first calibration time and the preset control cycle; wherein the first calibration time is the time for the power chip to reach the preset maximum temperature from the thermal equilibrium temperature when the power chip works through the first calibration conduction current; The target heating time is determined according to the calibrated cumulative heat and the target cumulative heat; wherein the calibrated cumulative heat is the heat accumulated when the power chip reaches the preset maximum temperature from the thermal equilibrium temperature when the power chip works at the first calibrated conduction current; the target cumulative heat is the heat accumulated when the power chip reaches the preset maximum temperature from the thermal equilibrium temperature when the power chip works at the first conduction current; The first current protection control cycle number is determined according to the first calibrated protection control cycle number and the target heating time.
5. The power chip over-temperature protection control method according to claim 3, characterized in that: The acquisition of the second current protection control cycle number includes: Determine the second calibration protection control cycle number according to the second calibration time and the preset control cycle; wherein the second calibration time is the time for the power chip to drop from the preset maximum temperature to the thermal equilibrium temperature when the power chip works through the second calibration conduction current; Determine the target heat dissipation time according to the calibrated heat dissipation and the target heat dissipation; wherein the calibrated heat dissipation is the heat dissipated when the power chip is working at the second calibrated conduction current and the power chip is cooled from the preset maximum temperature to the thermal equilibrium temperature; the target heat dissipation is the heat dissipated when the power chip is working at the second conduction current and the power chip is cooled from the preset maximum temperature to the thermal equilibrium temperature; The second current protection control cycle number is determined according to the second calibrated protection control cycle number and the target heat dissipation time.
6. The power chip over-temperature protection control method according to claim 1, characterized in that: Also includes: When it is first determined that the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, the control flag is set to the preset flag value.
7. The power chip over-temperature protection control method according to claim 1, characterized in that: Also includes: When the target protection control cycle number is less than or equal to 0, the control flag is cleared.
8. A power chip over-temperature protection control device, characterized in that: include: A judgment module, used to determine the target protection control cycle number according to the relationship between the current conduction current of the power chip and the thermal balance current according to a preset calculation rule; wherein the target protection control cycle number is used to judge the temperature parameter of the power chip; A control module, used to perform current reduction control on the power chip if the target protection control cycle number is greater than or equal to the first calibrated protection control cycle number, or the control identifier is a preset identifier value; wherein the control identifier is an identifier of whether the target protection control cycle number is greater than 0 when performing current reduction control.
9. A terminal device, characterized in that: The terminal device includes a processor and a memory, the memory stores a computer program, and the processor is used to execute the computer program to implement the power chip over-temperature protection control method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that: It stores a computer program, which, when executed on a processor, implements the power chip over-temperature protection control method according to any one of claims 1-7.